inital commit it will work with nor flash and emmc

01_Code/FES_Common_Library/CircularQ/CircularQ.c

@@ -0,0 +1,225 @@
+/**
+  ******************************************************************************
+  * @file    queue.c
+  * @author  MCD Application Team
+  * @brief   Queue management
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include <stdint.h>
+#include "CircularQ.h"
+/* Private define ------------------------------------------------------------*/
+#define ELEMENT_SIZE_LEN 2
+/* Private typedef -----------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+static void queue_copy(uint8_t* out, const uint8_t* in, uint16_t size);
+static int16_t circular_queue_get_free_size(queue_param_t* queue);
+static void add_elementSize_and_inc_writeIdx(queue_param_t* queue,uint16_t element_size);
+
+/* Public functions ----------------------------------------------------------*/
+void circular_queue_init(queue_param_t* queue, uint8_t* queue_buff, uint16_t queue_size)
+{
+  queue->queue_read_idx=0;
+  queue->queue_write_idx=0;
+  queue->queue_nb_element=0;
+  queue->queue_buff=queue_buff;
+  queue->queue_size=queue_size;
+  queue->queue_full=0;
+}
+
+int circular_queue_add(queue_param_t* queue, uint8_t* buff, uint16_t buff_size)
+{
+  int status;  
+  int16_t free_buff_len=circular_queue_get_free_size(queue);
+  
+  if ((buff_size+ELEMENT_SIZE_LEN<=free_buff_len)&& 
+      ((queue->queue_write_idx+buff_size+ELEMENT_SIZE_LEN<=queue->queue_size) 
+        || (queue->queue_write_idx>=queue->queue_size-ELEMENT_SIZE_LEN))) /*elementSize cut in 2 or elementSize at Top*/
+  {
+    /* add in one element */
+    add_elementSize_and_inc_writeIdx(queue, buff_size);
+    queue_copy(queue->queue_buff+queue->queue_write_idx,buff,buff_size);
+    queue->queue_write_idx = (uint16_t)(queue->queue_write_idx + buff_size);
+    /*modulo queue_size*/
+    if (queue->queue_write_idx==queue->queue_size)
+    {
+        queue->queue_write_idx=0;
+    }
+    /* add one element */
+    queue->queue_nb_element++; 
+    /*in case que is full*/
+    if (queue->queue_write_idx== queue->queue_read_idx)
+    {
+      queue->queue_full=1;
+    }
+    status=0;
+  }
+  else if (buff_size+2*ELEMENT_SIZE_LEN<=free_buff_len)
+  {
+    /* split buffer in two elements */
+    /*fill top of queue with first element of size top_size*/
+    uint16_t top_size = (uint16_t)(queue->queue_size-(queue->queue_write_idx+(uint16_t)ELEMENT_SIZE_LEN));
+    add_elementSize_and_inc_writeIdx(queue,top_size);
+    queue_copy(queue->queue_buff+queue->queue_write_idx,buff,top_size);
+    queue->queue_write_idx=0;
+
+    /*fill bottom of queue with second element of size buff_size-top_size*/
+    buff_size=(uint16_t)(buff_size - top_size);
+    add_elementSize_and_inc_writeIdx(queue, buff_size);
+    queue_copy(queue->queue_buff+queue->queue_write_idx,buff+top_size,buff_size);
+    queue->queue_write_idx = (uint16_t)(queue->queue_write_idx + buff_size);
+    /* add two elements */
+    queue->queue_nb_element=(uint16_t)(queue->queue_nb_element + 2);
+    /*in case que is full*/
+    if (queue->queue_write_idx== queue->queue_read_idx)
+    {
+      queue->queue_full=1;
+    }    
+    status =0;
+  }
+  else
+  {
+    status=-1;
+  }
+  return status;
+}
+
+int circular_queue_get(queue_param_t* queue, uint8_t** buff, uint16_t* buff_size)
+{
+  int status;
+  if (queue->queue_nb_element==0)
+  {
+    status=-1;
+  }
+  else
+  {
+    uint16_t size;
+    uint16_t read_idx=queue->queue_read_idx;
+    /*retreive and remove 1st element' size and content*/
+    size=(uint16_t) (queue->queue_buff[read_idx++]<<8);
+    /*wrap if needed*/
+    if (read_idx==queue->queue_size)
+    {
+      read_idx=0;
+    }
+    size|=(uint16_t) queue->queue_buff[read_idx++];
+    /*wrap if needed*/
+    if (read_idx==queue->queue_size)
+    {
+      read_idx=0;
+    }
+    *buff= queue->queue_buff+read_idx;
+
+    * buff_size=size;
+    status=0;
+  }
+  return status;
+}
+
+int circular_queue_remove(queue_param_t* queue)
+{
+  int status;
+  if (queue->queue_nb_element==0)
+  {
+      status=-1;
+  }
+  else
+  {
+    uint16_t size;
+    /*retreive and remove 1st element' size and content*/
+    size=(uint16_t) (queue->queue_buff[queue->queue_read_idx++]<<(uint16_t)8);
+    if (queue->queue_read_idx==queue->queue_size)
+    {
+      queue->queue_read_idx=0;
+    }
+    size|=(uint16_t) queue->queue_buff[queue->queue_read_idx++];
+    if (queue->queue_read_idx==queue->queue_size)
+    {
+      queue->queue_read_idx=0;
+    }
+    /* increment read index*/
+    queue->queue_read_idx = (uint16_t)(queue->queue_read_idx + size);
+    /*modulo queue_size*/
+    if (queue->queue_read_idx==queue->queue_size)
+    {
+        queue->queue_read_idx=0;
+    }
+    /* decrement number of element*/
+    queue->queue_nb_element--;
+    queue->queue_full=0;
+    status=0;
+  }
+  return status;
+}
+
+int circular_queue_sense(queue_param_t* queue)
+{
+  int status;
+  if (queue->queue_nb_element==0)
+  {
+    status=-1;
+  }
+  else
+  {
+    status=0;
+  }
+  return status;
+}
+
+/* Private functions ---------------------------------------------------------*/
+static int16_t circular_queue_get_free_size(queue_param_t* queue)
+{
+  int16_t free_size;
+  if (queue->queue_write_idx>=queue->queue_read_idx)
+  {
+    free_size= (int16_t)(queue->queue_size-(queue->queue_write_idx-queue->queue_read_idx));
+  }
+  else
+  {
+    free_size= (int16_t)(queue->queue_read_idx-queue->queue_write_idx);
+  }
+  if ( queue->queue_full==1)
+  {
+    free_size=0;
+  }
+  return free_size;
+}
+
+static void queue_copy(uint8_t* out, const uint8_t* in, uint16_t size)
+{
+  while(size--)
+  {
+    *out++= *in++;
+  }
+}
+
+static void add_elementSize_and_inc_writeIdx(queue_param_t* queue,uint16_t element_size)
+{
+  queue->queue_buff[queue->queue_write_idx++]=(uint8_t) (element_size>>8);
+  /*wrap if needed*/
+  if ( queue->queue_write_idx == queue->queue_size)
+  {
+    queue->queue_write_idx=0;
+  }
+  queue->queue_buff[queue->queue_write_idx++]=(uint8_t) (element_size);
+  /*wrap if needed*/
+  if ( queue->queue_write_idx == queue->queue_size)
+  {
+    queue->queue_write_idx=0;
+  }
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

01_Code/FES_Common_Library/CircularQ/CircularQ.h

@@ -0,0 +1,86 @@
+/**
+  ******************************************************************************
+  * @file    queue.h
+  * @author  MCD Application Team
+  * @brief   Header for queue.c
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __UTIL_QUEUE_H
+#define __UTIL_QUEUE_H
+
+/* Includes ------------------------------------------------------------------*/
+/* Exported types ------------------------------------------------------------*/
+
+typedef struct{
+    uint16_t queue_read_idx;          //read index in the queue
+    uint16_t queue_write_idx;         //write index in the queue
+    uint16_t queue_nb_element;//number of element in the queue
+    uint16_t queue_size;      //size in bytes if the queue
+    uint8_t* queue_buff;      //queue buffer pointer
+    uint8_t  queue_full;      //manage when queue_write_idx is equel to read_idx after adding
+} queue_param_t;
+
+
+/* Exported constants --------------------------------------------------------*/
+/* External variables --------------------------------------------------------*/
+/* Exported macros -----------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */ 
+
+/**
+  * @brief   init circular queue with queue_buff and its queue_size
+  * @param  queue: pointer on queue structure   to be handled
+  * @param  queue_buff; pointer on element(s) to be added 
+  * @param  queue_size:  of queue_buff in Bytes
+  */
+void circular_queue_init(queue_param_t* queue, uint8_t* queue_buff, uint16_t queue_size);
+
+/**
+  * @brief  queue_add the buff in the queue
+  * @note   buff can be added in one element, or splitted in 2 elements when added at end of the queue buffer
+  * @param  queue: pointer on queue structure to be handled
+  * @param  buff the buffer to be added on the queue
+  * @param  buff_size the size of buff to be added
+  * @retval 0 when OK, return -1 when no space left
+  */
+int circular_queue_add(queue_param_t* queue, uint8_t* buff, uint16_t buff_size);
+
+/**
+  * @brief  queue_add the buff in the queue
+  * @note   sense if elements are present in the queue
+  * @param  queue: pointer on queue structure to be handled
+  * @retval return 0 when element(s) in the queue, return -1 no element in the queue
+  */
+int circular_queue_sense(queue_param_t* queue);
+
+/**
+  * @brief  retreive head element from the queue 
+  * @note   removes only one element
+  * @param  queue: pointer on queue structure to be handled
+  * @param  buff pointer on the head element retreived
+  * @param  buff_size the size of head element
+  * @retval return 0 when element in the queue, return -1 no element in the queue
+  */
+int circular_queue_get(queue_param_t* queue, uint8_t** buff, uint16_t* buff_size);
+
+/**
+  * @brief  remove head element from the queue 
+  * @note   removes only one element
+  * @param  queue: pointer on queue structure to be handled
+  * @retval return 0 when element in the queue, return -1 no element in the queue
+  */
+int circular_queue_remove(queue_param_t* queue);
+
+#endif //UTIL_QUEUE

01_Code/FES_Common_Library/KeyHdl/keyhdl.c

@@ -0,0 +1,355 @@
+/*****************************************************************************/
+/* FILENAME     : KeyHdl.c                                                   */
+/*                                                                           */
+/* DESCRIPTION  : Handling Key Events for  Application.                      */
+/*                                                                           */
+/* NOTES        : Copyright Sathish Kumar P.  All rights reserved.           */
+/*                                                                           */
+/* AUTHOR       : Sathish Kumar                                              */
+/*                sathishembeddedgeek@gmail.com                              */
+/*                                                                           */
+/* START DATE   :  9th Feb 2020                                              */
+/*                                                                           */
+/* VERSION   DATE    WHO           DETAIL                                    */
+/* 00.00.01 09FEB20 Sathish Kumar   initial version                          */
+/*                                                                           */
+/*****************************************************************************/
+
+/*****************************************************************************/
+/*                                                                           */
+/*                   I N C L U D E S                                         */
+/*                                                                           */
+/*****************************************************************************/
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+
+#include "keyhdl_api.h"
+#include "keyhdl.h"
+
+#if (KEYHDL_USE_OS==1)
+#include "FreeRTOS.h"
+#include "task.h"
+#endif
+
+/*****************************************************************************/
+/*                                                                           */
+/*                   D E F I N I T I O N S                                   */
+/*                                                                           */
+/*****************************************************************************/
+
+#define NO_OF_BYTES_FOR_KEY         ((MAX_KEYS/8)+1)
+
+#define KEY_SET_BIT_IN_ARRAY(array,indx)     array[(uint8_t)indx>>3] |= \
+                                                       ((uint8_t)1<<(indx&0x7))
+#define KEY_CLEAR_BIT_IN_ARRAY(array,indx)   array[(uint8_t)indx>>3] &= \
+                                                    (~((uint8_t)1<<(indx&0x7)))
+#define KEY_READ_BIT_IN_ARRAY(array,indx)    array[(uint8_t)indx>>3] & \
+                                                       ((uint8_t)1<<(indx&0x7))
+
+#define ARRAY_SIZE(x) ((sizeof (x))/(sizeof (x [0])))
+/*****************************************************************************/
+/*                                                                           */
+/*           C O N S T A N T S  &  V A R I A B L E S                         */
+/*                                                                           */
+/*****************************************************************************/
+
+#if (KEYHDL_SUPPORT_SINGLE_KEY)
+static const KeyPortMap_t  key_single_port_map[]= KEYHDL_SINGLE_KEY_MAP;
+static const uint8_t key_single_port_map_size = ARRAY_SIZE(key_single_port_map);
+#endif
+
+#if (KEYHDL_SUPPORT_MATRIX_KEY)
+static const KeyEnumList  key_matrix_map[KEYHDL_MATRIX_NO_OF_ROWS][KEYHDL_MATRIX_NO_OF_COLS]
+                                                                   = KEYHDL_MATRIX_KEY_MAP;
+
+static const KeyGPIO_t  key_matrix_port_row[KEYHDL_MATRIX_NO_OF_ROWS]= KEYHDL_MATRIX_ROW_MAP;
+static const KeyGPIO_t  key_matrix_port_col[KEYHDL_MATRIX_NO_OF_COLS]= KEYHDL_MATRIX_COL_MAP;
+#endif
+
+#if (KEYHDL_SUPPORT_MULTI_KEY)
+static const KeyMultiMap_t  key_multi_list_map[]= KEYHDL_MULTI_KEY_MAP;
+static const uint8_t key_multi_list_map_size = ARRAY_SIZE(key_multi_list_map);
+#endif
+
+static uint8_t key_array[NO_OF_BYTES_FOR_KEY];
+
+static KeyParams_t  key_param[MAX_KEYS];
+
+static keyCallBackFnPtr usr_callback_fnc;
+
+/*****************************************************************************/
+/*                                                                           */
+/*           F U N C T I O N   P R O T O T Y P E S                           */
+/*                                                                           */
+/*****************************************************************************/
+
+/*****************************************************************************/
+/* See header file of description                                            */
+/*****************************************************************************/
+#if (KEYHDL_SUPPORT_SINGLE_KEY)
+void KeyHdl_ReadSingleKeyStatus(void);
+#endif
+
+/*****************************************************************************/
+/* See header file of description                                            */
+/*****************************************************************************/
+#if (KEYHDL_SUPPORT_MATRIX_KEY)
+void KeyHdl_ReadMatrixKeyStatus(void);
+#endif
+
+/*****************************************************************************/
+/* See header file of description                                            */
+/*****************************************************************************/
+#if (KEYHDL_SUPPORT_MULTI_KEY)
+void KeyHdl_ReadMultiKeyStatus(void);
+#endif
+
+/*****************************************************************************/
+/* See header file of description                                            */
+/*****************************************************************************/
+void KeyHdl_DeboucingCheck(uint16_t call_rate);
+
+/*****************************************************************************/
+/* See header file of description                                            */
+/*****************************************************************************/
+void KeyHdl_NotifyKeyEvent(void);
+
+/*****************************************************************************/
+/* See header file of description                                            */
+/*****************************************************************************/
+#if (KEYHDL_USE_OS==1)
+static void KeyHdl_FreeRtosTask(void *pvParameters);
+#endif
+
+/*****************************************************************************/
+/*                                                                           */
+/*                   F U N C T I O N S                                       */
+/*                                                                           */
+/*****************************************************************************/
+
+/*****************************************************************************/
+/* See header file of description                                            */
+/*****************************************************************************/
+int8_t KeyHdl_Init(keyCallBackFnPtr fnptr)
+{
+  int8_t ret = 0;
+  KEYHDL_HW_INIT();
+
+  usr_callback_fnc = fnptr;
+  /* definition and creation of freertos task */
+#if (KEYHDL_USE_OS==1)
+  /* Create OS Tasks */
+  if(xTaskCreate(KeyHdl_FreeRtosTask, (const char *) "KeyHdlTask",
+          2*configMINIMAL_STACK_SIZE, NULL, (tskIDLE_PRIORITY + 1UL),
+          (xTaskHandle *) NULL)!= pdPASS)
+  {
+    ret = -1;
+  }
+#endif
+  return ret;
+}
+
+/*****************************************************************************/
+/* See header file of description                                            */
+/*****************************************************************************/
+void KeyHdl_HWScanISR(uint32_t call_rate)
+{
+  /* Key Single scan */
+  #if (KEYHDL_SUPPORT_SINGLE_KEY)
+  KeyHdl_ReadSingleKeyStatus();
+  #endif
+
+  /* Key Matrix scan */
+  #if (KEYHDL_SUPPORT_MATRIX_KEY)
+  KeyHdl_ReadMatrixKeyStatus();
+  #endif
+}
+
+#if (KEYHDL_USE_OS==1)
+/*****************************************************************************/
+/* See header file of description                                            */
+/*****************************************************************************/
+static void KeyHdl_FreeRtosTask(void *pvParameters)
+{
+  while (1) {
+
+    KeyHdl_Task(KEYHDL_TASK_TIME_IN_MS);
+    /* About a delay here */
+    vTaskDelay(KEYHDL_TASK_TIME_IN_MS);
+  }
+}
+#endif
+
+/*****************************************************************************/
+/* See header file of description                                            */
+/*****************************************************************************/
+void KeyHdl_Task(uint32_t call_rate)
+{
+  static uint32_t call_rate_cntr=0;
+
+  call_rate_cntr += call_rate;
+
+  if(call_rate_cntr >= KEYHDL_TASK_TIME_IN_MS)
+  {
+    call_rate_cntr -= KEYHDL_TASK_TIME_IN_MS;
+
+    /* This is placed here because it does not have time restriction. */
+#if (KEYHDL_SUPPORT_MULTI_KEY)
+    /* Key multi press */
+    KeyHdl_ReadMultiKeyStatus();
+#endif
+
+    /* check for key bounce */
+    KeyHdl_DeboucingCheck(KEYHDL_TASK_TIME_IN_MS);
+
+  }
+}
+
+/*****************************************************************************/
+/* See header file of description                                            */
+/*****************************************************************************/
+#if (KEYHDL_SUPPORT_SINGLE_KEY)
+void KeyHdl_ReadSingleKeyStatus(void)
+{
+  uint8_t keyCntr=0;
+
+  for(keyCntr=0;keyCntr<key_single_port_map_size;keyCntr++)
+  {
+    if(KEYHDL_HW_READ_PIN(key_single_port_map[keyCntr].port,key_single_port_map[keyCntr].pin)==0)
+    {
+      KEY_SET_BIT_IN_ARRAY(key_array,key_single_port_map[keyCntr].key_name);
+    }
+    else
+    {
+      KEY_CLEAR_BIT_IN_ARRAY(key_array,key_single_port_map[keyCntr].key_name);
+    }
+  }
+}
+#endif
+
+/*****************************************************************************/
+/* See header file of description                                            */
+/*****************************************************************************/
+#if (KEYHDL_SUPPORT_MULTI_KEY)
+void KeyHdl_ReadMultiKeyStatus(void)
+{
+  uint8_t multiKeyCntr=0;
+  uint8_t keyCntr=0;
+  uint8_t keymulti_pressed=0;
+  uint8_t keyIdx=0;
+
+  for(multiKeyCntr=0;multiKeyCntr<key_multi_list_map_size;multiKeyCntr++)
+  {
+    keymulti_pressed=0;
+    for(keyCntr=0;keyCntr<key_multi_list_map[multiKeyCntr].no_of_keys;keyCntr++)
+    {
+      keyIdx=key_multi_list_map[multiKeyCntr].multi_key_list[keyCntr];
+
+      /* read from global key array */
+      if(KEY_READ_BIT_IN_ARRAY(key_array,keyIdx))
+      {
+        keymulti_pressed++;
+      }
+    }
+
+    /* set the bit in global key array */
+    if(keymulti_pressed == key_multi_list_map[multiKeyCntr].no_of_keys)
+    {
+      KEY_SET_BIT_IN_ARRAY(key_array,key_multi_list_map[multiKeyCntr].key_name);
+
+      /* clear the single key array when there is multikey event */
+      for(keyCntr=0;keyCntr<key_multi_list_map[multiKeyCntr].no_of_keys;keyCntr++)
+      {
+        keyIdx=key_multi_list_map[multiKeyCntr].multi_key_list[keyCntr];
+        /* clear from global key array */
+        KEY_CLEAR_BIT_IN_ARRAY(key_array,keyIdx);
+      }
+    }
+    else
+    {
+      KEY_CLEAR_BIT_IN_ARRAY(key_array,key_multi_list_map[multiKeyCntr].key_name);
+    }
+  }
+}
+#endif
+
+/*****************************************************************************/
+/* See header file of description                                            */
+/*****************************************************************************/
+#if (KEYHDL_SUPPORT_MATRIX_KEY)
+void KeyHdl_ReadMatrixKeyStatus(void)
+{
+  static uint8_t col_indx = 0;
+  uint8_t row_cntr=0;
+  uint8_t key_name=0;
+
+  /* Key Matrix Scan */
+  for(; row_cntr <KEYHDL_MATRIX_NO_OF_ROWS;row_cntr++)
+  {
+    key_name= key_matrix_map[row_cntr][col_indx];
+    if(KEYHDL_HW_READ_PIN(key_matrix_port_row[row_cntr].port,key_matrix_port_row[row_cntr].pin) == 0 )
+    {
+      KEY_SET_BIT_IN_ARRAY(key_array,key_name);
+    }
+    else
+    {
+      KEY_CLEAR_BIT_IN_ARRAY(key_array,key_name);
+    }
+  }
+  KEYHDL_HW_WRITE_PIN(key_matrix_port_col[col_indx].port,key_matrix_port_col[col_indx].pin,1);
+  col_indx++;
+  if(col_indx >= KEYHDL_MATRIX_NO_OF_COLS)
+  {
+    col_indx = 0;
+  }
+  KEYHDL_HW_WRITE_PIN(key_matrix_port_col[col_indx].port,key_matrix_port_col[col_indx].pin,0);
+}
+#endif
+
+/*****************************************************************************/
+/* See header file of description                                            */
+/*****************************************************************************/
+void KeyHdl_DeboucingCheck(uint16_t call_rate)
+{
+  uint8_t keyCntr=0;
+  for(;keyCntr<MAX_KEYS;keyCntr++)
+  {
+    if(KEY_READ_BIT_IN_ARRAY(key_array,keyCntr))
+    {
+      key_param[keyCntr].bounce_time += call_rate;
+
+      if((key_param[keyCntr].bounce_time >= KEYHDL_KEY_DEBOUNCE_TIME) && (key_param[keyCntr].event_type != KEY_EVENT_PRESSED))
+      {
+        /* key press event */
+        key_param[keyCntr].event_type = KEY_EVENT_PRESSED;
+        if(usr_callback_fnc)
+        {
+          usr_callback_fnc(keyCntr,KEYHDL_KEY_PRESSED,key_param[keyCntr].bounce_time);
+        }
+      }
+    }
+    else
+    {
+      /* key released */
+      key_param[keyCntr].event_type = KEY_EVENT_RELEASED;
+
+      if(key_param[keyCntr].bounce_time >= KEYHDL_KEY_DEBOUNCE_TIME)
+      {
+        if(usr_callback_fnc)
+        {
+          usr_callback_fnc(keyCntr,KEYHDL_KEY_RELEASED,key_param[keyCntr].bounce_time);
+        }
+      }
+
+      /* clear timers */
+      key_param[keyCntr].bounce_time = 0;
+    }
+  }
+}
+
+/*****************************************************************************/
+/*                                                                           */
+/*  E N D  O F  F I L E                                                      */
+/*                                                                           */
+/*****************************************************************************/

01_Code/FES_Common_Library/KeyHdl/keyhdl.h

@@ -0,0 +1,105 @@
+/*****************************************************************************/
+/* FILENAME     : KeyHdl.h                                                   */
+/*                                                                           */
+/* DESCRIPTION  : Handling Key Events for  Application.                      */
+/*                                                                           */
+/* NOTES        : Copyright Sathish Kumar P.  All rights reserved.           */
+/*                                                                           */
+/* AUTHOR       : Sathish Kumar                                              */
+/*                sathishembeddedgeek@gmail.com                              */
+/*                                                                           */
+/* START DATE   :  9th Feb 2020                                              */
+/*                                                                           */
+/* VERSION   DATE    WHO           DETAIL                                    */
+/* 00.00.01 09FEB20 Sathish Kumar   initial version                          */
+/*                                                                           */
+/*****************************************************************************/
+#ifndef __KEY_HDL_H__
+#define __KEY_HDL_H__
+
+
+/*****************************************************************************/
+/*                                                                           */
+/*                   I N C L U D E S                                         */
+/*                                                                           */
+/*****************************************************************************/
+#define KEY_EVENT_PRESSED   (0x01)
+#define KEY_EVENT_RELEASED  (0x02)
+
+/*****************************************************************************/
+/*                                                                           */
+/*                   D E F I N I T I O N S                                   */
+/*                                                                           */
+/*****************************************************************************/
+
+#define MULTIKEY_MAX_KEY_LINKS    3
+
+/* key connection type */
+#define KEY_TYP_ACTIVE_LOW      0    /* key event occurs when pulled low */
+#define KEY_TYP_ACTIVE_HIGH     1    /* key event occurs when pulled high */
+
+#if ((KEYHDL_KEY_DEBOUNCE_TIME <= 60)|| !defined(KEYHDL_KEY_DEBOUNCE_TIME))
+#error "Please define a valid DEBOUNCE_TIME (above 60ms) "
+#endif
+
+#if !defined(KEYHDL_SUPPORT_SINGLE_KEY)
+#warning "KEYHDL_SUPPORT_SINGLE_KEY is not supported!!!"
+#define  KEYHDL_SUPPORT_SINGLE_KEY  0
+#endif
+
+#if !defined(KEYHDL_KEY_LIST)
+#warning "KEYHDL_KEY_LIST is empty!!!"
+#define  KEYHDL_KEY_LIST  EMPTY_KEY_NAME_LIST
+#endif
+
+#if !defined(KEYHDL_TASK_TIME_IN_MS)
+#warning "KEYHDL_TASK_TIME_IN_MS is not defined!!! Setting to default 20ms"
+#define  KEYHDL_TASK_TIME_IN_MS  20
+#endif 
+
+/*****************************************************************************/
+/*                                                                           */
+/*           C O N S T A N T S  &  V A R I A B L E S                         */
+/*                                                                           */
+/*****************************************************************************/
+
+/* hardware layer for gpio port */
+typedef struct key_gpio_t_
+{
+  KeyPort_t     port;
+  KeyPortPin_t  pin;
+}KeyGPIO_t;
+
+/* single key gpio port */
+typedef struct key_port_map_t_
+{
+  KeyEnumList   key_name;
+  KeyPort_t     port;
+  KeyPortPin_t  pin;     
+}KeyPortMap_t;
+
+typedef struct key_multi_map_t_
+{
+  KeyEnumList key_name;
+  KeyEnumList multi_key_list[MULTIKEY_MAX_KEY_LINKS];
+  uint8_t   no_of_keys;
+}KeyMultiMap_t;
+
+typedef struct key_params_t_
+{
+  uint16_t bounce_time;
+  uint8_t  event_type;
+}KeyParams_t;
+
+/*****************************************************************************/
+/*                                                                           */
+/*           F U N C T I O N   P R O T O T Y P E S                           */
+/*                                                                           */
+/*****************************************************************************/
+
+/*****************************************************************************/
+/*                                                                           */
+/*  E N D  O F  F I L E                                                      */
+/*                                                                           */
+/*****************************************************************************/
+#endif /* END OF __KEY_HDL_H__ */

01_Code/FES_Common_Library/KeyHdl/keyhdl_api.h

@@ -0,0 +1,71 @@
+/*****************************************************************************/
+/* FILENAME     : KeyHdl.h                                                   */
+/*                                                                           */
+/* DESCRIPTION  : Handling Key Events for  Application.                      */
+/*                                                                           */
+/* NOTES        : Copyright Sathish Kumar P.  All rights reserved.           */
+/*                                                                           */
+/* AUTHOR       : Sathish Kumar                                              */
+/*                sathishembeddedgeek@gmail.com                              */
+/*                                                                           */
+/* START DATE   :  9th Feb 2020                                              */
+/*                                                                           */
+/* VERSION   DATE    WHO           DETAIL                                    */
+/* 00.00.01 09FEB20 Sathish Kumar   initial version                          */
+/*                                                                           */
+/*****************************************************************************/
+#ifndef __KEY_HDL_API_H__
+#define __KEY_HDL_API_H__
+
+
+/*****************************************************************************/
+/*                                                                           */
+/*                   I N C L U D E S                                         */
+/*                                                                           */
+/*****************************************************************************/
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include "keyhdl_conf.h"
+
+
+/*****************************************************************************/
+/*                                                                           */
+/*                   D E F I N I T I O N S                                   */
+/*                                                                           */
+/*****************************************************************************/
+
+#define KEYHDL_KEY_PRESSED    0
+#define KEYHDL_KEY_RELEASED   1
+
+/*****************************************************************************/
+/*                                                                           */
+/*           C O N S T A N T S  &  V A R I A B L E S                         */
+/*                                                                           */
+/*****************************************************************************/
+typedef void (*keyCallBackFnPtr) (uint8_t keyIndx,uint8_t key_event,uint16_t key_duration);
+
+typedef enum key_names
+{
+  KEYHDL_KEY_LIST,
+  MAX_KEYS  /* this should be at the last */
+}KeyEnumList;
+
+/*****************************************************************************/
+/*                                                                           */
+/*           F U N C T I O N   P R O T O T Y P E S                           */
+/*                                                                           */
+/*****************************************************************************/
+int8_t KeyHdl_Init(keyCallBackFnPtr fnptr);
+void KeyHdl_Task(uint32_t call_rate);
+
+/* To be called from the timer interrupt to read key from hardware.
+ */
+void KeyHdl_HWScanISR(uint32_t call_rate);
+
+/*****************************************************************************/
+/*                                                                           */
+/*  E N D  O F  F I L E                                                      */
+/*                                                                           */
+/*****************************************************************************/
+#endif /* END OF __KEY_HDL_API_H__ */

01_Code/FES_Common_Library/Log/Log.c

@@ -0,0 +1,343 @@
+/*****************************************************************************/
+/* FILENAME     : Log.c                                                      */
+/*                                                                           */
+/* DESCRIPTION  : Generic Uart Logger Library                                */
+/*                                                                           */
+/* NOTES        : Copyright Sathish Kumar P.  All rights reserved.           */
+/*                                                                           */
+/* AUTHOR       : Sathish Kumar                                              */
+/*                sathishembeddedgeek@gmail.com                              */
+/*                                                                           */
+/* START DATE   :  3rd May 2021                                              */
+/*                                                                           */
+/* VERSION   DATE    WHO           DETAIL                                    */
+/* 00.00.01 03MAY21 Sathish Kumar   initial version                          */
+/*                                                                           */
+/*****************************************************************************/
+
+//TODO: Logging using Uart DMA or interrupt
+
+/*****************************************************************************/
+/*      I N C L U D E S                                                      */
+/*****************************************************************************/
+#include "Log.h"
+#include <stdarg.h>
+
+#if(LOG_USE_BUFFERING == 1)
+#include <CircularQ.h>
+#endif
+
+
+/*****************************************************************************/
+/*      D E F I N I N T I O N S                                              */
+/*****************************************************************************/
+
+#if (LOG_USE_PRETTY_PRINT)
+
+  /* Pretty prints */
+  #define PREFIX                     "\033["
+  #define SUFFIX                     "\033[0m"
+  /* color */
+  #define RED                        ";31m"
+  #define GREEN                      ";32m"
+  #define YELLOW                     ";33m"
+  #define BLUE                       ";34m"
+  #define MAGENTA                    ";35m"
+  #define CYAN                       ";36m"
+  #define WHITE                      ";37m"
+  /* Effect */
+  #define NORMAL                     "0"
+  #define BOLD                       "1"
+
+#else
+  /* Pretty prints */
+  #define PREFIX
+  #define SUFFIX
+
+  /* color */
+  #define RED
+  #define GREEN
+  #define YELLOW
+  #define BLUE
+  #define MAGENTA
+  #define CYAN
+  #define WHITE
+
+  /* Effect */
+  #define NORMAL
+  #define BOLD
+#endif
+
+#define FORMAT_COLOR(STR, COLOR)  PREFIX COLOR STR SUFFIX
+
+/*****************************************************************************/
+/*    CONSTANTS & VARIABLES                                                  */
+/*****************************************************************************/
+#if(LOG_USE_BUFFERING == 1)
+static queue_param_t LogMsgQ;
+static uint8_t LogBuff[LOG_MSG_QUEUE_SIZE];
+#endif
+
+static char local_buf[LOG_LOCAL_BUF_SIZE];
+__IO ITStatus TracePeripheralReady = SET;
+
+const uint8_t *log_type[]=
+{
+  (uint8_t*)FORMAT_COLOR("[DEBUG]", WHITE),
+  (uint8_t*)FORMAT_COLOR("[INFO]", GREEN),
+  (uint8_t*)FORMAT_COLOR("[WARN]", YELLOW),
+  (uint8_t*)FORMAT_COLOR("[ERROR]", RED),
+  (uint8_t*)FORMAT_COLOR("[FATAL]", RED),
+  (uint8_t*)FORMAT_COLOR("[ALL]", CYAN),
+};
+
+
+static LogLevel_t cur_log_lvl = LOG_INFO;
+static uint8_t log_enabled = 0;
+
+//static uint32_t log_uart_baudrate = 921600;
+
+/*****************************************************************************/
+/*      F U N C T I O N S                                                    */
+/*****************************************************************************/
+/* Call back function for Tx Complete */
+void Log_UartTxCpltCallback(void);
+
+/*****************************************************************************/
+/* see header file for description.                                          */
+/*****************************************************************************/
+uint8_t Log_Init()
+{
+  uint8_t ret_val=0;
+
+  //TODO: Logging using Uart DMA or interrupt
+  /* Enable low level Uart settings for logging */
+  //UartRegisterTxCb(Log_UartTxCpltCallback);
+
+#if(LOG_USE_BUFFERING == 1)
+  /* Q initialization */
+  circular_queue_init(&LogMsgQ, LogBuff, LOG_MSG_QUEUE_SIZE);
+#endif
+
+  return ret_val;
+}
+
+
+/*****************************************************************************/
+/* see header file for description.                                          */
+/*****************************************************************************/
+void Log_Task(uint32_t call_rate)
+{
+  (void)call_rate; /* unused warning removal */
+}
+
+/*****************************************************************************/
+/* see header file for description.                                          */
+/*****************************************************************************/
+void Log_Enable(uint8_t enable)
+{
+  if((uint8_t)1 == enable)
+  {
+    //TODO: Logging using Uart DMA or interrupt
+    //Uart_ReInit();
+    log_enabled = 1;
+  }
+  else
+  {
+    log_enabled = 0;
+    TracePeripheralReady = SET;
+#if(LOG_USE_BUFFERING == 1)
+    /* Clears the buffers and elements */
+    circular_queue_init(&LogMsgQ, LogBuff, LOG_MSG_QUEUE_SIZE);
+#endif
+
+    //TODO: Logging using Uart DMA or interrupt
+    //Uart_DeInit();
+  }
+}
+
+/*****************************************************************************/
+/* see header file for description.                                          */
+/*****************************************************************************/
+uint8_t Log_GetEnabledStatus(void)
+{
+  return log_enabled;
+}
+
+/*****************************************************************************/
+/* see header file for description.                                          */
+/*****************************************************************************/
+uint8_t Log_IsPendingTx(void)
+{
+  uint8_t ret_val = true;
+
+  CRITICAL_SECTION_BEGIN();
+#if(LOG_USE_BUFFERING == 1)
+  if((TracePeripheralReady == SET)&&(circular_queue_sense(&LogMsgQ) == -1))
+#else
+  if(TracePeripheralReady == SET)
+#endif
+  {
+    ret_val = false;
+  }
+  CRITICAL_SECTION_END();
+  return ret_val;
+}
+
+/*****************************************************************************/
+/* see header file for description.                                          */
+/*****************************************************************************/
+void Log_LowPowerMode(uint8_t enable)
+{
+  /* Only when logging is enabled */
+  if((uint8_t)1 == log_enabled)
+  {
+    if((uint8_t)1 == enable)
+    {
+#if(LOG_USE_BUFFERING == 1)
+      /* Clears the buffers and elements */
+      circular_queue_init(&LogMsgQ, LogBuff, LOG_MSG_QUEUE_SIZE);
+#endif
+      //TODO: Logging using Uart DMA or interrupt
+      //Uart_DeInit();
+    }
+    else
+    {
+      //TODO: Logging using Uart DMA or interrupt
+      //Uart_ReInit();
+    }
+  }
+}
+
+///*****************************************************************************/
+///* see header file for description.                                          */
+///*****************************************************************************/
+//void Log_SetUartBaudrate(uint32_t new_baudrate)
+//{
+//  if(0 == UartSetBaudrate(new_baudrate))
+//  {
+//    log_uart_baudrate = new_baudrate;
+//  }
+//}
+//
+///*****************************************************************************/
+///* see header file for description.                                          */
+///*****************************************************************************/
+//uitn32_t Log_GetUartBaudrate()
+//{
+//  return log_uart_baudrate;
+//}
+
+/*****************************************************************************/
+/* see header file for description.                                          */
+/*****************************************************************************/
+void Log_SetLogLvl(LogLevel_t new_log_lvl)
+{
+  if(new_log_lvl < LOG_MAX)
+  {
+    cur_log_lvl = new_log_lvl;
+  }
+}
+
+/*****************************************************************************/
+/* see header file for description.                                          */
+/*****************************************************************************/
+LogLevel_t Log_GetLogLvl(void)
+{
+  return cur_log_lvl;
+}
+
+/*****************************************************************************/
+/* see header file for description.                                          */
+/*****************************************************************************/
+void Log_TString(LogLevel_t log_lvl,const char *str, ...)
+{
+  if((cur_log_lvl <= log_lvl)&&(1 == log_enabled))
+  {
+    va_list arg;
+    int indx=0;
+    indx = snprintf (&local_buf[0], LOG_LOCAL_BUF_SIZE, "%s\t: ", (char*)log_type[log_lvl]);
+    va_start (arg, str);
+    indx = vsnprintf (&local_buf[indx], (LOG_LOCAL_BUF_SIZE-(size_t)indx), str, arg);
+    va_end (arg);
+    strncat(local_buf,"\r\n",3);
+
+    Log_UartSend((uint8_t *)local_buf,(uint16_t)strlen(local_buf));
+  }
+}
+
+/*****************************************************************************/
+/* see header file for description.                                          */
+/*****************************************************************************/
+void Log_UartSend(uint8_t *buf,uint16_t bufLen)
+{
+#if(LOG_USE_BUFFERING == 0)
+  Log_WriteToHWUart(buf,bufLen);
+#else
+  int status;
+
+  CRITICAL_SECTION_BEGIN();
+  status = circular_queue_add(&LogMsgQ,buf, bufLen);
+
+  if((status==0) && (TracePeripheralReady==SET))
+  {
+    uint8_t* buffer;
+    uint16_t bufSize;
+    TracePeripheralReady = RESET;
+    circular_queue_get(&LogMsgQ,&buffer,&bufSize);
+    CRITICAL_SECTION_END();
+    Log_WriteToHWUart_NonBlocking(buffer, bufSize);
+    //TODO: Logging using Uart DMA or interrupt. Remove after implemention
+//    Log_UartTxCpltCallback();
+  }
+  else
+  {
+    CRITICAL_SECTION_END();
+  }
+
+  if(status!=0)
+ {
+   //TODO: log queue is full
+ }
+#endif
+}
+
+/*****************************************************************************/
+/* see header file for description.                                          */
+/*****************************************************************************/
+void Log_UartTxCompleteCallback(void)
+{
+#if(LOG_USE_BUFFERING == 1)
+  /* buffer transmission complete*/
+  int status;
+  uint8_t* buffer;
+  uint16_t bufSize;
+
+  //TODO: Logging using Uart DMA or interrupt
+  CRITICAL_SECTION_BEGIN(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
+  
+  /* Remove element just sent to UART */
+  circular_queue_remove(&LogMsgQ);
+
+  /* Sense if new data to be sent */
+  status=circular_queue_sense(&LogMsgQ);
+
+  if (status == 0)
+  {
+    circular_queue_get(&LogMsgQ,&buffer,&bufSize);
+    CRITICAL_SECTION_END();
+
+    //TODO: Logging using Uart DMA or interrupt. Remove after implemention
+    Log_WriteToHWUart_NonBlocking(buffer, bufSize);
+  }
+  else
+  {
+    TracePeripheralReady = SET;
+    CRITICAL_SECTION_END();
+  }
+#endif
+}
+
+/*****************************************************************************/
+/*      E N D   O F   F I L E                                                */
+/*****************************************************************************/

01_Code/FES_Common_Library/Log/Log.h

@@ -0,0 +1,156 @@
+/*****************************************************************************/
+/* FILENAME     : Log.h                                                      */
+/*                                                                           */
+/* DESCRIPTION  : Generic Uart Logger Library                                */
+/*                                                                           */
+/* NOTES        : Copyright Sathish Kumar P.  All rights reserved.           */
+/*                                                                           */
+/* AUTHOR       : Sathish Kumar                                              */
+/*                sathishembeddedgeek@gmail.com                              */
+/*                                                                           */
+/* START DATE   :  3rd May 2021                                              */
+/*                                                                           */
+/* VERSION   DATE    WHO           DETAIL                                    */
+/* 00.00.01 03MAY21 Sathish Kumar   initial version                          */
+/*                                                                           */
+/*****************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _LOG_H_
+#define _LOG_H_
+/*****************************************************************************/
+/*      I N C L U D E S                                                      */
+/*****************************************************************************/
+#include <stdint.h>
+#include <stdbool.h>
+#include <system.h>
+#include <Log_conf.h>
+
+/*****************************************************************************/
+/*      D E F I N I N T I O N S                                              */
+/*****************************************************************************/
+
+/* log usage macro */
+#define LOG(level,...)         Log_TString(level,__VA_ARGS__)
+
+/*****************************************************************************/
+/*      T Y P E D E F S                                                      */
+/*****************************************************************************/
+
+/**
+ * \enum LogLevel_t
+ * \brief Log Level enumerations
+ */
+typedef enum _log_type_t_
+{
+  LOG_DEBUG = 0,    /**< log level debug. */
+  LOG_INFO,         /**< log level info. */
+  LOG_WARNING,      /**< log level warning. */
+  LOG_ERROR,        /**< log level error. */
+  LOG_FATAL,        /**< log level fatal. */
+  LOG_ALL,          /**< log level ALL. */
+  LOG_MAX=0xFF
+}LogLevel_t;
+
+extern const uint8_t *log_type[];
+
+/*****************************************************************************/
+/*      F U N C T I O N  P R O T O T Y P E S                                 */
+/*****************************************************************************/
+
+/*!
+ * \fn Log_Init
+ * \brief This function Initialise the Log interface.
+ * \param None.
+ * \retval uint8_t 0 - success ,
+ *                 1 - failure.
+ */
+uint8_t Log_Init( void );
+
+/*!
+ * \fn Log_Task
+ * \brief This function Runs the task related to logging.
+ * \param call_rate(uint32_t) -> periodic task time in milliseconds.
+ * \retval none.
+ */
+void Log_Task(uint32_t call_rate);
+
+/*!
+ * \fn Log_GetEnabledStatus
+ * \brief This get the status of Logging interface.
+ * \retval 1 if enabled.
+ *         0 if disabled.
+ */
+uint8_t Log_GetEnabledStatus();
+
+/*!
+ * \fn Log_Enable
+ * \brief This function enables or disables the Logging interface.
+ * \param enable -> 1 to enable logging.
+ *                  0 to disable logging.
+ * \retval none.
+ */
+void Log_Enable(uint8_t enable);
+
+/*!
+ * \fn Log_LowPowerMode
+ * \brief Used to set the Log UART to low power mode
+ * \param enable -> 1 to enable low power mode.
+ *                  0 to disable low power mode.
+ * \retval none.
+ */
+void Log_LowPowerMode(uint8_t enable);
+
+/*!
+ * \fn Log_IsPendingTx
+ * \brief This function returns the whether there are active logs pending for transmission.
+ * \retval 1 if pending logs in queues.
+ *         0 if no pending logs.
+ */
+uint8_t Log_IsPendingTx(void);
+
+/*!
+ * \fn Log_GetLogLvl
+ * \brief This get the current log level of Logging interface.
+ * \retval current log level @enum LogLevel_t.
+ */
+LogLevel_t Log_GetLogLvl();
+
+/*!
+ * \fn Log_SetLogLvl
+ * \brief Used to change the current log level.
+ * \param new_log_lvl -> new log level to be set.
+ * \retval none.
+ */
+void Log_SetLogLvl(LogLevel_t new_log_lvl);
+
+/*!
+ * \fn Log_TString
+ * \brief Logging a string based on the given parameeters.
+ * \param[in]   log_lvl -> Logging level as per enum LogLevel_t.
+ * \param[in]   str     -> pointer to the string buffer to log.
+ * \param[in]   ...     -> argument list
+ * \retval none.
+ */
+void Log_TString(LogLevel_t log_lvl,const char *str, ...);
+
+/*!
+ * \fn Log_UartSend
+ * \brief Send any 8bit buffer to log uart. Used in case of Production test prints.
+ * \param[in]   buf     -> pointer to the buffer to send.
+ * \param[in]   bufLen  -> lenght of buffer.
+ * \retval none.
+ */
+void Log_UartSend(uint8_t *buf,uint16_t bufLen);
+
+/*!
+ * \fn Log_UartTxCompleteCallback
+ * \brief To be Called from Uart TX complete ISR();
+ * \retval none.
+ */
+void Log_UartTxCompleteCallback(void);
+
+/*****************************************************************************/
+/*      E N D   O F   F I L E                                                */
+/*****************************************************************************/
+#endif /* _LOG_H_ */

01_Code/FES_Common_Library/README.md

@@ -0,0 +1,2 @@
+# FES Common Library
+ 

01_Code/FES_Common_Library/fes_common_lib_version.h

@@ -0,0 +1,69 @@
+/*****************************************************************************/
+/* Copyright (C) 2022-23 Sathish Kumar P - All Rights Reserved               */
+/* You may use, distribute and modify this code under the                    */
+/* terms of the XYZ license, which unfortunately wont be                     */
+/* written for another century.                                              */
+/*                                                                           */
+/* You should have received a copy of the XYZ license with                   */
+/* this file. If not, please write to: sathishembeddedgeek@gmail.com,        */
+/* or visit :                                                                */
+/*****************************************************************************/
+
+/*****************************************************************************/
+/* FILENAME     : version.h                                                  */
+/*                                                                           */
+/* DESCRIPTION  : FES Library Version                                        */
+/*                                                                           */
+/* NOTES        : Copyright Sathish Kumar P.  All rights reserved.           */
+/*                                                                           */
+/* AUTHOR       : Sathish Kumar                                              */
+/*                sathishembeddedgeek@gmail.com                              */
+/*                                                                           */
+/* START DATE   :  3rd May 2021                                              */
+/*                                                                           */
+/* VERSION   DATE    WHO           DETAIL                                    */
+/* 00.00.01 03MAY21 Sathish Kumar   initial version                          */
+/*                                                                           */
+/*****************************************************************************/
+#ifndef __FES_COMMON_LIB_VERSION_H__
+#define __FES_COMMON_LIB_VERSION_H__
+
+
+/*****************************************************************************/
+/*                                                                           */
+/*                   I N C L U D E S                                         */
+/*                                                                           */
+/*****************************************************************************/
+
+/*****************************************************************************/
+/*                                                                           */
+/*                   D E F I N I T I O N S                                   */
+/*                                                                           */
+/*****************************************************************************/
+/* software version string                                                     
+   MAJOR_VERSION     - 2 digits                                                
+   MINOR_VERSION     - 2 digits                                                
+   BUG_FIX_VERSION   - 2 digits                                                
+   BUILD_VERSION     - 4 digits                                                
+                                                                               
+   MAJOR_VERSION "." MINOR_VERSION "."  BUG_FIX_VERSION "." BUILD_VERSION      
+ */   
+#define FES_COMMON_LIB_VER_STR   "01.03.01.0000"
+/*****************************************************************************/
+/*                                                                           */
+/*           C O N S T A N T S  &  V A R I A B L E S                         */
+/*                                                                           */
+/*****************************************************************************/
+
+/*****************************************************************************/
+/*                                                                           */
+/*           F U N C T I O N   P R O T O T Y P E S                           */
+/*                                                                           */
+/*****************************************************************************/
+
+/*****************************************************************************/
+/*                                                                           */
+/*  E N D  O F  F I L E                                                      */
+/*                                                                           */
+/*****************************************************************************/
+#endif /* END OF __FES_COMMON_LIB_VERSION_H__ */

01_Code/FES_Common_Library/stm32_reset/stm32_reset.c

@@ -0,0 +1,179 @@
+/*****************************************************************************/
+/* FILENAME     : Screen_Welcome.c                                           */
+/*                                                                           */
+/* DESCRIPTION  : Handling the screens for the Application                   */
+/*                                                                           */
+/* NOTES        : Copyright Sathish Kumar P.  All rights reserved.           */
+/*                                                                           */
+/* AUTHOR       : Sathish Kumar                                              */
+/*                sathishembeddedgeek@gmail.com                              */
+/*                                                                           */
+/* START DATE   : 21st August 2021                                           */
+/*                                                                           */
+/* VERSION   DATE    WHO           DETAIL                                    */
+/* 00.00.01 21AUG21 Sathish Kumar   initial version                          */
+/*                                                                           */
+/*****************************************************************************/
+
+/*****************************************************************************/
+/*                                                                           */
+/*                   I N C L U D E S                                         */
+/*                                                                           */
+/*****************************************************************************/
+#include <stdint.h>
+#include "stm32_reset.h"
+
+
+/*****************************************************************************/
+/*                                                                           */
+/*                   D E F I N I T I O N S                                   */
+/*                                                                           */
+/*****************************************************************************/
+
+/*****************************************************************************/
+/*                                                                           */
+/*           C O N S T A N T S  &  V A R I A B L E S                         */
+/*                                                                           */
+/*****************************************************************************/
+
+
+/*****************************************************************************/
+/*                                                                           */
+/*           F U N C T I O N   P R O T O T Y P E S                           */
+/*                                                                           */
+/*****************************************************************************/
+
+
+
+/*****************************************************************************/
+/* See header file of description                                            */
+/*****************************************************************************/
+/// @brief      Obtain the STM32 system reset cause
+/// @param      None
+/// @return     The system reset cause
+reset_cause_t reset_cause_get(void)
+{
+    reset_cause_t reset_cause;
+
+#ifdef RCC_FLAG_LPWR1RST
+    if (__HAL_RCC_GET_FLAG(RCC_FLAG_LPWR1RST))
+#else
+    if (__HAL_RCC_GET_FLAG(RCC_FLAG_LPWRRST))
+#endif
+    {
+        reset_cause = RESET_CAUSE_LOW_POWER_RESET;
+    }
+#ifdef RCC_FLAG_WWDG1RST
+    else if (__HAL_RCC_GET_FLAG(RCC_FLAG_WWDG1RST))
+#else
+    else if (__HAL_RCC_GET_FLAG(RCC_FLAG_WWDGRST))
+#endif
+    {
+        reset_cause = RESET_CAUSE_WINDOW_WATCHDOG_RESET;
+    }
+#ifdef RCC_FLAG_IWDG1RST
+    else if (__HAL_RCC_GET_FLAG(RCC_FLAG_IWDG1RST))
+#else
+    else if (__HAL_RCC_GET_FLAG(RCC_FLAG_IWDGRST))
+#endif
+    {
+        reset_cause = RESET_CAUSE_INDEPENDENT_WATCHDOG_RESET;
+    }
+    else if (__HAL_RCC_GET_FLAG(RCC_FLAG_SFTRST))
+    {
+        // This reset is induced by calling the ARM CMSIS 
+        // `NVIC_SystemReset()` function!
+        reset_cause = RESET_CAUSE_SOFTWARE_RESET; 
+    }
+    else if (__HAL_RCC_GET_FLAG(RCC_FLAG_PORRST))
+    {
+        reset_cause = RESET_CAUSE_POWER_ON_POWER_DOWN_RESET;
+    }
+    else if (__HAL_RCC_GET_FLAG(RCC_FLAG_PINRST))
+    {
+        reset_cause = RESET_CAUSE_EXTERNAL_RESET_PIN_RESET;
+    }
+    // Needs to come *after* checking the `RCC_FLAG_PORRST` flag in order to
+    // ensure first that the reset cause is NOT a POR/PDR reset. See note
+    // below. 
+#ifdef RCC_FLAG_BORRST
+    else if (__HAL_RCC_GET_FLAG(RCC_FLAG_BORRST))
+    {
+        reset_cause = RESET_CAUSE_BROWNOUT_RESET;
+    }
+#endif
+    else
+    {
+        reset_cause = RESET_CAUSE_UNKNOWN;
+    }
+
+    // Clear all the reset flags or else they will remain set during future
+    // resets until system power is fully removed.
+    __HAL_RCC_CLEAR_RESET_FLAGS();
+
+    return reset_cause; 
+}
+
+// Note: any of the STM32 Hardware Abstraction Layer (HAL) Reset and Clock
+// Controller (RCC) header files, such as 
+// "STM32Cube_FW_F7_V1.12.0/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h",
+// "STM32Cube_FW_F2_V1.7.0/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_rcc.h",
+// etc., indicate that the brownout flag, `RCC_FLAG_BORRST`, will be set in
+// the event of a "POR/PDR or BOR reset". This means that a Power-On Reset
+// (POR), Power-Down Reset (PDR), OR Brownout Reset (BOR) will trip this flag.
+// See the doxygen just above their definition for the 
+// `__HAL_RCC_GET_FLAG()` macro to see this:
+//      "@arg RCC_FLAG_BORRST: POR/PDR or BOR reset." <== indicates the Brownout
+//      Reset flag will *also* be set in the event of a POR/PDR. 
+// Therefore, you must check the Brownout Reset flag, `RCC_FLAG_BORRST`, *after*
+// first checking the `RCC_FLAG_PORRST` flag in order to ensure first that the
+// reset cause is NOT a POR/PDR reset.
+
+
+/// @brief      Obtain the system reset cause as an ASCII-printable name string 
+///             from a reset cause type
+/// @param[in]  reset_cause     The previously-obtained system reset cause
+/// @return     A null-terminated ASCII name string describing the system 
+///             reset cause
+const char * reset_cause_get_name(reset_cause_t reset_cause)
+{
+    const char * reset_cause_name = "TBD";
+
+    switch (reset_cause)
+    {
+        case RESET_CAUSE_UNKNOWN:
+            reset_cause_name = "UNKNOWN";
+            break;
+        case RESET_CAUSE_LOW_POWER_RESET:
+            reset_cause_name = "LOW_POWER_RESET";
+            break;
+        case RESET_CAUSE_WINDOW_WATCHDOG_RESET:
+            reset_cause_name = "WINDOW_WATCHDOG_RESET";
+            break;
+        case RESET_CAUSE_INDEPENDENT_WATCHDOG_RESET:
+            reset_cause_name = "INDEPENDENT_WATCHDOG_RESET";
+            break;
+        case RESET_CAUSE_SOFTWARE_RESET:
+            reset_cause_name = "SOFTWARE_RESET";
+            break;
+        case RESET_CAUSE_POWER_ON_POWER_DOWN_RESET:
+            reset_cause_name = "POWER-ON_RESET (POR) / POWER-DOWN_RESET (PDR)";
+            break;
+        case RESET_CAUSE_EXTERNAL_RESET_PIN_RESET:
+            reset_cause_name = "EXTERNAL_RESET_PIN_RESET";
+            break;
+        case RESET_CAUSE_BROWNOUT_RESET:
+            reset_cause_name = "BROWNOUT_RESET (BOR)";
+            break;
+    }
+
+    return reset_cause_name;
+}
+
+
+
+/*****************************************************************************/
+/*                                                                           */
+/*  E N D  O F  F I L E                                                      */
+/*                                                                           */
+/*****************************************************************************/

01_Code/FES_Common_Library/stm32_reset/stm32_reset.h

@@ -0,0 +1,67 @@
+/*****************************************************************************/
+/* FILENAME     : Filter.h                                                   */
+/*                                                                           */
+/* DESCRIPTION  : FIR Filter Implementations                                 */
+/*                                                                           */
+/* NOTES        : Copyright Sathish Kumar P.  All rights reserved.           */
+/*                                                                           */
+/* AUTHOR       : Sathish Kumar                                              */
+/*                sathishembeddedgeek@gmail.com                              */
+/*                                                                           */
+/* START DATE   : 21st August 2021                                           */
+/*                                                                           */
+/* VERSION   DATE    WHO           DETAIL                                    */
+/* 00.00.01 21AUG21 Sathish Kumar   initial version                          */
+/*                                                                           */
+/*****************************************************************************/
+#ifndef __STM32_RESET_H__
+#define __STM32_RESET_H__
+
+
+/*****************************************************************************/
+/*                                                                           */
+/*                   I N C L U D E S                                         */
+/*                                                                           */
+/*****************************************************************************/
+#include "board_conf.h"
+/*****************************************************************************/
+/*                                                                           */
+/*                   D E F I N I T I O N S                                   */
+/*                                                                           */
+/*****************************************************************************/
+
+
+/*****************************************************************************/
+/*                                                                           */
+/*           C O N S T A N T S  &  V A R I A B L E S                         */
+/*                                                                           */
+/*****************************************************************************/
+
+
+/// @brief  Possible STM32 system reset causes
+typedef enum reset_cause_e
+{
+    RESET_CAUSE_UNKNOWN = 0,
+    RESET_CAUSE_LOW_POWER_RESET,
+    RESET_CAUSE_WINDOW_WATCHDOG_RESET,
+    RESET_CAUSE_INDEPENDENT_WATCHDOG_RESET,
+    RESET_CAUSE_SOFTWARE_RESET,
+    RESET_CAUSE_POWER_ON_POWER_DOWN_RESET,
+    RESET_CAUSE_EXTERNAL_RESET_PIN_RESET,
+    RESET_CAUSE_BROWNOUT_RESET,
+} reset_cause_t;
+
+/*****************************************************************************/
+/*                                                                           */
+/*           F U N C T I O N   P R O T O T Y P E S                           */
+/*                                                                           */
+/*****************************************************************************/
+
+reset_cause_t reset_cause_get(void);
+const char * reset_cause_get_name(reset_cause_t reset_cause);
+/*****************************************************************************/
+/*                                                                           */
+/*  E N D  O F  F I L E                                                      */
+/*                                                                           */
+/*****************************************************************************/
+#endif /* END OF __STM32_RESET_H__ */

01_Code/FES_Common_Library/sw_util/bin_cpy_ver_prefix.bat

@@ -0,0 +1,43 @@
+@ECHO OFF
+SETLOCAL enableDelayedExpansion
+
+
+echo %1
+echo %2
+echo %3
+::echo %4
+::echo %3
+
+set cur_dir=%CD%
+
+::cd /D "%~dp0"
+echo %cur_dir%
+
+set ver_str_file="%cur_dir%\APP_SW_VER_STR"
+set out_dir=%3
+
+echo %ver_str_file%
+
+type %ver_str_file%
+
+set /P ver_str_file_prefix=<%ver_str_file%
+
+echo Version Prefix is : %ver_str_file_prefix%
+
+set out_file_name=%2
+
+echo Output File to be copied: %out_file_name%
+
+rem Extract *the first part* before the first dot
+set file_extension=%~x2
+
+set new_out_file=!out_file_name:%file_extension%=!
+set new_out_file=%new_out_file%_%ver_str_file_prefix%%file_extension%
+
+echo Output File extension: %file_extension%
+echo Output File Renamed: %new_out_file%
+
+echo From file: "%cur_dir%\.\%1\%2"
+echo To file: "%cur_dir%\.\%out_dir%\%new_out_file%"
+
+xcopy /F /Y "%cur_dir%\.\%2" "%cur_dir%\.\%out_dir%\%new_out_file%*"

01_Code/FES_Common_Library/sw_util/sw_inc.bat

@@ -0,0 +1,122 @@
+:: Increments as software version in a file.
+:: software version string                                               
+:: MAJOR_VERSION     - 2 digits                                          
+:: MINOR_VERSION     - 2 digits                                          
+:: BUG_FIX_VERSION   - 2 digits                                          
+:: BUILD_VERSION     - 4 digits                                          
+::                                                                       
+:: MAJOR_VERSION "." MINOR_VERSION "."  BUG_FIX_VERSION "." BUILD_VERSION
+::
+:: #define APP_SW_VER_STR   "03.03.02.0000"
+@ECHO OFF
+
+SETLOCAL enableDelayedExpansion
+echo "%~1"
+echo "Finding version string in " %1
+
+::set file_path_new="%~dpnf1"
+set file_path=%~dp1
+set file_name=%~nx1
+echo The File path is %file_path%
+echo The File name is %file_name%
+
+set file="%file_path%%file_name%"
+
+::del APP_SW_VER_STR
+
+findstr c:"#define APP_SW_VER_STR" %file% >APP_SW_VER_STR
+
+set ver_str=
+set /P ver_str=<APP_SW_VER_STR
+echo %ver_str%
+::del APP_SW_VER_STR
+IF ["%ver_str%"]==[""] (
+  echo "Did not find version string in the file. Please use sw_version.h"
+  GoTo exit
+  )  
+echo "Found version string"
+
+:IncrementSwVersion
+set ver_str_1=%ver_str:*"=%
+set ver_str_1=%ver_str_1:"=%
+echo %ver_str_1%
+
+set maj_ver=%ver_str_1:~0,2%
+set min_ver=%ver_str_1:~3,2%
+set bug_ver=%ver_str_1:~6,2%
+set build_ver=%ver_str_1:~9,4%
+
+for /F "tokens=* delims=0" %%N in ("%maj_ver%") do set "maj_ver=%%N" & set /A "maj_ver+=0"
+for /F "tokens=* delims=0" %%N in ("%min_ver%") do set "min_ver=%%N" & set /A "min_ver+=0"
+for /F "tokens=* delims=0" %%N in ("%bug_ver%") do set "bug_ver=%%N" & set /A "bug_ver+=0"
+for /F "tokens=* delims=0" %%N in ("%build_ver%") do set "build_ver=%%N" & set /A "build_ver+=0"
+
+set /A build_ver = %build_ver%+ 1
+
+::Incremented version 
+::echo %maj_ver%.%min_ver%.%bug_ver%.%build_ver%
+
+if %build_ver% gtr 9999 (
+  set /A min_ver = %min_ver% + 1 
+  set /A build_ver = 1
+  set /A bug_ver = 0
+  echo "Incrementing Minor verion!"
+  )
+if %min_ver% gtr 99 (
+  set /A maj_ver = %maj_ver% + 1
+  set /A min_ver = 0
+  set /A bug_ver = 0
+  set /A build_ver = 1
+  echo "Incrementing Major verion!"
+  )
+if %maj_ver% gtr 99 (
+  set /A maj_ver = 0 
+  set /A min_ver = 0 
+  set /A bug_ver = 0 
+  set /A build_ver = 1
+  echo "Resetting Version string due to overrun!"
+  )
+set maj_ver_str=00%maj_ver%
+set min_ver_str=00%min_ver%
+set bug_ver_str=00%bug_ver%
+set build_ver_str=0000%build_ver%
+set maj_ver_str=!maj_ver_str:~-2!
+set min_ver_str=!min_ver_str:~-2!
+set bug_ver_str=!bug_ver_str:~-2!
+set build_ver_str=!build_ver_str:~-4!
+
+set new_ver_str=%maj_ver_str%.%min_ver_str%.%bug_ver_str%.%build_ver_str%
+set ver_str_file_prefix=%maj_ver_str%_%min_ver_str%_%bug_ver_str%_%build_ver_str%
+
+echo %new_ver_str%
+echo %ver_str_file_prefix%>APP_SW_VER_STR
+
+set new_ver_str=!ver_str:%ver_str_1%=%new_ver_str%!
+
+echo old version String: %ver_str%
+echo new version String: %new_ver_str%
+set InputFile=%file_path%%file_name%
+set OutputFile=%InputFile%.tmp
+set "_strFind=%ver_str%"
+set "_strInsert=%new_ver_str%"
+echo %InputFile%
+echo %OutputFile%
+echo %_strFind%
+echo %_strInsert%
+
+>"%OutputFile%" (
+  for /f "usebackq delims=" %%A in ("%InputFile%") do (
+    if "%%A" equ "%_strFind%" (
+      echo %_strInsert%
+      ) else (
+      echo(%%A)
+      )
+  )
+)
+
+del "%InputFile%"
+ren "%OutputFile%" "%file_name%"
+
+:exit
+echo Completed!!!!!
+EXIT /B 0

01_Code/FES_Common_Library/system.h

@@ -0,0 +1,75 @@
+/*****************************************************************************/
+/* FILENAME     : system.h                                                   */
+/*                                                                           */
+/* DESCRIPTION  : System Level API Handling for  Application                 */
+/*                                                                           */
+/* NOTES        : Copyright Sathish Kumar P.  All rights reserved.           */
+/*                                                                           */
+/* AUTHOR       : Sathish Kumar                                              */
+/*                sathishembeddedgeek@gmail.com                              */
+/*                                                                           */
+/* START DATE   :  9th Feb 2020                                              */
+/*                                                                           */
+/* VERSION   DATE    WHO           DETAIL                                    */
+/* 00.00.01 09FEB20 Sathish Kumar   initial version                          */
+/*                                                                           */
+/*****************************************************************************/
+#ifndef __SYSTEM_H__
+#define __SYSTEM_H__
+
+
+/*****************************************************************************/
+/*                                                                           */
+/*                   I N C L U D E S                                         */
+/*                                                                           */
+/*****************************************************************************/
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+
+#include "fes_common_lib_version.h"
+#include <system_conf.h>
+
+/*****************************************************************************/
+/*                                                                           */
+/*                   D E F I N I T I O N S                                   */
+/*                                                                           */
+/*****************************************************************************/
+
+#define RTOS_DELAY(ms)     osDelay(ms)
+#define DELAY_MS(ms)       HAL_Delay(ms)
+
+#define LITTLE_ENDIAN_CONV_U32_U8(u32_var,u8_arr) {                                                            \
+                                                    u8_arr[0] = (uint8_t)(((uint32_t)u32_var&0xFF000000)>>24); \
+                                                    u8_arr[1] = (uint8_t)(((uint32_t)u32_var&0x00FF0000)>>16); \
+                                                    u8_arr[2] = (uint8_t)(((uint32_t)u32_var&0x0000FF00)>>8);  \
+                                                    u8_arr[3] = (uint8_t)((uint32_t)u32_var&0xFF);             \
+                                                  }
+
+#define LITTLE_ENDIAN_CONV_U8_U32(u8_arr,u32_var) {                                                  \
+                                                    u32_var = (uint32_t)(u8_arr[0]<<24)|(u8_arr[1]<<16)|(u8_arr[2]<<8)|(u8_arr[3]); \
+                                                  }
+
+/*** static assert helper macro */
+#define STATIC_ASSERT(test) typedef char assertion_on_mystruct[( !!(test) )*2-1 ]
+
+/*****************************************************************************/
+/*                                                                           */
+/*           C O N S T A N T S  &  V A R I A B L E S                         */
+/*                                                                           */
+/*****************************************************************************/
+
+
+/*****************************************************************************/
+/*                                                                           */
+/*           F U N C T I O N   P R O T O T Y P E S                           */
+/*                                                                           */
+/*****************************************************************************/
+
+/*****************************************************************************/
+/*                                                                           */
+/*  E N D  O F  F I L E                                                      */
+/*                                                                           */
+/*****************************************************************************/
+#endif /* END OF __SYSTEM_H__ */

01_Code/FES_Common_Library/typedefs.h

@@ -0,0 +1,95 @@
+/*****************************************************************************/
+/* FILENAME     : typedef.h                                                  */
+/*                                                                           */
+/* DESCRIPTION  : header file for typedefs in the system                     */
+/*                                                                           */
+/* NOTES        : Copyright Sathish Kumar P.  All rights reserved.           */
+/*                                                                           */
+/* AUTHOR       : Sathish Kumar P                                            */
+/*                sathishembeddedgeek@gmail.com                              */
+/*                                                                           */
+/* START DATE   : 28th Dec 2016                                              */
+/*                                                                           */
+/* VERSION   DATE    WHO          DETAIL                                     */
+/* 00.00.01 28Dec16  sathish      initial version                            */
+/*                                                                           */
+/*****************************************************************************/
+
+#ifndef __TYPEDEF_H__
+
+#define __TYPEDEF_H__
+
+/*****************************************************************************/
+/*                                                                           */
+/*                   I N C L U D E S                                         */
+/*                                                                           */
+/*****************************************************************************/
+
+#include <stdint.h>
+/* typedefs */
+//typedef unsigned char uint8_t;
+typedef signed char sint8_t;
+
+//typedef unsigned short uint16_t;
+typedef signed short sint16_t;
+
+//typedef unsigned int uint32_t;
+typedef signed int sint32_t;
+
+//typedef unsigned long long int uint64_t;
+typedef long long int sint64_t;
+
+typedef float float32_t;
+
+//typedef volatile uint8_t REG8;
+//typedef volatile uint16_t REG16;
+//typedef volatile uint32_t REG32;
+
+#ifndef TRUE
+  #define TRUE  1
+#endif
+
+#ifndef FALSE
+#define FALSE 0
+#endif
+
+#define OUTPUT  1
+#define INPUT 0
+
+#define HIGH  1
+#define LOW 0
+
+#define ON  1
+#define OFF 0
+
+
+#define INTERNAL 1 
+#define EXTERNAL 2
+
+#define HIGH_SPEED 1
+#define LOW_SPEED  2
+
+#ifndef NULL
+#define NULL ((void *) 0)
+#endif
+
+#define KILO_HZ   (1000)        /* in Hz */
+#define MEGA_HZ   (1000000)     /* in Hz */
+#define GIGA_HZ   (1000000000)  /* in Hz */
+
+#define MILLI_SEC (1/KILO_HZ)   /* in s */
+#define MICRO_SEC (1/MEGA_HZ)   /* in s */
+#define NANO_SEC  (1/GIGA_HZ)   /* in s */
+
+#define ARRAY_SIZE(x) ((sizeof (x))/(sizeof (x [0])))
+
+/* common bit set and clear macros */
+#define BIT_SET(var,bit_pos)  var|=(1<<bit_pos)
+#define BIT_CLR(var,bit_pos)  var&=(~(1<<bit_pos))
+
+/*****************************************************************************/
+/*                                                                           */
+/*  E N D  O F  F I L E                                                      */
+/*                                                                           */
+/*****************************************************************************/
+#endif /* END OF __TYPEDEF_H__ */

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/.cproject

@@ -0,0 +1,226 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.651781528">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.651781528" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.651781528" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug" postannouncebuildStep="copy binary" postbuildStep="&quot;${ProjDirPath}/../../../FES_Common_Library/sw_util/bin_cpy_ver_prefix.bat&quot; ${ConfigName} ${ProjName}.hex &quot;../../../../Binaries&quot;" preannouncebuildStep="build version increment" prebuildStep="&quot;${ProjDirPath}/../../../FES_Common_Library/sw_util/sw_inc.bat&quot; &quot;../../../src/sw_version.h&quot;">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.651781528." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.588947142" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1592163659" name="MCU" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" useByScannerDiscovery="true" value="STM32F413ZHTx" valueType="string"/>
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.393012314" name="MCU/MPU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
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+									<listOptionValue builtIn="false" value="STM32F413xx"/>
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+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1552513749" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
+									<listOptionValue builtIn="false" value="../Core/Inc"/>
+									<listOptionValue builtIn="false" value="../Drivers/STM32F4xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../Drivers/CMSIS/Device/ST/STM32F4xx/Include"/>
+									<listOptionValue builtIn="false" value="../Drivers/CMSIS/Include"/>
+									<listOptionValue builtIn="false" value="../FATFS/Target"/>
+									<listOptionValue builtIn="false" value="../FATFS/App"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/include"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FatFs/src"/>
+									<listOptionValue builtIn="false" value="../USB_DEVICE/App"/>
+									<listOptionValue builtIn="false" value="../USB_DEVICE/Target"/>
+									<listOptionValue builtIn="false" value="../Middlewares/ST/STM32_USB_Device_Library/Core/Inc"/>
+									<listOptionValue builtIn="false" value="../Middlewares/ST/STM32_USB_Device_Library/Class/MSC/Inc"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1677098915" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1709731860" name="MCU/MPU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.1603666842" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.947373611" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.711872852" name="MCU/MPU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1701756959" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32F413ZHTX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.2033833528" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.2117138159" name="MCU/MPU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1697744848" name="MCU/MPU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.912767829" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.334733735" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1830949398" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1667853989" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.2071590916" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.70783012" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.205753064" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
+						<entry excluding="CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Middlewares"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="USB_DEVICE"/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.pathentry"/>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="Goyoyo_DevBrd.null.813701108" name="Goyoyo_DevBrd"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1072786282;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1072786282.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.393012314;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1677098915">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.651781528;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.651781528.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.896087312;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.637923958">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+</cproject>

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/.project

@@ -0,0 +1,164 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>Goyoyo_DevBrd</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>Core/Src/App</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/FES_Common_Library</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/App/App_Flash.c</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/src/App_Flash.c</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/App/App_Main.c</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/src/App_Main.c</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/App/App_Settings.c</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/src/App_Settings.c</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/App/audio_recorder</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/App/fatfs</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/App/lwjson</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/FES_Common_Library/CircularQ</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/FES_Common_Library/KeyHdl</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/FES_Common_Library/Log</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/FES_Common_Library/stm32_reset</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/App/audio_recorder/App_AudioRec.c</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/src/audio_recorder/App_AudioRec.c</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/App/audio_recorder/App_Opus.c</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/src/audio_recorder/App_Opus.c</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/App/audio_recorder/opus_util</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/App/fatfs/App</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/App/fatfs/Target</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/App/lwjson/lwjson_stream.c</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/src/lwjson/lwjson_stream.c</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/FES_Common_Library/CircularQ/CircularQ.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/FES_Common_Library/CircularQ/CircularQ.c</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/FES_Common_Library/KeyHdl/keyhdl.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/FES_Common_Library/KeyHdl/keyhdl.c</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/FES_Common_Library/Log/Log.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/FES_Common_Library/Log/Log.c</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/FES_Common_Library/stm32_reset/stm32_reset.c</name>
+			<type>1</type>
+			<locationURI>PARENT-3-PROJECT_LOC/FES_Common_Library/stm32_reset/stm32_reset.c</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/App/audio_recorder/opus_util/OggPage.c</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/src/audio_recorder/opus_util/OggPage.c</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/App/audio_recorder/opus_util/OpusHeader.c</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/src/audio_recorder/opus_util/OpusHeader.c</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/App/fatfs/App/fatfs.c</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/src/fatfs/App/fatfs.c</locationURI>
+		</link>
+		<link>
+			<name>Core/Src/App/fatfs/Target/flash_diskio.c</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/src/fatfs/Target/flash_diskio.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs

@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+sfrviewstate={"fFavorites"\:{"fLists"\:{}},"fProperties"\:{"fNodeProperties"\:{}}}

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/.settings/language.settings.xml

@@ -0,0 +1,25 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<project>
+	<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.651781528" name="Debug">
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
+			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1801493549734421907" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
+				<language-scope id="org.eclipse.cdt.core.g++"/>
+			</provider>
+		</extension>
+	</configuration>
+	<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1072786282" name="Release">
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
+			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1801493549734421907" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
+				<language-scope id="org.eclipse.cdt.core.g++"/>
+			</provider>
+		</extension>
+	</configuration>
+</project>

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/.settings/stm32cubeide.project.prefs

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+8DF89ED150041C4CBC7CB9A9CAA90856=A20FB2DFB867415564BC92F63ECB0D24
+DC22A860405A8BF2F2C095E5B6529F12=EECD867470D330068E2F4458882E0736
+eclipse.preferences.version=1

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Core/Inc/FreeRTOSConfig.h

@@ -0,0 +1,142 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.3.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+  #include <stdint.h>
+  extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU                         0
+#define configENABLE_MPU                         0
+
+#define configUSE_PREEMPTION                     1
+#define configSUPPORT_STATIC_ALLOCATION          1
+#define configSUPPORT_DYNAMIC_ALLOCATION         1
+#define configUSE_IDLE_HOOK                      0
+#define configUSE_TICK_HOOK                      0
+#define configCPU_CLOCK_HZ                       ( SystemCoreClock )
+#define configTICK_RATE_HZ                       ((TickType_t)1000)
+#define configMAX_PRIORITIES                     ( 7 )
+#define configMINIMAL_STACK_SIZE                 ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE                    ((size_t)81920)
+#define configMAX_TASK_NAME_LEN                  ( 16 )
+#define configUSE_16_BIT_TICKS                   0
+#define configUSE_MUTEXES                        1
+#define configQUEUE_REGISTRY_SIZE                8
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION  1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+   if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE         size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                    0
+#define configMAX_CO_ROUTINE_PRIORITIES          ( 2 )
+
+/* The following flag must be enabled only when using newlib */
+#define configUSE_NEWLIB_REENTRANT          1
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet             1
+#define INCLUDE_uxTaskPriorityGet            1
+#define INCLUDE_vTaskDelete                  1
+#define INCLUDE_vTaskCleanUpResources        0
+#define INCLUDE_vTaskSuspend                 1
+#define INCLUDE_vTaskDelayUntil              0
+#define INCLUDE_vTaskDelay                   1
+#define INCLUDE_xTaskGetSchedulerState       1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS         __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS         4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY   15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );}
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler    SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+              to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Core/Inc/main.h

@@ -0,0 +1,75 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2024 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+#define USER_LED_Pin GPIO_PIN_10
+#define USER_LED_GPIO_Port GPIOF
+#define USER_BUTTON_Pin GPIO_PIN_10
+#define USER_BUTTON_GPIO_Port GPIOA
+#define LED_RED_Pin GPIO_PIN_15
+#define LED_RED_GPIO_Port GPIOG
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Core/Inc/stm32f4xx_hal_conf.h

@@ -0,0 +1,495 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32f4xx_hal_conf_template.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration template file.
+  *          This file should be copied to the application folder and renamed
+  *          to stm32f4xx_hal_conf.h.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F4xx_HAL_CONF_H
+#define __STM32F4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+
+  /* #define HAL_CRYP_MODULE_ENABLED */
+/* #define HAL_ADC_MODULE_ENABLED */
+/* #define HAL_CAN_MODULE_ENABLED */
+/* #define HAL_CRC_MODULE_ENABLED */
+/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
+/* #define HAL_DAC_MODULE_ENABLED */
+/* #define HAL_DCMI_MODULE_ENABLED */
+/* #define HAL_DMA2D_MODULE_ENABLED */
+/* #define HAL_ETH_MODULE_ENABLED */
+/* #define HAL_ETH_LEGACY_MODULE_ENABLED */
+/* #define HAL_NAND_MODULE_ENABLED */
+/* #define HAL_NOR_MODULE_ENABLED */
+/* #define HAL_PCCARD_MODULE_ENABLED */
+/* #define HAL_SRAM_MODULE_ENABLED */
+/* #define HAL_SDRAM_MODULE_ENABLED */
+/* #define HAL_HASH_MODULE_ENABLED */
+/* #define HAL_I2C_MODULE_ENABLED */
+/* #define HAL_I2S_MODULE_ENABLED */
+/* #define HAL_IWDG_MODULE_ENABLED */
+/* #define HAL_LTDC_MODULE_ENABLED */
+/* #define HAL_RNG_MODULE_ENABLED */
+#define HAL_RTC_MODULE_ENABLED
+/* #define HAL_SAI_MODULE_ENABLED */
+/* #define HAL_SD_MODULE_ENABLED */
+#define HAL_MMC_MODULE_ENABLED
+/* #define HAL_SPI_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_UART_MODULE_ENABLED
+/* #define HAL_USART_MODULE_ENABLED */
+/* #define HAL_IRDA_MODULE_ENABLED */
+/* #define HAL_SMARTCARD_MODULE_ENABLED */
+/* #define HAL_SMBUS_MODULE_ENABLED */
+/* #define HAL_WWDG_MODULE_ENABLED */
+#define HAL_PCD_MODULE_ENABLED
+/* #define HAL_HCD_MODULE_ENABLED */
+/* #define HAL_DSI_MODULE_ENABLED */
+/* #define HAL_QSPI_MODULE_ENABLED */
+#define HAL_QSPI_MODULE_ENABLED
+/* #define HAL_CEC_MODULE_ENABLED */
+/* #define HAL_FMPI2C_MODULE_ENABLED */
+/* #define HAL_FMPSMBUS_MODULE_ENABLED */
+/* #define HAL_SPDIFRX_MODULE_ENABLED */
+#define HAL_DFSDM_MODULE_ENABLED
+/* #define HAL_LPTIM_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## HSE/HSI Values adaptation ##################### */
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    8000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    100U   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+ #define LSI_VALUE  32000U       /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+                                             The real value may vary depending on the variations
+                                             in voltage and temperature.*/
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  */
+#if !defined  (LSE_VALUE)
+ #define LSE_VALUE  32768U    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    5000U   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S peripheral
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+  #define EXTERNAL_CLOCK_VALUE    12288000U /*!< Value of the External audio frequency in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#define  VDD_VALUE		      3300U /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            15U   /*!< tick interrupt priority */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              1U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
+#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
+#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
+#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
+#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
+#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
+#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
+#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
+#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
+#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
+#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
+#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
+#define  USE_HAL_FMPSMBUS_REGISTER_CALLBACKS    0U /* FMPSMBUS register callback disabled  */
+#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
+#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
+#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
+#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
+#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
+#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
+#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
+#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
+#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
+#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
+#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
+#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
+#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
+#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
+#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
+#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
+#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
+#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
+#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## Ethernet peripheral configuration ##################### */
+
+/* Section 1 : Ethernet peripheral configuration */
+
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
+#define MAC_ADDR0   2U
+#define MAC_ADDR1   0U
+#define MAC_ADDR2   0U
+#define MAC_ADDR3   0U
+#define MAC_ADDR4   0U
+#define MAC_ADDR5   0U
+
+/* Definition of the Ethernet driver buffers size and count */
+#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
+#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
+#define ETH_RXBUFNB                    4U       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
+#define ETH_TXBUFNB                    4U       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
+
+/* Section 2: PHY configuration section */
+
+/* DP83848_PHY_ADDRESS Address*/
+#define DP83848_PHY_ADDRESS
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
+#define PHY_RESET_DELAY                 0x000000FFU
+/* PHY Configuration delay */
+#define PHY_CONFIG_DELAY                0x00000FFFU
+
+#define PHY_READ_TO                     0x0000FFFFU
+#define PHY_WRITE_TO                    0x0000FFFFU
+
+/* Section 3: Common PHY Registers */
+
+#define PHY_BCR                         ((uint16_t)0x0000U)    /*!< Transceiver Basic Control Register   */
+#define PHY_BSR                         ((uint16_t)0x0001U)    /*!< Transceiver Basic Status Register    */
+
+#define PHY_RESET                       ((uint16_t)0x8000U)  /*!< PHY Reset */
+#define PHY_LOOPBACK                    ((uint16_t)0x4000U)  /*!< Select loop-back mode */
+#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100U)  /*!< Set the full-duplex mode at 100 Mb/s */
+#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000U)  /*!< Set the half-duplex mode at 100 Mb/s */
+#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100U)  /*!< Set the full-duplex mode at 10 Mb/s  */
+#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000U)  /*!< Set the half-duplex mode at 10 Mb/s  */
+#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000U)  /*!< Enable auto-negotiation function     */
+#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200U)  /*!< Restart auto-negotiation function    */
+#define PHY_POWERDOWN                   ((uint16_t)0x0800U)  /*!< Select the power down mode           */
+#define PHY_ISOLATE                     ((uint16_t)0x0400U)  /*!< Isolate PHY from MII                 */
+
+#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020U)  /*!< Auto-Negotiation process completed   */
+#define PHY_LINKED_STATUS               ((uint16_t)0x0004U)  /*!< Valid link established               */
+#define PHY_JABBER_DETECTION            ((uint16_t)0x0002U)  /*!< Jabber condition detected            */
+
+/* Section 4: Extended PHY Registers */
+#define PHY_SR                          ((uint16_t))    /*!< PHY status register Offset                      */
+
+#define PHY_SPEED_STATUS                ((uint16_t))  /*!< PHY Speed mask                                  */
+#define PHY_DUPLEX_STATUS               ((uint16_t))  /*!< PHY Duplex mask                                 */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                     0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32f4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32f4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32f4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32f4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32f4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32f4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+  #include "stm32f4xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+  #include "stm32f4xx_hal_can_legacy.h"
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32f4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32f4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32f4xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32f4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+  #include "stm32f4xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32f4xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_ETH_LEGACY_MODULE_ENABLED
+  #include "stm32f4xx_hal_eth_legacy.h"
+#endif /* HAL_ETH_LEGACY_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32f4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32f4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32f4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32f4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_PCCARD_MODULE_ENABLED
+  #include "stm32f4xx_hal_pccard.h"
+#endif /* HAL_PCCARD_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+  #include "stm32f4xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+ #include "stm32f4xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32f4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32f4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32f4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32f4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+ #include "stm32f4xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32f4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32f4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32f4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32f4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32f4xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32f4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32f4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32f4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32f4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32f4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32f4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32f4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32f4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32f4xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_DSI_MODULE_ENABLED
+ #include "stm32f4xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32f4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+ #include "stm32f4xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_FMPI2C_MODULE_ENABLED
+ #include "stm32f4xx_hal_fmpi2c.h"
+#endif /* HAL_FMPI2C_MODULE_ENABLED */
+
+#ifdef HAL_FMPSMBUS_MODULE_ENABLED
+ #include "stm32f4xx_hal_fmpsmbus.h"
+#endif /* HAL_FMPSMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+ #include "stm32f4xx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+ #include "stm32f4xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+ #include "stm32f4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+ #include "stm32f4xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F4xx_HAL_CONF_H */

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Core/Inc/stm32f4xx_it.h

@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32f4xx_it.h
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2024 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F4xx_IT_H
+#define __STM32F4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM2_IRQHandler(void);
+void UART4_IRQHandler(void);
+void TIM7_IRQHandler(void);
+void OTG_FS_IRQHandler(void);
+void DMA2_Stream6_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F4xx_IT_H */

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Core/Src/freertos.c

@@ -0,0 +1,74 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * File Name          : freertos.c
+  * Description        : Code for freertos applications
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2024 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* GetIdleTaskMemory prototype (linked to static allocation support) */
+void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize );
+
+/* USER CODE BEGIN GET_IDLE_TASK_MEMORY */
+static StaticTask_t xIdleTaskTCBBuffer;
+static StackType_t xIdleStack[configMINIMAL_STACK_SIZE];
+
+void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize )
+{
+  *ppxIdleTaskTCBBuffer = &xIdleTaskTCBBuffer;
+  *ppxIdleTaskStackBuffer = &xIdleStack[0];
+  *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
+  /* place for user code */
+}
+/* USER CODE END GET_IDLE_TASK_MEMORY */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Core/Src/main.c

@@ -0,0 +1,648 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2024 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+#include "fatfs.h"
+#include "usb_device.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include <App_main.h>
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+DFSDM_Filter_HandleTypeDef hdfsdm1_filter0;
+DFSDM_Channel_HandleTypeDef hdfsdm1_channel1;
+DMA_HandleTypeDef hdma_dfsdm1_flt0;
+
+QSPI_HandleTypeDef hqspi;
+
+RTC_HandleTypeDef hrtc;
+
+MMC_HandleTypeDef hmmc;
+
+TIM_HandleTypeDef htim7;
+
+UART_HandleTypeDef huart4;
+
+osThreadId defaultTaskHandle;
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void PeriphCommonClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_RTC_Init(void);
+static void MX_TIM7_Init(void);
+static void MX_QUADSPI_Init(void);
+static void MX_DFSDM1_Init(void);
+static void MX_UART4_Init(void);
+static void MX_SDIO_MMC_Init(void);
+void StartDefaultTask(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* Configure the peripherals common clocks */
+  PeriphCommonClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_DMA_Init();
+  MX_RTC_Init();
+  MX_TIM7_Init();
+  MX_QUADSPI_Init();
+  MX_DFSDM1_Init();
+  MX_UART4_Init();
+  MX_SDIO_MMC_Init();
+  /* USER CODE BEGIN 2 */
+  App_Init();
+  /* USER CODE END 2 */
+
+  /* USER CODE BEGIN RTOS_MUTEX */
+  /* add mutexes, ... */
+  /* USER CODE END RTOS_MUTEX */
+
+  /* USER CODE BEGIN RTOS_SEMAPHORES */
+  /* add semaphores, ... */
+  /* USER CODE END RTOS_SEMAPHORES */
+
+  /* USER CODE BEGIN RTOS_TIMERS */
+  /* start timers, add new ones, ... */
+  /* USER CODE END RTOS_TIMERS */
+
+  /* USER CODE BEGIN RTOS_QUEUES */
+  /* add queues, ... */
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* definition and creation of defaultTask */
+  osThreadDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 128);
+  defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL);
+
+  /* USER CODE BEGIN RTOS_THREADS */
+  /* add threads, ... */
+  /* USER CODE END RTOS_THREADS */
+
+  /* Start scheduler */
+  osKernelStart();
+
+  /* We should never get here as control is now taken by the scheduler */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = 8;
+  RCC_OscInitStruct.PLL.PLLN = 192;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 4;
+  RCC_OscInitStruct.PLL.PLLR = 2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief Peripherals Common Clock Configuration
+  * @retval None
+  */
+void PeriphCommonClock_Config(void)
+{
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+
+  /** Initializes the peripherals clock
+  */
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_PLLI2S|RCC_PERIPHCLK_I2S_APB2
+                              |RCC_PERIPHCLK_DFSDM1_AUDIO|RCC_PERIPHCLK_DFSDM1;
+  PeriphClkInitStruct.PLLI2S.PLLI2SN = 344;
+  PeriphClkInitStruct.PLLI2S.PLLI2SM = 8;
+  PeriphClkInitStruct.PLLI2S.PLLI2SR = 7;
+  PeriphClkInitStruct.PLLI2S.PLLI2SQ = 4;
+  PeriphClkInitStruct.Dfsdm1ClockSelection = RCC_DFSDM1CLKSOURCE_APB2;
+  PeriphClkInitStruct.Dfsdm1AudioClockSelection = RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2;
+  PeriphClkInitStruct.I2sApb2ClockSelection = RCC_I2SAPB2CLKSOURCE_PLLI2S;
+  PeriphClkInitStruct.PLLI2SSelection = RCC_PLLI2SCLKSOURCE_PLLSRC;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief DFSDM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_DFSDM1_Init(void)
+{
+
+  /* USER CODE BEGIN DFSDM1_Init 0 */
+
+  /* USER CODE END DFSDM1_Init 0 */
+
+  /* USER CODE BEGIN DFSDM1_Init 1 */
+
+  /* USER CODE END DFSDM1_Init 1 */
+  hdfsdm1_filter0.Instance = DFSDM1_Filter0;
+  hdfsdm1_filter0.Init.RegularParam.Trigger = DFSDM_FILTER_SW_TRIGGER;
+  hdfsdm1_filter0.Init.RegularParam.FastMode = ENABLE;
+  hdfsdm1_filter0.Init.RegularParam.DmaMode = ENABLE;
+  hdfsdm1_filter0.Init.FilterParam.SincOrder = DFSDM_FILTER_SINC4_ORDER;
+  hdfsdm1_filter0.Init.FilterParam.Oversampling = 32;
+  hdfsdm1_filter0.Init.FilterParam.IntOversampling = 1;
+  if (HAL_DFSDM_FilterInit(&hdfsdm1_filter0) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  hdfsdm1_channel1.Instance = DFSDM1_Channel1;
+  hdfsdm1_channel1.Init.OutputClock.Activation = ENABLE;
+  hdfsdm1_channel1.Init.OutputClock.Selection = DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO;
+  hdfsdm1_channel1.Init.OutputClock.Divider = 32;
+  hdfsdm1_channel1.Init.Input.Multiplexer = DFSDM_CHANNEL_EXTERNAL_INPUTS;
+  hdfsdm1_channel1.Init.Input.DataPacking = DFSDM_CHANNEL_STANDARD_MODE;
+  hdfsdm1_channel1.Init.Input.Pins = DFSDM_CHANNEL_SAME_CHANNEL_PINS;
+  hdfsdm1_channel1.Init.SerialInterface.Type = DFSDM_CHANNEL_SPI_RISING;
+  hdfsdm1_channel1.Init.SerialInterface.SpiClock = DFSDM_CHANNEL_SPI_CLOCK_INTERNAL;
+  hdfsdm1_channel1.Init.Awd.FilterOrder = DFSDM_CHANNEL_SINC1_ORDER;
+  hdfsdm1_channel1.Init.Awd.Oversampling = 10;
+  hdfsdm1_channel1.Init.Offset = 0;
+  hdfsdm1_channel1.Init.RightBitShift = 0x02;
+  if (HAL_DFSDM_ChannelInit(&hdfsdm1_channel1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_DFSDM_FilterConfigRegChannel(&hdfsdm1_filter0, DFSDM_CHANNEL_1, DFSDM_CONTINUOUS_CONV_ON) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN DFSDM1_Init 2 */
+
+  /* USER CODE END DFSDM1_Init 2 */
+
+}
+
+/**
+  * @brief QUADSPI Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_QUADSPI_Init(void)
+{
+
+  /* USER CODE BEGIN QUADSPI_Init 0 */
+
+  /* USER CODE END QUADSPI_Init 0 */
+
+  /* USER CODE BEGIN QUADSPI_Init 1 */
+
+  /* USER CODE END QUADSPI_Init 1 */
+  /* QUADSPI parameter configuration*/
+  hqspi.Instance = QUADSPI;
+  hqspi.Init.ClockPrescaler = 0;
+  hqspi.Init.FifoThreshold = 4;
+  hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE;
+  hqspi.Init.FlashSize = POSITION_VAL(APP_FLASH_SIZE) - 1;
+  hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_5_CYCLE;
+  hqspi.Init.ClockMode = QSPI_CLOCK_MODE_0;
+  hqspi.Init.FlashID = QSPI_FLASH_ID_1;
+  hqspi.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
+  if (HAL_QSPI_Init(&hqspi) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN QUADSPI_Init 2 */
+
+  /* USER CODE END QUADSPI_Init 2 */
+
+}
+
+/**
+  * @brief RTC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_RTC_Init(void)
+{
+
+  /* USER CODE BEGIN RTC_Init 0 */
+
+  /* USER CODE END RTC_Init 0 */
+
+  RTC_TimeTypeDef sTime = {0};
+  RTC_DateTypeDef sDate = {0};
+
+  /* USER CODE BEGIN RTC_Init 1 */
+
+  /* USER CODE END RTC_Init 1 */
+
+  /** Initialize RTC Only
+  */
+  hrtc.Instance = RTC;
+  hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
+  hrtc.Init.AsynchPrediv = 127;
+  hrtc.Init.SynchPrediv = 255;
+  hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
+  hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
+  hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
+  if (HAL_RTC_Init(&hrtc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* USER CODE BEGIN Check_RTC_BKUP */
+  /* Read the BackUp Register 1 Data */
+  if(HAL_RTCEx_BKUPRead(&hrtc, RTC_BKP_DR1) == 0x32F2)
+  {
+    return;
+  }
+  /* USER CODE END Check_RTC_BKUP */
+
+  /** Initialize RTC and set the Time and Date
+  */
+  sTime.Hours = 0x0;
+  sTime.Minutes = 0x0;
+  sTime.Seconds = 0x0;
+  sTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
+  sTime.StoreOperation = RTC_STOREOPERATION_RESET;
+  if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BCD) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sDate.WeekDay = RTC_WEEKDAY_SUNDAY;
+  sDate.Month = RTC_MONTH_DECEMBER;
+  sDate.Date = 0x1;
+  sDate.Year = 0x24;
+
+  if (HAL_RTC_SetDate(&hrtc, &sDate, RTC_FORMAT_BCD) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN RTC_Init 2 */
+  HAL_RTCEx_BKUPWrite(&hrtc, RTC_BKP_DR1, 0x32F2);
+  /* USER CODE END RTC_Init 2 */
+
+}
+
+/**
+  * @brief SDIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_SDIO_MMC_Init(void)
+{
+
+  /* USER CODE BEGIN SDIO_Init 0 */
+
+  /* USER CODE END SDIO_Init 0 */
+
+  /* USER CODE BEGIN SDIO_Init 1 */
+
+  /* USER CODE END SDIO_Init 1 */
+  hmmc.Instance = SDIO;
+  hmmc.Init.ClockEdge = SDIO_CLOCK_EDGE_RISING;
+  hmmc.Init.ClockBypass = SDIO_CLOCK_BYPASS_DISABLE;
+  hmmc.Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE;
+  hmmc.Init.BusWide = SDIO_BUS_WIDE_8B;
+  hmmc.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_ENABLE;
+  hmmc.Init.ClockDiv = 0;
+  if (HAL_MMC_Init(&hmmc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_MMC_ConfigWideBusOperation(&hmmc, SDIO_BUS_WIDE_8B) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN SDIO_Init 2 */
+
+  /* USER CODE END SDIO_Init 2 */
+
+}
+
+/**
+  * @brief TIM7 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM7_Init(void)
+{
+
+  /* USER CODE BEGIN TIM7_Init 0 */
+
+  /* USER CODE END TIM7_Init 0 */
+
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM7_Init 1 */
+
+  /* USER CODE END TIM7_Init 1 */
+  htim7.Instance = TIM7;
+  htim7.Init.Prescaler = 96-1;
+  htim7.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim7.Init.Period = 10000-1;
+  htim7.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
+  if (HAL_TIM_Base_Init(&htim7) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim7, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM7_Init 2 */
+
+  /* USER CODE END TIM7_Init 2 */
+
+}
+
+/**
+  * @brief UART4 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_UART4_Init(void)
+{
+
+  /* USER CODE BEGIN UART4_Init 0 */
+
+  /* USER CODE END UART4_Init 0 */
+
+  /* USER CODE BEGIN UART4_Init 1 */
+
+  /* USER CODE END UART4_Init 1 */
+  huart4.Instance = UART4;
+  huart4.Init.BaudRate = 115200;
+  huart4.Init.WordLength = UART_WORDLENGTH_8B;
+  huart4.Init.StopBits = UART_STOPBITS_1;
+  huart4.Init.Parity = UART_PARITY_NONE;
+  huart4.Init.Mode = UART_MODE_TX_RX;
+  huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart4.Init.OverSampling = UART_OVERSAMPLING_16;
+  if (HAL_UART_Init(&huart4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN UART4_Init 2 */
+
+  /* USER CODE END UART4_Init 2 */
+
+}
+
+/**
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMA2_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA2_Stream6_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 13, 0);
+  HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+  __HAL_RCC_GPIOH_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(USER_LED_GPIO_Port, USER_LED_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(LED_RED_GPIO_Port, LED_RED_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin : USER_LED_Pin */
+  GPIO_InitStruct.Pin = USER_LED_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(USER_LED_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : USER_BUTTON_Pin */
+  GPIO_InitStruct.Pin = USER_BUTTON_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(USER_BUTTON_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : LED_RED_Pin */
+  GPIO_InitStruct.Pin = LED_RED_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(LED_RED_GPIO_Port, &GPIO_InitStruct);
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_StartDefaultTask */
+/**
+  * @brief  Function implementing the defaultTask thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_StartDefaultTask */
+void StartDefaultTask(void const * argument)
+{
+  /* init code for USB_DEVICE */
+  MX_USB_DEVICE_Init();
+  /* USER CODE BEGIN 5 */
+  /* Infinite loop */
+  for(;;)
+  {
+    osDelay(10000);
+  }
+  /* USER CODE END 5 */
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM2 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM2) {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+  App_Timer_PeriodElapsedCallback(htim);
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Core/Src/stm32f4xx_hal_msp.c

@@ -0,0 +1,695 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file         stm32f4xx_hal_msp.c
+  * @brief        This file provides code for the MSP Initialization
+  *               and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2024 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_dfsdm1_flt0;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+static uint32_t HAL_RCC_DFSDM1_CLK_ENABLED=0;
+
+static uint32_t DFSDM1_Init = 0;
+/**
+* @brief DFSDM_Filter MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hdfsdm_filter: DFSDM_Filter handle pointer
+* @retval None
+*/
+void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if((IS_DFSDM1_FILTER_INSTANCE(hdfsdm_filter->Instance))&&(DFSDM1_Init == 0))
+  {
+  /* USER CODE BEGIN DFSDM1_MspInit 0 */
+
+  /* USER CODE END DFSDM1_MspInit 0 */
+    /* Peripheral clock enable */
+    HAL_RCC_DFSDM1_CLK_ENABLED++;
+    if(HAL_RCC_DFSDM1_CLK_ENABLED==1){
+      __HAL_RCC_DFSDM1_CLK_ENABLE();
+    }
+
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    /**DFSDM1 GPIO Configuration
+    PC2     ------> DFSDM1_CKOUT
+    PD6     ------> DFSDM1_DATIN1
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_2;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF8_DFSDM1;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF6_DFSDM1;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN DFSDM1_MspInit 1 */
+
+  /* USER CODE END DFSDM1_MspInit 1 */
+
+  DFSDM1_Init++;
+  }
+
+    /* DFSDM1 DMA Init */
+    /* DFSDM1_FLT0 Init */
+  if(hdfsdm_filter->Instance == DFSDM1_Filter0){
+    hdma_dfsdm1_flt0.Instance = DMA2_Stream6;
+    hdma_dfsdm1_flt0.Init.Channel = DMA_CHANNEL_3;
+    hdma_dfsdm1_flt0.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    hdma_dfsdm1_flt0.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_dfsdm1_flt0.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_dfsdm1_flt0.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+    hdma_dfsdm1_flt0.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
+    hdma_dfsdm1_flt0.Init.Mode = DMA_CIRCULAR;
+    hdma_dfsdm1_flt0.Init.Priority = DMA_PRIORITY_VERY_HIGH;
+    hdma_dfsdm1_flt0.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
+    if (HAL_DMA_Init(&hdma_dfsdm1_flt0) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Several peripheral DMA handle pointers point to the same DMA handle.
+     Be aware that there is only one stream to perform all the requested DMAs. */
+    __HAL_LINKDMA(hdfsdm_filter,hdmaInj,hdma_dfsdm1_flt0);
+    __HAL_LINKDMA(hdfsdm_filter,hdmaReg,hdma_dfsdm1_flt0);
+  }
+
+}
+
+/**
+* @brief DFSDM_Channel MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hdfsdm_channel: DFSDM_Channel handle pointer
+* @retval None
+*/
+void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef* hdfsdm_channel)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if((IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))&&(DFSDM1_Init == 0))
+  {
+  /* USER CODE BEGIN DFSDM1_MspInit 0 */
+
+  /* USER CODE END DFSDM1_MspInit 0 */
+    /* Peripheral clock enable */
+    HAL_RCC_DFSDM1_CLK_ENABLED++;
+    if(HAL_RCC_DFSDM1_CLK_ENABLED==1){
+      __HAL_RCC_DFSDM1_CLK_ENABLE();
+    }
+
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    /**DFSDM1 GPIO Configuration
+    PC2     ------> DFSDM1_CKOUT
+    PD6     ------> DFSDM1_DATIN1
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_2;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF8_DFSDM1;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF6_DFSDM1;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN DFSDM1_MspInit 1 */
+
+  /* USER CODE END DFSDM1_MspInit 1 */
+
+  DFSDM1_Init++;
+  }
+
+}
+
+/**
+* @brief DFSDM_Filter MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hdfsdm_filter: DFSDM_Filter handle pointer
+* @retval None
+*/
+void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
+{
+  if((IS_DFSDM1_FILTER_INSTANCE(hdfsdm_filter->Instance)))
+  {
+    DFSDM1_Init-- ;
+    if((DFSDM1_Init == 0))
+    {
+  /* USER CODE BEGIN DFSDM1_MspDeInit 0 */
+
+  /* USER CODE END DFSDM1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_DFSDM1_CLK_DISABLE();
+
+    /**DFSDM1 GPIO Configuration
+    PC2     ------> DFSDM1_CKOUT
+    PD6     ------> DFSDM1_DATIN1
+    */
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_2);
+
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_6);
+
+    /* DFSDM1 DMA DeInit */
+    HAL_DMA_DeInit(hdfsdm_filter->hdmaInj);
+    HAL_DMA_DeInit(hdfsdm_filter->hdmaReg);
+  /* USER CODE BEGIN DFSDM1_MspDeInit 1 */
+
+  /* USER CODE END DFSDM1_MspDeInit 1 */
+    }
+  }
+
+}
+
+/**
+* @brief DFSDM_Channel MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hdfsdm_channel: DFSDM_Channel handle pointer
+* @retval None
+*/
+void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef* hdfsdm_channel)
+{
+  if((IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance)))
+  {
+    DFSDM1_Init-- ;
+    if((DFSDM1_Init == 0))
+    {
+  /* USER CODE BEGIN DFSDM1_MspDeInit 0 */
+
+  /* USER CODE END DFSDM1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_DFSDM1_CLK_DISABLE();
+
+    /**DFSDM1 GPIO Configuration
+    PC2     ------> DFSDM1_CKOUT
+    PD6     ------> DFSDM1_DATIN1
+    */
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_2);
+
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_6);
+
+  /* USER CODE BEGIN DFSDM1_MspDeInit 1 */
+
+  /* USER CODE END DFSDM1_MspDeInit 1 */
+    }
+  }
+
+}
+
+/**
+* @brief QSPI MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hqspi: QSPI handle pointer
+* @retval None
+*/
+void HAL_QSPI_MspInit(QSPI_HandleTypeDef* hqspi)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(hqspi->Instance==QUADSPI)
+  {
+  /* USER CODE BEGIN QUADSPI_MspInit 0 */
+
+  /* USER CODE END QUADSPI_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_QSPI_CLK_ENABLE();
+
+    __HAL_RCC_GPIOE_CLK_ENABLE();
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+    __HAL_RCC_GPIOG_CLK_ENABLE();
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    /**QUADSPI GPIO Configuration
+    PE2     ------> QUADSPI_BK1_IO2
+    PF6     ------> QUADSPI_BK1_IO3
+    PF8     ------> QUADSPI_BK1_IO0
+    PF9     ------> QUADSPI_BK1_IO1
+    PG6     ------> QUADSPI_BK1_NCS
+    PD3     ------> QUADSPI_CLK
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_2;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF9_QSPI;
+    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF9_QSPI;
+    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF10_QSPI;
+    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF10_QSPI;
+    HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_3;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF9_QSPI;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN QUADSPI_MspInit 1 */
+
+  /* USER CODE END QUADSPI_MspInit 1 */
+
+  }
+
+}
+
+/**
+* @brief QSPI MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hqspi: QSPI handle pointer
+* @retval None
+*/
+void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* hqspi)
+{
+  if(hqspi->Instance==QUADSPI)
+  {
+  /* USER CODE BEGIN QUADSPI_MspDeInit 0 */
+
+  /* USER CODE END QUADSPI_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_QSPI_CLK_DISABLE();
+
+    /**QUADSPI GPIO Configuration
+    PE2     ------> QUADSPI_BK1_IO2
+    PF6     ------> QUADSPI_BK1_IO3
+    PF8     ------> QUADSPI_BK1_IO0
+    PF9     ------> QUADSPI_BK1_IO1
+    PG6     ------> QUADSPI_BK1_NCS
+    PD3     ------> QUADSPI_CLK
+    */
+    HAL_GPIO_DeInit(GPIOE, GPIO_PIN_2);
+
+    HAL_GPIO_DeInit(GPIOF, GPIO_PIN_6|GPIO_PIN_8|GPIO_PIN_9);
+
+    HAL_GPIO_DeInit(GPIOG, GPIO_PIN_6);
+
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_3);
+
+  /* USER CODE BEGIN QUADSPI_MspDeInit 1 */
+
+  /* USER CODE END QUADSPI_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief RTC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hrtc: RTC handle pointer
+* @retval None
+*/
+void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
+{
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+  if(hrtc->Instance==RTC)
+  {
+  /* USER CODE BEGIN RTC_MspInit 0 */
+
+  /* USER CODE END RTC_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
+    PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_RTC_ENABLE();
+  /* USER CODE BEGIN RTC_MspInit 1 */
+
+  /* USER CODE END RTC_MspInit 1 */
+
+  }
+
+}
+
+/**
+* @brief RTC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hrtc: RTC handle pointer
+* @retval None
+*/
+void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
+{
+  if(hrtc->Instance==RTC)
+  {
+  /* USER CODE BEGIN RTC_MspDeInit 0 */
+
+  /* USER CODE END RTC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_RTC_DISABLE();
+  /* USER CODE BEGIN RTC_MspDeInit 1 */
+
+  /* USER CODE END RTC_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief MMC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hmmc: MMC handle pointer
+* @retval None
+*/
+void HAL_MMC_MspInit(MMC_HandleTypeDef* hmmc)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+  if(hmmc->Instance==SDIO)
+  {
+  /* USER CODE BEGIN SDIO_MspInit 0 */
+
+  /* USER CODE END SDIO_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDIO|RCC_PERIPHCLK_CLK48;
+    PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLQ;
+    PeriphClkInitStruct.SdioClockSelection = RCC_SDIOCLKSOURCE_CLK48;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_SDIO_CLK_ENABLE();
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    /**SDIO GPIO Configuration
+    PB14     ------> SDIO_D6
+    PB15     ------> SDIO_CK
+    PC7     ------> SDIO_D7
+    PC9     ------> SDIO_D1
+    PC10     ------> SDIO_D2
+    PD2     ------> SDIO_CMD
+    PB5     ------> SDIO_D3
+    PB6     ------> SDIO_D0
+    PB8     ------> SDIO_D4
+    PB9     ------> SDIO_D5
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_8
+                          |GPIO_PIN_9;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF12_SDIO;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_15;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF12_SDIO;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_9|GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF12_SDIO;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_2;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF12_SDIO;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN SDIO_MspInit 1 */
+
+  /* USER CODE END SDIO_MspInit 1 */
+
+  }
+
+}
+
+/**
+* @brief MMC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hmmc: MMC handle pointer
+* @retval None
+*/
+void HAL_MMC_MspDeInit(MMC_HandleTypeDef* hmmc)
+{
+  if(hmmc->Instance==SDIO)
+  {
+  /* USER CODE BEGIN SDIO_MspDeInit 0 */
+
+  /* USER CODE END SDIO_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_SDIO_CLK_DISABLE();
+
+    /**SDIO GPIO Configuration
+    PB14     ------> SDIO_D6
+    PB15     ------> SDIO_CK
+    PC7     ------> SDIO_D7
+    PC9     ------> SDIO_D1
+    PC10     ------> SDIO_D2
+    PD2     ------> SDIO_CMD
+    PB5     ------> SDIO_D3
+    PB6     ------> SDIO_D0
+    PB8     ------> SDIO_D4
+    PB9     ------> SDIO_D5
+    */
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_14|GPIO_PIN_15|GPIO_PIN_5|GPIO_PIN_6
+                          |GPIO_PIN_8|GPIO_PIN_9);
+
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_7|GPIO_PIN_9|GPIO_PIN_10);
+
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
+
+  /* USER CODE BEGIN SDIO_MspDeInit 1 */
+
+  /* USER CODE END SDIO_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM7)
+  {
+  /* USER CODE BEGIN TIM7_MspInit 0 */
+
+  /* USER CODE END TIM7_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM7_CLK_ENABLE();
+    /* TIM7 interrupt Init */
+    HAL_NVIC_SetPriority(TIM7_IRQn, 14, 0);
+    HAL_NVIC_EnableIRQ(TIM7_IRQn);
+  /* USER CODE BEGIN TIM7_MspInit 1 */
+
+  /* USER CODE END TIM7_MspInit 1 */
+
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM7)
+  {
+  /* USER CODE BEGIN TIM7_MspDeInit 0 */
+
+  /* USER CODE END TIM7_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM7_CLK_DISABLE();
+
+    /* TIM7 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(TIM7_IRQn);
+  /* USER CODE BEGIN TIM7_MspDeInit 1 */
+
+  /* USER CODE END TIM7_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief UART MSP Initialization
+* This function configures the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(huart->Instance==UART4)
+  {
+  /* USER CODE BEGIN UART4_MspInit 0 */
+
+  /* USER CODE END UART4_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_UART4_CLK_ENABLE();
+
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    /**UART4 GPIO Configuration
+    PD0     ------> UART4_RX
+    PD1     ------> UART4_TX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF11_UART4;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+    /* UART4 interrupt Init */
+    HAL_NVIC_SetPriority(UART4_IRQn, 15, 0);
+    HAL_NVIC_EnableIRQ(UART4_IRQn);
+  /* USER CODE BEGIN UART4_MspInit 1 */
+
+  /* USER CODE END UART4_MspInit 1 */
+
+  }
+
+}
+
+/**
+* @brief UART MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+{
+  if(huart->Instance==UART4)
+  {
+  /* USER CODE BEGIN UART4_MspDeInit 0 */
+
+  /* USER CODE END UART4_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_UART4_CLK_DISABLE();
+
+    /**UART4 GPIO Configuration
+    PD0     ------> UART4_RX
+    PD1     ------> UART4_TX
+    */
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0|GPIO_PIN_1);
+
+    /* UART4 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(UART4_IRQn);
+  /* USER CODE BEGIN UART4_MspDeInit 1 */
+
+  /* USER CODE END UART4_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Core/Src/stm32f4xx_hal_timebase_tim.c

@@ -0,0 +1,138 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32f4xx_hal_timebase_tim.c
+  * @brief   HAL time base based on the hardware TIM.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2024 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx_hal.h"
+#include "stm32f4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef        htim2;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  This function configures the TIM2 as a time base source.
+  *         The time source is configured  to have 1ms time base with a dedicated
+  *         Tick interrupt priority.
+  * @note   This function is called  automatically at the beginning of program after
+  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+  * @param  TickPriority: Tick interrupt priority.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+  RCC_ClkInitTypeDef    clkconfig;
+  uint32_t              uwTimclock, uwAPB1Prescaler = 0U;
+
+  uint32_t              uwPrescalerValue = 0U;
+  uint32_t              pFLatency;
+
+  HAL_StatusTypeDef     status;
+
+  /* Enable TIM2 clock */
+  __HAL_RCC_TIM2_CLK_ENABLE();
+
+/* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+  /* Get APB1 prescaler */
+  uwAPB1Prescaler = clkconfig.APB1CLKDivider;
+  /* Compute TIM2 clock */
+  if (uwAPB1Prescaler == RCC_HCLK_DIV1)
+  {
+    uwTimclock = HAL_RCC_GetPCLK1Freq();
+  }
+  else
+  {
+    uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq();
+  }
+
+  /* Compute the prescaler value to have TIM2 counter clock equal to 1MHz */
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+  /* Initialize TIM2 */
+  htim2.Instance = TIM2;
+
+  /* Initialize TIMx peripheral as follow:
+
+  + Period = [(TIM2CLK/1000) - 1]. to have a (1/1000) s time base.
+  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+  + ClockDivision = 0
+  + Counter direction = Up
+  */
+  htim2.Init.Period = (1000000U / 1000U) - 1U;
+  htim2.Init.Prescaler = uwPrescalerValue;
+  htim2.Init.ClockDivision = 0;
+  htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+
+  status = HAL_TIM_Base_Init(&htim2);
+  if (status == HAL_OK)
+  {
+    /* Start the TIM time Base generation in interrupt mode */
+    status = HAL_TIM_Base_Start_IT(&htim2);
+    if (status == HAL_OK)
+    {
+    /* Enable the TIM2 global Interrupt */
+        HAL_NVIC_EnableIRQ(TIM2_IRQn);
+      /* Configure the SysTick IRQ priority */
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+      {
+        /* Configure the TIM IRQ priority */
+        HAL_NVIC_SetPriority(TIM2_IRQn, TickPriority, 0U);
+        uwTickPrio = TickPriority;
+      }
+      else
+      {
+        status = HAL_ERROR;
+      }
+    }
+  }
+
+ /* Return function status */
+  return status;
+}
+
+/**
+  * @brief  Suspend Tick increment.
+  * @note   Disable the tick increment by disabling TIM2 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_SuspendTick(void)
+{
+  /* Disable TIM2 update Interrupt */
+  __HAL_TIM_DISABLE_IT(&htim2, TIM_IT_UPDATE);
+}
+
+/**
+  * @brief  Resume Tick increment.
+  * @note   Enable the tick increment by Enabling TIM2 update interrupt.
+  * @param  None
+  * @retval None
+  */
+void HAL_ResumeTick(void)
+{
+  /* Enable TIM2 Update interrupt */
+  __HAL_TIM_ENABLE_IT(&htim2, TIM_IT_UPDATE);
+}
+

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Core/Src/stm32f4xx_it.c

@@ -0,0 +1,238 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32f4xx_it.c
+  * @brief   Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2024 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32f4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
+extern DMA_HandleTypeDef hdma_dfsdm1_flt0;
+extern TIM_HandleTypeDef htim7;
+extern UART_HandleTypeDef huart4;
+extern TIM_HandleTypeDef htim2;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+   while (1)
+  {
+  }
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Pre-fetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32F4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32f4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles TIM2 global interrupt.
+  */
+void TIM2_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM2_IRQn 0 */
+
+  /* USER CODE END TIM2_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim2);
+  /* USER CODE BEGIN TIM2_IRQn 1 */
+
+  /* USER CODE END TIM2_IRQn 1 */
+}
+
+/**
+  * @brief This function handles UART4 global interrupt.
+  */
+void UART4_IRQHandler(void)
+{
+  /* USER CODE BEGIN UART4_IRQn 0 */
+
+  /* USER CODE END UART4_IRQn 0 */
+  HAL_UART_IRQHandler(&huart4);
+  /* USER CODE BEGIN UART4_IRQn 1 */
+
+  /* USER CODE END UART4_IRQn 1 */
+}
+
+/**
+  * @brief This function handles TIM7 global interrupt.
+  */
+void TIM7_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM7_IRQn 0 */
+
+  /* USER CODE END TIM7_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim7);
+  /* USER CODE BEGIN TIM7_IRQn 1 */
+
+  /* USER CODE END TIM7_IRQn 1 */
+}
+
+/**
+  * @brief This function handles USB On The Go FS global interrupt.
+  */
+void OTG_FS_IRQHandler(void)
+{
+  /* USER CODE BEGIN OTG_FS_IRQn 0 */
+
+  /* USER CODE END OTG_FS_IRQn 0 */
+  HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
+  /* USER CODE BEGIN OTG_FS_IRQn 1 */
+
+  /* USER CODE END OTG_FS_IRQn 1 */
+}
+
+/**
+  * @brief This function handles DMA2 stream6 global interrupt.
+  */
+void DMA2_Stream6_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA2_Stream6_IRQn 0 */
+
+  /* USER CODE END DMA2_Stream6_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_dfsdm1_flt0);
+  /* USER CODE BEGIN DMA2_Stream6_IRQn 1 */
+
+  /* USER CODE END DMA2_Stream6_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Core/Src/syscalls.c

@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file      syscalls.c
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     STM32CubeIDE Minimal System calls file
+ *
+ *            For more information about which c-functions
+ *            need which of these lowlevel functions
+ *            please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2024 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/times.h>
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+  return 1;
+}
+
+int _kill(int pid, int sig)
+{
+  (void)pid;
+  (void)sig;
+  errno = EINVAL;
+  return -1;
+}
+
+void _exit (int status)
+{
+  _kill(status, -1);
+  while (1) {}    /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    *ptr++ = __io_getchar();
+  }
+
+  return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+  (void)file;
+  int DataIdx;
+
+  for (DataIdx = 0; DataIdx < len; DataIdx++)
+  {
+    __io_putchar(*ptr++);
+  }
+  return len;
+}
+
+int _close(int file)
+{
+  (void)file;
+  return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _isatty(int file)
+{
+  (void)file;
+  return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+  (void)file;
+  (void)ptr;
+  (void)dir;
+  return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+  (void)path;
+  (void)flags;
+  /* Pretend like we always fail */
+  return -1;
+}
+
+int _wait(int *status)
+{
+  (void)status;
+  errno = ECHILD;
+  return -1;
+}
+
+int _unlink(char *name)
+{
+  (void)name;
+  errno = ENOENT;
+  return -1;
+}
+
+int _times(struct tms *buf)
+{
+  (void)buf;
+  return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+  (void)file;
+  st->st_mode = S_IFCHR;
+  return 0;
+}
+
+int _link(char *old, char *new)
+{
+  (void)old;
+  (void)new;
+  errno = EMLINK;
+  return -1;
+}
+
+int _fork(void)
+{
+  errno = EAGAIN;
+  return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+  (void)name;
+  (void)argv;
+  (void)env;
+  errno = ENOMEM;
+  return -1;
+}

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Core/Src/sysmem.c

@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file      sysmem.c
+ * @author    Generated by STM32CubeIDE
+ * @brief     STM32CubeIDE System Memory calls file
+ *
+ *            For more information about which C functions
+ *            need which of these lowlevel functions
+ *            please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2024 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include <errno.h>
+#include <stdint.h>
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ *        and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+ * #         #        #                         # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+  {
+    __sbrk_heap_end = &_end;
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+  {
+    errno = ENOMEM;
+    return (void *)-1;
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+  __sbrk_heap_end += incr;
+
+  return (void *)prev_heap_end;
+}

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Core/Src/system_stm32f4xx.c

@@ -0,0 +1,747 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32f4xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
+  *
+  *   This file provides two functions and one global variable to be called from 
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and 
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32f4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick 
+  *                                  timer or configure other parameters.
+  *                                     
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32f4xx_system
+  * @{
+  */  
+  
+/** @addtogroup STM32F4xx_System_Private_Includes
+  * @{
+  */
+
+
+#include "stm32f4xx.h"
+
+#if !defined  (HSE_VALUE) 
+  #define HSE_VALUE    ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory  */
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
+ || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
+/* #define DATA_IN_ExtSRAM */
+#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\
+          STM32F412Zx || STM32F412Vx */
+ 
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
+/* #define DATA_IN_ExtSDRAM */
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
+          STM32F479xx */
+
+/* Note: Following vector table addresses must be defined in line with linker
+         configuration. */
+/*!< Uncomment the following line if you need to relocate the vector table
+     anywhere in Flash or Sram, else the vector table is kept at the automatic
+     remap of boot address selected */
+/* #define USER_VECT_TAB_ADDRESS */
+
+#if defined(USER_VECT_TAB_ADDRESS)
+/*!< Uncomment the following line if you need to relocate your vector Table
+     in Sram else user remap will be done in Flash. */
+/* #define VECT_TAB_SRAM */
+#if defined(VECT_TAB_SRAM)
+#define VECT_TAB_BASE_ADDRESS   SRAM_BASE       /*!< Vector Table base address field.
+                                                     This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
+                                                     This value must be a multiple of 0x200. */
+#else
+#define VECT_TAB_BASE_ADDRESS   FLASH_BASE      /*!< Vector Table base address field.
+                                                     This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
+                                                     This value must be a multiple of 0x200. */
+#endif /* VECT_TAB_SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
+/******************************************************************************/
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Variables
+  * @{
+  */
+  /* This variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+uint32_t SystemCoreClock = 16000000;
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t APBPrescTable[8]  = {0, 0, 0, 0, 1, 2, 3, 4};
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+  static void SystemInit_ExtMemCtl(void); 
+#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system
+  *         Initialize the FPU setting, vector table location and External memory 
+  *         configuration.
+  * @param  None
+  * @retval None
+  */
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
+  #endif
+
+#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+  SystemInit_ExtMemCtl(); 
+#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+
+  /* Configure the Vector Table location -------------------------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
+}
+
+/**
+   * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *           
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.         
+  *     
+  * @note   - The system frequency computed by this function is not the real 
+  *           frequency in the chip. It is calculated based on the predefined 
+  *           constant and the selected clock source:
+  *             
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+  *                                              
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+  *                          
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *         
+  *         (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
+  *             16 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.   
+  *    
+  *         (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
+  *              depends on the application requirements), user has to ensure that HSE_VALUE
+  *              is same as the real frequency of the crystal used. Otherwise, this function
+  *              may have wrong result.
+  *                
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *     
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
+  
+  /* Get SYSCLK source -------------------------------------------------------*/
+  tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+  switch (tmp)
+  {
+    case 0x00:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+    case 0x04:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+    case 0x08:  /* PLL used as system clock source */
+
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+         SYSCLK = PLL_VCO / PLL_P
+         */    
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+      
+      if (pllsource != 0)
+      {
+        /* HSE used as PLL clock source */
+        pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+      }
+      else
+      {
+        /* HSI used as PLL clock source */
+        pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+      }
+
+      pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
+      SystemCoreClock = pllvco/pllp;
+      break;
+    default:
+      SystemCoreClock = HSI_VALUE;
+      break;
+  }
+  /* Compute HCLK frequency --------------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK frequency */
+  SystemCoreClock >>= tmp;
+}
+
+#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM)
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx)
+/**
+  * @brief  Setup the external memory controller.
+  *         Called in startup_stm32f4xx.s before jump to main.
+  *         This function configures the external memories (SRAM/SDRAM)
+  *         This SRAM/SDRAM will be used as program data memory (including heap and stack).
+  * @param  None
+  * @retval None
+  */
+void SystemInit_ExtMemCtl(void)
+{
+  __IO uint32_t tmp = 0x00;
+
+  register uint32_t tmpreg = 0, timeout = 0xFFFF;
+  register __IO uint32_t index;
+
+  /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */
+  RCC->AHB1ENR |= 0x000001F8;
+
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
+  
+  /* Connect PDx pins to FMC Alternate function */
+  GPIOD->AFR[0]  = 0x00CCC0CC;
+  GPIOD->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PDx pins in Alternate function mode */  
+  GPIOD->MODER   = 0xAAAA0A8A;
+  /* Configure PDx pins speed to 100 MHz */  
+  GPIOD->OSPEEDR = 0xFFFF0FCF;
+  /* Configure PDx pins Output type to push-pull */  
+  GPIOD->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PDx pins */ 
+  GPIOD->PUPDR   = 0x00000000;
+
+  /* Connect PEx pins to FMC Alternate function */
+  GPIOE->AFR[0]  = 0xC00CC0CC;
+  GPIOE->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PEx pins in Alternate function mode */ 
+  GPIOE->MODER   = 0xAAAA828A;
+  /* Configure PEx pins speed to 100 MHz */ 
+  GPIOE->OSPEEDR = 0xFFFFC3CF;
+  /* Configure PEx pins Output type to push-pull */  
+  GPIOE->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PEx pins */ 
+  GPIOE->PUPDR   = 0x00000000;
+  
+  /* Connect PFx pins to FMC Alternate function */
+  GPIOF->AFR[0]  = 0xCCCCCCCC;
+  GPIOF->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PFx pins in Alternate function mode */   
+  GPIOF->MODER   = 0xAA800AAA;
+  /* Configure PFx pins speed to 50 MHz */ 
+  GPIOF->OSPEEDR = 0xAA800AAA;
+  /* Configure PFx pins Output type to push-pull */  
+  GPIOF->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PFx pins */ 
+  GPIOF->PUPDR   = 0x00000000;
+
+  /* Connect PGx pins to FMC Alternate function */
+  GPIOG->AFR[0]  = 0xCCCCCCCC;
+  GPIOG->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PGx pins in Alternate function mode */ 
+  GPIOG->MODER   = 0xAAAAAAAA;
+  /* Configure PGx pins speed to 50 MHz */ 
+  GPIOG->OSPEEDR = 0xAAAAAAAA;
+  /* Configure PGx pins Output type to push-pull */  
+  GPIOG->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PGx pins */ 
+  GPIOG->PUPDR   = 0x00000000;
+  
+  /* Connect PHx pins to FMC Alternate function */
+  GPIOH->AFR[0]  = 0x00C0CC00;
+  GPIOH->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PHx pins in Alternate function mode */ 
+  GPIOH->MODER   = 0xAAAA08A0;
+  /* Configure PHx pins speed to 50 MHz */ 
+  GPIOH->OSPEEDR = 0xAAAA08A0;
+  /* Configure PHx pins Output type to push-pull */  
+  GPIOH->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PHx pins */ 
+  GPIOH->PUPDR   = 0x00000000;
+  
+  /* Connect PIx pins to FMC Alternate function */
+  GPIOI->AFR[0]  = 0xCCCCCCCC;
+  GPIOI->AFR[1]  = 0x00000CC0;
+  /* Configure PIx pins in Alternate function mode */ 
+  GPIOI->MODER   = 0x0028AAAA;
+  /* Configure PIx pins speed to 50 MHz */ 
+  GPIOI->OSPEEDR = 0x0028AAAA;
+  /* Configure PIx pins Output type to push-pull */  
+  GPIOI->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PIx pins */ 
+  GPIOI->PUPDR   = 0x00000000;
+  
+/*-- FMC Configuration -------------------------------------------------------*/
+  /* Enable the FMC interface clock */
+  RCC->AHB3ENR |= 0x00000001;
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+
+  FMC_Bank5_6->SDCR[0] = 0x000019E4;
+  FMC_Bank5_6->SDTR[0] = 0x01115351;      
+  
+  /* SDRAM initialization sequence */
+  /* Clock enable command */
+  FMC_Bank5_6->SDCMR = 0x00000011; 
+  tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+
+  /* Delay */
+  for (index = 0; index<1000; index++);
+  
+  /* PALL command */
+  FMC_Bank5_6->SDCMR = 0x00000012;           
+  tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+  
+  /* Auto refresh command */
+  FMC_Bank5_6->SDCMR = 0x00000073;
+  tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+ 
+  /* MRD register program */
+  FMC_Bank5_6->SDCMR = 0x00046014;
+  tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  } 
+  
+  /* Set refresh count */
+  tmpreg = FMC_Bank5_6->SDRTR;
+  FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
+  
+  /* Disable write protection */
+  tmpreg = FMC_Bank5_6->SDCR[0]; 
+  FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
+  /* Configure and enable Bank1_SRAM2 */
+  FMC_Bank1->BTCR[2]  = 0x00001011;
+  FMC_Bank1->BTCR[3]  = 0x00000201;
+  FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ 
+#if defined(STM32F469xx) || defined(STM32F479xx)
+  /* Configure and enable Bank1_SRAM2 */
+  FMC_Bank1->BTCR[2]  = 0x00001091;
+  FMC_Bank1->BTCR[3]  = 0x00110212;
+  FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F469xx || STM32F479xx */
+
+  (void)(tmp); 
+}
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
+#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+/**
+  * @brief  Setup the external memory controller.
+  *         Called in startup_stm32f4xx.s before jump to main.
+  *         This function configures the external memories (SRAM/SDRAM)
+  *         This SRAM/SDRAM will be used as program data memory (including heap and stack).
+  * @param  None
+  * @retval None
+  */
+void SystemInit_ExtMemCtl(void)
+{
+  __IO uint32_t tmp = 0x00;
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
+#if defined (DATA_IN_ExtSDRAM)
+  register uint32_t tmpreg = 0, timeout = 0xFFFF;
+  register __IO uint32_t index;
+
+#if defined(STM32F446xx)
+  /* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface
+      clock */
+  RCC->AHB1ENR |= 0x0000007D;
+#else
+  /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface 
+      clock */
+  RCC->AHB1ENR |= 0x000001F8;
+#endif /* STM32F446xx */  
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
+  
+#if defined(STM32F446xx)
+  /* Connect PAx pins to FMC Alternate function */
+  GPIOA->AFR[0]  |= 0xC0000000;
+  GPIOA->AFR[1]  |= 0x00000000;
+  /* Configure PDx pins in Alternate function mode */
+  GPIOA->MODER   |= 0x00008000;
+  /* Configure PDx pins speed to 50 MHz */
+  GPIOA->OSPEEDR |= 0x00008000;
+  /* Configure PDx pins Output type to push-pull */
+  GPIOA->OTYPER  |= 0x00000000;
+  /* No pull-up, pull-down for PDx pins */
+  GPIOA->PUPDR   |= 0x00000000;
+
+  /* Connect PCx pins to FMC Alternate function */
+  GPIOC->AFR[0]  |= 0x00CC0000;
+  GPIOC->AFR[1]  |= 0x00000000;
+  /* Configure PDx pins in Alternate function mode */
+  GPIOC->MODER   |= 0x00000A00;
+  /* Configure PDx pins speed to 50 MHz */
+  GPIOC->OSPEEDR |= 0x00000A00;
+  /* Configure PDx pins Output type to push-pull */
+  GPIOC->OTYPER  |= 0x00000000;
+  /* No pull-up, pull-down for PDx pins */
+  GPIOC->PUPDR   |= 0x00000000;
+#endif /* STM32F446xx */
+
+  /* Connect PDx pins to FMC Alternate function */
+  GPIOD->AFR[0]  = 0x000000CC;
+  GPIOD->AFR[1]  = 0xCC000CCC;
+  /* Configure PDx pins in Alternate function mode */  
+  GPIOD->MODER   = 0xA02A000A;
+  /* Configure PDx pins speed to 50 MHz */  
+  GPIOD->OSPEEDR = 0xA02A000A;
+  /* Configure PDx pins Output type to push-pull */  
+  GPIOD->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PDx pins */ 
+  GPIOD->PUPDR   = 0x00000000;
+
+  /* Connect PEx pins to FMC Alternate function */
+  GPIOE->AFR[0]  = 0xC00000CC;
+  GPIOE->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PEx pins in Alternate function mode */ 
+  GPIOE->MODER   = 0xAAAA800A;
+  /* Configure PEx pins speed to 50 MHz */ 
+  GPIOE->OSPEEDR = 0xAAAA800A;
+  /* Configure PEx pins Output type to push-pull */  
+  GPIOE->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PEx pins */ 
+  GPIOE->PUPDR   = 0x00000000;
+
+  /* Connect PFx pins to FMC Alternate function */
+  GPIOF->AFR[0]  = 0xCCCCCCCC;
+  GPIOF->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PFx pins in Alternate function mode */   
+  GPIOF->MODER   = 0xAA800AAA;
+  /* Configure PFx pins speed to 50 MHz */ 
+  GPIOF->OSPEEDR = 0xAA800AAA;
+  /* Configure PFx pins Output type to push-pull */  
+  GPIOF->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PFx pins */ 
+  GPIOF->PUPDR   = 0x00000000;
+
+  /* Connect PGx pins to FMC Alternate function */
+  GPIOG->AFR[0]  = 0xCCCCCCCC;
+  GPIOG->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PGx pins in Alternate function mode */ 
+  GPIOG->MODER   = 0xAAAAAAAA;
+  /* Configure PGx pins speed to 50 MHz */ 
+  GPIOG->OSPEEDR = 0xAAAAAAAA;
+  /* Configure PGx pins Output type to push-pull */  
+  GPIOG->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PGx pins */ 
+  GPIOG->PUPDR   = 0x00000000;
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx)  
+  /* Connect PHx pins to FMC Alternate function */
+  GPIOH->AFR[0]  = 0x00C0CC00;
+  GPIOH->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PHx pins in Alternate function mode */ 
+  GPIOH->MODER   = 0xAAAA08A0;
+  /* Configure PHx pins speed to 50 MHz */ 
+  GPIOH->OSPEEDR = 0xAAAA08A0;
+  /* Configure PHx pins Output type to push-pull */  
+  GPIOH->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PHx pins */ 
+  GPIOH->PUPDR   = 0x00000000;
+  
+  /* Connect PIx pins to FMC Alternate function */
+  GPIOI->AFR[0]  = 0xCCCCCCCC;
+  GPIOI->AFR[1]  = 0x00000CC0;
+  /* Configure PIx pins in Alternate function mode */ 
+  GPIOI->MODER   = 0x0028AAAA;
+  /* Configure PIx pins speed to 50 MHz */ 
+  GPIOI->OSPEEDR = 0x0028AAAA;
+  /* Configure PIx pins Output type to push-pull */  
+  GPIOI->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PIx pins */ 
+  GPIOI->PUPDR   = 0x00000000;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
+  
+/*-- FMC Configuration -------------------------------------------------------*/
+  /* Enable the FMC interface clock */
+  RCC->AHB3ENR |= 0x00000001;
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+
+  /* Configure and enable SDRAM bank1 */
+#if defined(STM32F446xx)
+  FMC_Bank5_6->SDCR[0] = 0x00001954;
+#else  
+  FMC_Bank5_6->SDCR[0] = 0x000019E4;
+#endif /* STM32F446xx */
+  FMC_Bank5_6->SDTR[0] = 0x01115351;      
+  
+  /* SDRAM initialization sequence */
+  /* Clock enable command */
+  FMC_Bank5_6->SDCMR = 0x00000011; 
+  tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+
+  /* Delay */
+  for (index = 0; index<1000; index++);
+  
+  /* PALL command */
+  FMC_Bank5_6->SDCMR = 0x00000012;           
+  tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+  
+  /* Auto refresh command */
+#if defined(STM32F446xx)
+  FMC_Bank5_6->SDCMR = 0x000000F3;
+#else  
+  FMC_Bank5_6->SDCMR = 0x00000073;
+#endif /* STM32F446xx */
+  tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+ 
+  /* MRD register program */
+#if defined(STM32F446xx)
+  FMC_Bank5_6->SDCMR = 0x00044014;
+#else  
+  FMC_Bank5_6->SDCMR = 0x00046014;
+#endif /* STM32F446xx */
+  tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  } 
+  
+  /* Set refresh count */
+  tmpreg = FMC_Bank5_6->SDRTR;
+#if defined(STM32F446xx)
+  FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1));
+#else    
+  FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
+#endif /* STM32F446xx */
+  
+  /* Disable write protection */
+  tmpreg = FMC_Bank5_6->SDCR[0]; 
+  FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
+#endif /* DATA_IN_ExtSDRAM */
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
+
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
+ || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
+
+#if defined(DATA_IN_ExtSRAM)
+/*-- GPIOs Configuration -----------------------------------------------------*/
+   /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
+  RCC->AHB1ENR   |= 0x00000078;
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);
+  
+  /* Connect PDx pins to FMC Alternate function */
+  GPIOD->AFR[0]  = 0x00CCC0CC;
+  GPIOD->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PDx pins in Alternate function mode */  
+  GPIOD->MODER   = 0xAAAA0A8A;
+  /* Configure PDx pins speed to 100 MHz */  
+  GPIOD->OSPEEDR = 0xFFFF0FCF;
+  /* Configure PDx pins Output type to push-pull */  
+  GPIOD->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PDx pins */ 
+  GPIOD->PUPDR   = 0x00000000;
+
+  /* Connect PEx pins to FMC Alternate function */
+  GPIOE->AFR[0]  = 0xC00CC0CC;
+  GPIOE->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PEx pins in Alternate function mode */ 
+  GPIOE->MODER   = 0xAAAA828A;
+  /* Configure PEx pins speed to 100 MHz */ 
+  GPIOE->OSPEEDR = 0xFFFFC3CF;
+  /* Configure PEx pins Output type to push-pull */  
+  GPIOE->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PEx pins */ 
+  GPIOE->PUPDR   = 0x00000000;
+
+  /* Connect PFx pins to FMC Alternate function */
+  GPIOF->AFR[0]  = 0x00CCCCCC;
+  GPIOF->AFR[1]  = 0xCCCC0000;
+  /* Configure PFx pins in Alternate function mode */   
+  GPIOF->MODER   = 0xAA000AAA;
+  /* Configure PFx pins speed to 100 MHz */ 
+  GPIOF->OSPEEDR = 0xFF000FFF;
+  /* Configure PFx pins Output type to push-pull */  
+  GPIOF->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PFx pins */ 
+  GPIOF->PUPDR   = 0x00000000;
+
+  /* Connect PGx pins to FMC Alternate function */
+  GPIOG->AFR[0]  = 0x00CCCCCC;
+  GPIOG->AFR[1]  = 0x000000C0;
+  /* Configure PGx pins in Alternate function mode */ 
+  GPIOG->MODER   = 0x00085AAA;
+  /* Configure PGx pins speed to 100 MHz */ 
+  GPIOG->OSPEEDR = 0x000CAFFF;
+  /* Configure PGx pins Output type to push-pull */  
+  GPIOG->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PGx pins */ 
+  GPIOG->PUPDR   = 0x00000000;
+  
+/*-- FMC/FSMC Configuration --------------------------------------------------*/
+  /* Enable the FMC/FSMC interface clock */
+  RCC->AHB3ENR         |= 0x00000001;
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+  /* Configure and enable Bank1_SRAM2 */
+  FMC_Bank1->BTCR[2]  = 0x00001011;
+  FMC_Bank1->BTCR[3]  = 0x00000201;
+  FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ 
+#if defined(STM32F469xx) || defined(STM32F479xx)
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+  /* Configure and enable Bank1_SRAM2 */
+  FMC_Bank1->BTCR[2]  = 0x00001091;
+  FMC_Bank1->BTCR[3]  = 0x00110212;
+  FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F469xx || STM32F479xx */
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
+   || defined(STM32F412Zx) || defined(STM32F412Vx)
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
+  /* Configure and enable Bank1_SRAM2 */
+  FSMC_Bank1->BTCR[2]  = 0x00001011;
+  FSMC_Bank1->BTCR[3]  = 0x00000201;
+  FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
+#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */
+
+#endif /* DATA_IN_ExtSRAM */
+#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
+          STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx  */ 
+  (void)(tmp); 
+}
+#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Core/Startup/startup_stm32f413zhtx.s

@@ -0,0 +1,568 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32f413xx.s
+  * @author    MCD Application Team
+  * @brief     STM32F413xx Devices vector table for GCC based toolchains. 
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+    
+  .syntax unified
+  .cpu cortex-m4
+  .fpu softvfp
+  .thumb
+
+.global  g_pfnVectors
+.global  Default_Handler
+
+/* start address for the initialization values of the .data section. 
+defined in linker script */
+.word  _sidata
+/* start address for the .data section. defined in linker script */
+.word  _sdata
+/* end address for the .data section. defined in linker script */
+.word  _edata
+/* start address for the .bss section. defined in linker script */
+.word  _sbss
+/* end address for the .bss section. defined in linker script */
+.word  _ebss
+/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
+
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called. 
+ * @param  None
+ * @retval : None
+*/
+
+    .section  .text.Reset_Handler
+  .weak  Reset_Handler
+  .type  Reset_Handler, %function
+Reset_Handler:  
+  ldr   sp, =_estack       /* set stack pointer */
+
+/* Call the clock system initialization function.*/
+  bl  SystemInit  
+
+/* Copy the data segment initializers from flash to SRAM */
+  ldr r0, =_sdata
+  ldr r1, =_edata
+  ldr r2, =_sidata
+  movs r3, #0
+  b LoopCopyDataInit
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc CopyDataInit
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+  ldr r4, =_ebss
+  movs r3, #0
+  b LoopFillZerobss
+
+FillZerobss:
+  str  r3, [r2]
+  adds r2, r2, #4
+
+LoopFillZerobss:
+  cmp r2, r4
+  bcc FillZerobss
+ 
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+  bl  main
+  bx  lr    
+.size  Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an 
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ * @param  None     
+ * @retval None       
+*/
+    .section  .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+  b  Infinite_Loop
+  .size  Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex M3. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+* 
+*******************************************************************************/
+   .section  .isr_vector,"a",%progbits
+  .type  g_pfnVectors, %object
+    
+g_pfnVectors:
+  .word  _estack
+  .word  Reset_Handler
+  .word  NMI_Handler
+  .word  HardFault_Handler
+  .word  MemManage_Handler
+  .word  BusFault_Handler
+  .word  UsageFault_Handler
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  SVC_Handler
+  .word  DebugMon_Handler
+  .word  0
+  .word  PendSV_Handler
+  .word  SysTick_Handler
+
+  /* External Interrupts */
+  .word     WWDG_IRQHandler                   /* Window WatchDog                             */
+  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection             */
+  .word     TAMP_STAMP_IRQHandler             /* Tamper and TimeStamps through the EXTI line */
+  .word     RTC_WKUP_IRQHandler               /* RTC Wakeup through the EXTI line            */
+  .word     FLASH_IRQHandler                  /* FLASH                                       */
+  .word     RCC_IRQHandler                    /* RCC                                         */
+  .word     EXTI0_IRQHandler                  /* EXTI Line0                                  */
+  .word     EXTI1_IRQHandler                  /* EXTI Line1                                  */
+  .word     EXTI2_IRQHandler                  /* EXTI Line2                                  */
+  .word     EXTI3_IRQHandler                  /* EXTI Line3                                  */
+  .word     EXTI4_IRQHandler                  /* EXTI Line4                                  */
+  .word     DMA1_Stream0_IRQHandler           /* DMA1 Stream 0                               */
+  .word     DMA1_Stream1_IRQHandler           /* DMA1 Stream 1                               */
+  .word     DMA1_Stream2_IRQHandler           /* DMA1 Stream 2                               */
+  .word     DMA1_Stream3_IRQHandler           /* DMA1 Stream 3                               */
+  .word     DMA1_Stream4_IRQHandler           /* DMA1 Stream 4                               */
+  .word     DMA1_Stream5_IRQHandler           /* DMA1 Stream 5                               */
+  .word     DMA1_Stream6_IRQHandler           /* DMA1 Stream 6                               */
+  .word     ADC_IRQHandler                    /* ADC1, ADC2 and ADC3s                        */
+  .word     CAN1_TX_IRQHandler                /* CAN1 TX                                     */
+  .word     CAN1_RX0_IRQHandler               /* CAN1 RX0                                    */
+  .word     CAN1_RX1_IRQHandler               /* CAN1 RX1                                    */
+  .word     CAN1_SCE_IRQHandler               /* CAN1 SCE                                    */
+  .word     EXTI9_5_IRQHandler                /* External Line[9:5]s                         */
+  .word     TIM1_BRK_TIM9_IRQHandler          /* TIM1 Break and TIM9                         */
+  .word     TIM1_UP_TIM10_IRQHandler          /* TIM1 Update and TIM10                       */
+  .word     TIM1_TRG_COM_TIM11_IRQHandler     /* TIM1 Trigger and Commutation and TIM11      */
+  .word     TIM1_CC_IRQHandler                /* TIM1 Capture Compare                        */
+  .word     TIM2_IRQHandler                   /* TIM2                                        */
+  .word     TIM3_IRQHandler                   /* TIM3                                        */
+  .word     TIM4_IRQHandler                   /* TIM4                                        */
+  .word     I2C1_EV_IRQHandler                /* I2C1 Event                                  */
+  .word     I2C1_ER_IRQHandler                /* I2C1 Error                                  */
+  .word     I2C2_EV_IRQHandler                /* I2C2 Event                                  */
+  .word     I2C2_ER_IRQHandler                /* I2C2 Error                                  */
+  .word     SPI1_IRQHandler                   /* SPI1                                        */
+  .word     SPI2_IRQHandler                   /* SPI2                                        */
+  .word     USART1_IRQHandler                 /* USART1                                      */
+  .word     USART2_IRQHandler                 /* USART2                                      */
+  .word     USART3_IRQHandler                 /* USART3                                      */
+  .word     EXTI15_10_IRQHandler              /* External Line[15:10]s                       */
+  .word     RTC_Alarm_IRQHandler              /* RTC Alarm (A and B) through EXTI Line       */
+  .word     OTG_FS_WKUP_IRQHandler            /* USB OTG FS Wakeup through EXTI line         */
+  .word     TIM8_BRK_TIM12_IRQHandler         /* TIM8 Break and TIM12                        */
+  .word     TIM8_UP_TIM13_IRQHandler          /* TIM8 Update and TIM13                       */
+  .word     TIM8_TRG_COM_TIM14_IRQHandler     /* TIM8 Trigger and Commutation and TIM14      */
+  .word     TIM8_CC_IRQHandler                /* TIM8 Capture Compare                        */
+  .word     DMA1_Stream7_IRQHandler           /* DMA1 Stream7                                */
+  .word     FSMC_IRQHandler                   /* FSMC                                        */
+  .word     SDIO_IRQHandler                   /* SDIO                                        */
+  .word     TIM5_IRQHandler                   /* TIM5                                        */
+  .word     SPI3_IRQHandler                   /* SPI3                                        */
+  .word     UART4_IRQHandler                  /* UART4                                       */
+  .word     UART5_IRQHandler                  /* UART5                                       */
+  .word     TIM6_DAC_IRQHandler               /* TIM6, DAC1 and DAC2                         */
+  .word     TIM7_IRQHandler                   /* TIM7                                        */
+  .word     DMA2_Stream0_IRQHandler           /* DMA2 Stream 0                               */
+  .word     DMA2_Stream1_IRQHandler           /* DMA2 Stream 1                               */
+  .word     DMA2_Stream2_IRQHandler           /* DMA2 Stream 2                               */
+  .word     DMA2_Stream3_IRQHandler           /* DMA2 Stream 3                               */
+  .word     DMA2_Stream4_IRQHandler           /* DMA2 Stream 4                               */
+  .word     DFSDM1_FLT0_IRQHandler            /* DFSDM1 Filter0                              */
+  .word     DFSDM1_FLT1_IRQHandler            /* DFSDM1 Filter1                              */
+  .word     CAN2_TX_IRQHandler                /* CAN2 TX                                     */
+  .word     CAN2_RX0_IRQHandler               /* CAN2 RX0                                    */
+  .word     CAN2_RX1_IRQHandler               /* CAN2 RX1                                    */
+  .word     CAN2_SCE_IRQHandler               /* CAN2 SCE                                    */
+  .word     OTG_FS_IRQHandler                 /* USB OTG FS                                  */
+  .word     DMA2_Stream5_IRQHandler           /* DMA2 Stream 5                               */
+  .word     DMA2_Stream6_IRQHandler           /* DMA2 Stream 6                               */
+  .word     DMA2_Stream7_IRQHandler           /* DMA2 Stream 7                               */
+  .word     USART6_IRQHandler                 /* USART6                                      */
+  .word     I2C3_EV_IRQHandler                /* I2C3 event                                  */
+  .word     I2C3_ER_IRQHandler                /* I2C3 error                                  */
+  .word     CAN3_TX_IRQHandler                /* CAN3 TX                                     */
+  .word     CAN3_RX0_IRQHandler               /* CAN3 RX0                                    */
+  .word     CAN3_RX1_IRQHandler               /* CAN3 RX1                                    */
+  .word     CAN3_SCE_IRQHandler               /* CAN3 SCE                                    */
+  .word     0                                 /* Reserved                                    */
+  .word     0                                 /* Reserved                                    */
+  .word     RNG_IRQHandler                    /* RNG                                         */
+  .word     FPU_IRQHandler                    /* FPU                                         */
+  .word     UART7_IRQHandler                  /* UART7                                       */
+  .word     UART8_IRQHandler                  /* UART8                                       */
+  .word     SPI4_IRQHandler                   /* SPI4                                        */
+  .word     SPI5_IRQHandler                   /* SPI5                                        */
+  .word     0                                 /* Reserved                                    */
+  .word     SAI1_IRQHandler                   /* SAI1                                        */
+  .word     UART9_IRQHandler                  /* UART9                                       */
+  .word     UART10_IRQHandler                 /* UART10                                      */
+  .word     0                                 /* Reserved                                    */
+  .word     0                                 /* Reserved                                    */
+  .word     QUADSPI_IRQHandler                /* QuadSPI                                     */
+  .word     0                                 /* Reserved                                    */
+  .word     0                                 /* Reserved                                    */
+  .word     FMPI2C1_EV_IRQHandler             /* FMPI2C1 Event                               */
+  .word     FMPI2C1_ER_IRQHandler             /* FMPI2C1 Error                               */
+  .word     LPTIM1_IRQHandler                 /* LPTIM1                                      */
+  .word     DFSDM2_FLT0_IRQHandler            /* DFSDM2 Filter0                              */
+  .word     DFSDM2_FLT1_IRQHandler            /* DFSDM2 Filter1                              */
+  .word     DFSDM2_FLT2_IRQHandler            /* DFSDM2 Filter2                              */
+  .word     DFSDM2_FLT3_IRQHandler            /* DFSDM2 Filter3                              */
+  
+
+  .size  g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler. 
+* As they are weak aliases, any function with the same name will override 
+* this definition.
+*
+*******************************************************************************/
+   .weak      NMI_Handler
+   .thumb_set NMI_Handler,Default_Handler
+
+   .weak      HardFault_Handler
+   .thumb_set HardFault_Handler,Default_Handler
+
+   .weak      MemManage_Handler
+   .thumb_set MemManage_Handler,Default_Handler
+  
+   .weak      BusFault_Handler
+   .thumb_set BusFault_Handler,Default_Handler
+
+   .weak      UsageFault_Handler
+   .thumb_set UsageFault_Handler,Default_Handler
+
+   .weak      SVC_Handler
+   .thumb_set SVC_Handler,Default_Handler
+
+   .weak      DebugMon_Handler
+   .thumb_set DebugMon_Handler,Default_Handler
+
+   .weak      PendSV_Handler
+   .thumb_set PendSV_Handler,Default_Handler
+
+   .weak      SysTick_Handler
+   .thumb_set SysTick_Handler,Default_Handler
+
+   .weak      WWDG_IRQHandler
+   .thumb_set WWDG_IRQHandler,Default_Handler
+
+   .weak      PVD_IRQHandler
+   .thumb_set PVD_IRQHandler,Default_Handler
+
+   .weak      TAMP_STAMP_IRQHandler
+   .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
+
+   .weak      RTC_WKUP_IRQHandler
+   .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+   .weak      FLASH_IRQHandler
+   .thumb_set FLASH_IRQHandler,Default_Handler
+
+   .weak      RCC_IRQHandler
+   .thumb_set RCC_IRQHandler,Default_Handler
+
+   .weak      EXTI0_IRQHandler
+   .thumb_set EXTI0_IRQHandler,Default_Handler
+
+   .weak      EXTI1_IRQHandler
+   .thumb_set EXTI1_IRQHandler,Default_Handler
+
+   .weak      EXTI2_IRQHandler
+   .thumb_set EXTI2_IRQHandler,Default_Handler 
+
+   .weak      EXTI3_IRQHandler
+   .thumb_set EXTI3_IRQHandler,Default_Handler
+
+   .weak      EXTI4_IRQHandler
+   .thumb_set EXTI4_IRQHandler,Default_Handler
+
+   .weak      DMA1_Stream0_IRQHandler
+   .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
+
+   .weak      DMA1_Stream1_IRQHandler
+   .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
+
+   .weak      DMA1_Stream2_IRQHandler
+   .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
+
+   .weak      DMA1_Stream3_IRQHandler
+   .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
+
+   .weak      DMA1_Stream4_IRQHandler
+   .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
+
+   .weak      DMA1_Stream5_IRQHandler
+   .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
+
+   .weak      DMA1_Stream6_IRQHandler
+   .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
+
+   .weak      ADC_IRQHandler
+   .thumb_set ADC_IRQHandler,Default_Handler
+
+   .weak      CAN1_TX_IRQHandler
+   .thumb_set CAN1_TX_IRQHandler,Default_Handler
+
+   .weak      CAN1_RX0_IRQHandler
+   .thumb_set CAN1_RX0_IRQHandler,Default_Handler
+
+   .weak      CAN1_RX1_IRQHandler
+   .thumb_set CAN1_RX1_IRQHandler,Default_Handler
+
+   .weak      CAN1_SCE_IRQHandler
+   .thumb_set CAN1_SCE_IRQHandler,Default_Handler
+
+   .weak      EXTI9_5_IRQHandler
+   .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+   .weak      TIM1_BRK_TIM9_IRQHandler
+   .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
+
+   .weak      TIM1_UP_TIM10_IRQHandler
+   .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
+
+   .weak      TIM1_TRG_COM_TIM11_IRQHandler
+   .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
+
+   .weak      TIM1_CC_IRQHandler
+   .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+   .weak      TIM2_IRQHandler
+   .thumb_set TIM2_IRQHandler,Default_Handler
+
+   .weak      TIM3_IRQHandler
+   .thumb_set TIM3_IRQHandler,Default_Handler
+
+   .weak      TIM4_IRQHandler
+   .thumb_set TIM4_IRQHandler,Default_Handler
+
+   .weak      I2C1_EV_IRQHandler
+   .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+   .weak      I2C1_ER_IRQHandler
+   .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+   .weak      I2C2_EV_IRQHandler
+   .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+   .weak      I2C2_ER_IRQHandler
+   .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+   .weak      SPI1_IRQHandler
+   .thumb_set SPI1_IRQHandler,Default_Handler
+
+   .weak      SPI2_IRQHandler
+   .thumb_set SPI2_IRQHandler,Default_Handler
+
+   .weak      USART1_IRQHandler
+   .thumb_set USART1_IRQHandler,Default_Handler
+
+   .weak      USART2_IRQHandler
+   .thumb_set USART2_IRQHandler,Default_Handler
+
+   .weak      USART3_IRQHandler
+   .thumb_set USART3_IRQHandler,Default_Handler
+
+   .weak      EXTI15_10_IRQHandler
+   .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+   .weak      RTC_Alarm_IRQHandler
+   .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+   .weak      OTG_FS_WKUP_IRQHandler
+   .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
+
+   .weak      TIM8_BRK_TIM12_IRQHandler
+   .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
+
+   .weak      TIM8_UP_TIM13_IRQHandler
+   .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
+
+   .weak      TIM8_TRG_COM_TIM14_IRQHandler
+   .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
+
+   .weak      TIM8_CC_IRQHandler
+   .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+   .weak      DMA1_Stream7_IRQHandler
+   .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
+   
+   .weak      FSMC_IRQHandler
+   .thumb_set FSMC_IRQHandler,Default_Handler   
+
+   .weak      SDIO_IRQHandler
+   .thumb_set SDIO_IRQHandler,Default_Handler
+
+   .weak      TIM5_IRQHandler
+   .thumb_set TIM5_IRQHandler,Default_Handler
+
+   .weak      SPI3_IRQHandler
+   .thumb_set SPI3_IRQHandler,Default_Handler
+   
+   .weak      UART4_IRQHandler
+   .thumb_set UART4_IRQHandler,Default_Handler
+
+   .weak      UART5_IRQHandler
+   .thumb_set UART5_IRQHandler,Default_Handler   
+
+   .weak      TIM6_DAC_IRQHandler
+   .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+   .weak      TIM7_IRQHandler
+   .thumb_set TIM7_IRQHandler,Default_Handler
+
+   .weak      DMA2_Stream0_IRQHandler
+   .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
+
+   .weak      DMA2_Stream1_IRQHandler
+   .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
+
+   .weak      DMA2_Stream2_IRQHandler
+   .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
+
+   .weak      DMA2_Stream3_IRQHandler
+   .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
+
+   .weak      DMA2_Stream4_IRQHandler
+   .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
+
+   .weak      DFSDM1_FLT0_IRQHandler
+   .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
+
+   .weak      DFSDM1_FLT1_IRQHandler
+   .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
+
+   .weak      CAN2_TX_IRQHandler
+   .thumb_set CAN2_TX_IRQHandler,Default_Handler
+
+   .weak      CAN2_RX0_IRQHandler
+   .thumb_set CAN2_RX0_IRQHandler,Default_Handler
+
+   .weak      CAN2_RX1_IRQHandler
+   .thumb_set CAN2_RX1_IRQHandler,Default_Handler
+
+   .weak      CAN2_SCE_IRQHandler
+   .thumb_set CAN2_SCE_IRQHandler,Default_Handler
+
+   .weak      OTG_FS_IRQHandler
+   .thumb_set OTG_FS_IRQHandler,Default_Handler
+
+   .weak      DMA2_Stream5_IRQHandler
+   .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
+
+   .weak      DMA2_Stream6_IRQHandler
+   .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
+
+   .weak      DMA2_Stream7_IRQHandler
+   .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
+
+   .weak      USART6_IRQHandler
+   .thumb_set USART6_IRQHandler,Default_Handler
+
+   .weak      I2C3_EV_IRQHandler
+   .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+   .weak      I2C3_ER_IRQHandler
+   .thumb_set I2C3_ER_IRQHandler,Default_Handler
+   
+   .weak      CAN3_TX_IRQHandler
+   .thumb_set CAN3_TX_IRQHandler,Default_Handler
+
+   .weak      CAN3_RX0_IRQHandler
+   .thumb_set CAN3_RX0_IRQHandler,Default_Handler
+
+   .weak      CAN3_RX1_IRQHandler
+   .thumb_set CAN3_RX1_IRQHandler,Default_Handler
+
+   .weak      CAN3_SCE_IRQHandler
+   .thumb_set CAN3_SCE_IRQHandler,Default_Handler   
+
+   .weak      RNG_IRQHandler
+   .thumb_set RNG_IRQHandler,Default_Handler
+
+   .weak      FPU_IRQHandler
+   .thumb_set FPU_IRQHandler,Default_Handler
+   
+   .weak      UART7_IRQHandler
+   .thumb_set UART7_IRQHandler,Default_Handler
+
+   .weak      UART8_IRQHandler
+   .thumb_set UART8_IRQHandler,Default_Handler   
+
+   .weak      SPI4_IRQHandler
+   .thumb_set SPI4_IRQHandler,Default_Handler
+
+   .weak      SPI5_IRQHandler
+   .thumb_set SPI5_IRQHandler,Default_Handler
+   
+   .weak      SAI1_IRQHandler
+   .thumb_set SAI1_IRQHandler,Default_Handler
+
+   .weak      UART9_IRQHandler
+   .thumb_set UART9_IRQHandler,Default_Handler
+
+   .weak      UART10_IRQHandler
+   .thumb_set UART10_IRQHandler,Default_Handler   
+
+   .weak      QUADSPI_IRQHandler
+   .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+    .weak     FMPI2C1_EV_IRQHandler
+   .thumb_set FMPI2C1_EV_IRQHandler,Default_Handler
+
+   .weak      FMPI2C1_ER_IRQHandler
+   .thumb_set FMPI2C1_ER_IRQHandler,Default_Handler
+   
+   .weak      LPTIM1_IRQHandler
+   .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+   .weak      DFSDM2_FLT0_IRQHandler
+   .thumb_set DFSDM2_FLT0_IRQHandler,Default_Handler
+
+   .weak      DFSDM2_FLT1_IRQHandler
+   .thumb_set DFSDM2_FLT1_IRQHandler,Default_Handler
+
+   .weak      DFSDM2_FLT2_IRQHandler
+   .thumb_set DFSDM2_FLT2_IRQHandler,Default_Handler
+
+   .weak      DFSDM2_FLT3_IRQHandler
+   .thumb_set DFSDM2_FLT3_IRQHandler,Default_Handler

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/APP_SW_VER_STR

@@ -0,0 +1 @@
+00_00_00_0811

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/App_Flash.cyclo

@@ -0,0 +1,17 @@
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:91:9:App_Flash_Init	4
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:116:9:App_Flash_HW_Test	5
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:149:9:App_Flash_Read	3
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:195:9:App_Flash_Write	8
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:274:9:App_Flash_Erase_Block	4
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:318:9:App_Flash_Erase_Chip	4
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:360:9:App_Flash_GetStatus	6
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:418:9:App_Flash_GetInfo	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:433:23:QSPI_SendCmd	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:441:23:QSPI_TxData	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:449:23:QSPI_RxData	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:457:23:QSPI_AutoPolling	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:467:16:QSPI_EnableQSPIMode	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:479:16:QSPI_ResetMemory	4
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:524:16:QSPI_DummyCyclesCfg	7
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:583:16:QSPI_WriteEnable	3
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:632:16:QSPI_AutoPollingMemReady	2

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/App_Flash.d

@@ -0,0 +1,126 @@
+Core/Src/App/App_Flash.o: \
+ D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c \
+ D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.h \
+ ../../../../FES_Common_Library/system.h \
+ ../../../../FES_Common_Library/fes_common_lib_version.h \
+ ../../../src/conf/system_conf.h ../../../src/conf/board_conf.h \
+ ../Core/Inc/main.h ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f413xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_qspi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dfsdm.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_mmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_sdmmc.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../../../src/conf/App_Flash_conf.h ../../../src/drivers/flash/n25q128a.h \
+ ../../../../FES_Common_Library/Log/Log.h ../../../src/conf/Log_conf.h
+D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.h:
+../../../../FES_Common_Library/system.h:
+../../../../FES_Common_Library/fes_common_lib_version.h:
+../../../src/conf/system_conf.h:
+../../../src/conf/board_conf.h:
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f413xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_qspi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dfsdm.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_mmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_sdmmc.h:
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../../../src/conf/App_Flash_conf.h:
+../../../src/drivers/flash/n25q128a.h:
+../../../../FES_Common_Library/Log/Log.h:
+../../../src/conf/Log_conf.h:

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/App_Flash.su

@@ -0,0 +1,17 @@
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:91:9:App_Flash_Init	8	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:116:9:App_Flash_HW_Test	96	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:149:9:App_Flash_Read	24	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:195:9:App_Flash_Write	40	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:274:9:App_Flash_Erase_Block	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:318:9:App_Flash_Erase_Chip	8	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:360:9:App_Flash_GetStatus	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:418:9:App_Flash_GetInfo	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:433:23:QSPI_SendCmd	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:441:23:QSPI_TxData	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:449:23:QSPI_RxData	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:457:23:QSPI_AutoPolling	24	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:467:16:QSPI_EnableQSPIMode	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:479:16:QSPI_ResetMemory	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:524:16:QSPI_DummyCyclesCfg	32	static,ignoring_inline_asm
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:583:16:QSPI_WriteEnable	96	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Flash.c:632:16:QSPI_AutoPollingMemReady	96	static

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/App_Main.cyclo

@@ -0,0 +1,14 @@
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:109:6:App_Init	6
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:175:6:App_OSTask	3
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:215:6:App_Task	7
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:259:6:App_HealthLed_StartUpSequence	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:280:6:App_HealthLed	2
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:296:6:get_audio_file_name	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:307:8:getUnixTimeStamp	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:334:6:App_SetRTC	5
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:378:6:App_KeyCallbckFnc	3
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:398:6:App_AudioRecCallbackFnc	3
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:413:6:App_Handle_FreeRTOS_ASSERT	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:427:6:HAL_UART_TxCpltCallback	2
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:447:6:HAL_UART_RxCpltCallback	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:459:6:App_Timer_PeriodElapsedCallback	2

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/App_Main.d

@@ -0,0 +1,157 @@
+Core/Src/App/App_Main.o: \
+ D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c \
+ D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.h \
+ ../../../../FES_Common_Library/system.h \
+ ../../../../FES_Common_Library/fes_common_lib_version.h \
+ ../../../src/conf/system_conf.h ../../../src/conf/board_conf.h \
+ ../Core/Inc/main.h ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f413xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_qspi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dfsdm.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_mmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_sdmmc.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../../../src/conf/App_Flash_conf.h ../../../src/drivers/flash/n25q128a.h \
+ ../../../src/sw_version.h ../../../../FES_Common_Library/Log/Log.h \
+ ../../../src/conf/Log_conf.h \
+ ../../../../FES_Common_Library/stm32_reset/stm32_reset.h \
+ ../../../../FES_Common_Library/KeyHdl/keyhdl_api.h \
+ ../../../src/conf/keyhdl_conf.h ../../../src/App_Flash.h \
+ ../../../src/audio_recorder/App_AudioRec.h ../../../src/App_Settings.h \
+ ../../../src/FATFS/App/fatfs.h ../Middlewares/Third_Party/FatFs/src/ff.h \
+ ../Middlewares/Third_Party/FatFs/src/integer.h ../FATFS/Target/ffconf.h \
+ ../Middlewares/Third_Party/FatFs/src/ff_gen_drv.h \
+ ../Middlewares/Third_Party/FatFs/src/diskio.h \
+ ../Middlewares/Third_Party/FatFs/src/ff.h \
+ ../../../src/FATFS/Target/flash_diskio.h ../USB_DEVICE/App/usb_device.h \
+ ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \
+ ../USB_DEVICE/Target/usbd_conf.h
+D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.h:
+../../../../FES_Common_Library/system.h:
+../../../../FES_Common_Library/fes_common_lib_version.h:
+../../../src/conf/system_conf.h:
+../../../src/conf/board_conf.h:
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f413xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_qspi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dfsdm.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_mmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_sdmmc.h:
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../../../src/conf/App_Flash_conf.h:
+../../../src/drivers/flash/n25q128a.h:
+../../../src/sw_version.h:
+../../../../FES_Common_Library/Log/Log.h:
+../../../src/conf/Log_conf.h:
+../../../../FES_Common_Library/stm32_reset/stm32_reset.h:
+../../../../FES_Common_Library/KeyHdl/keyhdl_api.h:
+../../../src/conf/keyhdl_conf.h:
+../../../src/App_Flash.h:
+../../../src/audio_recorder/App_AudioRec.h:
+../../../src/App_Settings.h:
+../../../src/FATFS/App/fatfs.h:
+../Middlewares/Third_Party/FatFs/src/ff.h:
+../Middlewares/Third_Party/FatFs/src/integer.h:
+../FATFS/Target/ffconf.h:
+../Middlewares/Third_Party/FatFs/src/ff_gen_drv.h:
+../Middlewares/Third_Party/FatFs/src/diskio.h:
+../Middlewares/Third_Party/FatFs/src/ff.h:
+../../../src/FATFS/Target/flash_diskio.h:
+../USB_DEVICE/App/usb_device.h:
+../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h:
+../USB_DEVICE/Target/usbd_conf.h:

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/App_Main.su

@@ -0,0 +1,14 @@
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:109:6:App_Init	64	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:175:6:App_OSTask	24	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:215:6:App_Task	120	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:259:6:App_HealthLed_StartUpSequence	8	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:280:6:App_HealthLed	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:296:6:get_audio_file_name	40	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:307:8:getUnixTimeStamp	72	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:334:6:App_SetRTC	176	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:378:6:App_KeyCallbckFnc	24	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:398:6:App_AudioRecCallbackFnc	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:413:6:App_Handle_FreeRTOS_ASSERT	8	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:427:6:HAL_UART_TxCpltCallback	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:447:6:HAL_UART_RxCpltCallback	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Main.c:459:6:App_Timer_PeriodElapsedCallback	16	static

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/App_Settings.cyclo

@@ -0,0 +1,2 @@
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Settings.c:95:6:App_SettingsReadJSON	10
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Settings.c:164:13:lwjson_parse_cb_func	28

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/App_Settings.d

@@ -0,0 +1,149 @@
+Core/Src/App/App_Settings.o: \
+ D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Settings.c \
+ ../../../src/App_Settings.h ../../../../FES_Common_Library/system.h \
+ ../../../../FES_Common_Library/fes_common_lib_version.h \
+ ../../../src/conf/system_conf.h ../../../src/conf/board_conf.h \
+ ../Core/Inc/main.h ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f413xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_qspi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dfsdm.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_mmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_sdmmc.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../../../../FES_Common_Library/Log/Log.h ../../../src/conf/Log_conf.h \
+ ../../../src/audio_recorder/App_Opus.h \
+ ../../../../Opus/opus-1.3.1/include/opus.h \
+ ../../../../Opus/opus-1.3.1/include/opus_types.h \
+ ../../../../Opus/opus-1.3.1/include/opus_defines.h \
+ ../../../src/FATFS/App/fatfs.h ../Middlewares/Third_Party/FatFs/src/ff.h \
+ ../Middlewares/Third_Party/FatFs/src/integer.h ../FATFS/Target/ffconf.h \
+ ../Middlewares/Third_Party/FatFs/src/ff_gen_drv.h \
+ ../Middlewares/Third_Party/FatFs/src/diskio.h \
+ ../Middlewares/Third_Party/FatFs/src/ff.h \
+ ../../../src/FATFS/Target/flash_diskio.h \
+ ../../../src/lwjson/include/lwjson.h \
+ ../../../src/lwjson/include/lwjson_opt.h ../../../src/conf/lwjson_opts.h
+../../../src/App_Settings.h:
+../../../../FES_Common_Library/system.h:
+../../../../FES_Common_Library/fes_common_lib_version.h:
+../../../src/conf/system_conf.h:
+../../../src/conf/board_conf.h:
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f413xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_qspi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dfsdm.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_mmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_sdmmc.h:
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../../../../FES_Common_Library/Log/Log.h:
+../../../src/conf/Log_conf.h:
+../../../src/audio_recorder/App_Opus.h:
+../../../../Opus/opus-1.3.1/include/opus.h:
+../../../../Opus/opus-1.3.1/include/opus_types.h:
+../../../../Opus/opus-1.3.1/include/opus_defines.h:
+../../../src/FATFS/App/fatfs.h:
+../Middlewares/Third_Party/FatFs/src/ff.h:
+../Middlewares/Third_Party/FatFs/src/integer.h:
+../FATFS/Target/ffconf.h:
+../Middlewares/Third_Party/FatFs/src/ff_gen_drv.h:
+../Middlewares/Third_Party/FatFs/src/diskio.h:
+../Middlewares/Third_Party/FatFs/src/ff.h:
+../../../src/FATFS/Target/flash_diskio.h:
+../../../src/lwjson/include/lwjson.h:
+../../../src/lwjson/include/lwjson_opt.h:
+../../../src/conf/lwjson_opts.h:

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/App_Settings.su

@@ -0,0 +1,2 @@
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Settings.c:95:6:App_SettingsReadJSON	32	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/App_Settings.c:164:13:lwjson_parse_cb_func	64	static

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/audio_recorder/App_AudioRec.cyclo

@@ -0,0 +1,11 @@
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:134:9:App_AudioRec_Init	4
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:171:22:App_AudioRec_GetState	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:179:9:App_AudioRec_Stop	3
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:203:9:App_AudioRec_Start	4
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:227:13:audio_os_thread	5
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:260:16:audio_rec_dma_buffer_to_q	6
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:290:15:opus_fopen_cb	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:298:16:opus_fwrite_cb	3
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:328:15:opus_fclose_cb	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:340:6:HAL_DFSDM_FilterRegConvCpltCallback	2
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:352:6:HAL_DFSDM_FilterRegConvHalfCpltCallback	2

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/audio_recorder/App_AudioRec.d

@@ -0,0 +1,151 @@
+Core/Src/App/audio_recorder/App_AudioRec.o: \
+ D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c \
+ D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.h \
+ ../../../../FES_Common_Library/system.h \
+ ../../../../FES_Common_Library/fes_common_lib_version.h \
+ ../../../src/conf/system_conf.h ../../../src/conf/board_conf.h \
+ ../Core/Inc/main.h ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f413xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_qspi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dfsdm.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_mmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_sdmmc.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../../../../FES_Common_Library/Log/Log.h ../../../src/conf/Log_conf.h \
+ ../../../src/audio_recorder/App_Opus.h \
+ ../../../../Opus/opus-1.3.1/include/opus.h \
+ ../../../../Opus/opus-1.3.1/include/opus_types.h \
+ ../../../../Opus/opus-1.3.1/include/opus_defines.h \
+ ../../../src/audio_recorder/opus_util/OggPage.h \
+ ../../../src/audio_recorder/opus_util/OpusHeader.h \
+ ../../../src/audio_recorder/opus_util/OggPage.h \
+ ../../../src/FATFS/App/fatfs.h ../Middlewares/Third_Party/FatFs/src/ff.h \
+ ../Middlewares/Third_Party/FatFs/src/integer.h ../FATFS/Target/ffconf.h \
+ ../Middlewares/Third_Party/FatFs/src/ff_gen_drv.h \
+ ../Middlewares/Third_Party/FatFs/src/diskio.h \
+ ../Middlewares/Third_Party/FatFs/src/ff.h \
+ ../../../src/FATFS/Target/flash_diskio.h
+D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.h:
+../../../../FES_Common_Library/system.h:
+../../../../FES_Common_Library/fes_common_lib_version.h:
+../../../src/conf/system_conf.h:
+../../../src/conf/board_conf.h:
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f413xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_qspi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dfsdm.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_mmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_sdmmc.h:
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../../../../FES_Common_Library/Log/Log.h:
+../../../src/conf/Log_conf.h:
+../../../src/audio_recorder/App_Opus.h:
+../../../../Opus/opus-1.3.1/include/opus.h:
+../../../../Opus/opus-1.3.1/include/opus_types.h:
+../../../../Opus/opus-1.3.1/include/opus_defines.h:
+../../../src/audio_recorder/opus_util/OggPage.h:
+../../../src/audio_recorder/opus_util/OpusHeader.h:
+../../../src/audio_recorder/opus_util/OggPage.h:
+../../../src/FATFS/App/fatfs.h:
+../Middlewares/Third_Party/FatFs/src/ff.h:
+../Middlewares/Third_Party/FatFs/src/integer.h:
+../FATFS/Target/ffconf.h:
+../Middlewares/Third_Party/FatFs/src/ff_gen_drv.h:
+../Middlewares/Third_Party/FatFs/src/diskio.h:
+../Middlewares/Third_Party/FatFs/src/ff.h:
+../../../src/FATFS/Target/flash_diskio.h:

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/audio_recorder/App_AudioRec.su

@@ -0,0 +1,11 @@
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:134:9:App_AudioRec_Init	56	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:171:22:App_AudioRec_GetState	4	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:179:9:App_AudioRec_Stop	8	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:203:9:App_AudioRec_Start	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:227:13:audio_os_thread	40	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:260:16:audio_rec_dma_buffer_to_q	32	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:290:15:opus_fopen_cb	4	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:298:16:opus_fwrite_cb	24	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:328:15:opus_fclose_cb	4	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:340:6:HAL_DFSDM_FilterRegConvCpltCallback	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_AudioRec.c:352:6:HAL_DFSDM_FilterRegConvHalfCpltCallback	16	static

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/audio_recorder/App_Opus.cyclo

@@ -0,0 +1,10 @@
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:128:9:AppOpus_Init	10
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:198:9:AppOpus_SetBitrate	6
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:237:9:AppOpus_SetComplexity	4
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:267:9:AppOpus_SetGain	3
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:288:9:AppOpus_Deinit	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:301:9:AppOpus_StartEncoder	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:319:9:AppOpus_StopEncoder	2
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:341:9:AppOpus_EncoderWriteBuffer	4
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:379:6:opus_err	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:390:10:App_Opus_Encoder_getMemorySize	2

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/audio_recorder/App_Opus.d

@@ -0,0 +1,145 @@
+Core/Src/App/audio_recorder/App_Opus.o: \
+ D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c \
+ D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.h \
+ ../../../../Opus/opus-1.3.1/include/opus.h \
+ ../../../../Opus/opus-1.3.1/include/opus_types.h \
+ ../../../../Opus/opus-1.3.1/include/opus_defines.h \
+ ../../../src/audio_recorder/opus_util/OggPage.h \
+ ../../../src/audio_recorder/opus_util/OpusHeader.h \
+ ../../../src/audio_recorder/opus_util/OggPage.h \
+ ../../../../FES_Common_Library/Log/Log.h \
+ ../../../../FES_Common_Library/system.h \
+ ../../../../FES_Common_Library/fes_common_lib_version.h \
+ ../../../src/conf/system_conf.h ../../../src/conf/board_conf.h \
+ ../Core/Inc/main.h ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f413xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_qspi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dfsdm.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_mmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_sdmmc.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../../../src/conf/Log_conf.h \
+ ../Middlewares/Third_Party/FatFs/src/ff_gen_drv.h \
+ ../Middlewares/Third_Party/FatFs/src/diskio.h \
+ ../Middlewares/Third_Party/FatFs/src/integer.h \
+ ../Middlewares/Third_Party/FatFs/src/ff.h ../FATFS/Target/ffconf.h
+D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.h:
+../../../../Opus/opus-1.3.1/include/opus.h:
+../../../../Opus/opus-1.3.1/include/opus_types.h:
+../../../../Opus/opus-1.3.1/include/opus_defines.h:
+../../../src/audio_recorder/opus_util/OggPage.h:
+../../../src/audio_recorder/opus_util/OpusHeader.h:
+../../../src/audio_recorder/opus_util/OggPage.h:
+../../../../FES_Common_Library/Log/Log.h:
+../../../../FES_Common_Library/system.h:
+../../../../FES_Common_Library/fes_common_lib_version.h:
+../../../src/conf/system_conf.h:
+../../../src/conf/board_conf.h:
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f413xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_qspi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dfsdm.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_mmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_sdmmc.h:
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../../../src/conf/Log_conf.h:
+../Middlewares/Third_Party/FatFs/src/ff_gen_drv.h:
+../Middlewares/Third_Party/FatFs/src/diskio.h:
+../Middlewares/Third_Party/FatFs/src/integer.h:
+../Middlewares/Third_Party/FatFs/src/ff.h:
+../FATFS/Target/ffconf.h:

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/audio_recorder/App_Opus.su

@@ -0,0 +1,10 @@
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:128:9:AppOpus_Init	24	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:198:9:AppOpus_SetBitrate	24	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:237:9:AppOpus_SetComplexity	24	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:267:9:AppOpus_SetGain	24	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:288:9:AppOpus_Deinit	8	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:301:9:AppOpus_StartEncoder	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:319:9:AppOpus_StopEncoder	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:341:9:AppOpus_EncoderWriteBuffer	40	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:379:6:opus_err	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/App_Opus.c:390:10:App_Opus_Encoder_getMemorySize	24	static

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/audio_recorder/opus_util/OggPage.cyclo

@@ -0,0 +1,6 @@
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.c:82:6:OggPage_PrintStatistics	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.c:90:6:OggPage_InitParams	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.c:101:6:OggPage_SetFileCallbacks	2
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.c:112:9:OggPage_WriteToFile	6
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.c:153:13:ogg_conv_page_hdr_to_buf	2
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.c:232:13:ogg_page_checksum_set	7

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/audio_recorder/opus_util/OggPage.d

@@ -0,0 +1,126 @@
+Core/Src/App/audio_recorder/opus_util/OggPage.o: \
+ D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.c \
+ D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.h \
+ D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/opus_utils.h \
+ ../../../../FES_Common_Library/Log/Log.h \
+ ../../../../FES_Common_Library/system.h \
+ ../../../../FES_Common_Library/fes_common_lib_version.h \
+ ../../../src/conf/system_conf.h ../../../src/conf/board_conf.h \
+ ../Core/Inc/main.h ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f413xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_qspi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dfsdm.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_mmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_sdmmc.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../../../src/conf/Log_conf.h
+D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.h:
+D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/opus_utils.h:
+../../../../FES_Common_Library/Log/Log.h:
+../../../../FES_Common_Library/system.h:
+../../../../FES_Common_Library/fes_common_lib_version.h:
+../../../src/conf/system_conf.h:
+../../../src/conf/board_conf.h:
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f413xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_qspi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dfsdm.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_mmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_sdmmc.h:
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../../../src/conf/Log_conf.h:

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/audio_recorder/opus_util/OggPage.su

@@ -0,0 +1,6 @@
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.c:82:6:OggPage_PrintStatistics	8	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.c:90:6:OggPage_InitParams	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.c:101:6:OggPage_SetFileCallbacks	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.c:112:9:OggPage_WriteToFile	32	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.c:153:13:ogg_conv_page_hdr_to_buf	24	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.c:232:13:ogg_page_checksum_set	32	static

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/audio_recorder/opus_util/OpusHeader.cyclo

@@ -0,0 +1,6 @@
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.c:92:6:OpusHeader_PrintStatistics	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.c:100:6:OpusHeader_InitParams	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.c:112:6:OpusTag_InitParams	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.c:121:9:OpusHeader_WriteToFile	1
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.c:165:13:opus_conv_hdr_to_buf	2
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.c:185:13:opus_conv_tag_to_buf	3

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/audio_recorder/opus_util/OpusHeader.d

@@ -0,0 +1,134 @@
+Core/Src/App/audio_recorder/opus_util/OpusHeader.o: \
+ D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.c \
+ D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.h \
+ D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.h \
+ D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/opus_utils.h \
+ ../../../../Opus/opus-1.3.1/include/opus.h \
+ ../../../../Opus/opus-1.3.1/include/opus_types.h \
+ ../../../../Opus/opus-1.3.1/include/opus_defines.h \
+ ../../../../FES_Common_Library/Log/Log.h \
+ ../../../../FES_Common_Library/system.h \
+ ../../../../FES_Common_Library/fes_common_lib_version.h \
+ ../../../src/conf/system_conf.h ../../../src/conf/board_conf.h \
+ ../Core/Inc/main.h ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f413xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_qspi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dfsdm.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_mmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_sdmmc.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../../../src/conf/Log_conf.h
+D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.h:
+D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.h:
+D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/opus_utils.h:
+../../../../Opus/opus-1.3.1/include/opus.h:
+../../../../Opus/opus-1.3.1/include/opus_types.h:
+../../../../Opus/opus-1.3.1/include/opus_defines.h:
+../../../../FES_Common_Library/Log/Log.h:
+../../../../FES_Common_Library/system.h:
+../../../../FES_Common_Library/fes_common_lib_version.h:
+../../../src/conf/system_conf.h:
+../../../src/conf/board_conf.h:
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f413xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_qspi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dfsdm.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_mmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_sdmmc.h:
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../../../src/conf/Log_conf.h:

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/audio_recorder/opus_util/OpusHeader.su

@@ -0,0 +1,6 @@
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.c:92:6:OpusHeader_PrintStatistics	8	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.c:100:6:OpusHeader_InitParams	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.c:112:6:OpusTag_InitParams	16	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.c:121:9:OpusHeader_WriteToFile	304	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.c:165:13:opus_conv_hdr_to_buf	24	static
+D:/Projects/Goyoyo/GOYOYO SATHISH CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.c:185:13:opus_conv_tag_to_buf	24	static

01_Code/Goyoyo_1/STM32CudeIDE/Goyoyo_DevBrd/Debug/Core/Src/App/audio_recorder/opus_util/subdir.mk

@@ -0,0 +1,32 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (12.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.c \
+D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.c 
+
+OBJS += \
+./Core/Src/App/audio_recorder/opus_util/OggPage.o \
+./Core/Src/App/audio_recorder/opus_util/OpusHeader.o 
+
+C_DEPS += \
+./Core/Src/App/audio_recorder/opus_util/OggPage.d \
+./Core/Src/App/audio_recorder/opus_util/OpusHeader.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Core/Src/App/audio_recorder/opus_util/OggPage.o: D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OggPage.c Core/Src/App/audio_recorder/opus_util/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F413xx -DARM_MATH_CM4 -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -I../FATFS/Target -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Middlewares/Third_Party/FatFs/src -I../USB_DEVICE/App -I../USB_DEVICE/Target -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/MSC/Inc -I../../../src/conf -I../../../src -I../../../src/drivers/flash -I../../../src/audio_recorder -I../../../src/audio_recorder/opus_util -I../../../src/lwjson/include -I../../../src/FATFS/Target -I../../../src/FATFS/App -I../../../../Opus/opus-1.3.1/include -I../../../../FES_Common_Library -I../../../../FES_Common_Library/CircularQ -I../../../../FES_Common_Library/Log -I../../../../FES_Common_Library/stm32_reset -I../../../../FES_Common_Library/KeyHdl -O0 -ffunction-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Core/Src/App/audio_recorder/opus_util/OggPage.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Core/Src/App/audio_recorder/opus_util/OpusHeader.o: D:/Projects/Goyoyo/GOYOYO\ SATHISH\ CODE/opus_json_integrated/Goyoyo-delivery_2025_02_04/Goyoyo-delivery_2025_02_04/01_Code/Goyoyo_1/src/audio_recorder/opus_util/OpusHeader.c Core/Src/App/audio_recorder/opus_util/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F413xx -DARM_MATH_CM4 -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -I../FATFS/Target -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Middlewares/Third_Party/FatFs/src -I../USB_DEVICE/App -I../USB_DEVICE/Target -I../Middlewares/ST/STM32_USB_Device_Library/Core/Inc -I../Middlewares/ST/STM32_USB_Device_Library/Class/MSC/Inc -I../../../src/conf -I../../../src -I../../../src/drivers/flash -I../../../src/audio_recorder -I../../../src/audio_recorder/opus_util -I../../../src/lwjson/include -I../../../src/FATFS/Target -I../../../src/FATFS/App -I../../../../Opus/opus-1.3.1/include -I../../../../FES_Common_Library -I../../../../FES_Common_Library/CircularQ -I../../../../FES_Common_Library/Log -I../../../../FES_Common_Library/stm32_reset -I../../../../FES_Common_Library/KeyHdl -O0 -ffunction-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Core/Src/App/audio_recorder/opus_util/OpusHeader.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Core-2f-Src-2f-App-2f-audio_recorder-2f-opus_util
+
+clean-Core-2f-Src-2f-App-2f-audio_recorder-2f-opus_util:
+	-$(RM) ./Core/Src/App/audio_recorder/opus_util/OggPage.cyclo ./Core/Src/App/audio_recorder/opus_util/OggPage.d ./Core/Src/App/audio_recorder/opus_util/OggPage.o ./Core/Src/App/audio_recorder/opus_util/OggPage.su ./Core/Src/App/audio_recorder/opus_util/OpusHeader.cyclo ./Core/Src/App/audio_recorder/opus_util/OpusHeader.d ./Core/Src/App/audio_recorder/opus_util/OpusHeader.o ./Core/Src/App/audio_recorder/opus_util/OpusHeader.su
+
+.PHONY: clean-Core-2f-Src-2f-App-2f-audio_recorder-2f-opus_util
+