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Goyoyo_Modules/Debug/STM32FF423_EMMC.list

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STM32FF423_EMMC.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 000001d8 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 000137b4 080001e0 080001e0 000011e0 2**4
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 00000254 08013994 08013994 00014994 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 08013be8 08013be8 00015164 2**0
CONTENTS
4 .ARM 00000008 08013be8 08013be8 00014be8 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .preinit_array 00000000 08013bf0 08013bf0 00015164 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 08013bf0 08013bf0 00014bf0 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .fini_array 00000004 08013bf4 08013bf4 00014bf4 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
8 .data 00000164 20000000 08013bf8 00015000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 00016b08 20000164 08013d5c 00015164 2**2
ALLOC
10 ._user_heap_stack 00000604 20016c6c 08013d5c 00015c6c 2**0
ALLOC
11 .ARM.attributes 00000030 00000000 00000000 00015164 2**0
CONTENTS, READONLY
12 .debug_info 0002a0b3 00000000 00000000 00015194 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 0000682e 00000000 00000000 0003f247 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 000022a8 00000000 00000000 00045a78 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_rnglists 00001a70 00000000 00000000 00047d20 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0002ab28 00000000 00000000 00049790 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 0002ed99 00000000 00000000 000742b8 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 000e6683 00000000 00000000 000a3051 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000043 00000000 00000000 001896d4 2**0
CONTENTS, READONLY
20 .debug_frame 00009540 00000000 00000000 00189718 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
21 .debug_line_str 00000081 00000000 00000000 00192c58 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
080001e0 <__do_global_dtors_aux>:
80001e0: b510 push {r4, lr}
80001e2: 4c05 ldr r4, [pc, #20] @ (80001f8 <__do_global_dtors_aux+0x18>)
80001e4: 7823 ldrb r3, [r4, #0]
80001e6: b933 cbnz r3, 80001f6 <__do_global_dtors_aux+0x16>
80001e8: 4b04 ldr r3, [pc, #16] @ (80001fc <__do_global_dtors_aux+0x1c>)
80001ea: b113 cbz r3, 80001f2 <__do_global_dtors_aux+0x12>
80001ec: 4804 ldr r0, [pc, #16] @ (8000200 <__do_global_dtors_aux+0x20>)
80001ee: f3af 8000 nop.w
80001f2: 2301 movs r3, #1
80001f4: 7023 strb r3, [r4, #0]
80001f6: bd10 pop {r4, pc}
80001f8: 20000164 .word 0x20000164
80001fc: 00000000 .word 0x00000000
8000200: 0801397c .word 0x0801397c
08000204 <frame_dummy>:
8000204: b508 push {r3, lr}
8000206: 4b03 ldr r3, [pc, #12] @ (8000214 <frame_dummy+0x10>)
8000208: b11b cbz r3, 8000212 <frame_dummy+0xe>
800020a: 4903 ldr r1, [pc, #12] @ (8000218 <frame_dummy+0x14>)
800020c: 4803 ldr r0, [pc, #12] @ (800021c <frame_dummy+0x18>)
800020e: f3af 8000 nop.w
8000212: bd08 pop {r3, pc}
8000214: 00000000 .word 0x00000000
8000218: 20000168 .word 0x20000168
800021c: 0801397c .word 0x0801397c
08000220 <memchr>:
8000220: f001 01ff and.w r1, r1, #255 @ 0xff
8000224: 2a10 cmp r2, #16
8000226: db2b blt.n 8000280 <memchr+0x60>
8000228: f010 0f07 tst.w r0, #7
800022c: d008 beq.n 8000240 <memchr+0x20>
800022e: f810 3b01 ldrb.w r3, [r0], #1
8000232: 3a01 subs r2, #1
8000234: 428b cmp r3, r1
8000236: d02d beq.n 8000294 <memchr+0x74>
8000238: f010 0f07 tst.w r0, #7
800023c: b342 cbz r2, 8000290 <memchr+0x70>
800023e: d1f6 bne.n 800022e <memchr+0xe>
8000240: b4f0 push {r4, r5, r6, r7}
8000242: ea41 2101 orr.w r1, r1, r1, lsl #8
8000246: ea41 4101 orr.w r1, r1, r1, lsl #16
800024a: f022 0407 bic.w r4, r2, #7
800024e: f07f 0700 mvns.w r7, #0
8000252: 2300 movs r3, #0
8000254: e8f0 5602 ldrd r5, r6, [r0], #8
8000258: 3c08 subs r4, #8
800025a: ea85 0501 eor.w r5, r5, r1
800025e: ea86 0601 eor.w r6, r6, r1
8000262: fa85 f547 uadd8 r5, r5, r7
8000266: faa3 f587 sel r5, r3, r7
800026a: fa86 f647 uadd8 r6, r6, r7
800026e: faa5 f687 sel r6, r5, r7
8000272: b98e cbnz r6, 8000298 <memchr+0x78>
8000274: d1ee bne.n 8000254 <memchr+0x34>
8000276: bcf0 pop {r4, r5, r6, r7}
8000278: f001 01ff and.w r1, r1, #255 @ 0xff
800027c: f002 0207 and.w r2, r2, #7
8000280: b132 cbz r2, 8000290 <memchr+0x70>
8000282: f810 3b01 ldrb.w r3, [r0], #1
8000286: 3a01 subs r2, #1
8000288: ea83 0301 eor.w r3, r3, r1
800028c: b113 cbz r3, 8000294 <memchr+0x74>
800028e: d1f8 bne.n 8000282 <memchr+0x62>
8000290: 2000 movs r0, #0
8000292: 4770 bx lr
8000294: 3801 subs r0, #1
8000296: 4770 bx lr
8000298: 2d00 cmp r5, #0
800029a: bf06 itte eq
800029c: 4635 moveq r5, r6
800029e: 3803 subeq r0, #3
80002a0: 3807 subne r0, #7
80002a2: f015 0f01 tst.w r5, #1
80002a6: d107 bne.n 80002b8 <memchr+0x98>
80002a8: 3001 adds r0, #1
80002aa: f415 7f80 tst.w r5, #256 @ 0x100
80002ae: bf02 ittt eq
80002b0: 3001 addeq r0, #1
80002b2: f415 3fc0 tsteq.w r5, #98304 @ 0x18000
80002b6: 3001 addeq r0, #1
80002b8: bcf0 pop {r4, r5, r6, r7}
80002ba: 3801 subs r0, #1
80002bc: 4770 bx lr
80002be: bf00 nop
080002c0 <__aeabi_uldivmod>:
80002c0: b953 cbnz r3, 80002d8 <__aeabi_uldivmod+0x18>
80002c2: b94a cbnz r2, 80002d8 <__aeabi_uldivmod+0x18>
80002c4: 2900 cmp r1, #0
80002c6: bf08 it eq
80002c8: 2800 cmpeq r0, #0
80002ca: bf1c itt ne
80002cc: f04f 31ff movne.w r1, #4294967295
80002d0: f04f 30ff movne.w r0, #4294967295
80002d4: f000 b96a b.w 80005ac <__aeabi_idiv0>
80002d8: f1ad 0c08 sub.w ip, sp, #8
80002dc: e96d ce04 strd ip, lr, [sp, #-16]!
80002e0: f000 f806 bl 80002f0 <__udivmoddi4>
80002e4: f8dd e004 ldr.w lr, [sp, #4]
80002e8: e9dd 2302 ldrd r2, r3, [sp, #8]
80002ec: b004 add sp, #16
80002ee: 4770 bx lr
080002f0 <__udivmoddi4>:
80002f0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
80002f4: 9d08 ldr r5, [sp, #32]
80002f6: 460c mov r4, r1
80002f8: 2b00 cmp r3, #0
80002fa: d14e bne.n 800039a <__udivmoddi4+0xaa>
80002fc: 4694 mov ip, r2
80002fe: 458c cmp ip, r1
8000300: 4686 mov lr, r0
8000302: fab2 f282 clz r2, r2
8000306: d962 bls.n 80003ce <__udivmoddi4+0xde>
8000308: b14a cbz r2, 800031e <__udivmoddi4+0x2e>
800030a: f1c2 0320 rsb r3, r2, #32
800030e: 4091 lsls r1, r2
8000310: fa20 f303 lsr.w r3, r0, r3
8000314: fa0c fc02 lsl.w ip, ip, r2
8000318: 4319 orrs r1, r3
800031a: fa00 fe02 lsl.w lr, r0, r2
800031e: ea4f 471c mov.w r7, ip, lsr #16
8000322: fa1f f68c uxth.w r6, ip
8000326: fbb1 f4f7 udiv r4, r1, r7
800032a: ea4f 431e mov.w r3, lr, lsr #16
800032e: fb07 1114 mls r1, r7, r4, r1
8000332: ea43 4301 orr.w r3, r3, r1, lsl #16
8000336: fb04 f106 mul.w r1, r4, r6
800033a: 4299 cmp r1, r3
800033c: d90a bls.n 8000354 <__udivmoddi4+0x64>
800033e: eb1c 0303 adds.w r3, ip, r3
8000342: f104 30ff add.w r0, r4, #4294967295
8000346: f080 8112 bcs.w 800056e <__udivmoddi4+0x27e>
800034a: 4299 cmp r1, r3
800034c: f240 810f bls.w 800056e <__udivmoddi4+0x27e>
8000350: 3c02 subs r4, #2
8000352: 4463 add r3, ip
8000354: 1a59 subs r1, r3, r1
8000356: fa1f f38e uxth.w r3, lr
800035a: fbb1 f0f7 udiv r0, r1, r7
800035e: fb07 1110 mls r1, r7, r0, r1
8000362: ea43 4301 orr.w r3, r3, r1, lsl #16
8000366: fb00 f606 mul.w r6, r0, r6
800036a: 429e cmp r6, r3
800036c: d90a bls.n 8000384 <__udivmoddi4+0x94>
800036e: eb1c 0303 adds.w r3, ip, r3
8000372: f100 31ff add.w r1, r0, #4294967295
8000376: f080 80fc bcs.w 8000572 <__udivmoddi4+0x282>
800037a: 429e cmp r6, r3
800037c: f240 80f9 bls.w 8000572 <__udivmoddi4+0x282>
8000380: 4463 add r3, ip
8000382: 3802 subs r0, #2
8000384: 1b9b subs r3, r3, r6
8000386: ea40 4004 orr.w r0, r0, r4, lsl #16
800038a: 2100 movs r1, #0
800038c: b11d cbz r5, 8000396 <__udivmoddi4+0xa6>
800038e: 40d3 lsrs r3, r2
8000390: 2200 movs r2, #0
8000392: e9c5 3200 strd r3, r2, [r5]
8000396: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800039a: 428b cmp r3, r1
800039c: d905 bls.n 80003aa <__udivmoddi4+0xba>
800039e: b10d cbz r5, 80003a4 <__udivmoddi4+0xb4>
80003a0: e9c5 0100 strd r0, r1, [r5]
80003a4: 2100 movs r1, #0
80003a6: 4608 mov r0, r1
80003a8: e7f5 b.n 8000396 <__udivmoddi4+0xa6>
80003aa: fab3 f183 clz r1, r3
80003ae: 2900 cmp r1, #0
80003b0: d146 bne.n 8000440 <__udivmoddi4+0x150>
80003b2: 42a3 cmp r3, r4
80003b4: d302 bcc.n 80003bc <__udivmoddi4+0xcc>
80003b6: 4290 cmp r0, r2
80003b8: f0c0 80f0 bcc.w 800059c <__udivmoddi4+0x2ac>
80003bc: 1a86 subs r6, r0, r2
80003be: eb64 0303 sbc.w r3, r4, r3
80003c2: 2001 movs r0, #1
80003c4: 2d00 cmp r5, #0
80003c6: d0e6 beq.n 8000396 <__udivmoddi4+0xa6>
80003c8: e9c5 6300 strd r6, r3, [r5]
80003cc: e7e3 b.n 8000396 <__udivmoddi4+0xa6>
80003ce: 2a00 cmp r2, #0
80003d0: f040 8090 bne.w 80004f4 <__udivmoddi4+0x204>
80003d4: eba1 040c sub.w r4, r1, ip
80003d8: ea4f 481c mov.w r8, ip, lsr #16
80003dc: fa1f f78c uxth.w r7, ip
80003e0: 2101 movs r1, #1
80003e2: fbb4 f6f8 udiv r6, r4, r8
80003e6: ea4f 431e mov.w r3, lr, lsr #16
80003ea: fb08 4416 mls r4, r8, r6, r4
80003ee: ea43 4304 orr.w r3, r3, r4, lsl #16
80003f2: fb07 f006 mul.w r0, r7, r6
80003f6: 4298 cmp r0, r3
80003f8: d908 bls.n 800040c <__udivmoddi4+0x11c>
80003fa: eb1c 0303 adds.w r3, ip, r3
80003fe: f106 34ff add.w r4, r6, #4294967295
8000402: d202 bcs.n 800040a <__udivmoddi4+0x11a>
8000404: 4298 cmp r0, r3
8000406: f200 80cd bhi.w 80005a4 <__udivmoddi4+0x2b4>
800040a: 4626 mov r6, r4
800040c: 1a1c subs r4, r3, r0
800040e: fa1f f38e uxth.w r3, lr
8000412: fbb4 f0f8 udiv r0, r4, r8
8000416: fb08 4410 mls r4, r8, r0, r4
800041a: ea43 4304 orr.w r3, r3, r4, lsl #16
800041e: fb00 f707 mul.w r7, r0, r7
8000422: 429f cmp r7, r3
8000424: d908 bls.n 8000438 <__udivmoddi4+0x148>
8000426: eb1c 0303 adds.w r3, ip, r3
800042a: f100 34ff add.w r4, r0, #4294967295
800042e: d202 bcs.n 8000436 <__udivmoddi4+0x146>
8000430: 429f cmp r7, r3
8000432: f200 80b0 bhi.w 8000596 <__udivmoddi4+0x2a6>
8000436: 4620 mov r0, r4
8000438: 1bdb subs r3, r3, r7
800043a: ea40 4006 orr.w r0, r0, r6, lsl #16
800043e: e7a5 b.n 800038c <__udivmoddi4+0x9c>
8000440: f1c1 0620 rsb r6, r1, #32
8000444: 408b lsls r3, r1
8000446: fa22 f706 lsr.w r7, r2, r6
800044a: 431f orrs r7, r3
800044c: fa20 fc06 lsr.w ip, r0, r6
8000450: fa04 f301 lsl.w r3, r4, r1
8000454: ea43 030c orr.w r3, r3, ip
8000458: 40f4 lsrs r4, r6
800045a: fa00 f801 lsl.w r8, r0, r1
800045e: 0c38 lsrs r0, r7, #16
8000460: ea4f 4913 mov.w r9, r3, lsr #16
8000464: fbb4 fef0 udiv lr, r4, r0
8000468: fa1f fc87 uxth.w ip, r7
800046c: fb00 441e mls r4, r0, lr, r4
8000470: ea49 4404 orr.w r4, r9, r4, lsl #16
8000474: fb0e f90c mul.w r9, lr, ip
8000478: 45a1 cmp r9, r4
800047a: fa02 f201 lsl.w r2, r2, r1
800047e: d90a bls.n 8000496 <__udivmoddi4+0x1a6>
8000480: 193c adds r4, r7, r4
8000482: f10e 3aff add.w sl, lr, #4294967295
8000486: f080 8084 bcs.w 8000592 <__udivmoddi4+0x2a2>
800048a: 45a1 cmp r9, r4
800048c: f240 8081 bls.w 8000592 <__udivmoddi4+0x2a2>
8000490: f1ae 0e02 sub.w lr, lr, #2
8000494: 443c add r4, r7
8000496: eba4 0409 sub.w r4, r4, r9
800049a: fa1f f983 uxth.w r9, r3
800049e: fbb4 f3f0 udiv r3, r4, r0
80004a2: fb00 4413 mls r4, r0, r3, r4
80004a6: ea49 4404 orr.w r4, r9, r4, lsl #16
80004aa: fb03 fc0c mul.w ip, r3, ip
80004ae: 45a4 cmp ip, r4
80004b0: d907 bls.n 80004c2 <__udivmoddi4+0x1d2>
80004b2: 193c adds r4, r7, r4
80004b4: f103 30ff add.w r0, r3, #4294967295
80004b8: d267 bcs.n 800058a <__udivmoddi4+0x29a>
80004ba: 45a4 cmp ip, r4
80004bc: d965 bls.n 800058a <__udivmoddi4+0x29a>
80004be: 3b02 subs r3, #2
80004c0: 443c add r4, r7
80004c2: ea43 400e orr.w r0, r3, lr, lsl #16
80004c6: fba0 9302 umull r9, r3, r0, r2
80004ca: eba4 040c sub.w r4, r4, ip
80004ce: 429c cmp r4, r3
80004d0: 46ce mov lr, r9
80004d2: 469c mov ip, r3
80004d4: d351 bcc.n 800057a <__udivmoddi4+0x28a>
80004d6: d04e beq.n 8000576 <__udivmoddi4+0x286>
80004d8: b155 cbz r5, 80004f0 <__udivmoddi4+0x200>
80004da: ebb8 030e subs.w r3, r8, lr
80004de: eb64 040c sbc.w r4, r4, ip
80004e2: fa04 f606 lsl.w r6, r4, r6
80004e6: 40cb lsrs r3, r1
80004e8: 431e orrs r6, r3
80004ea: 40cc lsrs r4, r1
80004ec: e9c5 6400 strd r6, r4, [r5]
80004f0: 2100 movs r1, #0
80004f2: e750 b.n 8000396 <__udivmoddi4+0xa6>
80004f4: f1c2 0320 rsb r3, r2, #32
80004f8: fa20 f103 lsr.w r1, r0, r3
80004fc: fa0c fc02 lsl.w ip, ip, r2
8000500: fa24 f303 lsr.w r3, r4, r3
8000504: 4094 lsls r4, r2
8000506: 430c orrs r4, r1
8000508: ea4f 481c mov.w r8, ip, lsr #16
800050c: fa00 fe02 lsl.w lr, r0, r2
8000510: fa1f f78c uxth.w r7, ip
8000514: fbb3 f0f8 udiv r0, r3, r8
8000518: fb08 3110 mls r1, r8, r0, r3
800051c: 0c23 lsrs r3, r4, #16
800051e: ea43 4301 orr.w r3, r3, r1, lsl #16
8000522: fb00 f107 mul.w r1, r0, r7
8000526: 4299 cmp r1, r3
8000528: d908 bls.n 800053c <__udivmoddi4+0x24c>
800052a: eb1c 0303 adds.w r3, ip, r3
800052e: f100 36ff add.w r6, r0, #4294967295
8000532: d22c bcs.n 800058e <__udivmoddi4+0x29e>
8000534: 4299 cmp r1, r3
8000536: d92a bls.n 800058e <__udivmoddi4+0x29e>
8000538: 3802 subs r0, #2
800053a: 4463 add r3, ip
800053c: 1a5b subs r3, r3, r1
800053e: b2a4 uxth r4, r4
8000540: fbb3 f1f8 udiv r1, r3, r8
8000544: fb08 3311 mls r3, r8, r1, r3
8000548: ea44 4403 orr.w r4, r4, r3, lsl #16
800054c: fb01 f307 mul.w r3, r1, r7
8000550: 42a3 cmp r3, r4
8000552: d908 bls.n 8000566 <__udivmoddi4+0x276>
8000554: eb1c 0404 adds.w r4, ip, r4
8000558: f101 36ff add.w r6, r1, #4294967295
800055c: d213 bcs.n 8000586 <__udivmoddi4+0x296>
800055e: 42a3 cmp r3, r4
8000560: d911 bls.n 8000586 <__udivmoddi4+0x296>
8000562: 3902 subs r1, #2
8000564: 4464 add r4, ip
8000566: 1ae4 subs r4, r4, r3
8000568: ea41 4100 orr.w r1, r1, r0, lsl #16
800056c: e739 b.n 80003e2 <__udivmoddi4+0xf2>
800056e: 4604 mov r4, r0
8000570: e6f0 b.n 8000354 <__udivmoddi4+0x64>
8000572: 4608 mov r0, r1
8000574: e706 b.n 8000384 <__udivmoddi4+0x94>
8000576: 45c8 cmp r8, r9
8000578: d2ae bcs.n 80004d8 <__udivmoddi4+0x1e8>
800057a: ebb9 0e02 subs.w lr, r9, r2
800057e: eb63 0c07 sbc.w ip, r3, r7
8000582: 3801 subs r0, #1
8000584: e7a8 b.n 80004d8 <__udivmoddi4+0x1e8>
8000586: 4631 mov r1, r6
8000588: e7ed b.n 8000566 <__udivmoddi4+0x276>
800058a: 4603 mov r3, r0
800058c: e799 b.n 80004c2 <__udivmoddi4+0x1d2>
800058e: 4630 mov r0, r6
8000590: e7d4 b.n 800053c <__udivmoddi4+0x24c>
8000592: 46d6 mov lr, sl
8000594: e77f b.n 8000496 <__udivmoddi4+0x1a6>
8000596: 4463 add r3, ip
8000598: 3802 subs r0, #2
800059a: e74d b.n 8000438 <__udivmoddi4+0x148>
800059c: 4606 mov r6, r0
800059e: 4623 mov r3, r4
80005a0: 4608 mov r0, r1
80005a2: e70f b.n 80003c4 <__udivmoddi4+0xd4>
80005a4: 3e02 subs r6, #2
80005a6: 4463 add r3, ip
80005a8: e730 b.n 800040c <__udivmoddi4+0x11c>
80005aa: bf00 nop
080005ac <__aeabi_idiv0>:
80005ac: 4770 bx lr
80005ae: bf00 nop
080005b0 <ConvertDFSDMToPCM>:
AUDIO_ProcessTypdef haudio;
WAV_InfoTypedef AudioInfo;
void ConvertDFSDMToPCM(int32_t *dfsdmBuffer, int16_t *pcmBuffer, uint32_t size) {
80005b0: b480 push {r7}
80005b2: b087 sub sp, #28
80005b4: af00 add r7, sp, #0
80005b6: 60f8 str r0, [r7, #12]
80005b8: 60b9 str r1, [r7, #8]
80005ba: 607a str r2, [r7, #4]
// int16_t sample = (int16_t)(dfsdmBuffer[i] >> 8); // Extract top 16 bits
// pcmBuffer[2 * i] = (uint8_t)(sample & 0xFF); // LSB
// pcmBuffer[2 * i + 1] = (uint8_t)((sample >> 8) & 0xFF);// MSB
// }
/*************************************************************************************/
uint32_t buf_indx=0;
80005bc: 2300 movs r3, #0
80005be: 617b str r3, [r7, #20]
for(buf_indx=0;buf_indx<size;buf_indx++)
80005c0: 2300 movs r3, #0
80005c2: 617b str r3, [r7, #20]
80005c4: e026 b.n 8000614 <ConvertDFSDMToPCM+0x64>
{
pcmBuffer[buf_indx] = (int16_t)(SaturaLH((dfsdmBuffer[buf_indx] >> 8), -32760, 32760));
80005c6: 697b ldr r3, [r7, #20]
80005c8: 009b lsls r3, r3, #2
80005ca: 68fa ldr r2, [r7, #12]
80005cc: 4413 add r3, r2
80005ce: 681b ldr r3, [r3, #0]
80005d0: 121b asrs r3, r3, #8
80005d2: 4a16 ldr r2, [pc, #88] @ (800062c <ConvertDFSDMToPCM+0x7c>)
80005d4: 4293 cmp r3, r2
80005d6: db14 blt.n 8000602 <ConvertDFSDMToPCM+0x52>
80005d8: 697b ldr r3, [r7, #20]
80005da: 009b lsls r3, r3, #2
80005dc: 68fa ldr r2, [r7, #12]
80005de: 4413 add r3, r2
80005e0: 681b ldr r3, [r3, #0]
80005e2: 121b asrs r3, r3, #8
80005e4: f647 72f8 movw r2, #32760 @ 0x7ff8
80005e8: 4293 cmp r3, r2
80005ea: dc07 bgt.n 80005fc <ConvertDFSDMToPCM+0x4c>
80005ec: 697b ldr r3, [r7, #20]
80005ee: 009b lsls r3, r3, #2
80005f0: 68fa ldr r2, [r7, #12]
80005f2: 4413 add r3, r2
80005f4: 681b ldr r3, [r3, #0]
80005f6: 121b asrs r3, r3, #8
80005f8: b21b sxth r3, r3
80005fa: e003 b.n 8000604 <ConvertDFSDMToPCM+0x54>
80005fc: f647 73f8 movw r3, #32760 @ 0x7ff8
8000600: e000 b.n 8000604 <ConvertDFSDMToPCM+0x54>
8000602: 4b0a ldr r3, [pc, #40] @ (800062c <ConvertDFSDMToPCM+0x7c>)
8000604: 697a ldr r2, [r7, #20]
8000606: 0052 lsls r2, r2, #1
8000608: 68b9 ldr r1, [r7, #8]
800060a: 440a add r2, r1
800060c: 8013 strh r3, [r2, #0]
for(buf_indx=0;buf_indx<size;buf_indx++)
800060e: 697b ldr r3, [r7, #20]
8000610: 3301 adds r3, #1
8000612: 617b str r3, [r7, #20]
8000614: 697a ldr r2, [r7, #20]
8000616: 687b ldr r3, [r7, #4]
8000618: 429a cmp r2, r3
800061a: d3d4 bcc.n 80005c6 <ConvertDFSDMToPCM+0x16>
}
/***************************************************************************************/
}
800061c: bf00 nop
800061e: bf00 nop
8000620: 371c adds r7, #28
8000622: 46bd mov sp, r7
8000624: f85d 7b04 ldr.w r7, [sp], #4
8000628: 4770 bx lr
800062a: bf00 nop
800062c: ffff8008 .word 0xffff8008
08000630 <WavProcess_EncInit>:
uint32_t WavProcess_EncInit(uint32_t Freq, uint8_t *pHeader)
{
8000630: b580 push {r7, lr}
8000632: b082 sub sp, #8
8000634: af00 add r7, sp, #0
8000636: 6078 str r0, [r7, #4]
8000638: 6039 str r1, [r7, #0]
/* Initialize the encoder structure */
AudioInfo.SampleRate = Freq; /* Audio sampling frequency */
800063a: 4a1b ldr r2, [pc, #108] @ (80006a8 <WavProcess_EncInit+0x78>)
800063c: 687b ldr r3, [r7, #4]
800063e: 6193 str r3, [r2, #24]
AudioInfo.NbrChannels = 1; /* Number of channels: 1:Mono or 2:Stereo */
8000640: 4b19 ldr r3, [pc, #100] @ (80006a8 <WavProcess_EncInit+0x78>)
8000642: 2201 movs r2, #1
8000644: 82da strh r2, [r3, #22]
AudioInfo.BitPerSample = 16; /* Number of bits per sample (16, 24 or 32) */
8000646: 4b18 ldr r3, [pc, #96] @ (80006a8 <WavProcess_EncInit+0x78>)
8000648: 2210 movs r2, #16
800064a: 845a strh r2, [r3, #34] @ 0x22
AudioInfo.FileSize = 0x001D4C00; /* Total length of useful audio data (payload) */
800064c: 4b16 ldr r3, [pc, #88] @ (80006a8 <WavProcess_EncInit+0x78>)
800064e: 4a17 ldr r2, [pc, #92] @ (80006ac <WavProcess_EncInit+0x7c>)
8000650: 605a str r2, [r3, #4]
AudioInfo.SubChunk1Size = 44; /* The file header chunk size */
8000652: 4b15 ldr r3, [pc, #84] @ (80006a8 <WavProcess_EncInit+0x78>)
8000654: 222c movs r2, #44 @ 0x2c
8000656: 611a str r2, [r3, #16]
AudioInfo.ByteRate = (AudioInfo.SampleRate * \
8000658: 4b13 ldr r3, [pc, #76] @ (80006a8 <WavProcess_EncInit+0x78>)
800065a: 699b ldr r3, [r3, #24]
(AudioInfo.BitPerSample/8) * \
800065c: 4a12 ldr r2, [pc, #72] @ (80006a8 <WavProcess_EncInit+0x78>)
800065e: 8c52 ldrh r2, [r2, #34] @ 0x22
8000660: 08d2 lsrs r2, r2, #3
8000662: b292 uxth r2, r2
AudioInfo.ByteRate = (AudioInfo.SampleRate * \
8000664: fb02 f303 mul.w r3, r2, r3
AudioInfo.NbrChannels); /* Number of bytes per second (sample rate * block align) */
8000668: 4a0f ldr r2, [pc, #60] @ (80006a8 <WavProcess_EncInit+0x78>)
800066a: 8ad2 ldrh r2, [r2, #22]
(AudioInfo.BitPerSample/8) * \
800066c: fb02 f303 mul.w r3, r2, r3
AudioInfo.ByteRate = (AudioInfo.SampleRate * \
8000670: 4a0d ldr r2, [pc, #52] @ (80006a8 <WavProcess_EncInit+0x78>)
8000672: 61d3 str r3, [r2, #28]
AudioInfo.BlockAlign = AudioInfo.NbrChannels * \
8000674: 4b0c ldr r3, [pc, #48] @ (80006a8 <WavProcess_EncInit+0x78>)
8000676: 8ada ldrh r2, [r3, #22]
(AudioInfo.BitPerSample/8); /* channels * bits/sample / 8 */
8000678: 4b0b ldr r3, [pc, #44] @ (80006a8 <WavProcess_EncInit+0x78>)
800067a: 8c5b ldrh r3, [r3, #34] @ 0x22
AudioInfo.BlockAlign = AudioInfo.NbrChannels * \
800067c: 08db lsrs r3, r3, #3
800067e: b29b uxth r3, r3
8000680: fb12 f303 smulbb r3, r2, r3
8000684: b29a uxth r2, r3
8000686: 4b08 ldr r3, [pc, #32] @ (80006a8 <WavProcess_EncInit+0x78>)
8000688: 841a strh r2, [r3, #32]
/* Parse the wav file header and extract required information */
if(WavProcess_HeaderInit(pHeader, &AudioInfo))
800068a: 4907 ldr r1, [pc, #28] @ (80006a8 <WavProcess_EncInit+0x78>)
800068c: 6838 ldr r0, [r7, #0]
800068e: f000 f80f bl 80006b0 <WavProcess_HeaderInit>
8000692: 4603 mov r3, r0
8000694: 2b00 cmp r3, #0
8000696: d001 beq.n 800069c <WavProcess_EncInit+0x6c>
{
return 1;
8000698: 2301 movs r3, #1
800069a: e000 b.n 800069e <WavProcess_EncInit+0x6e>
}
return 0;
800069c: 2300 movs r3, #0
}
800069e: 4618 mov r0, r3
80006a0: 3708 adds r7, #8
80006a2: 46bd mov sp, r7
80006a4: bd80 pop {r7, pc}
80006a6: bf00 nop
80006a8: 2000f3dc .word 0x2000f3dc
80006ac: 001d4c00 .word 0x001d4c00
080006b0 <WavProcess_HeaderInit>:
uint32_t WavProcess_HeaderInit(uint8_t* pHeader, WAV_InfoTypedef* pAudioInfoStruct)
{
80006b0: b480 push {r7}
80006b2: b083 sub sp, #12
80006b4: af00 add r7, sp, #0
80006b6: 6078 str r0, [r7, #4]
80006b8: 6039 str r1, [r7, #0]
/* Write chunkID, must be 'RIFF' ------------------------------------------*/
pHeader[0] = 'R';
80006ba: 687b ldr r3, [r7, #4]
80006bc: 2252 movs r2, #82 @ 0x52
80006be: 701a strb r2, [r3, #0]
pHeader[1] = 'I';
80006c0: 687b ldr r3, [r7, #4]
80006c2: 3301 adds r3, #1
80006c4: 2249 movs r2, #73 @ 0x49
80006c6: 701a strb r2, [r3, #0]
pHeader[2] = 'F';
80006c8: 687b ldr r3, [r7, #4]
80006ca: 3302 adds r3, #2
80006cc: 2246 movs r2, #70 @ 0x46
80006ce: 701a strb r2, [r3, #0]
pHeader[3] = 'F';
80006d0: 687b ldr r3, [r7, #4]
80006d2: 3303 adds r3, #3
80006d4: 2246 movs r2, #70 @ 0x46
80006d6: 701a strb r2, [r3, #0]
/* Write the file length ---------------------------------------------------*/
/* The sampling time: this value will be written back at the end of the
recording operation. Example: 661500 Bytes = 0x000A17FC, byte[7]=0x00, byte[4]=0xFC */
pHeader[4] = 0x00;
80006d8: 687b ldr r3, [r7, #4]
80006da: 3304 adds r3, #4
80006dc: 2200 movs r2, #0
80006de: 701a strb r2, [r3, #0]
pHeader[5] = 0x4C;
80006e0: 687b ldr r3, [r7, #4]
80006e2: 3305 adds r3, #5
80006e4: 224c movs r2, #76 @ 0x4c
80006e6: 701a strb r2, [r3, #0]
pHeader[6] = 0x1D;
80006e8: 687b ldr r3, [r7, #4]
80006ea: 3306 adds r3, #6
80006ec: 221d movs r2, #29
80006ee: 701a strb r2, [r3, #0]
pHeader[7] = 0x00;
80006f0: 687b ldr r3, [r7, #4]
80006f2: 3307 adds r3, #7
80006f4: 2200 movs r2, #0
80006f6: 701a strb r2, [r3, #0]
/* Write the file format, must be 'WAVE' -----------------------------------*/
pHeader[8] = 'W';
80006f8: 687b ldr r3, [r7, #4]
80006fa: 3308 adds r3, #8
80006fc: 2257 movs r2, #87 @ 0x57
80006fe: 701a strb r2, [r3, #0]
pHeader[9] = 'A';
8000700: 687b ldr r3, [r7, #4]
8000702: 3309 adds r3, #9
8000704: 2241 movs r2, #65 @ 0x41
8000706: 701a strb r2, [r3, #0]
pHeader[10] = 'V';
8000708: 687b ldr r3, [r7, #4]
800070a: 330a adds r3, #10
800070c: 2256 movs r2, #86 @ 0x56
800070e: 701a strb r2, [r3, #0]
pHeader[11] = 'E';
8000710: 687b ldr r3, [r7, #4]
8000712: 330b adds r3, #11
8000714: 2245 movs r2, #69 @ 0x45
8000716: 701a strb r2, [r3, #0]
/* Write the format chunk, must be'fmt ' -----------------------------------*/
pHeader[12] = 'f';
8000718: 687b ldr r3, [r7, #4]
800071a: 330c adds r3, #12
800071c: 2266 movs r2, #102 @ 0x66
800071e: 701a strb r2, [r3, #0]
pHeader[13] = 'm';
8000720: 687b ldr r3, [r7, #4]
8000722: 330d adds r3, #13
8000724: 226d movs r2, #109 @ 0x6d
8000726: 701a strb r2, [r3, #0]
pHeader[14] = 't';
8000728: 687b ldr r3, [r7, #4]
800072a: 330e adds r3, #14
800072c: 2274 movs r2, #116 @ 0x74
800072e: 701a strb r2, [r3, #0]
pHeader[15] = ' ';
8000730: 687b ldr r3, [r7, #4]
8000732: 330f adds r3, #15
8000734: 2220 movs r2, #32
8000736: 701a strb r2, [r3, #0]
/* Write the length of the 'fmt' data, must be 0x10 ------------------------*/
pHeader[16] = 0x10;
8000738: 687b ldr r3, [r7, #4]
800073a: 3310 adds r3, #16
800073c: 2210 movs r2, #16
800073e: 701a strb r2, [r3, #0]
pHeader[17] = 0x00;
8000740: 687b ldr r3, [r7, #4]
8000742: 3311 adds r3, #17
8000744: 2200 movs r2, #0
8000746: 701a strb r2, [r3, #0]
pHeader[18] = 0x00;
8000748: 687b ldr r3, [r7, #4]
800074a: 3312 adds r3, #18
800074c: 2200 movs r2, #0
800074e: 701a strb r2, [r3, #0]
pHeader[19] = 0x00;
8000750: 687b ldr r3, [r7, #4]
8000752: 3313 adds r3, #19
8000754: 2200 movs r2, #0
8000756: 701a strb r2, [r3, #0]
/* Write the audio format, must be 0x01 (PCM) ------------------------------*/
pHeader[20] = 0x01;
8000758: 687b ldr r3, [r7, #4]
800075a: 3314 adds r3, #20
800075c: 2201 movs r2, #1
800075e: 701a strb r2, [r3, #0]
pHeader[21] = 0x00;
8000760: 687b ldr r3, [r7, #4]
8000762: 3315 adds r3, #21
8000764: 2200 movs r2, #0
8000766: 701a strb r2, [r3, #0]
/* Write the number of channels, ie. 0x01 (Mono) ---------------------------*/
pHeader[22] = pAudioInfoStruct->NbrChannels;
8000768: 683b ldr r3, [r7, #0]
800076a: 8ada ldrh r2, [r3, #22]
800076c: 687b ldr r3, [r7, #4]
800076e: 3316 adds r3, #22
8000770: b2d2 uxtb r2, r2
8000772: 701a strb r2, [r3, #0]
pHeader[23] = 0x00;
8000774: 687b ldr r3, [r7, #4]
8000776: 3317 adds r3, #23
8000778: 2200 movs r2, #0
800077a: 701a strb r2, [r3, #0]
/* Write the Sample Rate in Hz ---------------------------------------------*/
/* Write Little Endian ie. 8000 = 0x00001F40 => byte[24]=0x40, byte[27]=0x00*/
pHeader[24] = (uint8_t)((pAudioInfoStruct->SampleRate & 0xFF));
800077c: 683b ldr r3, [r7, #0]
800077e: 699a ldr r2, [r3, #24]
8000780: 687b ldr r3, [r7, #4]
8000782: 3318 adds r3, #24
8000784: b2d2 uxtb r2, r2
8000786: 701a strb r2, [r3, #0]
pHeader[25] = (uint8_t)((pAudioInfoStruct->SampleRate >> 8) & 0xFF);
8000788: 683b ldr r3, [r7, #0]
800078a: 699b ldr r3, [r3, #24]
800078c: 0a1a lsrs r2, r3, #8
800078e: 687b ldr r3, [r7, #4]
8000790: 3319 adds r3, #25
8000792: b2d2 uxtb r2, r2
8000794: 701a strb r2, [r3, #0]
pHeader[26] = (uint8_t)((pAudioInfoStruct->SampleRate >> 16) & 0xFF);
8000796: 683b ldr r3, [r7, #0]
8000798: 699b ldr r3, [r3, #24]
800079a: 0c1a lsrs r2, r3, #16
800079c: 687b ldr r3, [r7, #4]
800079e: 331a adds r3, #26
80007a0: b2d2 uxtb r2, r2
80007a2: 701a strb r2, [r3, #0]
pHeader[27] = (uint8_t)((pAudioInfoStruct->SampleRate >> 24) & 0xFF);
80007a4: 683b ldr r3, [r7, #0]
80007a6: 699b ldr r3, [r3, #24]
80007a8: 0e1a lsrs r2, r3, #24
80007aa: 687b ldr r3, [r7, #4]
80007ac: 331b adds r3, #27
80007ae: b2d2 uxtb r2, r2
80007b0: 701a strb r2, [r3, #0]
/* Write the Byte Rate -----------------------------------------------------*/
pHeader[28] = (uint8_t)((pAudioInfoStruct->ByteRate & 0xFF));
80007b2: 683b ldr r3, [r7, #0]
80007b4: 69da ldr r2, [r3, #28]
80007b6: 687b ldr r3, [r7, #4]
80007b8: 331c adds r3, #28
80007ba: b2d2 uxtb r2, r2
80007bc: 701a strb r2, [r3, #0]
pHeader[29] = (uint8_t)((pAudioInfoStruct->ByteRate >> 8) & 0xFF);
80007be: 683b ldr r3, [r7, #0]
80007c0: 69db ldr r3, [r3, #28]
80007c2: 0a1a lsrs r2, r3, #8
80007c4: 687b ldr r3, [r7, #4]
80007c6: 331d adds r3, #29
80007c8: b2d2 uxtb r2, r2
80007ca: 701a strb r2, [r3, #0]
pHeader[30] = (uint8_t)((pAudioInfoStruct->ByteRate >> 16) & 0xFF);
80007cc: 683b ldr r3, [r7, #0]
80007ce: 69db ldr r3, [r3, #28]
80007d0: 0c1a lsrs r2, r3, #16
80007d2: 687b ldr r3, [r7, #4]
80007d4: 331e adds r3, #30
80007d6: b2d2 uxtb r2, r2
80007d8: 701a strb r2, [r3, #0]
pHeader[31] = (uint8_t)((pAudioInfoStruct->ByteRate >> 24) & 0xFF);
80007da: 683b ldr r3, [r7, #0]
80007dc: 69db ldr r3, [r3, #28]
80007de: 0e1a lsrs r2, r3, #24
80007e0: 687b ldr r3, [r7, #4]
80007e2: 331f adds r3, #31
80007e4: b2d2 uxtb r2, r2
80007e6: 701a strb r2, [r3, #0]
/* Write the block alignment -----------------------------------------------*/
pHeader[32] = pAudioInfoStruct->BlockAlign;
80007e8: 683b ldr r3, [r7, #0]
80007ea: 8c1a ldrh r2, [r3, #32]
80007ec: 687b ldr r3, [r7, #4]
80007ee: 3320 adds r3, #32
80007f0: b2d2 uxtb r2, r2
80007f2: 701a strb r2, [r3, #0]
pHeader[33] = 0x00;
80007f4: 687b ldr r3, [r7, #4]
80007f6: 3321 adds r3, #33 @ 0x21
80007f8: 2200 movs r2, #0
80007fa: 701a strb r2, [r3, #0]
/* Write the number of bits per sample -------------------------------------*/
pHeader[34] = pAudioInfoStruct->BitPerSample;
80007fc: 683b ldr r3, [r7, #0]
80007fe: 8c5a ldrh r2, [r3, #34] @ 0x22
8000800: 687b ldr r3, [r7, #4]
8000802: 3322 adds r3, #34 @ 0x22
8000804: b2d2 uxtb r2, r2
8000806: 701a strb r2, [r3, #0]
pHeader[35] = 0x00;
8000808: 687b ldr r3, [r7, #4]
800080a: 3323 adds r3, #35 @ 0x23
800080c: 2200 movs r2, #0
800080e: 701a strb r2, [r3, #0]
/* Write the Data chunk, must be 'data' ------------------------------------*/
pHeader[36] = 'd';
8000810: 687b ldr r3, [r7, #4]
8000812: 3324 adds r3, #36 @ 0x24
8000814: 2264 movs r2, #100 @ 0x64
8000816: 701a strb r2, [r3, #0]
pHeader[37] = 'a';
8000818: 687b ldr r3, [r7, #4]
800081a: 3325 adds r3, #37 @ 0x25
800081c: 2261 movs r2, #97 @ 0x61
800081e: 701a strb r2, [r3, #0]
pHeader[38] = 't';
8000820: 687b ldr r3, [r7, #4]
8000822: 3326 adds r3, #38 @ 0x26
8000824: 2274 movs r2, #116 @ 0x74
8000826: 701a strb r2, [r3, #0]
pHeader[39] = 'a';
8000828: 687b ldr r3, [r7, #4]
800082a: 3327 adds r3, #39 @ 0x27
800082c: 2261 movs r2, #97 @ 0x61
800082e: 701a strb r2, [r3, #0]
/* Write the number of sample data -----------------------------------------*/
/* This variable will be written back at the end of the recording operation */
pHeader[40] = 0x00;
8000830: 687b ldr r3, [r7, #4]
8000832: 3328 adds r3, #40 @ 0x28
8000834: 2200 movs r2, #0
8000836: 701a strb r2, [r3, #0]
pHeader[41] = 0x4C;
8000838: 687b ldr r3, [r7, #4]
800083a: 3329 adds r3, #41 @ 0x29
800083c: 224c movs r2, #76 @ 0x4c
800083e: 701a strb r2, [r3, #0]
pHeader[42] = 0x1D;
8000840: 687b ldr r3, [r7, #4]
8000842: 332a adds r3, #42 @ 0x2a
8000844: 221d movs r2, #29
8000846: 701a strb r2, [r3, #0]
pHeader[43] = 0x00;
8000848: 687b ldr r3, [r7, #4]
800084a: 332b adds r3, #43 @ 0x2b
800084c: 2200 movs r2, #0
800084e: 701a strb r2, [r3, #0]
/* Return 0 if all operations are OK */
return 0;
8000850: 2300 movs r3, #0
}
8000852: 4618 mov r0, r3
8000854: 370c adds r7, #12
8000856: 46bd mov sp, r7
8000858: f85d 7b04 ldr.w r7, [sp], #4
800085c: 4770 bx lr
...
08000860 <WavProcess_HeaderUpdate>:
uint32_t WavProcess_HeaderUpdate(uint8_t* pHeader, WAV_InfoTypedef* pAudioInfoStruct)
{
8000860: b480 push {r7}
8000862: b083 sub sp, #12
8000864: af00 add r7, sp, #0
8000866: 6078 str r0, [r7, #4]
8000868: 6039 str r1, [r7, #0]
/* Write the file length ---------------------------------------------------*/
/* The sampling time: this value will be written back at the end of the
recording operation. Example: 661500 Bytes = 0x000A17FC, byte[7]=0x00, byte[4]=0xFC */
pHeader[4] = (uint8_t)(haudio.in.fptr);
800086a: 4b30 ldr r3, [pc, #192] @ (800092c <WavProcess_HeaderUpdate+0xcc>)
800086c: f503 43c0 add.w r3, r3, #24576 @ 0x6000
8000870: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208
8000874: 687b ldr r3, [r7, #4]
8000876: 3304 adds r3, #4
8000878: b2d2 uxtb r2, r2
800087a: 701a strb r2, [r3, #0]
pHeader[5] = (uint8_t)(haudio.in.fptr >> 8);
800087c: 4b2b ldr r3, [pc, #172] @ (800092c <WavProcess_HeaderUpdate+0xcc>)
800087e: f503 43c0 add.w r3, r3, #24576 @ 0x6000
8000882: f8d3 3208 ldr.w r3, [r3, #520] @ 0x208
8000886: 0a1a lsrs r2, r3, #8
8000888: 687b ldr r3, [r7, #4]
800088a: 3305 adds r3, #5
800088c: b2d2 uxtb r2, r2
800088e: 701a strb r2, [r3, #0]
pHeader[6] = (uint8_t)(haudio.in.fptr >> 16);
8000890: 4b26 ldr r3, [pc, #152] @ (800092c <WavProcess_HeaderUpdate+0xcc>)
8000892: f503 43c0 add.w r3, r3, #24576 @ 0x6000
8000896: f8d3 3208 ldr.w r3, [r3, #520] @ 0x208
800089a: 0c1a lsrs r2, r3, #16
800089c: 687b ldr r3, [r7, #4]
800089e: 3306 adds r3, #6
80008a0: b2d2 uxtb r2, r2
80008a2: 701a strb r2, [r3, #0]
pHeader[7] = (uint8_t)(haudio.in.fptr >> 24);
80008a4: 4b21 ldr r3, [pc, #132] @ (800092c <WavProcess_HeaderUpdate+0xcc>)
80008a6: f503 43c0 add.w r3, r3, #24576 @ 0x6000
80008aa: f8d3 3208 ldr.w r3, [r3, #520] @ 0x208
80008ae: 0e1a lsrs r2, r3, #24
80008b0: 687b ldr r3, [r7, #4]
80008b2: 3307 adds r3, #7
80008b4: b2d2 uxtb r2, r2
80008b6: 701a strb r2, [r3, #0]
/* Write the number of sample data -----------------------------------------*/
/* This variable will be written back at the end of the recording operation */
haudio.in.fptr -=44;
80008b8: 4b1c ldr r3, [pc, #112] @ (800092c <WavProcess_HeaderUpdate+0xcc>)
80008ba: f503 43c0 add.w r3, r3, #24576 @ 0x6000
80008be: f8d3 3208 ldr.w r3, [r3, #520] @ 0x208
80008c2: 3b2c subs r3, #44 @ 0x2c
80008c4: 4a19 ldr r2, [pc, #100] @ (800092c <WavProcess_HeaderUpdate+0xcc>)
80008c6: f502 42c0 add.w r2, r2, #24576 @ 0x6000
80008ca: f8c2 3208 str.w r3, [r2, #520] @ 0x208
pHeader[40] = (uint8_t)(haudio.in.fptr);
80008ce: 4b17 ldr r3, [pc, #92] @ (800092c <WavProcess_HeaderUpdate+0xcc>)
80008d0: f503 43c0 add.w r3, r3, #24576 @ 0x6000
80008d4: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208
80008d8: 687b ldr r3, [r7, #4]
80008da: 3328 adds r3, #40 @ 0x28
80008dc: b2d2 uxtb r2, r2
80008de: 701a strb r2, [r3, #0]
pHeader[41] = (uint8_t)(haudio.in.fptr >> 8);
80008e0: 4b12 ldr r3, [pc, #72] @ (800092c <WavProcess_HeaderUpdate+0xcc>)
80008e2: f503 43c0 add.w r3, r3, #24576 @ 0x6000
80008e6: f8d3 3208 ldr.w r3, [r3, #520] @ 0x208
80008ea: 0a1a lsrs r2, r3, #8
80008ec: 687b ldr r3, [r7, #4]
80008ee: 3329 adds r3, #41 @ 0x29
80008f0: b2d2 uxtb r2, r2
80008f2: 701a strb r2, [r3, #0]
pHeader[42] = (uint8_t)(haudio.in.fptr >> 16);
80008f4: 4b0d ldr r3, [pc, #52] @ (800092c <WavProcess_HeaderUpdate+0xcc>)
80008f6: f503 43c0 add.w r3, r3, #24576 @ 0x6000
80008fa: f8d3 3208 ldr.w r3, [r3, #520] @ 0x208
80008fe: 0c1a lsrs r2, r3, #16
8000900: 687b ldr r3, [r7, #4]
8000902: 332a adds r3, #42 @ 0x2a
8000904: b2d2 uxtb r2, r2
8000906: 701a strb r2, [r3, #0]
pHeader[43] = (uint8_t)(haudio.in.fptr >> 24);
8000908: 4b08 ldr r3, [pc, #32] @ (800092c <WavProcess_HeaderUpdate+0xcc>)
800090a: f503 43c0 add.w r3, r3, #24576 @ 0x6000
800090e: f8d3 3208 ldr.w r3, [r3, #520] @ 0x208
8000912: 0e1a lsrs r2, r3, #24
8000914: 687b ldr r3, [r7, #4]
8000916: 332b adds r3, #43 @ 0x2b
8000918: b2d2 uxtb r2, r2
800091a: 701a strb r2, [r3, #0]
/* Return 0 if all operations are OK */
return 0;
800091c: 2300 movs r3, #0
}
800091e: 4618 mov r0, r3
8000920: 370c adds r7, #12
8000922: 46bd mov sp, r7
8000924: f85d 7b04 ldr.w r7, [sp], #4
8000928: 4770 bx lr
800092a: bf00 nop
800092c: 200091d0 .word 0x200091d0
08000930 <Start_DFSDM_Recording>:
HAL_Delay(5000);
App_AudioWrite();
}
void Start_DFSDM_Recording(void)
{
8000930: b580 push {r7, lr}
8000932: b082 sub sp, #8
8000934: af00 add r7, sp, #0
// // Stop DFSDM
// ret = HAL_DFSDM_FilterRegularStop(&hdfsdm1_filter0);
// if(ret != 0){
// while(1);
// }
sample_count = 0; // Reset sample count
8000936: 4b1e ldr r3, [pc, #120] @ (80009b0 <Start_DFSDM_Recording+0x80>)
8000938: 2200 movs r2, #0
800093a: 601a str r2, [r3, #0]
ret = HAL_DFSDM_FilterRegularStart_DMA(&hdfsdm1_filter0, (int32_t*)audio_buffer, BUFFER_SIZE);
800093c: f44f 52c0 mov.w r2, #6144 @ 0x1800
8000940: 491c ldr r1, [pc, #112] @ (80009b4 <Start_DFSDM_Recording+0x84>)
8000942: 481d ldr r0, [pc, #116] @ (80009b8 <Start_DFSDM_Recording+0x88>)
8000944: f001 fa8e bl 8001e64 <HAL_DFSDM_FilterRegularStart_DMA>
8000948: 4603 mov r3, r0
800094a: 80fb strh r3, [r7, #6]
if(ret != 0){
800094c: 88fb ldrh r3, [r7, #6]
800094e: 2b00 cmp r3, #0
8000950: d001 beq.n 8000956 <Start_DFSDM_Recording+0x26>
while(1);
8000952: bf00 nop
8000954: e7fd b.n 8000952 <Start_DFSDM_Recording+0x22>
}
WavProcess_EncInit(SAMPLE_RATE, pHeaderBuff);
8000956: 4919 ldr r1, [pc, #100] @ (80009bc <Start_DFSDM_Recording+0x8c>)
8000958: f44f 507a mov.w r0, #16000 @ 0x3e80
800095c: f7ff fe68 bl 8000630 <WavProcess_EncInit>
sprintf(FileName, "Audio_%02d.wav",++file_no);
8000960: 4b17 ldr r3, [pc, #92] @ (80009c0 <Start_DFSDM_Recording+0x90>)
8000962: 781b ldrb r3, [r3, #0]
8000964: 3301 adds r3, #1
8000966: b2da uxtb r2, r3
8000968: 4b15 ldr r3, [pc, #84] @ (80009c0 <Start_DFSDM_Recording+0x90>)
800096a: 701a strb r2, [r3, #0]
800096c: 4b14 ldr r3, [pc, #80] @ (80009c0 <Start_DFSDM_Recording+0x90>)
800096e: 781b ldrb r3, [r3, #0]
8000970: 461a mov r2, r3
8000972: 4914 ldr r1, [pc, #80] @ (80009c4 <Start_DFSDM_Recording+0x94>)
8000974: 4814 ldr r0, [pc, #80] @ (80009c8 <Start_DFSDM_Recording+0x98>)
8000976: f012 fb0b bl 8012f90 <siprintf>
if (f_open(&USERFile, FileName, (FA_CREATE_ALWAYS | FA_WRITE)) == FR_OK) {
800097a: 220a movs r2, #10
800097c: 4912 ldr r1, [pc, #72] @ (80009c8 <Start_DFSDM_Recording+0x98>)
800097e: 4813 ldr r0, [pc, #76] @ (80009cc <Start_DFSDM_Recording+0x9c>)
8000980: f00d fdb4 bl 800e4ec <f_open>
8000984: 4603 mov r3, r0
8000986: 2b00 cmp r3, #0
8000988: d10e bne.n 80009a8 <Start_DFSDM_Recording+0x78>
// Write header file
if (f_write(&USERFile, pHeaderBuff, 44, (void*) &byteswritten) == FR_OK) {
800098a: 4b11 ldr r3, [pc, #68] @ (80009d0 <Start_DFSDM_Recording+0xa0>)
800098c: 222c movs r2, #44 @ 0x2c
800098e: 490b ldr r1, [pc, #44] @ (80009bc <Start_DFSDM_Recording+0x8c>)
8000990: 480e ldr r0, [pc, #56] @ (80009cc <Start_DFSDM_Recording+0x9c>)
8000992: f00d ff6c bl 800e86e <f_write>
8000996: 4603 mov r3, r0
8000998: 2b00 cmp r3, #0
800099a: d105 bne.n 80009a8 <Start_DFSDM_Recording+0x78>
if (byteswritten == 0) {
800099c: 4b0c ldr r3, [pc, #48] @ (80009d0 <Start_DFSDM_Recording+0xa0>)
800099e: 681b ldr r3, [r3, #0]
80009a0: 2b00 cmp r3, #0
80009a2: d101 bne.n 80009a8 <Start_DFSDM_Recording+0x78>
while (1);
80009a4: bf00 nop
80009a6: e7fd b.n 80009a4 <Start_DFSDM_Recording+0x74>
}
}
}
}
80009a8: bf00 nop
80009aa: 3708 adds r7, #8
80009ac: 46bd mov sp, r7
80009ae: bd80 pop {r7, pc}
80009b0: 20000180 .word 0x20000180
80009b4: 200001b8 .word 0x200001b8
80009b8: 2000f6a8 .word 0x2000f6a8
80009bc: 20000184 .word 0x20000184
80009c0: 200091cc .word 0x200091cc
80009c4: 08013994 .word 0x08013994
80009c8: 200091b8 .word 0x200091b8
80009cc: 2000fcf0 .word 0x2000fcf0
80009d0: 200001b0 .word 0x200001b0
080009d4 <App_AudioWrite>:
uint8_t App_AudioWrite(){
80009d4: b580 push {r7, lr}
80009d6: b082 sub sp, #8
80009d8: af00 add r7, sp, #0
// flag = 0;
// AUDIO_RECORDER_StopRec();
// MX_USB_DEVICE_Init();
// }
if (half == 1) {
80009da: 4b1c ldr r3, [pc, #112] @ (8000a4c <App_AudioWrite+0x78>)
80009dc: 781b ldrb r3, [r3, #0]
80009de: 2b01 cmp r3, #1
80009e0: d114 bne.n 8000a0c <App_AudioWrite+0x38>
half = 0;
80009e2: 4b1a ldr r3, [pc, #104] @ (8000a4c <App_AudioWrite+0x78>)
80009e4: 2200 movs r2, #0
80009e6: 701a strb r2, [r3, #0]
ConvertDFSDMToPCM((int32_t*)audio_buffer, pcm_data, BUFFER_SIZE / 2);
80009e8: f44f 6240 mov.w r2, #3072 @ 0xc00
80009ec: 4918 ldr r1, [pc, #96] @ (8000a50 <App_AudioWrite+0x7c>)
80009ee: 4819 ldr r0, [pc, #100] @ (8000a54 <App_AudioWrite+0x80>)
80009f0: f7ff fdde bl 80005b0 <ConvertDFSDMToPCM>
if (f_write(&USERFile, (uint16_t*)pcm_data, PCM_SIZE, (void*)&byteswritten) != FR_OK) {
80009f4: 1d3b adds r3, r7, #4
80009f6: f44f 52c0 mov.w r2, #6144 @ 0x1800
80009fa: 4915 ldr r1, [pc, #84] @ (8000a50 <App_AudioWrite+0x7c>)
80009fc: 4816 ldr r0, [pc, #88] @ (8000a58 <App_AudioWrite+0x84>)
80009fe: f00d ff36 bl 800e86e <f_write>
8000a02: 4603 mov r3, r0
8000a04: 2b00 cmp r3, #0
8000a06: d001 beq.n 8000a0c <App_AudioWrite+0x38>
while (1);
8000a08: bf00 nop
8000a0a: e7fd b.n 8000a08 <App_AudioWrite+0x34>
}
}
if (full == 1) {
8000a0c: 4b13 ldr r3, [pc, #76] @ (8000a5c <App_AudioWrite+0x88>)
8000a0e: 781b ldrb r3, [r3, #0]
8000a10: 2b01 cmp r3, #1
8000a12: d115 bne.n 8000a40 <App_AudioWrite+0x6c>
full = 0;
8000a14: 4b11 ldr r3, [pc, #68] @ (8000a5c <App_AudioWrite+0x88>)
8000a16: 2200 movs r2, #0
8000a18: 701a strb r2, [r3, #0]
ConvertDFSDMToPCM((int32_t*)(audio_buffer + BUFFER_SIZE / 2), pcm_data, BUFFER_SIZE / 2);
8000a1a: 4b11 ldr r3, [pc, #68] @ (8000a60 <App_AudioWrite+0x8c>)
8000a1c: f44f 6240 mov.w r2, #3072 @ 0xc00
8000a20: 490b ldr r1, [pc, #44] @ (8000a50 <App_AudioWrite+0x7c>)
8000a22: 4618 mov r0, r3
8000a24: f7ff fdc4 bl 80005b0 <ConvertDFSDMToPCM>
if (f_write(&USERFile, (uint16_t*)pcm_data, PCM_SIZE, (void*)&byteswritten) != FR_OK) {
8000a28: 1d3b adds r3, r7, #4
8000a2a: f44f 52c0 mov.w r2, #6144 @ 0x1800
8000a2e: 4908 ldr r1, [pc, #32] @ (8000a50 <App_AudioWrite+0x7c>)
8000a30: 4809 ldr r0, [pc, #36] @ (8000a58 <App_AudioWrite+0x84>)
8000a32: f00d ff1c bl 800e86e <f_write>
8000a36: 4603 mov r3, r0
8000a38: 2b00 cmp r3, #0
8000a3a: d001 beq.n 8000a40 <App_AudioWrite+0x6c>
while (1);
8000a3c: bf00 nop
8000a3e: e7fd b.n 8000a3c <App_AudioWrite+0x68>
}
}
}
}*/
return 0;
8000a40: 2300 movs r3, #0
}
8000a42: 4618 mov r0, r3
8000a44: 3708 adds r7, #8
8000a46: 46bd mov sp, r7
8000a48: bd80 pop {r7, pc}
8000a4a: bf00 nop
8000a4c: 200001b4 .word 0x200001b4
8000a50: 200061b8 .word 0x200061b8
8000a54: 200001b8 .word 0x200001b8
8000a58: 2000fcf0 .word 0x2000fcf0
8000a5c: 200001b5 .word 0x200001b5
8000a60: 200031b8 .word 0x200031b8
08000a64 <AUDIO_RECORDER_StopRec>:
uint8_t AUDIO_RECORDER_StopRec(void)
{
8000a64: b580 push {r7, lr}
8000a66: af00 add r7, sp, #0
// uint32_t byteswritten = 0;
if(HAL_OK != HAL_DFSDM_FilterRegularStop_DMA(&hdfsdm1_filter0))
8000a68: 4810 ldr r0, [pc, #64] @ (8000aac <AUDIO_RECORDER_StopRec+0x48>)
8000a6a: f001 fa7f bl 8001f6c <HAL_DFSDM_FilterRegularStop_DMA>
8000a6e: 4603 mov r3, r0
8000a70: 2b00 cmp r3, #0
8000a72: d001 beq.n 8000a78 <AUDIO_RECORDER_StopRec+0x14>
{
return 1;
8000a74: 2301 movs r3, #1
8000a76: e017 b.n 8000aa8 <AUDIO_RECORDER_StopRec+0x44>
}
if(f_lseek(&USERFile, 0) == FR_OK)
8000a78: 2100 movs r1, #0
8000a7a: 480d ldr r0, [pc, #52] @ (8000ab0 <AUDIO_RECORDER_StopRec+0x4c>)
8000a7c: f00e f953 bl 800ed26 <f_lseek>
8000a80: 4603 mov r3, r0
8000a82: 2b00 cmp r3, #0
8000a84: d10f bne.n 8000aa6 <AUDIO_RECORDER_StopRec+0x42>
{
/* Update the wav file header save it into wav file */
WavProcess_HeaderUpdate(pHeaderBuff, &AudioInfo);
8000a86: 490b ldr r1, [pc, #44] @ (8000ab4 <AUDIO_RECORDER_StopRec+0x50>)
8000a88: 480b ldr r0, [pc, #44] @ (8000ab8 <AUDIO_RECORDER_StopRec+0x54>)
8000a8a: f7ff fee9 bl 8000860 <WavProcess_HeaderUpdate>
if(f_write(&USERFile, pHeaderBuff, sizeof(WAV_InfoTypedef), (void*)&byteswritten) == FR_OK)
8000a8e: 4b0b ldr r3, [pc, #44] @ (8000abc <AUDIO_RECORDER_StopRec+0x58>)
8000a90: 222c movs r2, #44 @ 0x2c
8000a92: 4909 ldr r1, [pc, #36] @ (8000ab8 <AUDIO_RECORDER_StopRec+0x54>)
8000a94: 4806 ldr r0, [pc, #24] @ (8000ab0 <AUDIO_RECORDER_StopRec+0x4c>)
8000a96: f00d feea bl 800e86e <f_write>
8000a9a: 4603 mov r3, r0
8000a9c: 2b00 cmp r3, #0
8000a9e: d102 bne.n 8000aa6 <AUDIO_RECORDER_StopRec+0x42>
{
f_close(&USERFile);
8000aa0: 4803 ldr r0, [pc, #12] @ (8000ab0 <AUDIO_RECORDER_StopRec+0x4c>)
8000aa2: f00e f911 bl 800ecc8 <f_close>
}
}
return 0;
8000aa6: 2300 movs r3, #0
}
8000aa8: 4618 mov r0, r3
8000aaa: bd80 pop {r7, pc}
8000aac: 2000f6a8 .word 0x2000f6a8
8000ab0: 2000fcf0 .word 0x2000fcf0
8000ab4: 2000f3dc .word 0x2000f3dc
8000ab8: 20000184 .word 0x20000184
8000abc: 200001b0 .word 0x200001b0
08000ac0 <HAL_DFSDM_FilterRegConvHalfCpltCallback>:
void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) {
8000ac0: b580 push {r7, lr}
8000ac2: b082 sub sp, #8
8000ac4: af00 add r7, sp, #0
8000ac6: 6078 str r0, [r7, #4]
if(hdfsdm_filter == &hdfsdm1_filter0){
8000ac8: 687b ldr r3, [r7, #4]
8000aca: 4a06 ldr r2, [pc, #24] @ (8000ae4 <HAL_DFSDM_FilterRegConvHalfCpltCallback+0x24>)
8000acc: 4293 cmp r3, r2
8000ace: d104 bne.n 8000ada <HAL_DFSDM_FilterRegConvHalfCpltCallback+0x1a>
half = 1;
8000ad0: 4b05 ldr r3, [pc, #20] @ (8000ae8 <HAL_DFSDM_FilterRegConvHalfCpltCallback+0x28>)
8000ad2: 2201 movs r2, #1
8000ad4: 701a strb r2, [r3, #0]
App_AudioWrite();
8000ad6: f7ff ff7d bl 80009d4 <App_AudioWrite>
}
}
8000ada: bf00 nop
8000adc: 3708 adds r7, #8
8000ade: 46bd mov sp, r7
8000ae0: bd80 pop {r7, pc}
8000ae2: bf00 nop
8000ae4: 2000f6a8 .word 0x2000f6a8
8000ae8: 200001b4 .word 0x200001b4
08000aec <HAL_DFSDM_FilterRegConvCpltCallback>:
void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) {
8000aec: b580 push {r7, lr}
8000aee: b082 sub sp, #8
8000af0: af00 add r7, sp, #0
8000af2: 6078 str r0, [r7, #4]
if(hdfsdm_filter == &hdfsdm1_filter0){
8000af4: 687b ldr r3, [r7, #4]
8000af6: 4a06 ldr r2, [pc, #24] @ (8000b10 <HAL_DFSDM_FilterRegConvCpltCallback+0x24>)
8000af8: 4293 cmp r3, r2
8000afa: d104 bne.n 8000b06 <HAL_DFSDM_FilterRegConvCpltCallback+0x1a>
full = 1;
8000afc: 4b05 ldr r3, [pc, #20] @ (8000b14 <HAL_DFSDM_FilterRegConvCpltCallback+0x28>)
8000afe: 2201 movs r2, #1
8000b00: 701a strb r2, [r3, #0]
App_AudioWrite();
8000b02: f7ff ff67 bl 80009d4 <App_AudioWrite>
}
}
8000b06: bf00 nop
8000b08: 3708 adds r7, #8
8000b0a: 46bd mov sp, r7
8000b0c: bd80 pop {r7, pc}
8000b0e: bf00 nop
8000b10: 2000f6a8 .word 0x2000f6a8
8000b14: 200001b5 .word 0x200001b5
08000b18 <vApplicationGetIdleTaskMemory>:
/* USER CODE BEGIN GET_IDLE_TASK_MEMORY */
static StaticTask_t xIdleTaskTCBBuffer;
static StackType_t xIdleStack[configMINIMAL_STACK_SIZE];
void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize )
{
8000b18: b480 push {r7}
8000b1a: b085 sub sp, #20
8000b1c: af00 add r7, sp, #0
8000b1e: 60f8 str r0, [r7, #12]
8000b20: 60b9 str r1, [r7, #8]
8000b22: 607a str r2, [r7, #4]
*ppxIdleTaskTCBBuffer = &xIdleTaskTCBBuffer;
8000b24: 68fb ldr r3, [r7, #12]
8000b26: 4a07 ldr r2, [pc, #28] @ (8000b44 <vApplicationGetIdleTaskMemory+0x2c>)
8000b28: 601a str r2, [r3, #0]
*ppxIdleTaskStackBuffer = &xIdleStack[0];
8000b2a: 68bb ldr r3, [r7, #8]
8000b2c: 4a06 ldr r2, [pc, #24] @ (8000b48 <vApplicationGetIdleTaskMemory+0x30>)
8000b2e: 601a str r2, [r3, #0]
*pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
8000b30: 687b ldr r3, [r7, #4]
8000b32: 2280 movs r2, #128 @ 0x80
8000b34: 601a str r2, [r3, #0]
/* place for user code */
}
8000b36: bf00 nop
8000b38: 3714 adds r7, #20
8000b3a: 46bd mov sp, r7
8000b3c: f85d 7b04 ldr.w r7, [sp], #4
8000b40: 4770 bx lr
8000b42: bf00 nop
8000b44: 2000f408 .word 0x2000f408
8000b48: 2000f4a8 .word 0x2000f4a8
08000b4c <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
8000b4c: b5b0 push {r4, r5, r7, lr}
8000b4e: b08e sub sp, #56 @ 0x38
8000b50: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8000b52: f000 fdeb bl 800172c <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8000b56: f000 f83d bl 8000bd4 <SystemClock_Config>
/* Configure the peripherals common clocks */
PeriphCommonClock_Config();
8000b5a: f000 f8a5 bl 8000ca8 <PeriphCommonClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
8000b5e: f000 f987 bl 8000e70 <MX_GPIO_Init>
MX_DMA_Init();
8000b62: f000 f965 bl 8000e30 <MX_DMA_Init>
MX_SDIO_MMC_Init();
8000b66: f000 f931 bl 8000dcc <MX_SDIO_MMC_Init>
MX_FATFS_Init();
8000b6a: f008 f98d bl 8008e88 <MX_FATFS_Init>
MX_DFSDM1_Init();
8000b6e: f000 f8c5 bl 8000cfc <MX_DFSDM1_Init>
/* add queues, ... */
/* USER CODE END RTOS_QUEUES */
/* Create the thread(s) */
/* definition and creation of defaultTask */
osThreadDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 128);
8000b72: 4b14 ldr r3, [pc, #80] @ (8000bc4 <main+0x78>)
8000b74: f107 041c add.w r4, r7, #28
8000b78: 461d mov r5, r3
8000b7a: cd0f ldmia r5!, {r0, r1, r2, r3}
8000b7c: c40f stmia r4!, {r0, r1, r2, r3}
8000b7e: e895 0007 ldmia.w r5, {r0, r1, r2}
8000b82: e884 0007 stmia.w r4, {r0, r1, r2}
defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL);
8000b86: f107 031c add.w r3, r7, #28
8000b8a: 2100 movs r1, #0
8000b8c: 4618 mov r0, r3
8000b8e: f00f f843 bl 800fc18 <osThreadCreate>
8000b92: 4603 mov r3, r0
8000b94: 4a0c ldr r2, [pc, #48] @ (8000bc8 <main+0x7c>)
8000b96: 6013 str r3, [r2, #0]
/* definition and creation of myTask02 */
osThreadDef(myTask02, StartTask02, osPriorityIdle, 0, 128);
8000b98: 4b0c ldr r3, [pc, #48] @ (8000bcc <main+0x80>)
8000b9a: 463c mov r4, r7
8000b9c: 461d mov r5, r3
8000b9e: cd0f ldmia r5!, {r0, r1, r2, r3}
8000ba0: c40f stmia r4!, {r0, r1, r2, r3}
8000ba2: e895 0007 ldmia.w r5, {r0, r1, r2}
8000ba6: e884 0007 stmia.w r4, {r0, r1, r2}
myTask02Handle = osThreadCreate(osThread(myTask02), NULL);
8000baa: 463b mov r3, r7
8000bac: 2100 movs r1, #0
8000bae: 4618 mov r0, r3
8000bb0: f00f f832 bl 800fc18 <osThreadCreate>
8000bb4: 4603 mov r3, r0
8000bb6: 4a06 ldr r2, [pc, #24] @ (8000bd0 <main+0x84>)
8000bb8: 6013 str r3, [r2, #0]
/* USER CODE BEGIN RTOS_THREADS */
/* add threads, ... */
/* USER CODE END RTOS_THREADS */
/* Start scheduler */
osKernelStart();
8000bba: f00f f826 bl 800fc0a <osKernelStart>
/* We should never get here as control is now taken by the scheduler */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
8000bbe: bf00 nop
8000bc0: e7fd b.n 8000bbe <main+0x72>
8000bc2: bf00 nop
8000bc4: 080139fc .word 0x080139fc
8000bc8: 2000fa14 .word 0x2000fa14
8000bcc: 08013a24 .word 0x08013a24
8000bd0: 2000fa18 .word 0x2000fa18
08000bd4 <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
8000bd4: b580 push {r7, lr}
8000bd6: b094 sub sp, #80 @ 0x50
8000bd8: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
8000bda: f107 031c add.w r3, r7, #28
8000bde: 2234 movs r2, #52 @ 0x34
8000be0: 2100 movs r1, #0
8000be2: 4618 mov r0, r3
8000be4: f012 f9f4 bl 8012fd0 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
8000be8: f107 0308 add.w r3, r7, #8
8000bec: 2200 movs r2, #0
8000bee: 601a str r2, [r3, #0]
8000bf0: 605a str r2, [r3, #4]
8000bf2: 609a str r2, [r3, #8]
8000bf4: 60da str r2, [r3, #12]
8000bf6: 611a str r2, [r3, #16]
/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
8000bf8: 2300 movs r3, #0
8000bfa: 607b str r3, [r7, #4]
8000bfc: 4b28 ldr r3, [pc, #160] @ (8000ca0 <SystemClock_Config+0xcc>)
8000bfe: 6c1b ldr r3, [r3, #64] @ 0x40
8000c00: 4a27 ldr r2, [pc, #156] @ (8000ca0 <SystemClock_Config+0xcc>)
8000c02: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8000c06: 6413 str r3, [r2, #64] @ 0x40
8000c08: 4b25 ldr r3, [pc, #148] @ (8000ca0 <SystemClock_Config+0xcc>)
8000c0a: 6c1b ldr r3, [r3, #64] @ 0x40
8000c0c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8000c10: 607b str r3, [r7, #4]
8000c12: 687b ldr r3, [r7, #4]
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
8000c14: 2300 movs r3, #0
8000c16: 603b str r3, [r7, #0]
8000c18: 4b22 ldr r3, [pc, #136] @ (8000ca4 <SystemClock_Config+0xd0>)
8000c1a: 681b ldr r3, [r3, #0]
8000c1c: 4a21 ldr r2, [pc, #132] @ (8000ca4 <SystemClock_Config+0xd0>)
8000c1e: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8000c22: 6013 str r3, [r2, #0]
8000c24: 4b1f ldr r3, [pc, #124] @ (8000ca4 <SystemClock_Config+0xd0>)
8000c26: 681b ldr r3, [r3, #0]
8000c28: f403 4340 and.w r3, r3, #49152 @ 0xc000
8000c2c: 603b str r3, [r7, #0]
8000c2e: 683b ldr r3, [r7, #0]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
8000c30: 2301 movs r3, #1
8000c32: 61fb str r3, [r7, #28]
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
8000c34: f44f 3380 mov.w r3, #65536 @ 0x10000
8000c38: 623b str r3, [r7, #32]
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
8000c3a: 2302 movs r3, #2
8000c3c: 637b str r3, [r7, #52] @ 0x34
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
8000c3e: f44f 0380 mov.w r3, #4194304 @ 0x400000
8000c42: 63bb str r3, [r7, #56] @ 0x38
RCC_OscInitStruct.PLL.PLLM = 8;
8000c44: 2308 movs r3, #8
8000c46: 63fb str r3, [r7, #60] @ 0x3c
RCC_OscInitStruct.PLL.PLLN = 192;
8000c48: 23c0 movs r3, #192 @ 0xc0
8000c4a: 643b str r3, [r7, #64] @ 0x40
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
8000c4c: 2302 movs r3, #2
8000c4e: 647b str r3, [r7, #68] @ 0x44
RCC_OscInitStruct.PLL.PLLQ = 4;
8000c50: 2304 movs r3, #4
8000c52: 64bb str r3, [r7, #72] @ 0x48
RCC_OscInitStruct.PLL.PLLR = 2;
8000c54: 2302 movs r3, #2
8000c56: 64fb str r3, [r7, #76] @ 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
8000c58: f107 031c add.w r3, r7, #28
8000c5c: 4618 mov r0, r3
8000c5e: f005 fbbf bl 80063e0 <HAL_RCC_OscConfig>
8000c62: 4603 mov r3, r0
8000c64: 2b00 cmp r3, #0
8000c66: d001 beq.n 8000c6c <SystemClock_Config+0x98>
{
Error_Handler();
8000c68: f000 f9f5 bl 8001056 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
8000c6c: 230f movs r3, #15
8000c6e: 60bb str r3, [r7, #8]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
8000c70: 2302 movs r3, #2
8000c72: 60fb str r3, [r7, #12]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
8000c74: 2300 movs r3, #0
8000c76: 613b str r3, [r7, #16]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
8000c78: f44f 5380 mov.w r3, #4096 @ 0x1000
8000c7c: 617b str r3, [r7, #20]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
8000c7e: 2300 movs r3, #0
8000c80: 61bb str r3, [r7, #24]
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
8000c82: f107 0308 add.w r3, r7, #8
8000c86: 2103 movs r1, #3
8000c88: 4618 mov r0, r3
8000c8a: f004 fedf bl 8005a4c <HAL_RCC_ClockConfig>
8000c8e: 4603 mov r3, r0
8000c90: 2b00 cmp r3, #0
8000c92: d001 beq.n 8000c98 <SystemClock_Config+0xc4>
{
Error_Handler();
8000c94: f000 f9df bl 8001056 <Error_Handler>
}
}
8000c98: bf00 nop
8000c9a: 3750 adds r7, #80 @ 0x50
8000c9c: 46bd mov sp, r7
8000c9e: bd80 pop {r7, pc}
8000ca0: 40023800 .word 0x40023800
8000ca4: 40007000 .word 0x40007000
08000ca8 <PeriphCommonClock_Config>:
/**
* @brief Peripherals Common Clock Configuration
* @retval None
*/
void PeriphCommonClock_Config(void)
{
8000ca8: b580 push {r7, lr}
8000caa: b096 sub sp, #88 @ 0x58
8000cac: af00 add r7, sp, #0
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
8000cae: 463b mov r3, r7
8000cb0: 2258 movs r2, #88 @ 0x58
8000cb2: 2100 movs r1, #0
8000cb4: 4618 mov r0, r3
8000cb6: f012 f98b bl 8012fd0 <memset>
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_PLLI2S|RCC_PERIPHCLK_I2S_APB1
8000cba: f240 3381 movw r3, #897 @ 0x381
8000cbe: 603b str r3, [r7, #0]
|RCC_PERIPHCLK_DFSDM1_AUDIO|RCC_PERIPHCLK_DFSDM1;
PeriphClkInitStruct.PLLI2S.PLLI2SN = 72;
8000cc0: 2348 movs r3, #72 @ 0x48
8000cc2: 60bb str r3, [r7, #8]
PeriphClkInitStruct.PLLI2S.PLLI2SM = 4;
8000cc4: 2304 movs r3, #4
8000cc6: 607b str r3, [r7, #4]
PeriphClkInitStruct.PLLI2S.PLLI2SR = 7;
8000cc8: 2307 movs r3, #7
8000cca: 613b str r3, [r7, #16]
PeriphClkInitStruct.PLLI2S.PLLI2SQ = 3;
8000ccc: 2303 movs r3, #3
8000cce: 60fb str r3, [r7, #12]
PeriphClkInitStruct.Dfsdm1ClockSelection = RCC_DFSDM1CLKSOURCE_APB2;
8000cd0: 2300 movs r3, #0
8000cd2: 637b str r3, [r7, #52] @ 0x34
PeriphClkInitStruct.Dfsdm1AudioClockSelection = RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1;
8000cd4: 2300 movs r3, #0
8000cd6: 63bb str r3, [r7, #56] @ 0x38
PeriphClkInitStruct.PLLI2SSelection = RCC_PLLI2SCLKSOURCE_PLLSRC;
8000cd8: 2300 movs r3, #0
8000cda: 653b str r3, [r7, #80] @ 0x50
PeriphClkInitStruct.I2sApb1ClockSelection = RCC_I2SAPB1CLKSOURCE_PLLI2S;
8000cdc: 2300 movs r3, #0
8000cde: 61fb str r3, [r7, #28]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
8000ce0: 463b mov r3, r7
8000ce2: 4618 mov r0, r3
8000ce4: f005 f8f0 bl 8005ec8 <HAL_RCCEx_PeriphCLKConfig>
8000ce8: 4603 mov r3, r0
8000cea: 2b00 cmp r3, #0
8000cec: d001 beq.n 8000cf2 <PeriphCommonClock_Config+0x4a>
{
Error_Handler();
8000cee: f000 f9b2 bl 8001056 <Error_Handler>
}
}
8000cf2: bf00 nop
8000cf4: 3758 adds r7, #88 @ 0x58
8000cf6: 46bd mov sp, r7
8000cf8: bd80 pop {r7, pc}
...
08000cfc <MX_DFSDM1_Init>:
* @brief DFSDM1 Initialization Function
* @param None
* @retval None
*/
static void MX_DFSDM1_Init(void)
{
8000cfc: b580 push {r7, lr}
8000cfe: af00 add r7, sp, #0
/* USER CODE END DFSDM1_Init 0 */
/* USER CODE BEGIN DFSDM1_Init 1 */
/* USER CODE END DFSDM1_Init 1 */
hdfsdm1_filter0.Instance = DFSDM1_Filter0;
8000d00: 4b2d ldr r3, [pc, #180] @ (8000db8 <MX_DFSDM1_Init+0xbc>)
8000d02: 4a2e ldr r2, [pc, #184] @ (8000dbc <MX_DFSDM1_Init+0xc0>)
8000d04: 601a str r2, [r3, #0]
hdfsdm1_filter0.Init.RegularParam.Trigger = DFSDM_FILTER_SW_TRIGGER;
8000d06: 4b2c ldr r3, [pc, #176] @ (8000db8 <MX_DFSDM1_Init+0xbc>)
8000d08: 2200 movs r2, #0
8000d0a: 605a str r2, [r3, #4]
hdfsdm1_filter0.Init.RegularParam.FastMode = ENABLE;
8000d0c: 4b2a ldr r3, [pc, #168] @ (8000db8 <MX_DFSDM1_Init+0xbc>)
8000d0e: 2201 movs r2, #1
8000d10: 721a strb r2, [r3, #8]
hdfsdm1_filter0.Init.RegularParam.DmaMode = ENABLE;
8000d12: 4b29 ldr r3, [pc, #164] @ (8000db8 <MX_DFSDM1_Init+0xbc>)
8000d14: 2201 movs r2, #1
8000d16: 725a strb r2, [r3, #9]
hdfsdm1_filter0.Init.FilterParam.SincOrder = DFSDM_FILTER_SINC4_ORDER;
8000d18: 4b27 ldr r3, [pc, #156] @ (8000db8 <MX_DFSDM1_Init+0xbc>)
8000d1a: f04f 4200 mov.w r2, #2147483648 @ 0x80000000
8000d1e: 61da str r2, [r3, #28]
hdfsdm1_filter0.Init.FilterParam.Oversampling = 32;
8000d20: 4b25 ldr r3, [pc, #148] @ (8000db8 <MX_DFSDM1_Init+0xbc>)
8000d22: 2220 movs r2, #32
8000d24: 621a str r2, [r3, #32]
hdfsdm1_filter0.Init.FilterParam.IntOversampling = 1;
8000d26: 4b24 ldr r3, [pc, #144] @ (8000db8 <MX_DFSDM1_Init+0xbc>)
8000d28: 2201 movs r2, #1
8000d2a: 625a str r2, [r3, #36] @ 0x24
if (HAL_DFSDM_FilterInit(&hdfsdm1_filter0) != HAL_OK)
8000d2c: 4822 ldr r0, [pc, #136] @ (8000db8 <MX_DFSDM1_Init+0xbc>)
8000d2e: f000 ff67 bl 8001c00 <HAL_DFSDM_FilterInit>
8000d32: 4603 mov r3, r0
8000d34: 2b00 cmp r3, #0
8000d36: d001 beq.n 8000d3c <MX_DFSDM1_Init+0x40>
{
Error_Handler();
8000d38: f000 f98d bl 8001056 <Error_Handler>
}
hdfsdm1_channel1.Instance = DFSDM1_Channel1;
8000d3c: 4b20 ldr r3, [pc, #128] @ (8000dc0 <MX_DFSDM1_Init+0xc4>)
8000d3e: 4a21 ldr r2, [pc, #132] @ (8000dc4 <MX_DFSDM1_Init+0xc8>)
8000d40: 601a str r2, [r3, #0]
hdfsdm1_channel1.Init.OutputClock.Activation = ENABLE;
8000d42: 4b1f ldr r3, [pc, #124] @ (8000dc0 <MX_DFSDM1_Init+0xc4>)
8000d44: 2201 movs r2, #1
8000d46: 711a strb r2, [r3, #4]
hdfsdm1_channel1.Init.OutputClock.Selection = DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO;
8000d48: 4b1d ldr r3, [pc, #116] @ (8000dc0 <MX_DFSDM1_Init+0xc4>)
8000d4a: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
8000d4e: 609a str r2, [r3, #8]
hdfsdm1_channel1.Init.OutputClock.Divider = 32;
8000d50: 4b1b ldr r3, [pc, #108] @ (8000dc0 <MX_DFSDM1_Init+0xc4>)
8000d52: 2220 movs r2, #32
8000d54: 60da str r2, [r3, #12]
hdfsdm1_channel1.Init.Input.Multiplexer = DFSDM_CHANNEL_EXTERNAL_INPUTS;
8000d56: 4b1a ldr r3, [pc, #104] @ (8000dc0 <MX_DFSDM1_Init+0xc4>)
8000d58: 2200 movs r2, #0
8000d5a: 611a str r2, [r3, #16]
hdfsdm1_channel1.Init.Input.DataPacking = DFSDM_CHANNEL_STANDARD_MODE;
8000d5c: 4b18 ldr r3, [pc, #96] @ (8000dc0 <MX_DFSDM1_Init+0xc4>)
8000d5e: 2200 movs r2, #0
8000d60: 615a str r2, [r3, #20]
hdfsdm1_channel1.Init.Input.Pins = DFSDM_CHANNEL_SAME_CHANNEL_PINS;
8000d62: 4b17 ldr r3, [pc, #92] @ (8000dc0 <MX_DFSDM1_Init+0xc4>)
8000d64: 2200 movs r2, #0
8000d66: 619a str r2, [r3, #24]
hdfsdm1_channel1.Init.SerialInterface.Type = DFSDM_CHANNEL_SPI_RISING;
8000d68: 4b15 ldr r3, [pc, #84] @ (8000dc0 <MX_DFSDM1_Init+0xc4>)
8000d6a: 2200 movs r2, #0
8000d6c: 61da str r2, [r3, #28]
hdfsdm1_channel1.Init.SerialInterface.SpiClock = DFSDM_CHANNEL_SPI_CLOCK_INTERNAL;
8000d6e: 4b14 ldr r3, [pc, #80] @ (8000dc0 <MX_DFSDM1_Init+0xc4>)
8000d70: 2204 movs r2, #4
8000d72: 621a str r2, [r3, #32]
hdfsdm1_channel1.Init.Awd.FilterOrder = DFSDM_CHANNEL_SINC1_ORDER;
8000d74: 4b12 ldr r3, [pc, #72] @ (8000dc0 <MX_DFSDM1_Init+0xc4>)
8000d76: f44f 0280 mov.w r2, #4194304 @ 0x400000
8000d7a: 625a str r2, [r3, #36] @ 0x24
hdfsdm1_channel1.Init.Awd.Oversampling = 10;
8000d7c: 4b10 ldr r3, [pc, #64] @ (8000dc0 <MX_DFSDM1_Init+0xc4>)
8000d7e: 220a movs r2, #10
8000d80: 629a str r2, [r3, #40] @ 0x28
hdfsdm1_channel1.Init.Offset = 0;
8000d82: 4b0f ldr r3, [pc, #60] @ (8000dc0 <MX_DFSDM1_Init+0xc4>)
8000d84: 2200 movs r2, #0
8000d86: 62da str r2, [r3, #44] @ 0x2c
hdfsdm1_channel1.Init.RightBitShift = 0x02;
8000d88: 4b0d ldr r3, [pc, #52] @ (8000dc0 <MX_DFSDM1_Init+0xc4>)
8000d8a: 2202 movs r2, #2
8000d8c: 631a str r2, [r3, #48] @ 0x30
if (HAL_DFSDM_ChannelInit(&hdfsdm1_channel1) != HAL_OK)
8000d8e: 480c ldr r0, [pc, #48] @ (8000dc0 <MX_DFSDM1_Init+0xc4>)
8000d90: f000 fe46 bl 8001a20 <HAL_DFSDM_ChannelInit>
8000d94: 4603 mov r3, r0
8000d96: 2b00 cmp r3, #0
8000d98: d001 beq.n 8000d9e <MX_DFSDM1_Init+0xa2>
{
Error_Handler();
8000d9a: f000 f95c bl 8001056 <Error_Handler>
}
if (HAL_DFSDM_FilterConfigRegChannel(&hdfsdm1_filter0, DFSDM_CHANNEL_1, DFSDM_CONTINUOUS_CONV_ON) != HAL_OK)
8000d9e: 2201 movs r2, #1
8000da0: 4909 ldr r1, [pc, #36] @ (8000dc8 <MX_DFSDM1_Init+0xcc>)
8000da2: 4805 ldr r0, [pc, #20] @ (8000db8 <MX_DFSDM1_Init+0xbc>)
8000da4: f001 f818 bl 8001dd8 <HAL_DFSDM_FilterConfigRegChannel>
8000da8: 4603 mov r3, r0
8000daa: 2b00 cmp r3, #0
8000dac: d001 beq.n 8000db2 <MX_DFSDM1_Init+0xb6>
{
Error_Handler();
8000dae: f000 f952 bl 8001056 <Error_Handler>
}
/* USER CODE BEGIN DFSDM1_Init 2 */
/* USER CODE END DFSDM1_Init 2 */
}
8000db2: bf00 nop
8000db4: bd80 pop {r7, pc}
8000db6: bf00 nop
8000db8: 2000f6a8 .word 0x2000f6a8
8000dbc: 40016100 .word 0x40016100
8000dc0: 2000f6fc .word 0x2000f6fc
8000dc4: 40016020 .word 0x40016020
8000dc8: 00010002 .word 0x00010002
08000dcc <MX_SDIO_MMC_Init>:
* @brief SDIO Initialization Function
* @param None
* @retval None
*/
static void MX_SDIO_MMC_Init(void)
{
8000dcc: b580 push {r7, lr}
8000dce: af00 add r7, sp, #0
/* USER CODE END SDIO_Init 0 */
/* USER CODE BEGIN SDIO_Init 1 */
/* USER CODE END SDIO_Init 1 */
hmmc.Instance = SDIO;
8000dd0: 4b15 ldr r3, [pc, #84] @ (8000e28 <MX_SDIO_MMC_Init+0x5c>)
8000dd2: 4a16 ldr r2, [pc, #88] @ (8000e2c <MX_SDIO_MMC_Init+0x60>)
8000dd4: 601a str r2, [r3, #0]
hmmc.Init.ClockEdge = SDIO_CLOCK_EDGE_RISING;
8000dd6: 4b14 ldr r3, [pc, #80] @ (8000e28 <MX_SDIO_MMC_Init+0x5c>)
8000dd8: 2200 movs r2, #0
8000dda: 605a str r2, [r3, #4]
hmmc.Init.ClockBypass = SDIO_CLOCK_BYPASS_DISABLE;
8000ddc: 4b12 ldr r3, [pc, #72] @ (8000e28 <MX_SDIO_MMC_Init+0x5c>)
8000dde: 2200 movs r2, #0
8000de0: 609a str r2, [r3, #8]
hmmc.Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE;
8000de2: 4b11 ldr r3, [pc, #68] @ (8000e28 <MX_SDIO_MMC_Init+0x5c>)
8000de4: 2200 movs r2, #0
8000de6: 60da str r2, [r3, #12]
hmmc.Init.BusWide = SDIO_BUS_WIDE_8B;
8000de8: 4b0f ldr r3, [pc, #60] @ (8000e28 <MX_SDIO_MMC_Init+0x5c>)
8000dea: f44f 5280 mov.w r2, #4096 @ 0x1000
8000dee: 611a str r2, [r3, #16]
hmmc.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_ENABLE;
8000df0: 4b0d ldr r3, [pc, #52] @ (8000e28 <MX_SDIO_MMC_Init+0x5c>)
8000df2: f44f 4280 mov.w r2, #16384 @ 0x4000
8000df6: 615a str r2, [r3, #20]
hmmc.Init.ClockDiv = 2;
8000df8: 4b0b ldr r3, [pc, #44] @ (8000e28 <MX_SDIO_MMC_Init+0x5c>)
8000dfa: 2202 movs r2, #2
8000dfc: 619a str r2, [r3, #24]
if (HAL_MMC_Init(&hmmc) != HAL_OK)
8000dfe: 480a ldr r0, [pc, #40] @ (8000e28 <MX_SDIO_MMC_Init+0x5c>)
8000e00: f002 f8b7 bl 8002f72 <HAL_MMC_Init>
8000e04: 4603 mov r3, r0
8000e06: 2b00 cmp r3, #0
8000e08: d001 beq.n 8000e0e <MX_SDIO_MMC_Init+0x42>
{
Error_Handler();
8000e0a: f000 f924 bl 8001056 <Error_Handler>
}
if (HAL_MMC_ConfigWideBusOperation(&hmmc, SDIO_BUS_WIDE_8B) != HAL_OK)
8000e0e: f44f 5180 mov.w r1, #4096 @ 0x1000
8000e12: 4805 ldr r0, [pc, #20] @ (8000e28 <MX_SDIO_MMC_Init+0x5c>)
8000e14: f002 ff5e bl 8003cd4 <HAL_MMC_ConfigWideBusOperation>
8000e18: 4603 mov r3, r0
8000e1a: 2b00 cmp r3, #0
8000e1c: d001 beq.n 8000e22 <MX_SDIO_MMC_Init+0x56>
{
Error_Handler();
8000e1e: f000 f91a bl 8001056 <Error_Handler>
}
/* USER CODE BEGIN SDIO_Init 2 */
/* USER CODE END SDIO_Init 2 */
}
8000e22: bf00 nop
8000e24: bd80 pop {r7, pc}
8000e26: bf00 nop
8000e28: 2000f794 .word 0x2000f794
8000e2c: 40012c00 .word 0x40012c00
08000e30 <MX_DMA_Init>:
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void)
{
8000e30: b580 push {r7, lr}
8000e32: b082 sub sp, #8
8000e34: af00 add r7, sp, #0
/* DMA controller clock enable */
__HAL_RCC_DMA2_CLK_ENABLE();
8000e36: 2300 movs r3, #0
8000e38: 607b str r3, [r7, #4]
8000e3a: 4b0c ldr r3, [pc, #48] @ (8000e6c <MX_DMA_Init+0x3c>)
8000e3c: 6b1b ldr r3, [r3, #48] @ 0x30
8000e3e: 4a0b ldr r2, [pc, #44] @ (8000e6c <MX_DMA_Init+0x3c>)
8000e40: f443 0380 orr.w r3, r3, #4194304 @ 0x400000
8000e44: 6313 str r3, [r2, #48] @ 0x30
8000e46: 4b09 ldr r3, [pc, #36] @ (8000e6c <MX_DMA_Init+0x3c>)
8000e48: 6b1b ldr r3, [r3, #48] @ 0x30
8000e4a: f403 0380 and.w r3, r3, #4194304 @ 0x400000
8000e4e: 607b str r3, [r7, #4]
8000e50: 687b ldr r3, [r7, #4]
/* DMA interrupt init */
/* DMA2_Stream0_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 5, 0);
8000e52: 2200 movs r2, #0
8000e54: 2105 movs r1, #5
8000e56: 2038 movs r0, #56 @ 0x38
8000e58: f000 fdaa bl 80019b0 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
8000e5c: 2038 movs r0, #56 @ 0x38
8000e5e: f000 fdc3 bl 80019e8 <HAL_NVIC_EnableIRQ>
}
8000e62: bf00 nop
8000e64: 3708 adds r7, #8
8000e66: 46bd mov sp, r7
8000e68: bd80 pop {r7, pc}
8000e6a: bf00 nop
8000e6c: 40023800 .word 0x40023800
08000e70 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
8000e70: b580 push {r7, lr}
8000e72: b08c sub sp, #48 @ 0x30
8000e74: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000e76: f107 031c add.w r3, r7, #28
8000e7a: 2200 movs r2, #0
8000e7c: 601a str r2, [r3, #0]
8000e7e: 605a str r2, [r3, #4]
8000e80: 609a str r2, [r3, #8]
8000e82: 60da str r2, [r3, #12]
8000e84: 611a str r2, [r3, #16]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOD_CLK_ENABLE();
8000e86: 2300 movs r3, #0
8000e88: 61bb str r3, [r7, #24]
8000e8a: 4b3c ldr r3, [pc, #240] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000e8c: 6b1b ldr r3, [r3, #48] @ 0x30
8000e8e: 4a3b ldr r2, [pc, #236] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000e90: f043 0308 orr.w r3, r3, #8
8000e94: 6313 str r3, [r2, #48] @ 0x30
8000e96: 4b39 ldr r3, [pc, #228] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000e98: 6b1b ldr r3, [r3, #48] @ 0x30
8000e9a: f003 0308 and.w r3, r3, #8
8000e9e: 61bb str r3, [r7, #24]
8000ea0: 69bb ldr r3, [r7, #24]
__HAL_RCC_GPIOA_CLK_ENABLE();
8000ea2: 2300 movs r3, #0
8000ea4: 617b str r3, [r7, #20]
8000ea6: 4b35 ldr r3, [pc, #212] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000ea8: 6b1b ldr r3, [r3, #48] @ 0x30
8000eaa: 4a34 ldr r2, [pc, #208] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000eac: f043 0301 orr.w r3, r3, #1
8000eb0: 6313 str r3, [r2, #48] @ 0x30
8000eb2: 4b32 ldr r3, [pc, #200] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000eb4: 6b1b ldr r3, [r3, #48] @ 0x30
8000eb6: f003 0301 and.w r3, r3, #1
8000eba: 617b str r3, [r7, #20]
8000ebc: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOB_CLK_ENABLE();
8000ebe: 2300 movs r3, #0
8000ec0: 613b str r3, [r7, #16]
8000ec2: 4b2e ldr r3, [pc, #184] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000ec4: 6b1b ldr r3, [r3, #48] @ 0x30
8000ec6: 4a2d ldr r2, [pc, #180] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000ec8: f043 0302 orr.w r3, r3, #2
8000ecc: 6313 str r3, [r2, #48] @ 0x30
8000ece: 4b2b ldr r3, [pc, #172] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000ed0: 6b1b ldr r3, [r3, #48] @ 0x30
8000ed2: f003 0302 and.w r3, r3, #2
8000ed6: 613b str r3, [r7, #16]
8000ed8: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOC_CLK_ENABLE();
8000eda: 2300 movs r3, #0
8000edc: 60fb str r3, [r7, #12]
8000ede: 4b27 ldr r3, [pc, #156] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000ee0: 6b1b ldr r3, [r3, #48] @ 0x30
8000ee2: 4a26 ldr r2, [pc, #152] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000ee4: f043 0304 orr.w r3, r3, #4
8000ee8: 6313 str r3, [r2, #48] @ 0x30
8000eea: 4b24 ldr r3, [pc, #144] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000eec: 6b1b ldr r3, [r3, #48] @ 0x30
8000eee: f003 0304 and.w r3, r3, #4
8000ef2: 60fb str r3, [r7, #12]
8000ef4: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOH_CLK_ENABLE();
8000ef6: 2300 movs r3, #0
8000ef8: 60bb str r3, [r7, #8]
8000efa: 4b20 ldr r3, [pc, #128] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000efc: 6b1b ldr r3, [r3, #48] @ 0x30
8000efe: 4a1f ldr r2, [pc, #124] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000f00: f043 0380 orr.w r3, r3, #128 @ 0x80
8000f04: 6313 str r3, [r2, #48] @ 0x30
8000f06: 4b1d ldr r3, [pc, #116] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000f08: 6b1b ldr r3, [r3, #48] @ 0x30
8000f0a: f003 0380 and.w r3, r3, #128 @ 0x80
8000f0e: 60bb str r3, [r7, #8]
8000f10: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOF_CLK_ENABLE();
8000f12: 2300 movs r3, #0
8000f14: 607b str r3, [r7, #4]
8000f16: 4b19 ldr r3, [pc, #100] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000f18: 6b1b ldr r3, [r3, #48] @ 0x30
8000f1a: 4a18 ldr r2, [pc, #96] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000f1c: f043 0320 orr.w r3, r3, #32
8000f20: 6313 str r3, [r2, #48] @ 0x30
8000f22: 4b16 ldr r3, [pc, #88] @ (8000f7c <MX_GPIO_Init+0x10c>)
8000f24: 6b1b ldr r3, [r3, #48] @ 0x30
8000f26: f003 0320 and.w r3, r3, #32
8000f2a: 607b str r3, [r7, #4]
8000f2c: 687b ldr r3, [r7, #4]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(USER_LED_GPIO_Port, USER_LED_Pin, GPIO_PIN_RESET);
8000f2e: 2200 movs r2, #0
8000f30: f44f 6180 mov.w r1, #1024 @ 0x400
8000f34: 4812 ldr r0, [pc, #72] @ (8000f80 <MX_GPIO_Init+0x110>)
8000f36: f002 f803 bl 8002f40 <HAL_GPIO_WritePin>
/*Configure GPIO pin : USER_BUTTON_Pin */
GPIO_InitStruct.Pin = USER_BUTTON_Pin;
8000f3a: f44f 6380 mov.w r3, #1024 @ 0x400
8000f3e: 61fb str r3, [r7, #28]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8000f40: 2300 movs r3, #0
8000f42: 623b str r3, [r7, #32]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000f44: 2300 movs r3, #0
8000f46: 627b str r3, [r7, #36] @ 0x24
HAL_GPIO_Init(USER_BUTTON_GPIO_Port, &GPIO_InitStruct);
8000f48: f107 031c add.w r3, r7, #28
8000f4c: 4619 mov r1, r3
8000f4e: 480d ldr r0, [pc, #52] @ (8000f84 <MX_GPIO_Init+0x114>)
8000f50: f001 fd56 bl 8002a00 <HAL_GPIO_Init>
/*Configure GPIO pin : USER_LED_Pin */
GPIO_InitStruct.Pin = USER_LED_Pin;
8000f54: f44f 6380 mov.w r3, #1024 @ 0x400
8000f58: 61fb str r3, [r7, #28]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000f5a: 2301 movs r3, #1
8000f5c: 623b str r3, [r7, #32]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000f5e: 2300 movs r3, #0
8000f60: 627b str r3, [r7, #36] @ 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000f62: 2300 movs r3, #0
8000f64: 62bb str r3, [r7, #40] @ 0x28
HAL_GPIO_Init(USER_LED_GPIO_Port, &GPIO_InitStruct);
8000f66: f107 031c add.w r3, r7, #28
8000f6a: 4619 mov r1, r3
8000f6c: 4804 ldr r0, [pc, #16] @ (8000f80 <MX_GPIO_Init+0x110>)
8000f6e: f001 fd47 bl 8002a00 <HAL_GPIO_Init>
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
8000f72: bf00 nop
8000f74: 3730 adds r7, #48 @ 0x30
8000f76: 46bd mov sp, r7
8000f78: bd80 pop {r7, pc}
8000f7a: bf00 nop
8000f7c: 40023800 .word 0x40023800
8000f80: 40021400 .word 0x40021400
8000f84: 40020000 .word 0x40020000
08000f88 <StartDefaultTask>:
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_StartDefaultTask */
void StartDefaultTask(void const * argument)
{
8000f88: b580 push {r7, lr}
8000f8a: b082 sub sp, #8
8000f8c: af00 add r7, sp, #0
8000f8e: 6078 str r0, [r7, #4]
/* init code for USB_DEVICE */
MX_USB_DEVICE_Init();
8000f90: f011 fa80 bl 8012494 <MX_USB_DEVICE_Init>
/* USER CODE BEGIN 5 */
/* Infinite loop */
for(;;)
{
osDelay(1);
8000f94: 2001 movs r0, #1
8000f96: f00e fe8b bl 800fcb0 <osDelay>
8000f9a: e7fb b.n 8000f94 <StartDefaultTask+0xc>
08000f9c <StartTask02>:
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_StartTask02 */
void StartTask02(void const * argument)
{
8000f9c: b580 push {r7, lr}
8000f9e: b082 sub sp, #8
8000fa0: af00 add r7, sp, #0
8000fa2: 6078 str r0, [r7, #4]
/* USER CODE BEGIN StartTask02 */
ret = FMounteMMC();
8000fa4: f007 ff44 bl 8008e30 <FMounteMMC>
8000fa8: 4603 mov r3, r0
8000faa: 461a mov r2, r3
8000fac: 4b1e ldr r3, [pc, #120] @ (8001028 <StartTask02+0x8c>)
8000fae: 701a strb r2, [r3, #0]
if(ret != 0){
8000fb0: 4b1d ldr r3, [pc, #116] @ (8001028 <StartTask02+0x8c>)
8000fb2: 781b ldrb r3, [r3, #0]
8000fb4: 2b00 cmp r3, #0
8000fb6: d001 beq.n 8000fbc <StartTask02+0x20>
while(1);
8000fb8: bf00 nop
8000fba: e7fd b.n 8000fb8 <StartTask02+0x1c>
//
// flag = 0;
// }
// HAL_GPIO_TogglePin(USER_LED_GPIO_Port, USER_LED_Pin);
if(HAL_GPIO_ReadPin(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin) == 0){
8000fbc: f44f 6180 mov.w r1, #1024 @ 0x400
8000fc0: 481a ldr r0, [pc, #104] @ (800102c <StartTask02+0x90>)
8000fc2: f001 ffa5 bl 8002f10 <HAL_GPIO_ReadPin>
8000fc6: 4603 mov r3, r0
8000fc8: 2b00 cmp r3, #0
8000fca: d102 bne.n 8000fd2 <StartTask02+0x36>
flagg = 1;
8000fcc: 4b18 ldr r3, [pc, #96] @ (8001030 <StartTask02+0x94>)
8000fce: 2201 movs r2, #1
8000fd0: 701a strb r2, [r3, #0]
}
if(flagg == 1 && (HAL_GPIO_ReadPin(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin) == 1)){
8000fd2: 4b17 ldr r3, [pc, #92] @ (8001030 <StartTask02+0x94>)
8000fd4: 781b ldrb r3, [r3, #0]
8000fd6: 2b01 cmp r3, #1
8000fd8: d121 bne.n 800101e <StartTask02+0x82>
8000fda: f44f 6180 mov.w r1, #1024 @ 0x400
8000fde: 4813 ldr r0, [pc, #76] @ (800102c <StartTask02+0x90>)
8000fe0: f001 ff96 bl 8002f10 <HAL_GPIO_ReadPin>
8000fe4: 4603 mov r3, r0
8000fe6: 2b01 cmp r3, #1
8000fe8: d119 bne.n 800101e <StartTask02+0x82>
flagg = 0;
8000fea: 4b11 ldr r3, [pc, #68] @ (8001030 <StartTask02+0x94>)
8000fec: 2200 movs r2, #0
8000fee: 701a strb r2, [r3, #0]
count++;
8000ff0: 4b10 ldr r3, [pc, #64] @ (8001034 <StartTask02+0x98>)
8000ff2: 681b ldr r3, [r3, #0]
8000ff4: 3301 adds r3, #1
8000ff6: 4a0f ldr r2, [pc, #60] @ (8001034 <StartTask02+0x98>)
8000ff8: 6013 str r3, [r2, #0]
if(count%2 == 1){
8000ffa: 4b0e ldr r3, [pc, #56] @ (8001034 <StartTask02+0x98>)
8000ffc: 681b ldr r3, [r3, #0]
8000ffe: 2b00 cmp r3, #0
8001000: f003 0301 and.w r3, r3, #1
8001004: bfb8 it lt
8001006: 425b neglt r3, r3
8001008: 2b01 cmp r3, #1
800100a: d104 bne.n 8001016 <StartTask02+0x7a>
MX_USB_DEVICE_DeInit();
800100c: f011 fa2c bl 8012468 <MX_USB_DEVICE_DeInit>
Start_DFSDM_Recording();
8001010: f7ff fc8e bl 8000930 <Start_DFSDM_Recording>
8001014: e003 b.n 800101e <StartTask02+0x82>
}
else{
AUDIO_RECORDER_StopRec();
8001016: f7ff fd25 bl 8000a64 <AUDIO_RECORDER_StopRec>
MX_USB_DEVICE_Init();
800101a: f011 fa3b bl 8012494 <MX_USB_DEVICE_Init>
}
}
osDelay(1);
800101e: 2001 movs r0, #1
8001020: f00e fe46 bl 800fcb0 <osDelay>
if(HAL_GPIO_ReadPin(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin) == 0){
8001024: e7ca b.n 8000fbc <StartTask02+0x20>
8001026: bf00 nop
8001028: 2000fa21 .word 0x2000fa21
800102c: 40020000 .word 0x40020000
8001030: 2000fa20 .word 0x2000fa20
8001034: 2000fa1c .word 0x2000fa1c
08001038 <HAL_TIM_PeriodElapsedCallback>:
* a global variable "uwTick" used as application time base.
* @param htim : TIM handle
* @retval None
*/
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
8001038: b580 push {r7, lr}
800103a: b082 sub sp, #8
800103c: af00 add r7, sp, #0
800103e: 6078 str r0, [r7, #4]
/* USER CODE BEGIN Callback 0 */
/* USER CODE END Callback 0 */
if (htim->Instance == TIM2) {
8001040: 687b ldr r3, [r7, #4]
8001042: 681b ldr r3, [r3, #0]
8001044: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8001048: d101 bne.n 800104e <HAL_TIM_PeriodElapsedCallback+0x16>
HAL_IncTick();
800104a: f000 fb91 bl 8001770 <HAL_IncTick>
}
/* USER CODE BEGIN Callback 1 */
/* USER CODE END Callback 1 */
}
800104e: bf00 nop
8001050: 3708 adds r7, #8
8001052: 46bd mov sp, r7
8001054: bd80 pop {r7, pc}
08001056 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8001056: b480 push {r7}
8001058: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting special-purpose register PRIMASK.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
800105a: b672 cpsid i
}
800105c: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
800105e: bf00 nop
8001060: e7fd b.n 800105e <Error_Handler+0x8>
...
08001064 <HAL_MspInit>:
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8001064: b580 push {r7, lr}
8001066: b082 sub sp, #8
8001068: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
800106a: 2300 movs r3, #0
800106c: 607b str r3, [r7, #4]
800106e: 4b12 ldr r3, [pc, #72] @ (80010b8 <HAL_MspInit+0x54>)
8001070: 6c5b ldr r3, [r3, #68] @ 0x44
8001072: 4a11 ldr r2, [pc, #68] @ (80010b8 <HAL_MspInit+0x54>)
8001074: f443 4380 orr.w r3, r3, #16384 @ 0x4000
8001078: 6453 str r3, [r2, #68] @ 0x44
800107a: 4b0f ldr r3, [pc, #60] @ (80010b8 <HAL_MspInit+0x54>)
800107c: 6c5b ldr r3, [r3, #68] @ 0x44
800107e: f403 4380 and.w r3, r3, #16384 @ 0x4000
8001082: 607b str r3, [r7, #4]
8001084: 687b ldr r3, [r7, #4]
__HAL_RCC_PWR_CLK_ENABLE();
8001086: 2300 movs r3, #0
8001088: 603b str r3, [r7, #0]
800108a: 4b0b ldr r3, [pc, #44] @ (80010b8 <HAL_MspInit+0x54>)
800108c: 6c1b ldr r3, [r3, #64] @ 0x40
800108e: 4a0a ldr r2, [pc, #40] @ (80010b8 <HAL_MspInit+0x54>)
8001090: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8001094: 6413 str r3, [r2, #64] @ 0x40
8001096: 4b08 ldr r3, [pc, #32] @ (80010b8 <HAL_MspInit+0x54>)
8001098: 6c1b ldr r3, [r3, #64] @ 0x40
800109a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800109e: 603b str r3, [r7, #0]
80010a0: 683b ldr r3, [r7, #0]
/* System interrupt init*/
/* PendSV_IRQn interrupt configuration */
HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
80010a2: 2200 movs r2, #0
80010a4: 210f movs r1, #15
80010a6: f06f 0001 mvn.w r0, #1
80010aa: f000 fc81 bl 80019b0 <HAL_NVIC_SetPriority>
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
80010ae: bf00 nop
80010b0: 3708 adds r7, #8
80010b2: 46bd mov sp, r7
80010b4: bd80 pop {r7, pc}
80010b6: bf00 nop
80010b8: 40023800 .word 0x40023800
080010bc <HAL_DFSDM_FilterMspInit>:
* This function configures the hardware resources used in this example
* @param hdfsdm_filter: DFSDM_Filter handle pointer
* @retval None
*/
void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
{
80010bc: b580 push {r7, lr}
80010be: b08a sub sp, #40 @ 0x28
80010c0: af00 add r7, sp, #0
80010c2: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
80010c4: f107 0314 add.w r3, r7, #20
80010c8: 2200 movs r2, #0
80010ca: 601a str r2, [r3, #0]
80010cc: 605a str r2, [r3, #4]
80010ce: 609a str r2, [r3, #8]
80010d0: 60da str r2, [r3, #12]
80010d2: 611a str r2, [r3, #16]
if((IS_DFSDM1_FILTER_INSTANCE(hdfsdm_filter->Instance))&&(DFSDM1_Init == 0))
80010d4: 687b ldr r3, [r7, #4]
80010d6: 681b ldr r3, [r3, #0]
80010d8: 4a51 ldr r2, [pc, #324] @ (8001220 <HAL_DFSDM_FilterMspInit+0x164>)
80010da: 4293 cmp r3, r2
80010dc: d004 beq.n 80010e8 <HAL_DFSDM_FilterMspInit+0x2c>
80010de: 687b ldr r3, [r7, #4]
80010e0: 681b ldr r3, [r3, #0]
80010e2: 4a50 ldr r2, [pc, #320] @ (8001224 <HAL_DFSDM_FilterMspInit+0x168>)
80010e4: 4293 cmp r3, r2
80010e6: d15b bne.n 80011a0 <HAL_DFSDM_FilterMspInit+0xe4>
80010e8: 4b4f ldr r3, [pc, #316] @ (8001228 <HAL_DFSDM_FilterMspInit+0x16c>)
80010ea: 681b ldr r3, [r3, #0]
80010ec: 2b00 cmp r3, #0
80010ee: d157 bne.n 80011a0 <HAL_DFSDM_FilterMspInit+0xe4>
{
/* USER CODE BEGIN DFSDM1_MspInit 0 */
/* USER CODE END DFSDM1_MspInit 0 */
/* Peripheral clock enable */
HAL_RCC_DFSDM1_CLK_ENABLED++;
80010f0: 4b4e ldr r3, [pc, #312] @ (800122c <HAL_DFSDM_FilterMspInit+0x170>)
80010f2: 681b ldr r3, [r3, #0]
80010f4: 3301 adds r3, #1
80010f6: 4a4d ldr r2, [pc, #308] @ (800122c <HAL_DFSDM_FilterMspInit+0x170>)
80010f8: 6013 str r3, [r2, #0]
if(HAL_RCC_DFSDM1_CLK_ENABLED==1){
80010fa: 4b4c ldr r3, [pc, #304] @ (800122c <HAL_DFSDM_FilterMspInit+0x170>)
80010fc: 681b ldr r3, [r3, #0]
80010fe: 2b01 cmp r3, #1
8001100: d10d bne.n 800111e <HAL_DFSDM_FilterMspInit+0x62>
__HAL_RCC_DFSDM1_CLK_ENABLE();
8001102: 2300 movs r3, #0
8001104: 613b str r3, [r7, #16]
8001106: 4b4a ldr r3, [pc, #296] @ (8001230 <HAL_DFSDM_FilterMspInit+0x174>)
8001108: 6c5b ldr r3, [r3, #68] @ 0x44
800110a: 4a49 ldr r2, [pc, #292] @ (8001230 <HAL_DFSDM_FilterMspInit+0x174>)
800110c: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000
8001110: 6453 str r3, [r2, #68] @ 0x44
8001112: 4b47 ldr r3, [pc, #284] @ (8001230 <HAL_DFSDM_FilterMspInit+0x174>)
8001114: 6c5b ldr r3, [r3, #68] @ 0x44
8001116: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
800111a: 613b str r3, [r7, #16]
800111c: 693b ldr r3, [r7, #16]
}
__HAL_RCC_GPIOD_CLK_ENABLE();
800111e: 2300 movs r3, #0
8001120: 60fb str r3, [r7, #12]
8001122: 4b43 ldr r3, [pc, #268] @ (8001230 <HAL_DFSDM_FilterMspInit+0x174>)
8001124: 6b1b ldr r3, [r3, #48] @ 0x30
8001126: 4a42 ldr r2, [pc, #264] @ (8001230 <HAL_DFSDM_FilterMspInit+0x174>)
8001128: f043 0308 orr.w r3, r3, #8
800112c: 6313 str r3, [r2, #48] @ 0x30
800112e: 4b40 ldr r3, [pc, #256] @ (8001230 <HAL_DFSDM_FilterMspInit+0x174>)
8001130: 6b1b ldr r3, [r3, #48] @ 0x30
8001132: f003 0308 and.w r3, r3, #8
8001136: 60fb str r3, [r7, #12]
8001138: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOC_CLK_ENABLE();
800113a: 2300 movs r3, #0
800113c: 60bb str r3, [r7, #8]
800113e: 4b3c ldr r3, [pc, #240] @ (8001230 <HAL_DFSDM_FilterMspInit+0x174>)
8001140: 6b1b ldr r3, [r3, #48] @ 0x30
8001142: 4a3b ldr r2, [pc, #236] @ (8001230 <HAL_DFSDM_FilterMspInit+0x174>)
8001144: f043 0304 orr.w r3, r3, #4
8001148: 6313 str r3, [r2, #48] @ 0x30
800114a: 4b39 ldr r3, [pc, #228] @ (8001230 <HAL_DFSDM_FilterMspInit+0x174>)
800114c: 6b1b ldr r3, [r3, #48] @ 0x30
800114e: f003 0304 and.w r3, r3, #4
8001152: 60bb str r3, [r7, #8]
8001154: 68bb ldr r3, [r7, #8]
/**DFSDM1 GPIO Configuration
PD6 ------> DFSDM1_DATIN1
PC2 ------> DFSDM1_CKOUT
*/
GPIO_InitStruct.Pin = GPIO_PIN_6;
8001156: 2340 movs r3, #64 @ 0x40
8001158: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
800115a: 2302 movs r3, #2
800115c: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
800115e: 2300 movs r3, #0
8001160: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8001162: 2300 movs r3, #0
8001164: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF6_DFSDM1;
8001166: 2306 movs r3, #6
8001168: 627b str r3, [r7, #36] @ 0x24
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
800116a: f107 0314 add.w r3, r7, #20
800116e: 4619 mov r1, r3
8001170: 4830 ldr r0, [pc, #192] @ (8001234 <HAL_DFSDM_FilterMspInit+0x178>)
8001172: f001 fc45 bl 8002a00 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_2;
8001176: 2304 movs r3, #4
8001178: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
800117a: 2302 movs r3, #2
800117c: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
800117e: 2300 movs r3, #0
8001180: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8001182: 2300 movs r3, #0
8001184: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF8_DFSDM1;
8001186: 2308 movs r3, #8
8001188: 627b str r3, [r7, #36] @ 0x24
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
800118a: f107 0314 add.w r3, r7, #20
800118e: 4619 mov r1, r3
8001190: 4829 ldr r0, [pc, #164] @ (8001238 <HAL_DFSDM_FilterMspInit+0x17c>)
8001192: f001 fc35 bl 8002a00 <HAL_GPIO_Init>
/* USER CODE BEGIN DFSDM1_MspInit 1 */
/* USER CODE END DFSDM1_MspInit 1 */
DFSDM1_Init++;
8001196: 4b24 ldr r3, [pc, #144] @ (8001228 <HAL_DFSDM_FilterMspInit+0x16c>)
8001198: 681b ldr r3, [r3, #0]
800119a: 3301 adds r3, #1
800119c: 4a22 ldr r2, [pc, #136] @ (8001228 <HAL_DFSDM_FilterMspInit+0x16c>)
800119e: 6013 str r3, [r2, #0]
}
/* DFSDM1 DMA Init */
/* DFSDM1_FLT0 Init */
if(hdfsdm_filter->Instance == DFSDM1_Filter0){
80011a0: 687b ldr r3, [r7, #4]
80011a2: 681b ldr r3, [r3, #0]
80011a4: 4a1e ldr r2, [pc, #120] @ (8001220 <HAL_DFSDM_FilterMspInit+0x164>)
80011a6: 4293 cmp r3, r2
80011a8: d136 bne.n 8001218 <HAL_DFSDM_FilterMspInit+0x15c>
hdma_dfsdm1_flt0.Instance = DMA2_Stream0;
80011aa: 4b24 ldr r3, [pc, #144] @ (800123c <HAL_DFSDM_FilterMspInit+0x180>)
80011ac: 4a24 ldr r2, [pc, #144] @ (8001240 <HAL_DFSDM_FilterMspInit+0x184>)
80011ae: 601a str r2, [r3, #0]
hdma_dfsdm1_flt0.Init.Channel = DMA_CHANNEL_7;
80011b0: 4b22 ldr r3, [pc, #136] @ (800123c <HAL_DFSDM_FilterMspInit+0x180>)
80011b2: f04f 6260 mov.w r2, #234881024 @ 0xe000000
80011b6: 605a str r2, [r3, #4]
hdma_dfsdm1_flt0.Init.Direction = DMA_PERIPH_TO_MEMORY;
80011b8: 4b20 ldr r3, [pc, #128] @ (800123c <HAL_DFSDM_FilterMspInit+0x180>)
80011ba: 2200 movs r2, #0
80011bc: 609a str r2, [r3, #8]
hdma_dfsdm1_flt0.Init.PeriphInc = DMA_PINC_DISABLE;
80011be: 4b1f ldr r3, [pc, #124] @ (800123c <HAL_DFSDM_FilterMspInit+0x180>)
80011c0: 2200 movs r2, #0
80011c2: 60da str r2, [r3, #12]
hdma_dfsdm1_flt0.Init.MemInc = DMA_MINC_ENABLE;
80011c4: 4b1d ldr r3, [pc, #116] @ (800123c <HAL_DFSDM_FilterMspInit+0x180>)
80011c6: f44f 6280 mov.w r2, #1024 @ 0x400
80011ca: 611a str r2, [r3, #16]
hdma_dfsdm1_flt0.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
80011cc: 4b1b ldr r3, [pc, #108] @ (800123c <HAL_DFSDM_FilterMspInit+0x180>)
80011ce: f44f 5280 mov.w r2, #4096 @ 0x1000
80011d2: 615a str r2, [r3, #20]
hdma_dfsdm1_flt0.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
80011d4: 4b19 ldr r3, [pc, #100] @ (800123c <HAL_DFSDM_FilterMspInit+0x180>)
80011d6: f44f 4280 mov.w r2, #16384 @ 0x4000
80011da: 619a str r2, [r3, #24]
hdma_dfsdm1_flt0.Init.Mode = DMA_CIRCULAR;
80011dc: 4b17 ldr r3, [pc, #92] @ (800123c <HAL_DFSDM_FilterMspInit+0x180>)
80011de: f44f 7280 mov.w r2, #256 @ 0x100
80011e2: 61da str r2, [r3, #28]
hdma_dfsdm1_flt0.Init.Priority = DMA_PRIORITY_LOW;
80011e4: 4b15 ldr r3, [pc, #84] @ (800123c <HAL_DFSDM_FilterMspInit+0x180>)
80011e6: 2200 movs r2, #0
80011e8: 621a str r2, [r3, #32]
hdma_dfsdm1_flt0.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
80011ea: 4b14 ldr r3, [pc, #80] @ (800123c <HAL_DFSDM_FilterMspInit+0x180>)
80011ec: 2200 movs r2, #0
80011ee: 625a str r2, [r3, #36] @ 0x24
if (HAL_DMA_Init(&hdma_dfsdm1_flt0) != HAL_OK)
80011f0: 4812 ldr r0, [pc, #72] @ (800123c <HAL_DFSDM_FilterMspInit+0x180>)
80011f2: f001 f825 bl 8002240 <HAL_DMA_Init>
80011f6: 4603 mov r3, r0
80011f8: 2b00 cmp r3, #0
80011fa: d001 beq.n 8001200 <HAL_DFSDM_FilterMspInit+0x144>
{
Error_Handler();
80011fc: f7ff ff2b bl 8001056 <Error_Handler>
}
/* Several peripheral DMA handle pointers point to the same DMA handle.
Be aware that there is only one stream to perform all the requested DMAs. */
__HAL_LINKDMA(hdfsdm_filter,hdmaInj,hdma_dfsdm1_flt0);
8001200: 687b ldr r3, [r7, #4]
8001202: 4a0e ldr r2, [pc, #56] @ (800123c <HAL_DFSDM_FilterMspInit+0x180>)
8001204: 62da str r2, [r3, #44] @ 0x2c
8001206: 4a0d ldr r2, [pc, #52] @ (800123c <HAL_DFSDM_FilterMspInit+0x180>)
8001208: 687b ldr r3, [r7, #4]
800120a: 6393 str r3, [r2, #56] @ 0x38
__HAL_LINKDMA(hdfsdm_filter,hdmaReg,hdma_dfsdm1_flt0);
800120c: 687b ldr r3, [r7, #4]
800120e: 4a0b ldr r2, [pc, #44] @ (800123c <HAL_DFSDM_FilterMspInit+0x180>)
8001210: 629a str r2, [r3, #40] @ 0x28
8001212: 4a0a ldr r2, [pc, #40] @ (800123c <HAL_DFSDM_FilterMspInit+0x180>)
8001214: 687b ldr r3, [r7, #4]
8001216: 6393 str r3, [r2, #56] @ 0x38
}
}
8001218: bf00 nop
800121a: 3728 adds r7, #40 @ 0x28
800121c: 46bd mov sp, r7
800121e: bd80 pop {r7, pc}
8001220: 40016100 .word 0x40016100
8001224: 40016180 .word 0x40016180
8001228: 2000fa28 .word 0x2000fa28
800122c: 2000fa24 .word 0x2000fa24
8001230: 40023800 .word 0x40023800
8001234: 40020c00 .word 0x40020c00
8001238: 40020800 .word 0x40020800
800123c: 2000f734 .word 0x2000f734
8001240: 40026410 .word 0x40026410
08001244 <HAL_DFSDM_ChannelMspInit>:
* This function configures the hardware resources used in this example
* @param hdfsdm_channel: DFSDM_Channel handle pointer
* @retval None
*/
void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef* hdfsdm_channel)
{
8001244: b580 push {r7, lr}
8001246: b08a sub sp, #40 @ 0x28
8001248: af00 add r7, sp, #0
800124a: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
800124c: f107 0314 add.w r3, r7, #20
8001250: 2200 movs r2, #0
8001252: 601a str r2, [r3, #0]
8001254: 605a str r2, [r3, #4]
8001256: 609a str r2, [r3, #8]
8001258: 60da str r2, [r3, #12]
800125a: 611a str r2, [r3, #16]
if((IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))&&(DFSDM1_Init == 0))
800125c: 687b ldr r3, [r7, #4]
800125e: 681b ldr r3, [r3, #0]
8001260: 4a38 ldr r2, [pc, #224] @ (8001344 <HAL_DFSDM_ChannelMspInit+0x100>)
8001262: 4293 cmp r3, r2
8001264: d00e beq.n 8001284 <HAL_DFSDM_ChannelMspInit+0x40>
8001266: 687b ldr r3, [r7, #4]
8001268: 681b ldr r3, [r3, #0]
800126a: 4a37 ldr r2, [pc, #220] @ (8001348 <HAL_DFSDM_ChannelMspInit+0x104>)
800126c: 4293 cmp r3, r2
800126e: d009 beq.n 8001284 <HAL_DFSDM_ChannelMspInit+0x40>
8001270: 687b ldr r3, [r7, #4]
8001272: 681b ldr r3, [r3, #0]
8001274: 4a35 ldr r2, [pc, #212] @ (800134c <HAL_DFSDM_ChannelMspInit+0x108>)
8001276: 4293 cmp r3, r2
8001278: d004 beq.n 8001284 <HAL_DFSDM_ChannelMspInit+0x40>
800127a: 687b ldr r3, [r7, #4]
800127c: 681b ldr r3, [r3, #0]
800127e: 4a34 ldr r2, [pc, #208] @ (8001350 <HAL_DFSDM_ChannelMspInit+0x10c>)
8001280: 4293 cmp r3, r2
8001282: d15b bne.n 800133c <HAL_DFSDM_ChannelMspInit+0xf8>
8001284: 4b33 ldr r3, [pc, #204] @ (8001354 <HAL_DFSDM_ChannelMspInit+0x110>)
8001286: 681b ldr r3, [r3, #0]
8001288: 2b00 cmp r3, #0
800128a: d157 bne.n 800133c <HAL_DFSDM_ChannelMspInit+0xf8>
{
/* USER CODE BEGIN DFSDM1_MspInit 0 */
/* USER CODE END DFSDM1_MspInit 0 */
/* Peripheral clock enable */
HAL_RCC_DFSDM1_CLK_ENABLED++;
800128c: 4b32 ldr r3, [pc, #200] @ (8001358 <HAL_DFSDM_ChannelMspInit+0x114>)
800128e: 681b ldr r3, [r3, #0]
8001290: 3301 adds r3, #1
8001292: 4a31 ldr r2, [pc, #196] @ (8001358 <HAL_DFSDM_ChannelMspInit+0x114>)
8001294: 6013 str r3, [r2, #0]
if(HAL_RCC_DFSDM1_CLK_ENABLED==1){
8001296: 4b30 ldr r3, [pc, #192] @ (8001358 <HAL_DFSDM_ChannelMspInit+0x114>)
8001298: 681b ldr r3, [r3, #0]
800129a: 2b01 cmp r3, #1
800129c: d10d bne.n 80012ba <HAL_DFSDM_ChannelMspInit+0x76>
__HAL_RCC_DFSDM1_CLK_ENABLE();
800129e: 2300 movs r3, #0
80012a0: 613b str r3, [r7, #16]
80012a2: 4b2e ldr r3, [pc, #184] @ (800135c <HAL_DFSDM_ChannelMspInit+0x118>)
80012a4: 6c5b ldr r3, [r3, #68] @ 0x44
80012a6: 4a2d ldr r2, [pc, #180] @ (800135c <HAL_DFSDM_ChannelMspInit+0x118>)
80012a8: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000
80012ac: 6453 str r3, [r2, #68] @ 0x44
80012ae: 4b2b ldr r3, [pc, #172] @ (800135c <HAL_DFSDM_ChannelMspInit+0x118>)
80012b0: 6c5b ldr r3, [r3, #68] @ 0x44
80012b2: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
80012b6: 613b str r3, [r7, #16]
80012b8: 693b ldr r3, [r7, #16]
}
__HAL_RCC_GPIOD_CLK_ENABLE();
80012ba: 2300 movs r3, #0
80012bc: 60fb str r3, [r7, #12]
80012be: 4b27 ldr r3, [pc, #156] @ (800135c <HAL_DFSDM_ChannelMspInit+0x118>)
80012c0: 6b1b ldr r3, [r3, #48] @ 0x30
80012c2: 4a26 ldr r2, [pc, #152] @ (800135c <HAL_DFSDM_ChannelMspInit+0x118>)
80012c4: f043 0308 orr.w r3, r3, #8
80012c8: 6313 str r3, [r2, #48] @ 0x30
80012ca: 4b24 ldr r3, [pc, #144] @ (800135c <HAL_DFSDM_ChannelMspInit+0x118>)
80012cc: 6b1b ldr r3, [r3, #48] @ 0x30
80012ce: f003 0308 and.w r3, r3, #8
80012d2: 60fb str r3, [r7, #12]
80012d4: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOC_CLK_ENABLE();
80012d6: 2300 movs r3, #0
80012d8: 60bb str r3, [r7, #8]
80012da: 4b20 ldr r3, [pc, #128] @ (800135c <HAL_DFSDM_ChannelMspInit+0x118>)
80012dc: 6b1b ldr r3, [r3, #48] @ 0x30
80012de: 4a1f ldr r2, [pc, #124] @ (800135c <HAL_DFSDM_ChannelMspInit+0x118>)
80012e0: f043 0304 orr.w r3, r3, #4
80012e4: 6313 str r3, [r2, #48] @ 0x30
80012e6: 4b1d ldr r3, [pc, #116] @ (800135c <HAL_DFSDM_ChannelMspInit+0x118>)
80012e8: 6b1b ldr r3, [r3, #48] @ 0x30
80012ea: f003 0304 and.w r3, r3, #4
80012ee: 60bb str r3, [r7, #8]
80012f0: 68bb ldr r3, [r7, #8]
/**DFSDM1 GPIO Configuration
PD6 ------> DFSDM1_DATIN1
PC2 ------> DFSDM1_CKOUT
*/
GPIO_InitStruct.Pin = GPIO_PIN_6;
80012f2: 2340 movs r3, #64 @ 0x40
80012f4: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80012f6: 2302 movs r3, #2
80012f8: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80012fa: 2300 movs r3, #0
80012fc: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80012fe: 2300 movs r3, #0
8001300: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF6_DFSDM1;
8001302: 2306 movs r3, #6
8001304: 627b str r3, [r7, #36] @ 0x24
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
8001306: f107 0314 add.w r3, r7, #20
800130a: 4619 mov r1, r3
800130c: 4814 ldr r0, [pc, #80] @ (8001360 <HAL_DFSDM_ChannelMspInit+0x11c>)
800130e: f001 fb77 bl 8002a00 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_2;
8001312: 2304 movs r3, #4
8001314: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001316: 2302 movs r3, #2
8001318: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
800131a: 2300 movs r3, #0
800131c: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800131e: 2300 movs r3, #0
8001320: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF8_DFSDM1;
8001322: 2308 movs r3, #8
8001324: 627b str r3, [r7, #36] @ 0x24
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8001326: f107 0314 add.w r3, r7, #20
800132a: 4619 mov r1, r3
800132c: 480d ldr r0, [pc, #52] @ (8001364 <HAL_DFSDM_ChannelMspInit+0x120>)
800132e: f001 fb67 bl 8002a00 <HAL_GPIO_Init>
/* USER CODE BEGIN DFSDM1_MspInit 1 */
/* USER CODE END DFSDM1_MspInit 1 */
DFSDM1_Init++;
8001332: 4b08 ldr r3, [pc, #32] @ (8001354 <HAL_DFSDM_ChannelMspInit+0x110>)
8001334: 681b ldr r3, [r3, #0]
8001336: 3301 adds r3, #1
8001338: 4a06 ldr r2, [pc, #24] @ (8001354 <HAL_DFSDM_ChannelMspInit+0x110>)
800133a: 6013 str r3, [r2, #0]
}
}
800133c: bf00 nop
800133e: 3728 adds r7, #40 @ 0x28
8001340: 46bd mov sp, r7
8001342: bd80 pop {r7, pc}
8001344: 40016000 .word 0x40016000
8001348: 40016020 .word 0x40016020
800134c: 40016040 .word 0x40016040
8001350: 40016060 .word 0x40016060
8001354: 2000fa28 .word 0x2000fa28
8001358: 2000fa24 .word 0x2000fa24
800135c: 40023800 .word 0x40023800
8001360: 40020c00 .word 0x40020c00
8001364: 40020800 .word 0x40020800
08001368 <HAL_MMC_MspInit>:
* This function configures the hardware resources used in this example
* @param hmmc: MMC handle pointer
* @retval None
*/
void HAL_MMC_MspInit(MMC_HandleTypeDef* hmmc)
{
8001368: b580 push {r7, lr}
800136a: b0a2 sub sp, #136 @ 0x88
800136c: af00 add r7, sp, #0
800136e: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8001370: f107 0374 add.w r3, r7, #116 @ 0x74
8001374: 2200 movs r2, #0
8001376: 601a str r2, [r3, #0]
8001378: 605a str r2, [r3, #4]
800137a: 609a str r2, [r3, #8]
800137c: 60da str r2, [r3, #12]
800137e: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
8001380: f107 031c add.w r3, r7, #28
8001384: 2258 movs r2, #88 @ 0x58
8001386: 2100 movs r1, #0
8001388: 4618 mov r0, r3
800138a: f011 fe21 bl 8012fd0 <memset>
if(hmmc->Instance==SDIO)
800138e: 687b ldr r3, [r7, #4]
8001390: 681b ldr r3, [r3, #0]
8001392: 4a4d ldr r2, [pc, #308] @ (80014c8 <HAL_MMC_MspInit+0x160>)
8001394: 4293 cmp r3, r2
8001396: f040 8093 bne.w 80014c0 <HAL_MMC_MspInit+0x158>
/* USER CODE END SDIO_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDIO|RCC_PERIPHCLK_CLK48;
800139a: 2360 movs r3, #96 @ 0x60
800139c: 61fb str r3, [r7, #28]
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLQ;
800139e: 2300 movs r3, #0
80013a0: 64fb str r3, [r7, #76] @ 0x4c
PeriphClkInitStruct.SdioClockSelection = RCC_SDIOCLKSOURCE_CLK48;
80013a2: 2300 movs r3, #0
80013a4: 647b str r3, [r7, #68] @ 0x44
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
80013a6: f107 031c add.w r3, r7, #28
80013aa: 4618 mov r0, r3
80013ac: f004 fd8c bl 8005ec8 <HAL_RCCEx_PeriphCLKConfig>
80013b0: 4603 mov r3, r0
80013b2: 2b00 cmp r3, #0
80013b4: d001 beq.n 80013ba <HAL_MMC_MspInit+0x52>
{
Error_Handler();
80013b6: f7ff fe4e bl 8001056 <Error_Handler>
}
/* Peripheral clock enable */
__HAL_RCC_SDIO_CLK_ENABLE();
80013ba: 2300 movs r3, #0
80013bc: 61bb str r3, [r7, #24]
80013be: 4b43 ldr r3, [pc, #268] @ (80014cc <HAL_MMC_MspInit+0x164>)
80013c0: 6c5b ldr r3, [r3, #68] @ 0x44
80013c2: 4a42 ldr r2, [pc, #264] @ (80014cc <HAL_MMC_MspInit+0x164>)
80013c4: f443 6300 orr.w r3, r3, #2048 @ 0x800
80013c8: 6453 str r3, [r2, #68] @ 0x44
80013ca: 4b40 ldr r3, [pc, #256] @ (80014cc <HAL_MMC_MspInit+0x164>)
80013cc: 6c5b ldr r3, [r3, #68] @ 0x44
80013ce: f403 6300 and.w r3, r3, #2048 @ 0x800
80013d2: 61bb str r3, [r7, #24]
80013d4: 69bb ldr r3, [r7, #24]
__HAL_RCC_GPIOB_CLK_ENABLE();
80013d6: 2300 movs r3, #0
80013d8: 617b str r3, [r7, #20]
80013da: 4b3c ldr r3, [pc, #240] @ (80014cc <HAL_MMC_MspInit+0x164>)
80013dc: 6b1b ldr r3, [r3, #48] @ 0x30
80013de: 4a3b ldr r2, [pc, #236] @ (80014cc <HAL_MMC_MspInit+0x164>)
80013e0: f043 0302 orr.w r3, r3, #2
80013e4: 6313 str r3, [r2, #48] @ 0x30
80013e6: 4b39 ldr r3, [pc, #228] @ (80014cc <HAL_MMC_MspInit+0x164>)
80013e8: 6b1b ldr r3, [r3, #48] @ 0x30
80013ea: f003 0302 and.w r3, r3, #2
80013ee: 617b str r3, [r7, #20]
80013f0: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOC_CLK_ENABLE();
80013f2: 2300 movs r3, #0
80013f4: 613b str r3, [r7, #16]
80013f6: 4b35 ldr r3, [pc, #212] @ (80014cc <HAL_MMC_MspInit+0x164>)
80013f8: 6b1b ldr r3, [r3, #48] @ 0x30
80013fa: 4a34 ldr r2, [pc, #208] @ (80014cc <HAL_MMC_MspInit+0x164>)
80013fc: f043 0304 orr.w r3, r3, #4
8001400: 6313 str r3, [r2, #48] @ 0x30
8001402: 4b32 ldr r3, [pc, #200] @ (80014cc <HAL_MMC_MspInit+0x164>)
8001404: 6b1b ldr r3, [r3, #48] @ 0x30
8001406: f003 0304 and.w r3, r3, #4
800140a: 613b str r3, [r7, #16]
800140c: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOD_CLK_ENABLE();
800140e: 2300 movs r3, #0
8001410: 60fb str r3, [r7, #12]
8001412: 4b2e ldr r3, [pc, #184] @ (80014cc <HAL_MMC_MspInit+0x164>)
8001414: 6b1b ldr r3, [r3, #48] @ 0x30
8001416: 4a2d ldr r2, [pc, #180] @ (80014cc <HAL_MMC_MspInit+0x164>)
8001418: f043 0308 orr.w r3, r3, #8
800141c: 6313 str r3, [r2, #48] @ 0x30
800141e: 4b2b ldr r3, [pc, #172] @ (80014cc <HAL_MMC_MspInit+0x164>)
8001420: 6b1b ldr r3, [r3, #48] @ 0x30
8001422: f003 0308 and.w r3, r3, #8
8001426: 60fb str r3, [r7, #12]
8001428: 68fb ldr r3, [r7, #12]
PC9 ------> SDIO_D1
PC7 ------> SDIO_D7
PB14 ------> SDIO_D6
PB15 ------> SDIO_CK
*/
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_5|GPIO_PIN_8|GPIO_PIN_6
800142a: f244 3360 movw r3, #17248 @ 0x4360
800142e: 677b str r3, [r7, #116] @ 0x74
|GPIO_PIN_14;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001430: 2302 movs r3, #2
8001432: 67bb str r3, [r7, #120] @ 0x78
GPIO_InitStruct.Pull = GPIO_PULLUP;
8001434: 2301 movs r3, #1
8001436: 67fb str r3, [r7, #124] @ 0x7c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8001438: 2303 movs r3, #3
800143a: f8c7 3080 str.w r3, [r7, #128] @ 0x80
GPIO_InitStruct.Alternate = GPIO_AF12_SDIO;
800143e: 230c movs r3, #12
8001440: f8c7 3084 str.w r3, [r7, #132] @ 0x84
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8001444: f107 0374 add.w r3, r7, #116 @ 0x74
8001448: 4619 mov r1, r3
800144a: 4821 ldr r0, [pc, #132] @ (80014d0 <HAL_MMC_MspInit+0x168>)
800144c: f001 fad8 bl 8002a00 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_9|GPIO_PIN_7;
8001450: f44f 63d0 mov.w r3, #1664 @ 0x680
8001454: 677b str r3, [r7, #116] @ 0x74
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001456: 2302 movs r3, #2
8001458: 67bb str r3, [r7, #120] @ 0x78
GPIO_InitStruct.Pull = GPIO_PULLUP;
800145a: 2301 movs r3, #1
800145c: 67fb str r3, [r7, #124] @ 0x7c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
800145e: 2303 movs r3, #3
8001460: f8c7 3080 str.w r3, [r7, #128] @ 0x80
GPIO_InitStruct.Alternate = GPIO_AF12_SDIO;
8001464: 230c movs r3, #12
8001466: f8c7 3084 str.w r3, [r7, #132] @ 0x84
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
800146a: f107 0374 add.w r3, r7, #116 @ 0x74
800146e: 4619 mov r1, r3
8001470: 4818 ldr r0, [pc, #96] @ (80014d4 <HAL_MMC_MspInit+0x16c>)
8001472: f001 fac5 bl 8002a00 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_2;
8001476: 2304 movs r3, #4
8001478: 677b str r3, [r7, #116] @ 0x74
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
800147a: 2302 movs r3, #2
800147c: 67bb str r3, [r7, #120] @ 0x78
GPIO_InitStruct.Pull = GPIO_NOPULL;
800147e: 2300 movs r3, #0
8001480: 67fb str r3, [r7, #124] @ 0x7c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8001482: 2303 movs r3, #3
8001484: f8c7 3080 str.w r3, [r7, #128] @ 0x80
GPIO_InitStruct.Alternate = GPIO_AF12_SDIO;
8001488: 230c movs r3, #12
800148a: f8c7 3084 str.w r3, [r7, #132] @ 0x84
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
800148e: f107 0374 add.w r3, r7, #116 @ 0x74
8001492: 4619 mov r1, r3
8001494: 4810 ldr r0, [pc, #64] @ (80014d8 <HAL_MMC_MspInit+0x170>)
8001496: f001 fab3 bl 8002a00 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_15;
800149a: f44f 4300 mov.w r3, #32768 @ 0x8000
800149e: 677b str r3, [r7, #116] @ 0x74
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80014a0: 2302 movs r3, #2
80014a2: 67bb str r3, [r7, #120] @ 0x78
GPIO_InitStruct.Pull = GPIO_NOPULL;
80014a4: 2300 movs r3, #0
80014a6: 67fb str r3, [r7, #124] @ 0x7c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
80014a8: 2303 movs r3, #3
80014aa: f8c7 3080 str.w r3, [r7, #128] @ 0x80
GPIO_InitStruct.Alternate = GPIO_AF12_SDIO;
80014ae: 230c movs r3, #12
80014b0: f8c7 3084 str.w r3, [r7, #132] @ 0x84
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
80014b4: f107 0374 add.w r3, r7, #116 @ 0x74
80014b8: 4619 mov r1, r3
80014ba: 4805 ldr r0, [pc, #20] @ (80014d0 <HAL_MMC_MspInit+0x168>)
80014bc: f001 faa0 bl 8002a00 <HAL_GPIO_Init>
/* USER CODE END SDIO_MspInit 1 */
}
}
80014c0: bf00 nop
80014c2: 3788 adds r7, #136 @ 0x88
80014c4: 46bd mov sp, r7
80014c6: bd80 pop {r7, pc}
80014c8: 40012c00 .word 0x40012c00
80014cc: 40023800 .word 0x40023800
80014d0: 40020400 .word 0x40020400
80014d4: 40020800 .word 0x40020800
80014d8: 40020c00 .word 0x40020c00
080014dc <HAL_InitTick>:
* reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
* @param TickPriority: Tick interrupt priority.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
80014dc: b580 push {r7, lr}
80014de: b08e sub sp, #56 @ 0x38
80014e0: af00 add r7, sp, #0
80014e2: 6078 str r0, [r7, #4]
RCC_ClkInitTypeDef clkconfig;
uint32_t uwTimclock, uwAPB1Prescaler = 0U;
80014e4: 2300 movs r3, #0
80014e6: 62fb str r3, [r7, #44] @ 0x2c
uint32_t uwPrescalerValue = 0U;
80014e8: 2300 movs r3, #0
80014ea: 62bb str r3, [r7, #40] @ 0x28
uint32_t pFLatency;
HAL_StatusTypeDef status;
/* Enable TIM2 clock */
__HAL_RCC_TIM2_CLK_ENABLE();
80014ec: 2300 movs r3, #0
80014ee: 60fb str r3, [r7, #12]
80014f0: 4b34 ldr r3, [pc, #208] @ (80015c4 <HAL_InitTick+0xe8>)
80014f2: 6c1b ldr r3, [r3, #64] @ 0x40
80014f4: 4a33 ldr r2, [pc, #204] @ (80015c4 <HAL_InitTick+0xe8>)
80014f6: f043 0301 orr.w r3, r3, #1
80014fa: 6413 str r3, [r2, #64] @ 0x40
80014fc: 4b31 ldr r3, [pc, #196] @ (80015c4 <HAL_InitTick+0xe8>)
80014fe: 6c1b ldr r3, [r3, #64] @ 0x40
8001500: f003 0301 and.w r3, r3, #1
8001504: 60fb str r3, [r7, #12]
8001506: 68fb ldr r3, [r7, #12]
/* Get clock configuration */
HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
8001508: f107 0210 add.w r2, r7, #16
800150c: f107 0314 add.w r3, r7, #20
8001510: 4611 mov r1, r2
8001512: 4618 mov r0, r3
8001514: f004 fca6 bl 8005e64 <HAL_RCC_GetClockConfig>
/* Get APB1 prescaler */
uwAPB1Prescaler = clkconfig.APB1CLKDivider;
8001518: 6a3b ldr r3, [r7, #32]
800151a: 62fb str r3, [r7, #44] @ 0x2c
/* Compute TIM2 clock */
if (uwAPB1Prescaler == RCC_HCLK_DIV1)
800151c: 6afb ldr r3, [r7, #44] @ 0x2c
800151e: 2b00 cmp r3, #0
8001520: d103 bne.n 800152a <HAL_InitTick+0x4e>
{
uwTimclock = HAL_RCC_GetPCLK1Freq();
8001522: f004 fc8b bl 8005e3c <HAL_RCC_GetPCLK1Freq>
8001526: 6378 str r0, [r7, #52] @ 0x34
8001528: e004 b.n 8001534 <HAL_InitTick+0x58>
}
else
{
uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq();
800152a: f004 fc87 bl 8005e3c <HAL_RCC_GetPCLK1Freq>
800152e: 4603 mov r3, r0
8001530: 005b lsls r3, r3, #1
8001532: 637b str r3, [r7, #52] @ 0x34
}
/* Compute the prescaler value to have TIM2 counter clock equal to 1MHz */
uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
8001534: 6b7b ldr r3, [r7, #52] @ 0x34
8001536: 4a24 ldr r2, [pc, #144] @ (80015c8 <HAL_InitTick+0xec>)
8001538: fba2 2303 umull r2, r3, r2, r3
800153c: 0c9b lsrs r3, r3, #18
800153e: 3b01 subs r3, #1
8001540: 62bb str r3, [r7, #40] @ 0x28
/* Initialize TIM2 */
htim2.Instance = TIM2;
8001542: 4b22 ldr r3, [pc, #136] @ (80015cc <HAL_InitTick+0xf0>)
8001544: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
8001548: 601a str r2, [r3, #0]
+ Period = [(TIM2CLK/1000) - 1]. to have a (1/1000) s time base.
+ Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+ ClockDivision = 0
+ Counter direction = Up
*/
htim2.Init.Period = (1000000U / 1000U) - 1U;
800154a: 4b20 ldr r3, [pc, #128] @ (80015cc <HAL_InitTick+0xf0>)
800154c: f240 32e7 movw r2, #999 @ 0x3e7
8001550: 60da str r2, [r3, #12]
htim2.Init.Prescaler = uwPrescalerValue;
8001552: 4a1e ldr r2, [pc, #120] @ (80015cc <HAL_InitTick+0xf0>)
8001554: 6abb ldr r3, [r7, #40] @ 0x28
8001556: 6053 str r3, [r2, #4]
htim2.Init.ClockDivision = 0;
8001558: 4b1c ldr r3, [pc, #112] @ (80015cc <HAL_InitTick+0xf0>)
800155a: 2200 movs r2, #0
800155c: 611a str r2, [r3, #16]
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
800155e: 4b1b ldr r3, [pc, #108] @ (80015cc <HAL_InitTick+0xf0>)
8001560: 2200 movs r2, #0
8001562: 609a str r2, [r3, #8]
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8001564: 4b19 ldr r3, [pc, #100] @ (80015cc <HAL_InitTick+0xf0>)
8001566: 2200 movs r2, #0
8001568: 619a str r2, [r3, #24]
status = HAL_TIM_Base_Init(&htim2);
800156a: 4818 ldr r0, [pc, #96] @ (80015cc <HAL_InitTick+0xf0>)
800156c: f005 f9bc bl 80068e8 <HAL_TIM_Base_Init>
8001570: 4603 mov r3, r0
8001572: f887 3033 strb.w r3, [r7, #51] @ 0x33
if (status == HAL_OK)
8001576: f897 3033 ldrb.w r3, [r7, #51] @ 0x33
800157a: 2b00 cmp r3, #0
800157c: d11b bne.n 80015b6 <HAL_InitTick+0xda>
{
/* Start the TIM time Base generation in interrupt mode */
status = HAL_TIM_Base_Start_IT(&htim2);
800157e: 4813 ldr r0, [pc, #76] @ (80015cc <HAL_InitTick+0xf0>)
8001580: f005 fa0c bl 800699c <HAL_TIM_Base_Start_IT>
8001584: 4603 mov r3, r0
8001586: f887 3033 strb.w r3, [r7, #51] @ 0x33
if (status == HAL_OK)
800158a: f897 3033 ldrb.w r3, [r7, #51] @ 0x33
800158e: 2b00 cmp r3, #0
8001590: d111 bne.n 80015b6 <HAL_InitTick+0xda>
{
/* Enable the TIM2 global Interrupt */
HAL_NVIC_EnableIRQ(TIM2_IRQn);
8001592: 201c movs r0, #28
8001594: f000 fa28 bl 80019e8 <HAL_NVIC_EnableIRQ>
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8001598: 687b ldr r3, [r7, #4]
800159a: 2b0f cmp r3, #15
800159c: d808 bhi.n 80015b0 <HAL_InitTick+0xd4>
{
/* Configure the TIM IRQ priority */
HAL_NVIC_SetPriority(TIM2_IRQn, TickPriority, 0U);
800159e: 2200 movs r2, #0
80015a0: 6879 ldr r1, [r7, #4]
80015a2: 201c movs r0, #28
80015a4: f000 fa04 bl 80019b0 <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
80015a8: 4a09 ldr r2, [pc, #36] @ (80015d0 <HAL_InitTick+0xf4>)
80015aa: 687b ldr r3, [r7, #4]
80015ac: 6013 str r3, [r2, #0]
80015ae: e002 b.n 80015b6 <HAL_InitTick+0xda>
}
else
{
status = HAL_ERROR;
80015b0: 2301 movs r3, #1
80015b2: f887 3033 strb.w r3, [r7, #51] @ 0x33
}
}
}
/* Return function status */
return status;
80015b6: f897 3033 ldrb.w r3, [r7, #51] @ 0x33
}
80015ba: 4618 mov r0, r3
80015bc: 3738 adds r7, #56 @ 0x38
80015be: 46bd mov sp, r7
80015c0: bd80 pop {r7, pc}
80015c2: bf00 nop
80015c4: 40023800 .word 0x40023800
80015c8: 431bde83 .word 0x431bde83
80015cc: 2000fa2c .word 0x2000fa2c
80015d0: 20000004 .word 0x20000004
080015d4 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
80015d4: b480 push {r7}
80015d6: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
80015d8: bf00 nop
80015da: e7fd b.n 80015d8 <NMI_Handler+0x4>
080015dc <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
80015dc: b480 push {r7}
80015de: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
80015e0: bf00 nop
80015e2: e7fd b.n 80015e0 <HardFault_Handler+0x4>
080015e4 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
80015e4: b480 push {r7}
80015e6: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
80015e8: bf00 nop
80015ea: e7fd b.n 80015e8 <MemManage_Handler+0x4>
080015ec <BusFault_Handler>:
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
80015ec: b480 push {r7}
80015ee: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
80015f0: bf00 nop
80015f2: e7fd b.n 80015f0 <BusFault_Handler+0x4>
080015f4 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
80015f4: b480 push {r7}
80015f6: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
80015f8: bf00 nop
80015fa: e7fd b.n 80015f8 <UsageFault_Handler+0x4>
080015fc <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
80015fc: b480 push {r7}
80015fe: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8001600: bf00 nop
8001602: 46bd mov sp, r7
8001604: f85d 7b04 ldr.w r7, [sp], #4
8001608: 4770 bx lr
...
0800160c <TIM2_IRQHandler>:
/**
* @brief This function handles TIM2 global interrupt.
*/
void TIM2_IRQHandler(void)
{
800160c: b580 push {r7, lr}
800160e: af00 add r7, sp, #0
/* USER CODE BEGIN TIM2_IRQn 0 */
/* USER CODE END TIM2_IRQn 0 */
HAL_TIM_IRQHandler(&htim2);
8001610: 4802 ldr r0, [pc, #8] @ (800161c <TIM2_IRQHandler+0x10>)
8001612: f005 fa33 bl 8006a7c <HAL_TIM_IRQHandler>
/* USER CODE BEGIN TIM2_IRQn 1 */
/* USER CODE END TIM2_IRQn 1 */
}
8001616: bf00 nop
8001618: bd80 pop {r7, pc}
800161a: bf00 nop
800161c: 2000fa2c .word 0x2000fa2c
08001620 <DMA2_Stream0_IRQHandler>:
/**
* @brief This function handles DMA2 stream0 global interrupt.
*/
void DMA2_Stream0_IRQHandler(void)
{
8001620: b580 push {r7, lr}
8001622: af00 add r7, sp, #0
/* USER CODE BEGIN DMA2_Stream0_IRQn 0 */
/* USER CODE END DMA2_Stream0_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_dfsdm1_flt0);
8001624: 4802 ldr r0, [pc, #8] @ (8001630 <DMA2_Stream0_IRQHandler+0x10>)
8001626: f000 ff81 bl 800252c <HAL_DMA_IRQHandler>
/* USER CODE BEGIN DMA2_Stream0_IRQn 1 */
/* USER CODE END DMA2_Stream0_IRQn 1 */
}
800162a: bf00 nop
800162c: bd80 pop {r7, pc}
800162e: bf00 nop
8001630: 2000f734 .word 0x2000f734
08001634 <OTG_FS_IRQHandler>:
/**
* @brief This function handles USB On The Go FS global interrupt.
*/
void OTG_FS_IRQHandler(void)
{
8001634: b580 push {r7, lr}
8001636: af00 add r7, sp, #0
/* USER CODE BEGIN OTG_FS_IRQn 0 */
/* USER CODE END OTG_FS_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
8001638: 4802 ldr r0, [pc, #8] @ (8001644 <OTG_FS_IRQHandler+0x10>)
800163a: f003 f87b bl 8004734 <HAL_PCD_IRQHandler>
/* USER CODE BEGIN OTG_FS_IRQn 1 */
/* USER CODE END OTG_FS_IRQn 1 */
}
800163e: bf00 nop
8001640: bd80 pop {r7, pc}
8001642: bf00 nop
8001644: 200145c8 .word 0x200145c8
08001648 <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8001648: b580 push {r7, lr}
800164a: b086 sub sp, #24
800164c: af00 add r7, sp, #0
800164e: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8001650: 4a14 ldr r2, [pc, #80] @ (80016a4 <_sbrk+0x5c>)
8001652: 4b15 ldr r3, [pc, #84] @ (80016a8 <_sbrk+0x60>)
8001654: 1ad3 subs r3, r2, r3
8001656: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8001658: 697b ldr r3, [r7, #20]
800165a: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
800165c: 4b13 ldr r3, [pc, #76] @ (80016ac <_sbrk+0x64>)
800165e: 681b ldr r3, [r3, #0]
8001660: 2b00 cmp r3, #0
8001662: d102 bne.n 800166a <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
8001664: 4b11 ldr r3, [pc, #68] @ (80016ac <_sbrk+0x64>)
8001666: 4a12 ldr r2, [pc, #72] @ (80016b0 <_sbrk+0x68>)
8001668: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
800166a: 4b10 ldr r3, [pc, #64] @ (80016ac <_sbrk+0x64>)
800166c: 681a ldr r2, [r3, #0]
800166e: 687b ldr r3, [r7, #4]
8001670: 4413 add r3, r2
8001672: 693a ldr r2, [r7, #16]
8001674: 429a cmp r2, r3
8001676: d207 bcs.n 8001688 <_sbrk+0x40>
{
errno = ENOMEM;
8001678: f011 fd08 bl 801308c <__errno>
800167c: 4603 mov r3, r0
800167e: 220c movs r2, #12
8001680: 601a str r2, [r3, #0]
return (void *)-1;
8001682: f04f 33ff mov.w r3, #4294967295
8001686: e009 b.n 800169c <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
8001688: 4b08 ldr r3, [pc, #32] @ (80016ac <_sbrk+0x64>)
800168a: 681b ldr r3, [r3, #0]
800168c: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
800168e: 4b07 ldr r3, [pc, #28] @ (80016ac <_sbrk+0x64>)
8001690: 681a ldr r2, [r3, #0]
8001692: 687b ldr r3, [r7, #4]
8001694: 4413 add r3, r2
8001696: 4a05 ldr r2, [pc, #20] @ (80016ac <_sbrk+0x64>)
8001698: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
800169a: 68fb ldr r3, [r7, #12]
}
800169c: 4618 mov r0, r3
800169e: 3718 adds r7, #24
80016a0: 46bd mov sp, r7
80016a2: bd80 pop {r7, pc}
80016a4: 20050000 .word 0x20050000
80016a8: 00000400 .word 0x00000400
80016ac: 2000fa74 .word 0x2000fa74
80016b0: 20016c70 .word 0x20016c70
080016b4 <SystemInit>:
* configuration.
* @param None
* @retval None
*/
void SystemInit(void)
{
80016b4: b480 push {r7}
80016b6: af00 add r7, sp, #0
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
80016b8: 4b06 ldr r3, [pc, #24] @ (80016d4 <SystemInit+0x20>)
80016ba: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
80016be: 4a05 ldr r2, [pc, #20] @ (80016d4 <SystemInit+0x20>)
80016c0: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000
80016c4: f8c2 3088 str.w r3, [r2, #136] @ 0x88
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#endif /* USER_VECT_TAB_ADDRESS */
}
80016c8: bf00 nop
80016ca: 46bd mov sp, r7
80016cc: f85d 7b04 ldr.w r7, [sp], #4
80016d0: 4770 bx lr
80016d2: bf00 nop
80016d4: e000ed00 .word 0xe000ed00
080016d8 <Reset_Handler>:
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr sp, =_estack /* set stack pointer */
80016d8: f8df d034 ldr.w sp, [pc, #52] @ 8001710 <LoopFillZerobss+0xe>
/* Call the clock system initialization function.*/
bl SystemInit
80016dc: f7ff ffea bl 80016b4 <SystemInit>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
80016e0: 480c ldr r0, [pc, #48] @ (8001714 <LoopFillZerobss+0x12>)
ldr r1, =_edata
80016e2: 490d ldr r1, [pc, #52] @ (8001718 <LoopFillZerobss+0x16>)
ldr r2, =_sidata
80016e4: 4a0d ldr r2, [pc, #52] @ (800171c <LoopFillZerobss+0x1a>)
movs r3, #0
80016e6: 2300 movs r3, #0
b LoopCopyDataInit
80016e8: e002 b.n 80016f0 <LoopCopyDataInit>
080016ea <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
80016ea: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
80016ec: 50c4 str r4, [r0, r3]
adds r3, r3, #4
80016ee: 3304 adds r3, #4
080016f0 <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
80016f0: 18c4 adds r4, r0, r3
cmp r4, r1
80016f2: 428c cmp r4, r1
bcc CopyDataInit
80016f4: d3f9 bcc.n 80016ea <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
80016f6: 4a0a ldr r2, [pc, #40] @ (8001720 <LoopFillZerobss+0x1e>)
ldr r4, =_ebss
80016f8: 4c0a ldr r4, [pc, #40] @ (8001724 <LoopFillZerobss+0x22>)
movs r3, #0
80016fa: 2300 movs r3, #0
b LoopFillZerobss
80016fc: e001 b.n 8001702 <LoopFillZerobss>
080016fe <FillZerobss>:
FillZerobss:
str r3, [r2]
80016fe: 6013 str r3, [r2, #0]
adds r2, r2, #4
8001700: 3204 adds r2, #4
08001702 <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
8001702: 42a2 cmp r2, r4
bcc FillZerobss
8001704: d3fb bcc.n 80016fe <FillZerobss>
/* Call static constructors */
bl __libc_init_array
8001706: f011 fcc7 bl 8013098 <__libc_init_array>
/* Call the application's entry point.*/
bl main
800170a: f7ff fa1f bl 8000b4c <main>
bx lr
800170e: 4770 bx lr
ldr sp, =_estack /* set stack pointer */
8001710: 20050000 .word 0x20050000
ldr r0, =_sdata
8001714: 20000000 .word 0x20000000
ldr r1, =_edata
8001718: 20000164 .word 0x20000164
ldr r2, =_sidata
800171c: 08013bf8 .word 0x08013bf8
ldr r2, =_sbss
8001720: 20000164 .word 0x20000164
ldr r4, =_ebss
8001724: 20016c6c .word 0x20016c6c
08001728 <ADC_IRQHandler>:
* @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
8001728: e7fe b.n 8001728 <ADC_IRQHandler>
...
0800172c <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
800172c: b580 push {r7, lr}
800172e: af00 add r7, sp, #0
/* Configure Flash prefetch, Instruction cache, Data cache */
#if (INSTRUCTION_CACHE_ENABLE != 0U)
__HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
8001730: 4b0e ldr r3, [pc, #56] @ (800176c <HAL_Init+0x40>)
8001732: 681b ldr r3, [r3, #0]
8001734: 4a0d ldr r2, [pc, #52] @ (800176c <HAL_Init+0x40>)
8001736: f443 7300 orr.w r3, r3, #512 @ 0x200
800173a: 6013 str r3, [r2, #0]
#endif /* INSTRUCTION_CACHE_ENABLE */
#if (DATA_CACHE_ENABLE != 0U)
__HAL_FLASH_DATA_CACHE_ENABLE();
800173c: 4b0b ldr r3, [pc, #44] @ (800176c <HAL_Init+0x40>)
800173e: 681b ldr r3, [r3, #0]
8001740: 4a0a ldr r2, [pc, #40] @ (800176c <HAL_Init+0x40>)
8001742: f443 6380 orr.w r3, r3, #1024 @ 0x400
8001746: 6013 str r3, [r2, #0]
#endif /* DATA_CACHE_ENABLE */
#if (PREFETCH_ENABLE != 0U)
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
8001748: 4b08 ldr r3, [pc, #32] @ (800176c <HAL_Init+0x40>)
800174a: 681b ldr r3, [r3, #0]
800174c: 4a07 ldr r2, [pc, #28] @ (800176c <HAL_Init+0x40>)
800174e: f443 7380 orr.w r3, r3, #256 @ 0x100
8001752: 6013 str r3, [r2, #0]
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
8001754: 2003 movs r0, #3
8001756: f000 f920 bl 800199a <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
800175a: 200f movs r0, #15
800175c: f7ff febe bl 80014dc <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
8001760: f7ff fc80 bl 8001064 <HAL_MspInit>
/* Return function status */
return HAL_OK;
8001764: 2300 movs r3, #0
}
8001766: 4618 mov r0, r3
8001768: bd80 pop {r7, pc}
800176a: bf00 nop
800176c: 40023c00 .word 0x40023c00
08001770 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8001770: b480 push {r7}
8001772: af00 add r7, sp, #0
uwTick += uwTickFreq;
8001774: 4b06 ldr r3, [pc, #24] @ (8001790 <HAL_IncTick+0x20>)
8001776: 781b ldrb r3, [r3, #0]
8001778: 461a mov r2, r3
800177a: 4b06 ldr r3, [pc, #24] @ (8001794 <HAL_IncTick+0x24>)
800177c: 681b ldr r3, [r3, #0]
800177e: 4413 add r3, r2
8001780: 4a04 ldr r2, [pc, #16] @ (8001794 <HAL_IncTick+0x24>)
8001782: 6013 str r3, [r2, #0]
}
8001784: bf00 nop
8001786: 46bd mov sp, r7
8001788: f85d 7b04 ldr.w r7, [sp], #4
800178c: 4770 bx lr
800178e: bf00 nop
8001790: 20000008 .word 0x20000008
8001794: 2000fa78 .word 0x2000fa78
08001798 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8001798: b480 push {r7}
800179a: af00 add r7, sp, #0
return uwTick;
800179c: 4b03 ldr r3, [pc, #12] @ (80017ac <HAL_GetTick+0x14>)
800179e: 681b ldr r3, [r3, #0]
}
80017a0: 4618 mov r0, r3
80017a2: 46bd mov sp, r7
80017a4: f85d 7b04 ldr.w r7, [sp], #4
80017a8: 4770 bx lr
80017aa: bf00 nop
80017ac: 2000fa78 .word 0x2000fa78
080017b0 <HAL_Delay>:
* implementations in user file.
* @param Delay specifies the delay time length, in milliseconds.
* @retval None
*/
__weak void HAL_Delay(uint32_t Delay)
{
80017b0: b580 push {r7, lr}
80017b2: b084 sub sp, #16
80017b4: af00 add r7, sp, #0
80017b6: 6078 str r0, [r7, #4]
uint32_t tickstart = HAL_GetTick();
80017b8: f7ff ffee bl 8001798 <HAL_GetTick>
80017bc: 60b8 str r0, [r7, #8]
uint32_t wait = Delay;
80017be: 687b ldr r3, [r7, #4]
80017c0: 60fb str r3, [r7, #12]
/* Add a freq to guarantee minimum wait */
if (wait < HAL_MAX_DELAY)
80017c2: 68fb ldr r3, [r7, #12]
80017c4: f1b3 3fff cmp.w r3, #4294967295
80017c8: d005 beq.n 80017d6 <HAL_Delay+0x26>
{
wait += (uint32_t)(uwTickFreq);
80017ca: 4b0a ldr r3, [pc, #40] @ (80017f4 <HAL_Delay+0x44>)
80017cc: 781b ldrb r3, [r3, #0]
80017ce: 461a mov r2, r3
80017d0: 68fb ldr r3, [r7, #12]
80017d2: 4413 add r3, r2
80017d4: 60fb str r3, [r7, #12]
}
while((HAL_GetTick() - tickstart) < wait)
80017d6: bf00 nop
80017d8: f7ff ffde bl 8001798 <HAL_GetTick>
80017dc: 4602 mov r2, r0
80017de: 68bb ldr r3, [r7, #8]
80017e0: 1ad3 subs r3, r2, r3
80017e2: 68fa ldr r2, [r7, #12]
80017e4: 429a cmp r2, r3
80017e6: d8f7 bhi.n 80017d8 <HAL_Delay+0x28>
{
}
}
80017e8: bf00 nop
80017ea: bf00 nop
80017ec: 3710 adds r7, #16
80017ee: 46bd mov sp, r7
80017f0: bd80 pop {r7, pc}
80017f2: bf00 nop
80017f4: 20000008 .word 0x20000008
080017f8 <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
80017f8: b480 push {r7}
80017fa: b085 sub sp, #20
80017fc: af00 add r7, sp, #0
80017fe: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8001800: 687b ldr r3, [r7, #4]
8001802: f003 0307 and.w r3, r3, #7
8001806: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
8001808: 4b0c ldr r3, [pc, #48] @ (800183c <__NVIC_SetPriorityGrouping+0x44>)
800180a: 68db ldr r3, [r3, #12]
800180c: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
800180e: 68ba ldr r2, [r7, #8]
8001810: f64f 03ff movw r3, #63743 @ 0xf8ff
8001814: 4013 ands r3, r2
8001816: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
8001818: 68fb ldr r3, [r7, #12]
800181a: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
800181c: 68bb ldr r3, [r7, #8]
800181e: 4313 orrs r3, r2
reg_value = (reg_value |
8001820: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
8001824: f443 3300 orr.w r3, r3, #131072 @ 0x20000
8001828: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
800182a: 4a04 ldr r2, [pc, #16] @ (800183c <__NVIC_SetPriorityGrouping+0x44>)
800182c: 68bb ldr r3, [r7, #8]
800182e: 60d3 str r3, [r2, #12]
}
8001830: bf00 nop
8001832: 3714 adds r7, #20
8001834: 46bd mov sp, r7
8001836: f85d 7b04 ldr.w r7, [sp], #4
800183a: 4770 bx lr
800183c: e000ed00 .word 0xe000ed00
08001840 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
8001840: b480 push {r7}
8001842: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
8001844: 4b04 ldr r3, [pc, #16] @ (8001858 <__NVIC_GetPriorityGrouping+0x18>)
8001846: 68db ldr r3, [r3, #12]
8001848: 0a1b lsrs r3, r3, #8
800184a: f003 0307 and.w r3, r3, #7
}
800184e: 4618 mov r0, r3
8001850: 46bd mov sp, r7
8001852: f85d 7b04 ldr.w r7, [sp], #4
8001856: 4770 bx lr
8001858: e000ed00 .word 0xe000ed00
0800185c <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
800185c: b480 push {r7}
800185e: b083 sub sp, #12
8001860: af00 add r7, sp, #0
8001862: 4603 mov r3, r0
8001864: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8001866: f997 3007 ldrsb.w r3, [r7, #7]
800186a: 2b00 cmp r3, #0
800186c: db0b blt.n 8001886 <__NVIC_EnableIRQ+0x2a>
{
__COMPILER_BARRIER();
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
800186e: 79fb ldrb r3, [r7, #7]
8001870: f003 021f and.w r2, r3, #31
8001874: 4907 ldr r1, [pc, #28] @ (8001894 <__NVIC_EnableIRQ+0x38>)
8001876: f997 3007 ldrsb.w r3, [r7, #7]
800187a: 095b lsrs r3, r3, #5
800187c: 2001 movs r0, #1
800187e: fa00 f202 lsl.w r2, r0, r2
8001882: f841 2023 str.w r2, [r1, r3, lsl #2]
__COMPILER_BARRIER();
}
}
8001886: bf00 nop
8001888: 370c adds r7, #12
800188a: 46bd mov sp, r7
800188c: f85d 7b04 ldr.w r7, [sp], #4
8001890: 4770 bx lr
8001892: bf00 nop
8001894: e000e100 .word 0xe000e100
08001898 <__NVIC_DisableIRQ>:
\details Disables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
{
8001898: b480 push {r7}
800189a: b083 sub sp, #12
800189c: af00 add r7, sp, #0
800189e: 4603 mov r3, r0
80018a0: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
80018a2: f997 3007 ldrsb.w r3, [r7, #7]
80018a6: 2b00 cmp r3, #0
80018a8: db12 blt.n 80018d0 <__NVIC_DisableIRQ+0x38>
{
NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
80018aa: 79fb ldrb r3, [r7, #7]
80018ac: f003 021f and.w r2, r3, #31
80018b0: 490a ldr r1, [pc, #40] @ (80018dc <__NVIC_DisableIRQ+0x44>)
80018b2: f997 3007 ldrsb.w r3, [r7, #7]
80018b6: 095b lsrs r3, r3, #5
80018b8: 2001 movs r0, #1
80018ba: fa00 f202 lsl.w r2, r0, r2
80018be: 3320 adds r3, #32
80018c0: f841 2023 str.w r2, [r1, r3, lsl #2]
__ASM volatile ("dsb 0xF":::"memory");
80018c4: f3bf 8f4f dsb sy
}
80018c8: bf00 nop
__ASM volatile ("isb 0xF":::"memory");
80018ca: f3bf 8f6f isb sy
}
80018ce: bf00 nop
__DSB();
__ISB();
}
}
80018d0: bf00 nop
80018d2: 370c adds r7, #12
80018d4: 46bd mov sp, r7
80018d6: f85d 7b04 ldr.w r7, [sp], #4
80018da: 4770 bx lr
80018dc: e000e100 .word 0xe000e100
080018e0 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
80018e0: b480 push {r7}
80018e2: b083 sub sp, #12
80018e4: af00 add r7, sp, #0
80018e6: 4603 mov r3, r0
80018e8: 6039 str r1, [r7, #0]
80018ea: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
80018ec: f997 3007 ldrsb.w r3, [r7, #7]
80018f0: 2b00 cmp r3, #0
80018f2: db0a blt.n 800190a <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
80018f4: 683b ldr r3, [r7, #0]
80018f6: b2da uxtb r2, r3
80018f8: 490c ldr r1, [pc, #48] @ (800192c <__NVIC_SetPriority+0x4c>)
80018fa: f997 3007 ldrsb.w r3, [r7, #7]
80018fe: 0112 lsls r2, r2, #4
8001900: b2d2 uxtb r2, r2
8001902: 440b add r3, r1
8001904: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
8001908: e00a b.n 8001920 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
800190a: 683b ldr r3, [r7, #0]
800190c: b2da uxtb r2, r3
800190e: 4908 ldr r1, [pc, #32] @ (8001930 <__NVIC_SetPriority+0x50>)
8001910: 79fb ldrb r3, [r7, #7]
8001912: f003 030f and.w r3, r3, #15
8001916: 3b04 subs r3, #4
8001918: 0112 lsls r2, r2, #4
800191a: b2d2 uxtb r2, r2
800191c: 440b add r3, r1
800191e: 761a strb r2, [r3, #24]
}
8001920: bf00 nop
8001922: 370c adds r7, #12
8001924: 46bd mov sp, r7
8001926: f85d 7b04 ldr.w r7, [sp], #4
800192a: 4770 bx lr
800192c: e000e100 .word 0xe000e100
8001930: e000ed00 .word 0xe000ed00
08001934 <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
8001934: b480 push {r7}
8001936: b089 sub sp, #36 @ 0x24
8001938: af00 add r7, sp, #0
800193a: 60f8 str r0, [r7, #12]
800193c: 60b9 str r1, [r7, #8]
800193e: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8001940: 68fb ldr r3, [r7, #12]
8001942: f003 0307 and.w r3, r3, #7
8001946: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
8001948: 69fb ldr r3, [r7, #28]
800194a: f1c3 0307 rsb r3, r3, #7
800194e: 2b04 cmp r3, #4
8001950: bf28 it cs
8001952: 2304 movcs r3, #4
8001954: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
8001956: 69fb ldr r3, [r7, #28]
8001958: 3304 adds r3, #4
800195a: 2b06 cmp r3, #6
800195c: d902 bls.n 8001964 <NVIC_EncodePriority+0x30>
800195e: 69fb ldr r3, [r7, #28]
8001960: 3b03 subs r3, #3
8001962: e000 b.n 8001966 <NVIC_EncodePriority+0x32>
8001964: 2300 movs r3, #0
8001966: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8001968: f04f 32ff mov.w r2, #4294967295
800196c: 69bb ldr r3, [r7, #24]
800196e: fa02 f303 lsl.w r3, r2, r3
8001972: 43da mvns r2, r3
8001974: 68bb ldr r3, [r7, #8]
8001976: 401a ands r2, r3
8001978: 697b ldr r3, [r7, #20]
800197a: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
800197c: f04f 31ff mov.w r1, #4294967295
8001980: 697b ldr r3, [r7, #20]
8001982: fa01 f303 lsl.w r3, r1, r3
8001986: 43d9 mvns r1, r3
8001988: 687b ldr r3, [r7, #4]
800198a: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
800198c: 4313 orrs r3, r2
);
}
800198e: 4618 mov r0, r3
8001990: 3724 adds r7, #36 @ 0x24
8001992: 46bd mov sp, r7
8001994: f85d 7b04 ldr.w r7, [sp], #4
8001998: 4770 bx lr
0800199a <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
800199a: b580 push {r7, lr}
800199c: b082 sub sp, #8
800199e: af00 add r7, sp, #0
80019a0: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
80019a2: 6878 ldr r0, [r7, #4]
80019a4: f7ff ff28 bl 80017f8 <__NVIC_SetPriorityGrouping>
}
80019a8: bf00 nop
80019aa: 3708 adds r7, #8
80019ac: 46bd mov sp, r7
80019ae: bd80 pop {r7, pc}
080019b0 <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
80019b0: b580 push {r7, lr}
80019b2: b086 sub sp, #24
80019b4: af00 add r7, sp, #0
80019b6: 4603 mov r3, r0
80019b8: 60b9 str r1, [r7, #8]
80019ba: 607a str r2, [r7, #4]
80019bc: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
80019be: 2300 movs r3, #0
80019c0: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
80019c2: f7ff ff3d bl 8001840 <__NVIC_GetPriorityGrouping>
80019c6: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
80019c8: 687a ldr r2, [r7, #4]
80019ca: 68b9 ldr r1, [r7, #8]
80019cc: 6978 ldr r0, [r7, #20]
80019ce: f7ff ffb1 bl 8001934 <NVIC_EncodePriority>
80019d2: 4602 mov r2, r0
80019d4: f997 300f ldrsb.w r3, [r7, #15]
80019d8: 4611 mov r1, r2
80019da: 4618 mov r0, r3
80019dc: f7ff ff80 bl 80018e0 <__NVIC_SetPriority>
}
80019e0: bf00 nop
80019e2: 3718 adds r7, #24
80019e4: 46bd mov sp, r7
80019e6: bd80 pop {r7, pc}
080019e8 <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
80019e8: b580 push {r7, lr}
80019ea: b082 sub sp, #8
80019ec: af00 add r7, sp, #0
80019ee: 4603 mov r3, r0
80019f0: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
80019f2: f997 3007 ldrsb.w r3, [r7, #7]
80019f6: 4618 mov r0, r3
80019f8: f7ff ff30 bl 800185c <__NVIC_EnableIRQ>
}
80019fc: bf00 nop
80019fe: 3708 adds r7, #8
8001a00: 46bd mov sp, r7
8001a02: bd80 pop {r7, pc}
08001a04 <HAL_NVIC_DisableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
* @retval None
*/
void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
{
8001a04: b580 push {r7, lr}
8001a06: b082 sub sp, #8
8001a08: af00 add r7, sp, #0
8001a0a: 4603 mov r3, r0
8001a0c: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Disable interrupt */
NVIC_DisableIRQ(IRQn);
8001a0e: f997 3007 ldrsb.w r3, [r7, #7]
8001a12: 4618 mov r0, r3
8001a14: f7ff ff40 bl 8001898 <__NVIC_DisableIRQ>
}
8001a18: bf00 nop
8001a1a: 3708 adds r7, #8
8001a1c: 46bd mov sp, r7
8001a1e: bd80 pop {r7, pc}
08001a20 <HAL_DFSDM_ChannelInit>:
* in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
* @param hdfsdm_channel DFSDM channel handle.
* @retval HAL status.
*/
HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
{
8001a20: b580 push {r7, lr}
8001a22: b086 sub sp, #24
8001a24: af00 add r7, sp, #0
8001a26: 6078 str r0, [r7, #4]
DFSDM_Channel_HandleTypeDef **channelHandleTable;
DFSDM_Channel_TypeDef* channel0Instance;
#endif /* defined(DFSDM2_Channel0) */
/* Check DFSDM Channel handle */
if(hdfsdm_channel == NULL)
8001a28: 687b ldr r3, [r7, #4]
8001a2a: 2b00 cmp r3, #0
8001a2c: d101 bne.n 8001a32 <HAL_DFSDM_ChannelInit+0x12>
{
return HAL_ERROR;
8001a2e: 2301 movs r3, #1
8001a30: e0cf b.n 8001bd2 <HAL_DFSDM_ChannelInit+0x1b2>
assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
#if defined(DFSDM2_Channel0)
/* Get channel counter, channel handle table and channel 0 instance */
if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
8001a32: 687b ldr r3, [r7, #4]
8001a34: 681b ldr r3, [r3, #0]
8001a36: 4a69 ldr r2, [pc, #420] @ (8001bdc <HAL_DFSDM_ChannelInit+0x1bc>)
8001a38: 4293 cmp r3, r2
8001a3a: d00e beq.n 8001a5a <HAL_DFSDM_ChannelInit+0x3a>
8001a3c: 687b ldr r3, [r7, #4]
8001a3e: 681b ldr r3, [r3, #0]
8001a40: 4a67 ldr r2, [pc, #412] @ (8001be0 <HAL_DFSDM_ChannelInit+0x1c0>)
8001a42: 4293 cmp r3, r2
8001a44: d009 beq.n 8001a5a <HAL_DFSDM_ChannelInit+0x3a>
8001a46: 687b ldr r3, [r7, #4]
8001a48: 681b ldr r3, [r3, #0]
8001a4a: 4a66 ldr r2, [pc, #408] @ (8001be4 <HAL_DFSDM_ChannelInit+0x1c4>)
8001a4c: 4293 cmp r3, r2
8001a4e: d004 beq.n 8001a5a <HAL_DFSDM_ChannelInit+0x3a>
8001a50: 687b ldr r3, [r7, #4]
8001a52: 681b ldr r3, [r3, #0]
8001a54: 4a64 ldr r2, [pc, #400] @ (8001be8 <HAL_DFSDM_ChannelInit+0x1c8>)
8001a56: 4293 cmp r3, r2
8001a58: d106 bne.n 8001a68 <HAL_DFSDM_ChannelInit+0x48>
{
channelCounterPtr = &v_dfsdm1ChannelCounter;
8001a5a: 4b64 ldr r3, [pc, #400] @ (8001bec <HAL_DFSDM_ChannelInit+0x1cc>)
8001a5c: 617b str r3, [r7, #20]
channelHandleTable = a_dfsdm1ChannelHandle;
8001a5e: 4b64 ldr r3, [pc, #400] @ (8001bf0 <HAL_DFSDM_ChannelInit+0x1d0>)
8001a60: 613b str r3, [r7, #16]
channel0Instance = DFSDM1_Channel0;
8001a62: 4b5e ldr r3, [pc, #376] @ (8001bdc <HAL_DFSDM_ChannelInit+0x1bc>)
8001a64: 60fb str r3, [r7, #12]
8001a66: e005 b.n 8001a74 <HAL_DFSDM_ChannelInit+0x54>
}
else
{
channelCounterPtr = &v_dfsdm2ChannelCounter;
8001a68: 4b62 ldr r3, [pc, #392] @ (8001bf4 <HAL_DFSDM_ChannelInit+0x1d4>)
8001a6a: 617b str r3, [r7, #20]
channelHandleTable = a_dfsdm2ChannelHandle;
8001a6c: 4b62 ldr r3, [pc, #392] @ (8001bf8 <HAL_DFSDM_ChannelInit+0x1d8>)
8001a6e: 613b str r3, [r7, #16]
channel0Instance = DFSDM2_Channel0;
8001a70: 4b62 ldr r3, [pc, #392] @ (8001bfc <HAL_DFSDM_ChannelInit+0x1dc>)
8001a72: 60fb str r3, [r7, #12]
}
/* Check that channel has not been already initialized */
if(channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
8001a74: 687b ldr r3, [r7, #4]
8001a76: 681b ldr r3, [r3, #0]
8001a78: 4618 mov r0, r3
8001a7a: f000 fad9 bl 8002030 <DFSDM_GetChannelFromInstance>
8001a7e: 4603 mov r3, r0
8001a80: 009b lsls r3, r3, #2
8001a82: 693a ldr r2, [r7, #16]
8001a84: 4413 add r3, r2
8001a86: 681b ldr r3, [r3, #0]
8001a88: 2b00 cmp r3, #0
8001a8a: d001 beq.n 8001a90 <HAL_DFSDM_ChannelInit+0x70>
{
return HAL_ERROR;
8001a8c: 2301 movs r3, #1
8001a8e: e0a0 b.n 8001bd2 <HAL_DFSDM_ChannelInit+0x1b2>
hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
}
hdfsdm_channel->MspInitCallback(hdfsdm_channel);
#else
/* Call MSP init function */
HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
8001a90: 6878 ldr r0, [r7, #4]
8001a92: f7ff fbd7 bl 8001244 <HAL_DFSDM_ChannelMspInit>
#endif
/* Update the channel counter */
(*channelCounterPtr)++;
8001a96: 697b ldr r3, [r7, #20]
8001a98: 681b ldr r3, [r3, #0]
8001a9a: 1c5a adds r2, r3, #1
8001a9c: 697b ldr r3, [r7, #20]
8001a9e: 601a str r2, [r3, #0]
/* Configure output serial clock and enable global DFSDM interface only for first channel */
if(*channelCounterPtr == 1U)
8001aa0: 697b ldr r3, [r7, #20]
8001aa2: 681b ldr r3, [r3, #0]
8001aa4: 2b01 cmp r3, #1
8001aa6: d125 bne.n 8001af4 <HAL_DFSDM_ChannelInit+0xd4>
{
assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
/* Set the output serial clock source */
channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
8001aa8: 68fb ldr r3, [r7, #12]
8001aaa: 681b ldr r3, [r3, #0]
8001aac: f023 4280 bic.w r2, r3, #1073741824 @ 0x40000000
8001ab0: 68fb ldr r3, [r7, #12]
8001ab2: 601a str r2, [r3, #0]
channel0Instance->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;
8001ab4: 68fb ldr r3, [r7, #12]
8001ab6: 681a ldr r2, [r3, #0]
8001ab8: 687b ldr r3, [r7, #4]
8001aba: 689b ldr r3, [r3, #8]
8001abc: 431a orrs r2, r3
8001abe: 68fb ldr r3, [r7, #12]
8001ac0: 601a str r2, [r3, #0]
/* Reset clock divider */
channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
8001ac2: 68fb ldr r3, [r7, #12]
8001ac4: 681b ldr r3, [r3, #0]
8001ac6: f423 027f bic.w r2, r3, #16711680 @ 0xff0000
8001aca: 68fb ldr r3, [r7, #12]
8001acc: 601a str r2, [r3, #0]
if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
8001ace: 687b ldr r3, [r7, #4]
8001ad0: 791b ldrb r3, [r3, #4]
8001ad2: 2b01 cmp r3, #1
8001ad4: d108 bne.n 8001ae8 <HAL_DFSDM_ChannelInit+0xc8>
{
assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
/* Set the output clock divider */
channel0Instance->CHCFGR1 |= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1U) <<
8001ad6: 68fb ldr r3, [r7, #12]
8001ad8: 681a ldr r2, [r3, #0]
8001ada: 687b ldr r3, [r7, #4]
8001adc: 68db ldr r3, [r3, #12]
8001ade: 3b01 subs r3, #1
8001ae0: 041b lsls r3, r3, #16
8001ae2: 431a orrs r2, r3
8001ae4: 68fb ldr r3, [r7, #12]
8001ae6: 601a str r2, [r3, #0]
DFSDM_CHCFGR1_CKOUTDIV_Pos);
}
/* enable the DFSDM global interface */
channel0Instance->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;
8001ae8: 68fb ldr r3, [r7, #12]
8001aea: 681b ldr r3, [r3, #0]
8001aec: f043 4200 orr.w r2, r3, #2147483648 @ 0x80000000
8001af0: 68fb ldr r3, [r7, #12]
8001af2: 601a str r2, [r3, #0]
}
/* Set channel input parameters */
hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX |
8001af4: 687b ldr r3, [r7, #4]
8001af6: 681b ldr r3, [r3, #0]
8001af8: 681a ldr r2, [r3, #0]
8001afa: 687b ldr r3, [r7, #4]
8001afc: 681b ldr r3, [r3, #0]
8001afe: f422 4271 bic.w r2, r2, #61696 @ 0xf100
8001b02: 601a str r2, [r3, #0]
DFSDM_CHCFGR1_CHINSEL);
hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
8001b04: 687b ldr r3, [r7, #4]
8001b06: 681b ldr r3, [r3, #0]
8001b08: 6819 ldr r1, [r3, #0]
8001b0a: 687b ldr r3, [r7, #4]
8001b0c: 691a ldr r2, [r3, #16]
hdfsdm_channel->Init.Input.DataPacking |
8001b0e: 687b ldr r3, [r7, #4]
8001b10: 695b ldr r3, [r3, #20]
hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
8001b12: 431a orrs r2, r3
hdfsdm_channel->Init.Input.Pins);
8001b14: 687b ldr r3, [r7, #4]
8001b16: 699b ldr r3, [r3, #24]
hdfsdm_channel->Init.Input.DataPacking |
8001b18: 431a orrs r2, r3
hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
8001b1a: 687b ldr r3, [r7, #4]
8001b1c: 681b ldr r3, [r3, #0]
8001b1e: 430a orrs r2, r1
8001b20: 601a str r2, [r3, #0]
/* Set serial interface parameters */
hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);
8001b22: 687b ldr r3, [r7, #4]
8001b24: 681b ldr r3, [r3, #0]
8001b26: 681a ldr r2, [r3, #0]
8001b28: 687b ldr r3, [r7, #4]
8001b2a: 681b ldr r3, [r3, #0]
8001b2c: f022 020f bic.w r2, r2, #15
8001b30: 601a str r2, [r3, #0]
hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |
8001b32: 687b ldr r3, [r7, #4]
8001b34: 681b ldr r3, [r3, #0]
8001b36: 6819 ldr r1, [r3, #0]
8001b38: 687b ldr r3, [r7, #4]
8001b3a: 69da ldr r2, [r3, #28]
hdfsdm_channel->Init.SerialInterface.SpiClock);
8001b3c: 687b ldr r3, [r7, #4]
8001b3e: 6a1b ldr r3, [r3, #32]
hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |
8001b40: 431a orrs r2, r3
8001b42: 687b ldr r3, [r7, #4]
8001b44: 681b ldr r3, [r3, #0]
8001b46: 430a orrs r2, r1
8001b48: 601a str r2, [r3, #0]
/* Set analog watchdog parameters */
hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
8001b4a: 687b ldr r3, [r7, #4]
8001b4c: 681b ldr r3, [r3, #0]
8001b4e: 689a ldr r2, [r3, #8]
8001b50: 687b ldr r3, [r7, #4]
8001b52: 681b ldr r3, [r3, #0]
8001b54: f422 025f bic.w r2, r2, #14614528 @ 0xdf0000
8001b58: 609a str r2, [r3, #8]
hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
8001b5a: 687b ldr r3, [r7, #4]
8001b5c: 681b ldr r3, [r3, #0]
8001b5e: 6899 ldr r1, [r3, #8]
8001b60: 687b ldr r3, [r7, #4]
8001b62: 6a5a ldr r2, [r3, #36] @ 0x24
((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_AWFOSR_Pos));
8001b64: 687b ldr r3, [r7, #4]
8001b66: 6a9b ldr r3, [r3, #40] @ 0x28
8001b68: 3b01 subs r3, #1
8001b6a: 041b lsls r3, r3, #16
hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
8001b6c: 431a orrs r2, r3
8001b6e: 687b ldr r3, [r7, #4]
8001b70: 681b ldr r3, [r3, #0]
8001b72: 430a orrs r2, r1
8001b74: 609a str r2, [r3, #8]
/* Set channel offset and right bit shift */
hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
8001b76: 687b ldr r3, [r7, #4]
8001b78: 681b ldr r3, [r3, #0]
8001b7a: 685a ldr r2, [r3, #4]
8001b7c: 687b ldr r3, [r7, #4]
8001b7e: 681b ldr r3, [r3, #0]
8001b80: f002 0207 and.w r2, r2, #7
8001b84: 605a str r2, [r3, #4]
hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) |
8001b86: 687b ldr r3, [r7, #4]
8001b88: 681b ldr r3, [r3, #0]
8001b8a: 6859 ldr r1, [r3, #4]
8001b8c: 687b ldr r3, [r7, #4]
8001b8e: 6adb ldr r3, [r3, #44] @ 0x2c
8001b90: 021a lsls r2, r3, #8
(hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos));
8001b92: 687b ldr r3, [r7, #4]
8001b94: 6b1b ldr r3, [r3, #48] @ 0x30
8001b96: 00db lsls r3, r3, #3
hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) |
8001b98: 431a orrs r2, r3
8001b9a: 687b ldr r3, [r7, #4]
8001b9c: 681b ldr r3, [r3, #0]
8001b9e: 430a orrs r2, r1
8001ba0: 605a str r2, [r3, #4]
/* Enable DFSDM channel */
hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
8001ba2: 687b ldr r3, [r7, #4]
8001ba4: 681b ldr r3, [r3, #0]
8001ba6: 681a ldr r2, [r3, #0]
8001ba8: 687b ldr r3, [r7, #4]
8001baa: 681b ldr r3, [r3, #0]
8001bac: f042 0280 orr.w r2, r2, #128 @ 0x80
8001bb0: 601a str r2, [r3, #0]
/* Set DFSDM Channel to ready state */
hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
8001bb2: 687b ldr r3, [r7, #4]
8001bb4: 2201 movs r2, #1
8001bb6: f883 2034 strb.w r2, [r3, #52] @ 0x34
/* Store channel handle in DFSDM channel handle table */
channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
8001bba: 687b ldr r3, [r7, #4]
8001bbc: 681b ldr r3, [r3, #0]
8001bbe: 4618 mov r0, r3
8001bc0: f000 fa36 bl 8002030 <DFSDM_GetChannelFromInstance>
8001bc4: 4603 mov r3, r0
8001bc6: 009b lsls r3, r3, #2
8001bc8: 693a ldr r2, [r7, #16]
8001bca: 4413 add r3, r2
8001bcc: 687a ldr r2, [r7, #4]
8001bce: 601a str r2, [r3, #0]
/* Store channel handle in DFSDM channel handle table */
a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
#endif /* DFSDM2_Channel0 */
return HAL_OK;
8001bd0: 2300 movs r3, #0
}
8001bd2: 4618 mov r0, r3
8001bd4: 3718 adds r7, #24
8001bd6: 46bd mov sp, r7
8001bd8: bd80 pop {r7, pc}
8001bda: bf00 nop
8001bdc: 40016000 .word 0x40016000
8001be0: 40016020 .word 0x40016020
8001be4: 40016040 .word 0x40016040
8001be8: 40016060 .word 0x40016060
8001bec: 2000fa7c .word 0x2000fa7c
8001bf0: 2000fa80 .word 0x2000fa80
8001bf4: 2000fa90 .word 0x2000fa90
8001bf8: 2000fa94 .word 0x2000fa94
8001bfc: 40016400 .word 0x40016400
08001c00 <HAL_DFSDM_FilterInit>:
* in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval HAL status.
*/
HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
{
8001c00: b580 push {r7, lr}
8001c02: b082 sub sp, #8
8001c04: af00 add r7, sp, #0
8001c06: 6078 str r0, [r7, #4]
/* Check DFSDM Channel handle */
if(hdfsdm_filter == NULL)
8001c08: 687b ldr r3, [r7, #4]
8001c0a: 2b00 cmp r3, #0
8001c0c: d101 bne.n 8001c12 <HAL_DFSDM_FilterInit+0x12>
{
return HAL_ERROR;
8001c0e: 2301 movs r3, #1
8001c10: e0d9 b.n 8001dc6 <HAL_DFSDM_FilterInit+0x1c6>
assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
/* Check parameters compatibility */
if((hdfsdm_filter->Instance == DFSDM1_Filter0) &&
8001c12: 687b ldr r3, [r7, #4]
8001c14: 681b ldr r3, [r3, #0]
8001c16: 4a6e ldr r2, [pc, #440] @ (8001dd0 <HAL_DFSDM_FilterInit+0x1d0>)
8001c18: 4293 cmp r3, r2
8001c1a: d109 bne.n 8001c30 <HAL_DFSDM_FilterInit+0x30>
((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) ||
8001c1c: 687b ldr r3, [r7, #4]
8001c1e: 685b ldr r3, [r3, #4]
if((hdfsdm_filter->Instance == DFSDM1_Filter0) &&
8001c20: 2b01 cmp r3, #1
8001c22: d003 beq.n 8001c2c <HAL_DFSDM_FilterInit+0x2c>
(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
8001c24: 687b ldr r3, [r7, #4]
8001c26: 68db ldr r3, [r3, #12]
((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) ||
8001c28: 2b01 cmp r3, #1
8001c2a: d101 bne.n 8001c30 <HAL_DFSDM_FilterInit+0x30>
{
return HAL_ERROR;
8001c2c: 2301 movs r3, #1
8001c2e: e0ca b.n 8001dc6 <HAL_DFSDM_FilterInit+0x1c6>
}
#if defined (DFSDM2_Channel0)
if((hdfsdm_filter->Instance == DFSDM2_Filter0) &&
8001c30: 687b ldr r3, [r7, #4]
8001c32: 681b ldr r3, [r3, #0]
8001c34: 4a67 ldr r2, [pc, #412] @ (8001dd4 <HAL_DFSDM_FilterInit+0x1d4>)
8001c36: 4293 cmp r3, r2
8001c38: d109 bne.n 8001c4e <HAL_DFSDM_FilterInit+0x4e>
((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) ||
8001c3a: 687b ldr r3, [r7, #4]
8001c3c: 685b ldr r3, [r3, #4]
if((hdfsdm_filter->Instance == DFSDM2_Filter0) &&
8001c3e: 2b01 cmp r3, #1
8001c40: d003 beq.n 8001c4a <HAL_DFSDM_FilterInit+0x4a>
(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
8001c42: 687b ldr r3, [r7, #4]
8001c44: 68db ldr r3, [r3, #12]
((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) ||
8001c46: 2b01 cmp r3, #1
8001c48: d101 bne.n 8001c4e <HAL_DFSDM_FilterInit+0x4e>
{
return HAL_ERROR;
8001c4a: 2301 movs r3, #1
8001c4c: e0bb b.n 8001dc6 <HAL_DFSDM_FilterInit+0x1c6>
}
#endif /* DFSDM2_Channel0 */
/* Initialize DFSDM filter variables with default values */
hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF;
8001c4e: 687b ldr r3, [r7, #4]
8001c50: 2200 movs r2, #0
8001c52: 631a str r2, [r3, #48] @ 0x30
hdfsdm_filter->InjectedChannelsNbr = 1U;
8001c54: 687b ldr r3, [r7, #4]
8001c56: 2201 movs r2, #1
8001c58: 645a str r2, [r3, #68] @ 0x44
hdfsdm_filter->InjConvRemaining = 1U;
8001c5a: 687b ldr r3, [r7, #4]
8001c5c: 2201 movs r2, #1
8001c5e: 649a str r2, [r3, #72] @ 0x48
hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE;
8001c60: 687b ldr r3, [r7, #4]
8001c62: 2200 movs r2, #0
8001c64: 651a str r2, [r3, #80] @ 0x50
hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
}
hdfsdm_filter->MspInitCallback(hdfsdm_filter);
#else
/* Call MSP init function */
HAL_DFSDM_FilterMspInit(hdfsdm_filter);
8001c66: 6878 ldr r0, [r7, #4]
8001c68: f7ff fa28 bl 80010bc <HAL_DFSDM_FilterMspInit>
#endif
/* Set regular parameters */
hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
8001c6c: 687b ldr r3, [r7, #4]
8001c6e: 681b ldr r3, [r3, #0]
8001c70: 681a ldr r2, [r3, #0]
8001c72: 687b ldr r3, [r7, #4]
8001c74: 681b ldr r3, [r3, #0]
8001c76: f422 2200 bic.w r2, r2, #524288 @ 0x80000
8001c7a: 601a str r2, [r3, #0]
if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
8001c7c: 687b ldr r3, [r7, #4]
8001c7e: 7a1b ldrb r3, [r3, #8]
8001c80: 2b01 cmp r3, #1
8001c82: d108 bne.n 8001c96 <HAL_DFSDM_FilterInit+0x96>
{
hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST;
8001c84: 687b ldr r3, [r7, #4]
8001c86: 681b ldr r3, [r3, #0]
8001c88: 681a ldr r2, [r3, #0]
8001c8a: 687b ldr r3, [r7, #4]
8001c8c: 681b ldr r3, [r3, #0]
8001c8e: f042 5200 orr.w r2, r2, #536870912 @ 0x20000000
8001c92: 601a str r2, [r3, #0]
8001c94: e007 b.n 8001ca6 <HAL_DFSDM_FilterInit+0xa6>
}
else
{
hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
8001c96: 687b ldr r3, [r7, #4]
8001c98: 681b ldr r3, [r3, #0]
8001c9a: 681a ldr r2, [r3, #0]
8001c9c: 687b ldr r3, [r7, #4]
8001c9e: 681b ldr r3, [r3, #0]
8001ca0: f022 5200 bic.w r2, r2, #536870912 @ 0x20000000
8001ca4: 601a str r2, [r3, #0]
}
if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
8001ca6: 687b ldr r3, [r7, #4]
8001ca8: 7a5b ldrb r3, [r3, #9]
8001caa: 2b01 cmp r3, #1
8001cac: d108 bne.n 8001cc0 <HAL_DFSDM_FilterInit+0xc0>
{
hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN;
8001cae: 687b ldr r3, [r7, #4]
8001cb0: 681b ldr r3, [r3, #0]
8001cb2: 681a ldr r2, [r3, #0]
8001cb4: 687b ldr r3, [r7, #4]
8001cb6: 681b ldr r3, [r3, #0]
8001cb8: f442 1200 orr.w r2, r2, #2097152 @ 0x200000
8001cbc: 601a str r2, [r3, #0]
8001cbe: e007 b.n 8001cd0 <HAL_DFSDM_FilterInit+0xd0>
}
else
{
hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
8001cc0: 687b ldr r3, [r7, #4]
8001cc2: 681b ldr r3, [r3, #0]
8001cc4: 681a ldr r2, [r3, #0]
8001cc6: 687b ldr r3, [r7, #4]
8001cc8: 681b ldr r3, [r3, #0]
8001cca: f422 1200 bic.w r2, r2, #2097152 @ 0x200000
8001cce: 601a str r2, [r3, #0]
}
/* Set injected parameters */
hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL);
8001cd0: 687b ldr r3, [r7, #4]
8001cd2: 681b ldr r3, [r3, #0]
8001cd4: 681b ldr r3, [r3, #0]
8001cd6: 687a ldr r2, [r7, #4]
8001cd8: 6812 ldr r2, [r2, #0]
8001cda: f423 43ce bic.w r3, r3, #26368 @ 0x6700
8001cde: f023 0308 bic.w r3, r3, #8
8001ce2: 6013 str r3, [r2, #0]
if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
8001ce4: 687b ldr r3, [r7, #4]
8001ce6: 68db ldr r3, [r3, #12]
8001ce8: 2b02 cmp r3, #2
8001cea: d108 bne.n 8001cfe <HAL_DFSDM_FilterInit+0xfe>
{
assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
8001cec: 687b ldr r3, [r7, #4]
8001cee: 681b ldr r3, [r3, #0]
8001cf0: 6819 ldr r1, [r3, #0]
8001cf2: 687b ldr r3, [r7, #4]
8001cf4: 695a ldr r2, [r3, #20]
8001cf6: 687b ldr r3, [r7, #4]
8001cf8: 681b ldr r3, [r3, #0]
8001cfa: 430a orrs r2, r1
8001cfc: 601a str r2, [r3, #0]
}
if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
8001cfe: 687b ldr r3, [r7, #4]
8001d00: 7c1b ldrb r3, [r3, #16]
8001d02: 2b01 cmp r3, #1
8001d04: d108 bne.n 8001d18 <HAL_DFSDM_FilterInit+0x118>
{
hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN;
8001d06: 687b ldr r3, [r7, #4]
8001d08: 681b ldr r3, [r3, #0]
8001d0a: 681a ldr r2, [r3, #0]
8001d0c: 687b ldr r3, [r7, #4]
8001d0e: 681b ldr r3, [r3, #0]
8001d10: f042 0210 orr.w r2, r2, #16
8001d14: 601a str r2, [r3, #0]
8001d16: e007 b.n 8001d28 <HAL_DFSDM_FilterInit+0x128>
}
else
{
hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
8001d18: 687b ldr r3, [r7, #4]
8001d1a: 681b ldr r3, [r3, #0]
8001d1c: 681a ldr r2, [r3, #0]
8001d1e: 687b ldr r3, [r7, #4]
8001d20: 681b ldr r3, [r3, #0]
8001d22: f022 0210 bic.w r2, r2, #16
8001d26: 601a str r2, [r3, #0]
}
if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
8001d28: 687b ldr r3, [r7, #4]
8001d2a: 7c5b ldrb r3, [r3, #17]
8001d2c: 2b01 cmp r3, #1
8001d2e: d108 bne.n 8001d42 <HAL_DFSDM_FilterInit+0x142>
{
hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN;
8001d30: 687b ldr r3, [r7, #4]
8001d32: 681b ldr r3, [r3, #0]
8001d34: 681a ldr r2, [r3, #0]
8001d36: 687b ldr r3, [r7, #4]
8001d38: 681b ldr r3, [r3, #0]
8001d3a: f042 0220 orr.w r2, r2, #32
8001d3e: 601a str r2, [r3, #0]
8001d40: e007 b.n 8001d52 <HAL_DFSDM_FilterInit+0x152>
}
else
{
hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
8001d42: 687b ldr r3, [r7, #4]
8001d44: 681b ldr r3, [r3, #0]
8001d46: 681a ldr r2, [r3, #0]
8001d48: 687b ldr r3, [r7, #4]
8001d4a: 681b ldr r3, [r3, #0]
8001d4c: f022 0220 bic.w r2, r2, #32
8001d50: 601a str r2, [r3, #0]
}
/* Set filter parameters */
hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);
8001d52: 687b ldr r3, [r7, #4]
8001d54: 681b ldr r3, [r3, #0]
8001d56: 695b ldr r3, [r3, #20]
8001d58: 687a ldr r2, [r7, #4]
8001d5a: 6812 ldr r2, [r2, #0]
8001d5c: f023 4363 bic.w r3, r3, #3808428032 @ 0xe3000000
8001d60: f003 23ff and.w r3, r3, #4278255360 @ 0xff00ff00
8001d64: 6153 str r3, [r2, #20]
hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
8001d66: 687b ldr r3, [r7, #4]
8001d68: 681b ldr r3, [r3, #0]
8001d6a: 6959 ldr r1, [r3, #20]
8001d6c: 687b ldr r3, [r7, #4]
8001d6e: 69da ldr r2, [r3, #28]
((hdfsdm_filter->Init.FilterParam.Oversampling - 1U) << DFSDM_FLTFCR_FOSR_Pos) |
8001d70: 687b ldr r3, [r7, #4]
8001d72: 6a1b ldr r3, [r3, #32]
8001d74: 3b01 subs r3, #1
8001d76: 041b lsls r3, r3, #16
hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
8001d78: 431a orrs r2, r3
(hdfsdm_filter->Init.FilterParam.IntOversampling - 1U));
8001d7a: 687b ldr r3, [r7, #4]
8001d7c: 6a5b ldr r3, [r3, #36] @ 0x24
8001d7e: 3b01 subs r3, #1
((hdfsdm_filter->Init.FilterParam.Oversampling - 1U) << DFSDM_FLTFCR_FOSR_Pos) |
8001d80: 431a orrs r2, r3
hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
8001d82: 687b ldr r3, [r7, #4]
8001d84: 681b ldr r3, [r3, #0]
8001d86: 430a orrs r2, r1
8001d88: 615a str r2, [r3, #20]
/* Store regular and injected triggers and injected scan mode*/
hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger;
8001d8a: 687b ldr r3, [r7, #4]
8001d8c: 685a ldr r2, [r3, #4]
8001d8e: 687b ldr r3, [r7, #4]
8001d90: 635a str r2, [r3, #52] @ 0x34
hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger;
8001d92: 687b ldr r3, [r7, #4]
8001d94: 68da ldr r2, [r3, #12]
8001d96: 687b ldr r3, [r7, #4]
8001d98: 639a str r2, [r3, #56] @ 0x38
hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
8001d9a: 687b ldr r3, [r7, #4]
8001d9c: 699a ldr r2, [r3, #24]
8001d9e: 687b ldr r3, [r7, #4]
8001da0: 63da str r2, [r3, #60] @ 0x3c
hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
8001da2: 687b ldr r3, [r7, #4]
8001da4: 7c1a ldrb r2, [r3, #16]
8001da6: 687b ldr r3, [r7, #4]
8001da8: f883 2040 strb.w r2, [r3, #64] @ 0x40
/* Enable DFSDM filter */
hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
8001dac: 687b ldr r3, [r7, #4]
8001dae: 681b ldr r3, [r3, #0]
8001db0: 681a ldr r2, [r3, #0]
8001db2: 687b ldr r3, [r7, #4]
8001db4: 681b ldr r3, [r3, #0]
8001db6: f042 0201 orr.w r2, r2, #1
8001dba: 601a str r2, [r3, #0]
/* Set DFSDM filter to ready state */
hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
8001dbc: 687b ldr r3, [r7, #4]
8001dbe: 2201 movs r2, #1
8001dc0: f883 204c strb.w r2, [r3, #76] @ 0x4c
return HAL_OK;
8001dc4: 2300 movs r3, #0
}
8001dc6: 4618 mov r0, r3
8001dc8: 3708 adds r7, #8
8001dca: 46bd mov sp, r7
8001dcc: bd80 pop {r7, pc}
8001dce: bf00 nop
8001dd0: 40016100 .word 0x40016100
8001dd4: 40016500 .word 0x40016500
08001dd8 <HAL_DFSDM_FilterConfigRegChannel>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
uint32_t Channel,
uint32_t ContinuousMode)
{
8001dd8: b480 push {r7}
8001dda: b087 sub sp, #28
8001ddc: af00 add r7, sp, #0
8001dde: 60f8 str r0, [r7, #12]
8001de0: 60b9 str r1, [r7, #8]
8001de2: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8001de4: 2300 movs r3, #0
8001de6: 75fb strb r3, [r7, #23]
assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
/* Check DFSDM filter state */
if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
8001de8: 68fb ldr r3, [r7, #12]
8001dea: f893 304c ldrb.w r3, [r3, #76] @ 0x4c
8001dee: 2b00 cmp r3, #0
8001df0: d02e beq.n 8001e50 <HAL_DFSDM_FilterConfigRegChannel+0x78>
(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
8001df2: 68fb ldr r3, [r7, #12]
8001df4: f893 304c ldrb.w r3, [r3, #76] @ 0x4c
if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
8001df8: 2bff cmp r3, #255 @ 0xff
8001dfa: d029 beq.n 8001e50 <HAL_DFSDM_FilterConfigRegChannel+0x78>
{
/* Configure channel and continuous mode for regular conversion */
hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT);
8001dfc: 68fb ldr r3, [r7, #12]
8001dfe: 681b ldr r3, [r3, #0]
8001e00: 681b ldr r3, [r3, #0]
8001e02: 68fa ldr r2, [r7, #12]
8001e04: 6812 ldr r2, [r2, #0]
8001e06: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000
8001e0a: f423 2380 bic.w r3, r3, #262144 @ 0x40000
8001e0e: 6013 str r3, [r2, #0]
if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
8001e10: 687b ldr r3, [r7, #4]
8001e12: 2b01 cmp r3, #1
8001e14: d10d bne.n 8001e32 <HAL_DFSDM_FilterConfigRegChannel+0x5a>
{
hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) |
8001e16: 68fb ldr r3, [r7, #12]
8001e18: 681b ldr r3, [r3, #0]
8001e1a: 681a ldr r2, [r3, #0]
8001e1c: 68bb ldr r3, [r7, #8]
8001e1e: 021b lsls r3, r3, #8
8001e20: f003 437f and.w r3, r3, #4278190080 @ 0xff000000
8001e24: 431a orrs r2, r3
8001e26: 68fb ldr r3, [r7, #12]
8001e28: 681b ldr r3, [r3, #0]
8001e2a: f442 2280 orr.w r2, r2, #262144 @ 0x40000
8001e2e: 601a str r2, [r3, #0]
8001e30: e00a b.n 8001e48 <HAL_DFSDM_FilterConfigRegChannel+0x70>
DFSDM_FLTCR1_RCONT);
}
else
{
hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
8001e32: 68fb ldr r3, [r7, #12]
8001e34: 681b ldr r3, [r3, #0]
8001e36: 6819 ldr r1, [r3, #0]
8001e38: 68bb ldr r3, [r7, #8]
8001e3a: 021b lsls r3, r3, #8
8001e3c: f003 427f and.w r2, r3, #4278190080 @ 0xff000000
8001e40: 68fb ldr r3, [r7, #12]
8001e42: 681b ldr r3, [r3, #0]
8001e44: 430a orrs r2, r1
8001e46: 601a str r2, [r3, #0]
}
/* Store continuous mode information */
hdfsdm_filter->RegularContMode = ContinuousMode;
8001e48: 68fb ldr r3, [r7, #12]
8001e4a: 687a ldr r2, [r7, #4]
8001e4c: 631a str r2, [r3, #48] @ 0x30
8001e4e: e001 b.n 8001e54 <HAL_DFSDM_FilterConfigRegChannel+0x7c>
}
else
{
status = HAL_ERROR;
8001e50: 2301 movs r3, #1
8001e52: 75fb strb r3, [r7, #23]
}
/* Return function status */
return status;
8001e54: 7dfb ldrb r3, [r7, #23]
}
8001e56: 4618 mov r0, r3
8001e58: 371c adds r7, #28
8001e5a: 46bd mov sp, r7
8001e5c: f85d 7b04 ldr.w r7, [sp], #4
8001e60: 4770 bx lr
...
08001e64 <HAL_DFSDM_FilterRegularStart_DMA>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
int32_t *pData,
uint32_t Length)
{
8001e64: b580 push {r7, lr}
8001e66: b086 sub sp, #24
8001e68: af00 add r7, sp, #0
8001e6a: 60f8 str r0, [r7, #12]
8001e6c: 60b9 str r1, [r7, #8]
8001e6e: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8001e70: 2300 movs r3, #0
8001e72: 75fb strb r3, [r7, #23]
/* Check parameters */
assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
/* Check destination address and length */
if((pData == NULL) || (Length == 0U))
8001e74: 68bb ldr r3, [r7, #8]
8001e76: 2b00 cmp r3, #0
8001e78: d002 beq.n 8001e80 <HAL_DFSDM_FilterRegularStart_DMA+0x1c>
8001e7a: 687b ldr r3, [r7, #4]
8001e7c: 2b00 cmp r3, #0
8001e7e: d102 bne.n 8001e86 <HAL_DFSDM_FilterRegularStart_DMA+0x22>
{
status = HAL_ERROR;
8001e80: 2301 movs r3, #1
8001e82: 75fb strb r3, [r7, #23]
8001e84: e066 b.n 8001f54 <HAL_DFSDM_FilterRegularStart_DMA+0xf0>
}
/* Check that DMA is enabled for regular conversion */
else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
8001e86: 68fb ldr r3, [r7, #12]
8001e88: 681b ldr r3, [r3, #0]
8001e8a: 681b ldr r3, [r3, #0]
8001e8c: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8001e90: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
8001e94: d002 beq.n 8001e9c <HAL_DFSDM_FilterRegularStart_DMA+0x38>
{
status = HAL_ERROR;
8001e96: 2301 movs r3, #1
8001e98: 75fb strb r3, [r7, #23]
8001e9a: e05b b.n 8001f54 <HAL_DFSDM_FilterRegularStart_DMA+0xf0>
}
/* Check parameters compatibility */
else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
8001e9c: 68fb ldr r3, [r7, #12]
8001e9e: 6b5b ldr r3, [r3, #52] @ 0x34
8001ea0: 2b00 cmp r3, #0
8001ea2: d10e bne.n 8001ec2 <HAL_DFSDM_FilterRegularStart_DMA+0x5e>
(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
8001ea4: 68fb ldr r3, [r7, #12]
8001ea6: 6b1b ldr r3, [r3, #48] @ 0x30
else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
8001ea8: 2b00 cmp r3, #0
8001eaa: d10a bne.n 8001ec2 <HAL_DFSDM_FilterRegularStart_DMA+0x5e>
(hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
8001eac: 68fb ldr r3, [r7, #12]
8001eae: 6a9b ldr r3, [r3, #40] @ 0x28
8001eb0: 69db ldr r3, [r3, #28]
(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
8001eb2: 2b00 cmp r3, #0
8001eb4: d105 bne.n 8001ec2 <HAL_DFSDM_FilterRegularStart_DMA+0x5e>
(hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
8001eb6: 687b ldr r3, [r7, #4]
8001eb8: 2b01 cmp r3, #1
8001eba: d002 beq.n 8001ec2 <HAL_DFSDM_FilterRegularStart_DMA+0x5e>
(Length != 1U))
{
status = HAL_ERROR;
8001ebc: 2301 movs r3, #1
8001ebe: 75fb strb r3, [r7, #23]
8001ec0: e048 b.n 8001f54 <HAL_DFSDM_FilterRegularStart_DMA+0xf0>
}
else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
8001ec2: 68fb ldr r3, [r7, #12]
8001ec4: 6b5b ldr r3, [r3, #52] @ 0x34
8001ec6: 2b00 cmp r3, #0
8001ec8: d10c bne.n 8001ee4 <HAL_DFSDM_FilterRegularStart_DMA+0x80>
(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
8001eca: 68fb ldr r3, [r7, #12]
8001ecc: 6b1b ldr r3, [r3, #48] @ 0x30
else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
8001ece: 2b00 cmp r3, #0
8001ed0: d108 bne.n 8001ee4 <HAL_DFSDM_FilterRegularStart_DMA+0x80>
(hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
8001ed2: 68fb ldr r3, [r7, #12]
8001ed4: 6a9b ldr r3, [r3, #40] @ 0x28
8001ed6: 69db ldr r3, [r3, #28]
(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
8001ed8: f5b3 7f80 cmp.w r3, #256 @ 0x100
8001edc: d102 bne.n 8001ee4 <HAL_DFSDM_FilterRegularStart_DMA+0x80>
{
status = HAL_ERROR;
8001ede: 2301 movs r3, #1
8001ee0: 75fb strb r3, [r7, #23]
8001ee2: e037 b.n 8001f54 <HAL_DFSDM_FilterRegularStart_DMA+0xf0>
}
/* Check DFSDM filter state */
else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
8001ee4: 68fb ldr r3, [r7, #12]
8001ee6: f893 304c ldrb.w r3, [r3, #76] @ 0x4c
8001eea: 2b01 cmp r3, #1
8001eec: d004 beq.n 8001ef8 <HAL_DFSDM_FilterRegularStart_DMA+0x94>
(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
8001eee: 68fb ldr r3, [r7, #12]
8001ef0: f893 304c ldrb.w r3, [r3, #76] @ 0x4c
else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
8001ef4: 2b03 cmp r3, #3
8001ef6: d12b bne.n 8001f50 <HAL_DFSDM_FilterRegularStart_DMA+0xec>
{
/* Set callbacks on DMA handler */
hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
8001ef8: 68fb ldr r3, [r7, #12]
8001efa: 6a9b ldr r3, [r3, #40] @ 0x28
8001efc: 4a18 ldr r2, [pc, #96] @ (8001f60 <HAL_DFSDM_FilterRegularStart_DMA+0xfc>)
8001efe: 63da str r2, [r3, #60] @ 0x3c
hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
8001f00: 68fb ldr r3, [r7, #12]
8001f02: 6a9b ldr r3, [r3, #40] @ 0x28
8001f04: 4a17 ldr r2, [pc, #92] @ (8001f64 <HAL_DFSDM_FilterRegularStart_DMA+0x100>)
8001f06: 64da str r2, [r3, #76] @ 0x4c
hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
8001f08: 68fb ldr r3, [r7, #12]
8001f0a: 6a9b ldr r3, [r3, #40] @ 0x28
8001f0c: 69db ldr r3, [r3, #28]
DFSDM_DMARegularHalfConvCplt : NULL;
8001f0e: f5b3 7f80 cmp.w r3, #256 @ 0x100
8001f12: d101 bne.n 8001f18 <HAL_DFSDM_FilterRegularStart_DMA+0xb4>
8001f14: 4a14 ldr r2, [pc, #80] @ (8001f68 <HAL_DFSDM_FilterRegularStart_DMA+0x104>)
8001f16: e000 b.n 8001f1a <HAL_DFSDM_FilterRegularStart_DMA+0xb6>
8001f18: 2200 movs r2, #0
hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
8001f1a: 68fb ldr r3, [r7, #12]
8001f1c: 6a9b ldr r3, [r3, #40] @ 0x28
8001f1e: 641a str r2, [r3, #64] @ 0x40
/* Start DMA in interrupt mode */
if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
8001f20: 68fb ldr r3, [r7, #12]
8001f22: 6a98 ldr r0, [r3, #40] @ 0x28
8001f24: 68fb ldr r3, [r7, #12]
8001f26: 681b ldr r3, [r3, #0]
8001f28: 331c adds r3, #28
8001f2a: 4619 mov r1, r3
8001f2c: 68ba ldr r2, [r7, #8]
8001f2e: 687b ldr r3, [r7, #4]
8001f30: f000 fa34 bl 800239c <HAL_DMA_Start_IT>
8001f34: 4603 mov r3, r0
8001f36: 2b00 cmp r3, #0
8001f38: d006 beq.n 8001f48 <HAL_DFSDM_FilterRegularStart_DMA+0xe4>
(uint32_t) pData, Length) != HAL_OK)
{
/* Set DFSDM filter in error state */
hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
8001f3a: 68fb ldr r3, [r7, #12]
8001f3c: 22ff movs r2, #255 @ 0xff
8001f3e: f883 204c strb.w r2, [r3, #76] @ 0x4c
status = HAL_ERROR;
8001f42: 2301 movs r3, #1
8001f44: 75fb strb r3, [r7, #23]
if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
8001f46: e005 b.n 8001f54 <HAL_DFSDM_FilterRegularStart_DMA+0xf0>
}
else
{
/* Start regular conversion */
DFSDM_RegConvStart(hdfsdm_filter);
8001f48: 68f8 ldr r0, [r7, #12]
8001f4a: f000 f8d5 bl 80020f8 <DFSDM_RegConvStart>
if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
8001f4e: e001 b.n 8001f54 <HAL_DFSDM_FilterRegularStart_DMA+0xf0>
}
}
else
{
status = HAL_ERROR;
8001f50: 2301 movs r3, #1
8001f52: 75fb strb r3, [r7, #23]
}
/* Return function status */
return status;
8001f54: 7dfb ldrb r3, [r7, #23]
}
8001f56: 4618 mov r0, r3
8001f58: 3718 adds r7, #24
8001f5a: 46bd mov sp, r7
8001f5c: bd80 pop {r7, pc}
8001f5e: bf00 nop
8001f60: 08001ff1 .word 0x08001ff1
8001f64: 0800200d .word 0x0800200d
8001f68: 08001fd5 .word 0x08001fd5
08001f6c <HAL_DFSDM_FilterRegularStop_DMA>:
* @note This function should be called only if regular conversion is ongoing.
* @param hdfsdm_filter DFSDM filter handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
{
8001f6c: b580 push {r7, lr}
8001f6e: b084 sub sp, #16
8001f70: af00 add r7, sp, #0
8001f72: 6078 str r0, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8001f74: 2300 movs r3, #0
8001f76: 73fb strb r3, [r7, #15]
/* Check parameters */
assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
/* Check DFSDM filter state */
if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
8001f78: 687b ldr r3, [r7, #4]
8001f7a: f893 304c ldrb.w r3, [r3, #76] @ 0x4c
8001f7e: 2b02 cmp r3, #2
8001f80: d007 beq.n 8001f92 <HAL_DFSDM_FilterRegularStop_DMA+0x26>
(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
8001f82: 687b ldr r3, [r7, #4]
8001f84: f893 304c ldrb.w r3, [r3, #76] @ 0x4c
if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
8001f88: 2b04 cmp r3, #4
8001f8a: d002 beq.n 8001f92 <HAL_DFSDM_FilterRegularStop_DMA+0x26>
{
/* Return error status */
status = HAL_ERROR;
8001f8c: 2301 movs r3, #1
8001f8e: 73fb strb r3, [r7, #15]
8001f90: e011 b.n 8001fb6 <HAL_DFSDM_FilterRegularStop_DMA+0x4a>
}
else
{
/* Stop current DMA transfer */
if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
8001f92: 687b ldr r3, [r7, #4]
8001f94: 6a9b ldr r3, [r3, #40] @ 0x28
8001f96: 4618 mov r0, r3
8001f98: f000 fa58 bl 800244c <HAL_DMA_Abort>
8001f9c: 4603 mov r3, r0
8001f9e: 2b00 cmp r3, #0
8001fa0: d006 beq.n 8001fb0 <HAL_DFSDM_FilterRegularStop_DMA+0x44>
{
/* Set DFSDM filter in error state */
hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
8001fa2: 687b ldr r3, [r7, #4]
8001fa4: 22ff movs r2, #255 @ 0xff
8001fa6: f883 204c strb.w r2, [r3, #76] @ 0x4c
status = HAL_ERROR;
8001faa: 2301 movs r3, #1
8001fac: 73fb strb r3, [r7, #15]
8001fae: e002 b.n 8001fb6 <HAL_DFSDM_FilterRegularStop_DMA+0x4a>
}
else
{
/* Stop regular conversion */
DFSDM_RegConvStop(hdfsdm_filter);
8001fb0: 6878 ldr r0, [r7, #4]
8001fb2: f000 f8f7 bl 80021a4 <DFSDM_RegConvStop>
}
}
/* Return function status */
return status;
8001fb6: 7bfb ldrb r3, [r7, #15]
}
8001fb8: 4618 mov r0, r3
8001fba: 3710 adds r7, #16
8001fbc: 46bd mov sp, r7
8001fbe: bd80 pop {r7, pc}
08001fc0 <HAL_DFSDM_FilterErrorCallback>:
* @brief Error callback.
* @param hdfsdm_filter DFSDM filter handle.
* @retval None
*/
__weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
{
8001fc0: b480 push {r7}
8001fc2: b083 sub sp, #12
8001fc4: af00 add r7, sp, #0
8001fc6: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hdfsdm_filter);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
*/
}
8001fc8: bf00 nop
8001fca: 370c adds r7, #12
8001fcc: 46bd mov sp, r7
8001fce: f85d 7b04 ldr.w r7, [sp], #4
8001fd2: 4770 bx lr
08001fd4 <DFSDM_DMARegularHalfConvCplt>:
* @brief DMA half transfer complete callback for regular conversion.
* @param hdma DMA handle.
* @retval None
*/
static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
{
8001fd4: b580 push {r7, lr}
8001fd6: b084 sub sp, #16
8001fd8: af00 add r7, sp, #0
8001fda: 6078 str r0, [r7, #4]
/* Get DFSDM filter handle */
DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
8001fdc: 687b ldr r3, [r7, #4]
8001fde: 6b9b ldr r3, [r3, #56] @ 0x38
8001fe0: 60fb str r3, [r7, #12]
/* Call regular half conversion complete callback */
#if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
hdfsdm_filter->RegConvHalfCpltCallback(hdfsdm_filter);
#else
HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
8001fe2: 68f8 ldr r0, [r7, #12]
8001fe4: f7fe fd6c bl 8000ac0 <HAL_DFSDM_FilterRegConvHalfCpltCallback>
#endif
}
8001fe8: bf00 nop
8001fea: 3710 adds r7, #16
8001fec: 46bd mov sp, r7
8001fee: bd80 pop {r7, pc}
08001ff0 <DFSDM_DMARegularConvCplt>:
* @brief DMA transfer complete callback for regular conversion.
* @param hdma DMA handle.
* @retval None
*/
static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
{
8001ff0: b580 push {r7, lr}
8001ff2: b084 sub sp, #16
8001ff4: af00 add r7, sp, #0
8001ff6: 6078 str r0, [r7, #4]
/* Get DFSDM filter handle */
DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
8001ff8: 687b ldr r3, [r7, #4]
8001ffa: 6b9b ldr r3, [r3, #56] @ 0x38
8001ffc: 60fb str r3, [r7, #12]
/* Call regular conversion complete callback */
#if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);
#else
HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
8001ffe: 68f8 ldr r0, [r7, #12]
8002000: f7fe fd74 bl 8000aec <HAL_DFSDM_FilterRegConvCpltCallback>
#endif
}
8002004: bf00 nop
8002006: 3710 adds r7, #16
8002008: 46bd mov sp, r7
800200a: bd80 pop {r7, pc}
0800200c <DFSDM_DMAError>:
* @brief DMA error callback.
* @param hdma DMA handle.
* @retval None
*/
static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
{
800200c: b580 push {r7, lr}
800200e: b084 sub sp, #16
8002010: af00 add r7, sp, #0
8002012: 6078 str r0, [r7, #4]
/* Get DFSDM filter handle */
DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
8002014: 687b ldr r3, [r7, #4]
8002016: 6b9b ldr r3, [r3, #56] @ 0x38
8002018: 60fb str r3, [r7, #12]
/* Update error code */
hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
800201a: 68fb ldr r3, [r7, #12]
800201c: 2203 movs r2, #3
800201e: 651a str r2, [r3, #80] @ 0x50
/* Call error callback */
#if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
hdfsdm_filter->ErrorCallback(hdfsdm_filter);
#else
HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
8002020: 68f8 ldr r0, [r7, #12]
8002022: f7ff ffcd bl 8001fc0 <HAL_DFSDM_FilterErrorCallback>
#endif
}
8002026: bf00 nop
8002028: 3710 adds r7, #16
800202a: 46bd mov sp, r7
800202c: bd80 pop {r7, pc}
...
08002030 <DFSDM_GetChannelFromInstance>:
* @brief This function allows to get the channel number from channel instance.
* @param Instance DFSDM channel instance.
* @retval Channel number.
*/
static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef *Instance)
{
8002030: b480 push {r7}
8002032: b085 sub sp, #20
8002034: af00 add r7, sp, #0
8002036: 6078 str r0, [r7, #4]
uint32_t channel;
/* Get channel from instance */
#if defined(DFSDM2_Channel0)
if((Instance == DFSDM1_Channel0) || (Instance == DFSDM2_Channel0))
8002038: 687b ldr r3, [r7, #4]
800203a: 4a24 ldr r2, [pc, #144] @ (80020cc <DFSDM_GetChannelFromInstance+0x9c>)
800203c: 4293 cmp r3, r2
800203e: d003 beq.n 8002048 <DFSDM_GetChannelFromInstance+0x18>
8002040: 687b ldr r3, [r7, #4]
8002042: 4a23 ldr r2, [pc, #140] @ (80020d0 <DFSDM_GetChannelFromInstance+0xa0>)
8002044: 4293 cmp r3, r2
8002046: d102 bne.n 800204e <DFSDM_GetChannelFromInstance+0x1e>
{
channel = 0U;
8002048: 2300 movs r3, #0
800204a: 60fb str r3, [r7, #12]
800204c: e037 b.n 80020be <DFSDM_GetChannelFromInstance+0x8e>
}
else if((Instance == DFSDM1_Channel1) || (Instance == DFSDM2_Channel1))
800204e: 687b ldr r3, [r7, #4]
8002050: 4a20 ldr r2, [pc, #128] @ (80020d4 <DFSDM_GetChannelFromInstance+0xa4>)
8002052: 4293 cmp r3, r2
8002054: d003 beq.n 800205e <DFSDM_GetChannelFromInstance+0x2e>
8002056: 687b ldr r3, [r7, #4]
8002058: 4a1f ldr r2, [pc, #124] @ (80020d8 <DFSDM_GetChannelFromInstance+0xa8>)
800205a: 4293 cmp r3, r2
800205c: d102 bne.n 8002064 <DFSDM_GetChannelFromInstance+0x34>
{
channel = 1U;
800205e: 2301 movs r3, #1
8002060: 60fb str r3, [r7, #12]
8002062: e02c b.n 80020be <DFSDM_GetChannelFromInstance+0x8e>
}
else if((Instance == DFSDM1_Channel2) || (Instance == DFSDM2_Channel2))
8002064: 687b ldr r3, [r7, #4]
8002066: 4a1d ldr r2, [pc, #116] @ (80020dc <DFSDM_GetChannelFromInstance+0xac>)
8002068: 4293 cmp r3, r2
800206a: d003 beq.n 8002074 <DFSDM_GetChannelFromInstance+0x44>
800206c: 687b ldr r3, [r7, #4]
800206e: 4a1c ldr r2, [pc, #112] @ (80020e0 <DFSDM_GetChannelFromInstance+0xb0>)
8002070: 4293 cmp r3, r2
8002072: d102 bne.n 800207a <DFSDM_GetChannelFromInstance+0x4a>
{
channel = 2U;
8002074: 2302 movs r3, #2
8002076: 60fb str r3, [r7, #12]
8002078: e021 b.n 80020be <DFSDM_GetChannelFromInstance+0x8e>
}
else if((Instance == DFSDM1_Channel3) || (Instance == DFSDM2_Channel3))
800207a: 687b ldr r3, [r7, #4]
800207c: 4a19 ldr r2, [pc, #100] @ (80020e4 <DFSDM_GetChannelFromInstance+0xb4>)
800207e: 4293 cmp r3, r2
8002080: d003 beq.n 800208a <DFSDM_GetChannelFromInstance+0x5a>
8002082: 687b ldr r3, [r7, #4]
8002084: 4a18 ldr r2, [pc, #96] @ (80020e8 <DFSDM_GetChannelFromInstance+0xb8>)
8002086: 4293 cmp r3, r2
8002088: d102 bne.n 8002090 <DFSDM_GetChannelFromInstance+0x60>
{
channel = 3U;
800208a: 2303 movs r3, #3
800208c: 60fb str r3, [r7, #12]
800208e: e016 b.n 80020be <DFSDM_GetChannelFromInstance+0x8e>
}
else if(Instance == DFSDM2_Channel4)
8002090: 687b ldr r3, [r7, #4]
8002092: 4a16 ldr r2, [pc, #88] @ (80020ec <DFSDM_GetChannelFromInstance+0xbc>)
8002094: 4293 cmp r3, r2
8002096: d102 bne.n 800209e <DFSDM_GetChannelFromInstance+0x6e>
{
channel = 4U;
8002098: 2304 movs r3, #4
800209a: 60fb str r3, [r7, #12]
800209c: e00f b.n 80020be <DFSDM_GetChannelFromInstance+0x8e>
}
else if(Instance == DFSDM2_Channel5)
800209e: 687b ldr r3, [r7, #4]
80020a0: 4a13 ldr r2, [pc, #76] @ (80020f0 <DFSDM_GetChannelFromInstance+0xc0>)
80020a2: 4293 cmp r3, r2
80020a4: d102 bne.n 80020ac <DFSDM_GetChannelFromInstance+0x7c>
{
channel = 5U;
80020a6: 2305 movs r3, #5
80020a8: 60fb str r3, [r7, #12]
80020aa: e008 b.n 80020be <DFSDM_GetChannelFromInstance+0x8e>
}
else if(Instance == DFSDM2_Channel6)
80020ac: 687b ldr r3, [r7, #4]
80020ae: 4a11 ldr r2, [pc, #68] @ (80020f4 <DFSDM_GetChannelFromInstance+0xc4>)
80020b0: 4293 cmp r3, r2
80020b2: d102 bne.n 80020ba <DFSDM_GetChannelFromInstance+0x8a>
{
channel = 6U;
80020b4: 2306 movs r3, #6
80020b6: 60fb str r3, [r7, #12]
80020b8: e001 b.n 80020be <DFSDM_GetChannelFromInstance+0x8e>
}
else /* DFSDM2_Channel7 */
{
channel = 7U;
80020ba: 2307 movs r3, #7
80020bc: 60fb str r3, [r7, #12]
{
channel = 3U;
}
#endif /* defined(DFSDM2_Channel0) */
return channel;
80020be: 68fb ldr r3, [r7, #12]
}
80020c0: 4618 mov r0, r3
80020c2: 3714 adds r7, #20
80020c4: 46bd mov sp, r7
80020c6: f85d 7b04 ldr.w r7, [sp], #4
80020ca: 4770 bx lr
80020cc: 40016000 .word 0x40016000
80020d0: 40016400 .word 0x40016400
80020d4: 40016020 .word 0x40016020
80020d8: 40016420 .word 0x40016420
80020dc: 40016040 .word 0x40016040
80020e0: 40016440 .word 0x40016440
80020e4: 40016060 .word 0x40016060
80020e8: 40016460 .word 0x40016460
80020ec: 40016480 .word 0x40016480
80020f0: 400164a0 .word 0x400164a0
80020f4: 400164c0 .word 0x400164c0
080020f8 <DFSDM_RegConvStart>:
* @brief This function allows to really start regular conversion.
* @param hdfsdm_filter DFSDM filter handle.
* @retval None
*/
static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
{
80020f8: b480 push {r7}
80020fa: b083 sub sp, #12
80020fc: af00 add r7, sp, #0
80020fe: 6078 str r0, [r7, #4]
/* Check regular trigger */
if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
8002100: 687b ldr r3, [r7, #4]
8002102: 6b5b ldr r3, [r3, #52] @ 0x34
8002104: 2b00 cmp r3, #0
8002106: d108 bne.n 800211a <DFSDM_RegConvStart+0x22>
{
/* Software start of regular conversion */
hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
8002108: 687b ldr r3, [r7, #4]
800210a: 681b ldr r3, [r3, #0]
800210c: 681a ldr r2, [r3, #0]
800210e: 687b ldr r3, [r7, #4]
8002110: 681b ldr r3, [r3, #0]
8002112: f442 3200 orr.w r2, r2, #131072 @ 0x20000
8002116: 601a str r2, [r3, #0]
8002118: e033 b.n 8002182 <DFSDM_RegConvStart+0x8a>
}
else /* synchronous trigger */
{
/* Disable DFSDM filter */
hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
800211a: 687b ldr r3, [r7, #4]
800211c: 681b ldr r3, [r3, #0]
800211e: 681a ldr r2, [r3, #0]
8002120: 687b ldr r3, [r7, #4]
8002122: 681b ldr r3, [r3, #0]
8002124: f022 0201 bic.w r2, r2, #1
8002128: 601a str r2, [r3, #0]
/* Set RSYNC bit in DFSDM_FLTCR1 register */
hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC;
800212a: 687b ldr r3, [r7, #4]
800212c: 681b ldr r3, [r3, #0]
800212e: 681a ldr r2, [r3, #0]
8002130: 687b ldr r3, [r7, #4]
8002132: 681b ldr r3, [r3, #0]
8002134: f442 2200 orr.w r2, r2, #524288 @ 0x80000
8002138: 601a str r2, [r3, #0]
/* Enable DFSDM filter */
hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
800213a: 687b ldr r3, [r7, #4]
800213c: 681b ldr r3, [r3, #0]
800213e: 681a ldr r2, [r3, #0]
8002140: 687b ldr r3, [r7, #4]
8002142: 681b ldr r3, [r3, #0]
8002144: f042 0201 orr.w r2, r2, #1
8002148: 601a str r2, [r3, #0]
/* If injected conversion was in progress, restart it */
if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
800214a: 687b ldr r3, [r7, #4]
800214c: f893 304c ldrb.w r3, [r3, #76] @ 0x4c
8002150: 2b03 cmp r3, #3
8002152: d116 bne.n 8002182 <DFSDM_RegConvStart+0x8a>
{
if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
8002154: 687b ldr r3, [r7, #4]
8002156: 6b9b ldr r3, [r3, #56] @ 0x38
8002158: 2b00 cmp r3, #0
800215a: d107 bne.n 800216c <DFSDM_RegConvStart+0x74>
{
hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
800215c: 687b ldr r3, [r7, #4]
800215e: 681b ldr r3, [r3, #0]
8002160: 681a ldr r2, [r3, #0]
8002162: 687b ldr r3, [r7, #4]
8002164: 681b ldr r3, [r3, #0]
8002166: f042 0202 orr.w r2, r2, #2
800216a: 601a str r2, [r3, #0]
}
/* Update remaining injected conversions */
hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
800216c: 687b ldr r3, [r7, #4]
800216e: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
hdfsdm_filter->InjectedChannelsNbr : 1U;
8002172: 2b01 cmp r3, #1
8002174: d102 bne.n 800217c <DFSDM_RegConvStart+0x84>
8002176: 687b ldr r3, [r7, #4]
8002178: 6c5b ldr r3, [r3, #68] @ 0x44
800217a: e000 b.n 800217e <DFSDM_RegConvStart+0x86>
800217c: 2301 movs r3, #1
hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
800217e: 687a ldr r2, [r7, #4]
8002180: 6493 str r3, [r2, #72] @ 0x48
}
}
/* Update DFSDM filter state */
hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
8002182: 687b ldr r3, [r7, #4]
8002184: f893 304c ldrb.w r3, [r3, #76] @ 0x4c
HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
8002188: 2b01 cmp r3, #1
800218a: d101 bne.n 8002190 <DFSDM_RegConvStart+0x98>
800218c: 2202 movs r2, #2
800218e: e000 b.n 8002192 <DFSDM_RegConvStart+0x9a>
8002190: 2204 movs r2, #4
hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
8002192: 687b ldr r3, [r7, #4]
8002194: f883 204c strb.w r2, [r3, #76] @ 0x4c
}
8002198: bf00 nop
800219a: 370c adds r7, #12
800219c: 46bd mov sp, r7
800219e: f85d 7b04 ldr.w r7, [sp], #4
80021a2: 4770 bx lr
080021a4 <DFSDM_RegConvStop>:
* @brief This function allows to really stop regular conversion.
* @param hdfsdm_filter DFSDM filter handle.
* @retval None
*/
static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
{
80021a4: b480 push {r7}
80021a6: b083 sub sp, #12
80021a8: af00 add r7, sp, #0
80021aa: 6078 str r0, [r7, #4]
/* Disable DFSDM filter */
hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
80021ac: 687b ldr r3, [r7, #4]
80021ae: 681b ldr r3, [r3, #0]
80021b0: 681a ldr r2, [r3, #0]
80021b2: 687b ldr r3, [r7, #4]
80021b4: 681b ldr r3, [r3, #0]
80021b6: f022 0201 bic.w r2, r2, #1
80021ba: 601a str r2, [r3, #0]
/* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
80021bc: 687b ldr r3, [r7, #4]
80021be: 6b5b ldr r3, [r3, #52] @ 0x34
80021c0: 2b01 cmp r3, #1
80021c2: d107 bne.n 80021d4 <DFSDM_RegConvStop+0x30>
{
hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
80021c4: 687b ldr r3, [r7, #4]
80021c6: 681b ldr r3, [r3, #0]
80021c8: 681a ldr r2, [r3, #0]
80021ca: 687b ldr r3, [r7, #4]
80021cc: 681b ldr r3, [r3, #0]
80021ce: f422 2200 bic.w r2, r2, #524288 @ 0x80000
80021d2: 601a str r2, [r3, #0]
}
/* Enable DFSDM filter */
hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
80021d4: 687b ldr r3, [r7, #4]
80021d6: 681b ldr r3, [r3, #0]
80021d8: 681a ldr r2, [r3, #0]
80021da: 687b ldr r3, [r7, #4]
80021dc: 681b ldr r3, [r3, #0]
80021de: f042 0201 orr.w r2, r2, #1
80021e2: 601a str r2, [r3, #0]
/* If injected conversion was in progress, restart it */
if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
80021e4: 687b ldr r3, [r7, #4]
80021e6: f893 304c ldrb.w r3, [r3, #76] @ 0x4c
80021ea: 2b04 cmp r3, #4
80021ec: d116 bne.n 800221c <DFSDM_RegConvStop+0x78>
{
if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
80021ee: 687b ldr r3, [r7, #4]
80021f0: 6b9b ldr r3, [r3, #56] @ 0x38
80021f2: 2b00 cmp r3, #0
80021f4: d107 bne.n 8002206 <DFSDM_RegConvStop+0x62>
{
hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
80021f6: 687b ldr r3, [r7, #4]
80021f8: 681b ldr r3, [r3, #0]
80021fa: 681a ldr r2, [r3, #0]
80021fc: 687b ldr r3, [r7, #4]
80021fe: 681b ldr r3, [r3, #0]
8002200: f042 0202 orr.w r2, r2, #2
8002204: 601a str r2, [r3, #0]
}
/* Update remaining injected conversions */
hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
8002206: 687b ldr r3, [r7, #4]
8002208: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
hdfsdm_filter->InjectedChannelsNbr : 1U;
800220c: 2b01 cmp r3, #1
800220e: d102 bne.n 8002216 <DFSDM_RegConvStop+0x72>
8002210: 687b ldr r3, [r7, #4]
8002212: 6c5b ldr r3, [r3, #68] @ 0x44
8002214: e000 b.n 8002218 <DFSDM_RegConvStop+0x74>
8002216: 2301 movs r3, #1
hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
8002218: 687a ldr r2, [r7, #4]
800221a: 6493 str r3, [r2, #72] @ 0x48
}
/* Update DFSDM filter state */
hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
800221c: 687b ldr r3, [r7, #4]
800221e: f893 304c ldrb.w r3, [r3, #76] @ 0x4c
HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
8002222: 2b02 cmp r3, #2
8002224: d101 bne.n 800222a <DFSDM_RegConvStop+0x86>
8002226: 2201 movs r2, #1
8002228: e000 b.n 800222c <DFSDM_RegConvStop+0x88>
800222a: 2203 movs r2, #3
hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
800222c: 687b ldr r3, [r7, #4]
800222e: f883 204c strb.w r2, [r3, #76] @ 0x4c
}
8002232: bf00 nop
8002234: 370c adds r7, #12
8002236: 46bd mov sp, r7
8002238: f85d 7b04 ldr.w r7, [sp], #4
800223c: 4770 bx lr
...
08002240 <HAL_DMA_Init>:
* @param hdma Pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
8002240: b580 push {r7, lr}
8002242: b086 sub sp, #24
8002244: af00 add r7, sp, #0
8002246: 6078 str r0, [r7, #4]
uint32_t tmp = 0U;
8002248: 2300 movs r3, #0
800224a: 617b str r3, [r7, #20]
uint32_t tickstart = HAL_GetTick();
800224c: f7ff faa4 bl 8001798 <HAL_GetTick>
8002250: 6138 str r0, [r7, #16]
DMA_Base_Registers *regs;
/* Check the DMA peripheral state */
if(hdma == NULL)
8002252: 687b ldr r3, [r7, #4]
8002254: 2b00 cmp r3, #0
8002256: d101 bne.n 800225c <HAL_DMA_Init+0x1c>
{
return HAL_ERROR;
8002258: 2301 movs r3, #1
800225a: e099 b.n 8002390 <HAL_DMA_Init+0x150>
assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst));
assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
}
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
800225c: 687b ldr r3, [r7, #4]
800225e: 2202 movs r2, #2
8002260: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Allocate lock resource */
__HAL_UNLOCK(hdma);
8002264: 687b ldr r3, [r7, #4]
8002266: 2200 movs r2, #0
8002268: f883 2034 strb.w r2, [r3, #52] @ 0x34
/* Disable the peripheral */
__HAL_DMA_DISABLE(hdma);
800226c: 687b ldr r3, [r7, #4]
800226e: 681b ldr r3, [r3, #0]
8002270: 681a ldr r2, [r3, #0]
8002272: 687b ldr r3, [r7, #4]
8002274: 681b ldr r3, [r3, #0]
8002276: f022 0201 bic.w r2, r2, #1
800227a: 601a str r2, [r3, #0]
/* Check if the DMA Stream is effectively disabled */
while((hdma->Instance->CR & DMA_SxCR_EN) != RESET)
800227c: e00f b.n 800229e <HAL_DMA_Init+0x5e>
{
/* Check for the Timeout */
if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
800227e: f7ff fa8b bl 8001798 <HAL_GetTick>
8002282: 4602 mov r2, r0
8002284: 693b ldr r3, [r7, #16]
8002286: 1ad3 subs r3, r2, r3
8002288: 2b05 cmp r3, #5
800228a: d908 bls.n 800229e <HAL_DMA_Init+0x5e>
{
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
800228c: 687b ldr r3, [r7, #4]
800228e: 2220 movs r2, #32
8002290: 655a str r2, [r3, #84] @ 0x54
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_TIMEOUT;
8002292: 687b ldr r3, [r7, #4]
8002294: 2203 movs r2, #3
8002296: f883 2035 strb.w r2, [r3, #53] @ 0x35
return HAL_TIMEOUT;
800229a: 2303 movs r3, #3
800229c: e078 b.n 8002390 <HAL_DMA_Init+0x150>
while((hdma->Instance->CR & DMA_SxCR_EN) != RESET)
800229e: 687b ldr r3, [r7, #4]
80022a0: 681b ldr r3, [r3, #0]
80022a2: 681b ldr r3, [r3, #0]
80022a4: f003 0301 and.w r3, r3, #1
80022a8: 2b00 cmp r3, #0
80022aa: d1e8 bne.n 800227e <HAL_DMA_Init+0x3e>
}
}
/* Get the CR register value */
tmp = hdma->Instance->CR;
80022ac: 687b ldr r3, [r7, #4]
80022ae: 681b ldr r3, [r3, #0]
80022b0: 681b ldr r3, [r3, #0]
80022b2: 617b str r3, [r7, #20]
/* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */
tmp &= ((uint32_t)~(DMA_SxCR_CHSEL | DMA_SxCR_MBURST | DMA_SxCR_PBURST | \
80022b4: 697a ldr r2, [r7, #20]
80022b6: 4b38 ldr r3, [pc, #224] @ (8002398 <HAL_DMA_Init+0x158>)
80022b8: 4013 ands r3, r2
80022ba: 617b str r3, [r7, #20]
DMA_SxCR_PL | DMA_SxCR_MSIZE | DMA_SxCR_PSIZE | \
DMA_SxCR_MINC | DMA_SxCR_PINC | DMA_SxCR_CIRC | \
DMA_SxCR_DIR | DMA_SxCR_CT | DMA_SxCR_DBM));
/* Prepare the DMA Stream configuration */
tmp |= hdma->Init.Channel | hdma->Init.Direction |
80022bc: 687b ldr r3, [r7, #4]
80022be: 685a ldr r2, [r3, #4]
80022c0: 687b ldr r3, [r7, #4]
80022c2: 689b ldr r3, [r3, #8]
80022c4: 431a orrs r2, r3
hdma->Init.PeriphInc | hdma->Init.MemInc |
80022c6: 687b ldr r3, [r7, #4]
80022c8: 68db ldr r3, [r3, #12]
tmp |= hdma->Init.Channel | hdma->Init.Direction |
80022ca: 431a orrs r2, r3
hdma->Init.PeriphInc | hdma->Init.MemInc |
80022cc: 687b ldr r3, [r7, #4]
80022ce: 691b ldr r3, [r3, #16]
80022d0: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
80022d2: 687b ldr r3, [r7, #4]
80022d4: 695b ldr r3, [r3, #20]
hdma->Init.PeriphInc | hdma->Init.MemInc |
80022d6: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
80022d8: 687b ldr r3, [r7, #4]
80022da: 699b ldr r3, [r3, #24]
80022dc: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
80022de: 687b ldr r3, [r7, #4]
80022e0: 69db ldr r3, [r3, #28]
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
80022e2: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
80022e4: 687b ldr r3, [r7, #4]
80022e6: 6a1b ldr r3, [r3, #32]
80022e8: 4313 orrs r3, r2
tmp |= hdma->Init.Channel | hdma->Init.Direction |
80022ea: 697a ldr r2, [r7, #20]
80022ec: 4313 orrs r3, r2
80022ee: 617b str r3, [r7, #20]
/* the Memory burst and peripheral burst are not used when the FIFO is disabled */
if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
80022f0: 687b ldr r3, [r7, #4]
80022f2: 6a5b ldr r3, [r3, #36] @ 0x24
80022f4: 2b04 cmp r3, #4
80022f6: d107 bne.n 8002308 <HAL_DMA_Init+0xc8>
{
/* Get memory burst and peripheral burst */
tmp |= hdma->Init.MemBurst | hdma->Init.PeriphBurst;
80022f8: 687b ldr r3, [r7, #4]
80022fa: 6ada ldr r2, [r3, #44] @ 0x2c
80022fc: 687b ldr r3, [r7, #4]
80022fe: 6b1b ldr r3, [r3, #48] @ 0x30
8002300: 4313 orrs r3, r2
8002302: 697a ldr r2, [r7, #20]
8002304: 4313 orrs r3, r2
8002306: 617b str r3, [r7, #20]
}
/* Write to DMA Stream CR register */
hdma->Instance->CR = tmp;
8002308: 687b ldr r3, [r7, #4]
800230a: 681b ldr r3, [r3, #0]
800230c: 697a ldr r2, [r7, #20]
800230e: 601a str r2, [r3, #0]
/* Get the FCR register value */
tmp = hdma->Instance->FCR;
8002310: 687b ldr r3, [r7, #4]
8002312: 681b ldr r3, [r3, #0]
8002314: 695b ldr r3, [r3, #20]
8002316: 617b str r3, [r7, #20]
/* Clear Direct mode and FIFO threshold bits */
tmp &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH);
8002318: 697b ldr r3, [r7, #20]
800231a: f023 0307 bic.w r3, r3, #7
800231e: 617b str r3, [r7, #20]
/* Prepare the DMA Stream FIFO configuration */
tmp |= hdma->Init.FIFOMode;
8002320: 687b ldr r3, [r7, #4]
8002322: 6a5b ldr r3, [r3, #36] @ 0x24
8002324: 697a ldr r2, [r7, #20]
8002326: 4313 orrs r3, r2
8002328: 617b str r3, [r7, #20]
/* The FIFO threshold is not used when the FIFO mode is disabled */
if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
800232a: 687b ldr r3, [r7, #4]
800232c: 6a5b ldr r3, [r3, #36] @ 0x24
800232e: 2b04 cmp r3, #4
8002330: d117 bne.n 8002362 <HAL_DMA_Init+0x122>
{
/* Get the FIFO threshold */
tmp |= hdma->Init.FIFOThreshold;
8002332: 687b ldr r3, [r7, #4]
8002334: 6a9b ldr r3, [r3, #40] @ 0x28
8002336: 697a ldr r2, [r7, #20]
8002338: 4313 orrs r3, r2
800233a: 617b str r3, [r7, #20]
/* Check compatibility between FIFO threshold level and size of the memory burst */
/* for INCR4, INCR8, INCR16 bursts */
if (hdma->Init.MemBurst != DMA_MBURST_SINGLE)
800233c: 687b ldr r3, [r7, #4]
800233e: 6adb ldr r3, [r3, #44] @ 0x2c
8002340: 2b00 cmp r3, #0
8002342: d00e beq.n 8002362 <HAL_DMA_Init+0x122>
{
if (DMA_CheckFifoParam(hdma) != HAL_OK)
8002344: 6878 ldr r0, [r7, #4]
8002346: f000 fadf bl 8002908 <DMA_CheckFifoParam>
800234a: 4603 mov r3, r0
800234c: 2b00 cmp r3, #0
800234e: d008 beq.n 8002362 <HAL_DMA_Init+0x122>
{
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
8002350: 687b ldr r3, [r7, #4]
8002352: 2240 movs r2, #64 @ 0x40
8002354: 655a str r2, [r3, #84] @ 0x54
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8002356: 687b ldr r3, [r7, #4]
8002358: 2201 movs r2, #1
800235a: f883 2035 strb.w r2, [r3, #53] @ 0x35
return HAL_ERROR;
800235e: 2301 movs r3, #1
8002360: e016 b.n 8002390 <HAL_DMA_Init+0x150>
}
}
}
/* Write to DMA Stream FCR */
hdma->Instance->FCR = tmp;
8002362: 687b ldr r3, [r7, #4]
8002364: 681b ldr r3, [r3, #0]
8002366: 697a ldr r2, [r7, #20]
8002368: 615a str r2, [r3, #20]
/* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
regs = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
800236a: 6878 ldr r0, [r7, #4]
800236c: f000 fa96 bl 800289c <DMA_CalcBaseAndBitshift>
8002370: 4603 mov r3, r0
8002372: 60fb str r3, [r7, #12]
/* Clear all interrupt flags */
regs->IFCR = 0x3FU << hdma->StreamIndex;
8002374: 687b ldr r3, [r7, #4]
8002376: 6ddb ldr r3, [r3, #92] @ 0x5c
8002378: 223f movs r2, #63 @ 0x3f
800237a: 409a lsls r2, r3
800237c: 68fb ldr r3, [r7, #12]
800237e: 609a str r2, [r3, #8]
/* Initialize the error code */
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
8002380: 687b ldr r3, [r7, #4]
8002382: 2200 movs r2, #0
8002384: 655a str r2, [r3, #84] @ 0x54
/* Initialize the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8002386: 687b ldr r3, [r7, #4]
8002388: 2201 movs r2, #1
800238a: f883 2035 strb.w r2, [r3, #53] @ 0x35
return HAL_OK;
800238e: 2300 movs r3, #0
}
8002390: 4618 mov r0, r3
8002392: 3718 adds r7, #24
8002394: 46bd mov sp, r7
8002396: bd80 pop {r7, pc}
8002398: e010803f .word 0xe010803f
0800239c <HAL_DMA_Start_IT>:
* @param DstAddress The destination memory Buffer address
* @param DataLength The length of data to be transferred from source to destination
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
800239c: b580 push {r7, lr}
800239e: b086 sub sp, #24
80023a0: af00 add r7, sp, #0
80023a2: 60f8 str r0, [r7, #12]
80023a4: 60b9 str r1, [r7, #8]
80023a6: 607a str r2, [r7, #4]
80023a8: 603b str r3, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
80023aa: 2300 movs r3, #0
80023ac: 75fb strb r3, [r7, #23]
/* calculate DMA base and stream number */
DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress;
80023ae: 68fb ldr r3, [r7, #12]
80023b0: 6d9b ldr r3, [r3, #88] @ 0x58
80023b2: 613b str r3, [r7, #16]
/* Check the parameters */
assert_param(IS_DMA_BUFFER_SIZE(DataLength));
/* Process locked */
__HAL_LOCK(hdma);
80023b4: 68fb ldr r3, [r7, #12]
80023b6: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
80023ba: 2b01 cmp r3, #1
80023bc: d101 bne.n 80023c2 <HAL_DMA_Start_IT+0x26>
80023be: 2302 movs r3, #2
80023c0: e040 b.n 8002444 <HAL_DMA_Start_IT+0xa8>
80023c2: 68fb ldr r3, [r7, #12]
80023c4: 2201 movs r2, #1
80023c6: f883 2034 strb.w r2, [r3, #52] @ 0x34
if(HAL_DMA_STATE_READY == hdma->State)
80023ca: 68fb ldr r3, [r7, #12]
80023cc: f893 3035 ldrb.w r3, [r3, #53] @ 0x35
80023d0: b2db uxtb r3, r3
80023d2: 2b01 cmp r3, #1
80023d4: d12f bne.n 8002436 <HAL_DMA_Start_IT+0x9a>
{
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
80023d6: 68fb ldr r3, [r7, #12]
80023d8: 2202 movs r2, #2
80023da: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Initialize the error code */
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
80023de: 68fb ldr r3, [r7, #12]
80023e0: 2200 movs r2, #0
80023e2: 655a str r2, [r3, #84] @ 0x54
/* Configure the source, destination address and the data length */
DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
80023e4: 683b ldr r3, [r7, #0]
80023e6: 687a ldr r2, [r7, #4]
80023e8: 68b9 ldr r1, [r7, #8]
80023ea: 68f8 ldr r0, [r7, #12]
80023ec: f000 fa28 bl 8002840 <DMA_SetConfig>
/* Clear all interrupt flags at correct offset within the register */
regs->IFCR = 0x3FU << hdma->StreamIndex;
80023f0: 68fb ldr r3, [r7, #12]
80023f2: 6ddb ldr r3, [r3, #92] @ 0x5c
80023f4: 223f movs r2, #63 @ 0x3f
80023f6: 409a lsls r2, r3
80023f8: 693b ldr r3, [r7, #16]
80023fa: 609a str r2, [r3, #8]
/* Enable Common interrupts*/
hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME;
80023fc: 68fb ldr r3, [r7, #12]
80023fe: 681b ldr r3, [r3, #0]
8002400: 681a ldr r2, [r3, #0]
8002402: 68fb ldr r3, [r7, #12]
8002404: 681b ldr r3, [r3, #0]
8002406: f042 0216 orr.w r2, r2, #22
800240a: 601a str r2, [r3, #0]
if(hdma->XferHalfCpltCallback != NULL)
800240c: 68fb ldr r3, [r7, #12]
800240e: 6c1b ldr r3, [r3, #64] @ 0x40
8002410: 2b00 cmp r3, #0
8002412: d007 beq.n 8002424 <HAL_DMA_Start_IT+0x88>
{
hdma->Instance->CR |= DMA_IT_HT;
8002414: 68fb ldr r3, [r7, #12]
8002416: 681b ldr r3, [r3, #0]
8002418: 681a ldr r2, [r3, #0]
800241a: 68fb ldr r3, [r7, #12]
800241c: 681b ldr r3, [r3, #0]
800241e: f042 0208 orr.w r2, r2, #8
8002422: 601a str r2, [r3, #0]
}
/* Enable the Peripheral */
__HAL_DMA_ENABLE(hdma);
8002424: 68fb ldr r3, [r7, #12]
8002426: 681b ldr r3, [r3, #0]
8002428: 681a ldr r2, [r3, #0]
800242a: 68fb ldr r3, [r7, #12]
800242c: 681b ldr r3, [r3, #0]
800242e: f042 0201 orr.w r2, r2, #1
8002432: 601a str r2, [r3, #0]
8002434: e005 b.n 8002442 <HAL_DMA_Start_IT+0xa6>
}
else
{
/* Process unlocked */
__HAL_UNLOCK(hdma);
8002436: 68fb ldr r3, [r7, #12]
8002438: 2200 movs r2, #0
800243a: f883 2034 strb.w r2, [r3, #52] @ 0x34
/* Return error status */
status = HAL_BUSY;
800243e: 2302 movs r3, #2
8002440: 75fb strb r3, [r7, #23]
}
return status;
8002442: 7dfb ldrb r3, [r7, #23]
}
8002444: 4618 mov r0, r3
8002446: 3718 adds r7, #24
8002448: 46bd mov sp, r7
800244a: bd80 pop {r7, pc}
0800244c <HAL_DMA_Abort>:
* and the Stream will be effectively disabled only after the transfer of
* this single data is finished.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
{
800244c: b580 push {r7, lr}
800244e: b084 sub sp, #16
8002450: af00 add r7, sp, #0
8002452: 6078 str r0, [r7, #4]
/* calculate DMA base and stream number */
DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress;
8002454: 687b ldr r3, [r7, #4]
8002456: 6d9b ldr r3, [r3, #88] @ 0x58
8002458: 60fb str r3, [r7, #12]
uint32_t tickstart = HAL_GetTick();
800245a: f7ff f99d bl 8001798 <HAL_GetTick>
800245e: 60b8 str r0, [r7, #8]
if(hdma->State != HAL_DMA_STATE_BUSY)
8002460: 687b ldr r3, [r7, #4]
8002462: f893 3035 ldrb.w r3, [r3, #53] @ 0x35
8002466: b2db uxtb r3, r3
8002468: 2b02 cmp r3, #2
800246a: d008 beq.n 800247e <HAL_DMA_Abort+0x32>
{
hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
800246c: 687b ldr r3, [r7, #4]
800246e: 2280 movs r2, #128 @ 0x80
8002470: 655a str r2, [r3, #84] @ 0x54
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8002472: 687b ldr r3, [r7, #4]
8002474: 2200 movs r2, #0
8002476: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
800247a: 2301 movs r3, #1
800247c: e052 b.n 8002524 <HAL_DMA_Abort+0xd8>
}
else
{
/* Disable all the transfer interrupts */
hdma->Instance->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME);
800247e: 687b ldr r3, [r7, #4]
8002480: 681b ldr r3, [r3, #0]
8002482: 681a ldr r2, [r3, #0]
8002484: 687b ldr r3, [r7, #4]
8002486: 681b ldr r3, [r3, #0]
8002488: f022 0216 bic.w r2, r2, #22
800248c: 601a str r2, [r3, #0]
hdma->Instance->FCR &= ~(DMA_IT_FE);
800248e: 687b ldr r3, [r7, #4]
8002490: 681b ldr r3, [r3, #0]
8002492: 695a ldr r2, [r3, #20]
8002494: 687b ldr r3, [r7, #4]
8002496: 681b ldr r3, [r3, #0]
8002498: f022 0280 bic.w r2, r2, #128 @ 0x80
800249c: 615a str r2, [r3, #20]
if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
800249e: 687b ldr r3, [r7, #4]
80024a0: 6c1b ldr r3, [r3, #64] @ 0x40
80024a2: 2b00 cmp r3, #0
80024a4: d103 bne.n 80024ae <HAL_DMA_Abort+0x62>
80024a6: 687b ldr r3, [r7, #4]
80024a8: 6c9b ldr r3, [r3, #72] @ 0x48
80024aa: 2b00 cmp r3, #0
80024ac: d007 beq.n 80024be <HAL_DMA_Abort+0x72>
{
hdma->Instance->CR &= ~(DMA_IT_HT);
80024ae: 687b ldr r3, [r7, #4]
80024b0: 681b ldr r3, [r3, #0]
80024b2: 681a ldr r2, [r3, #0]
80024b4: 687b ldr r3, [r7, #4]
80024b6: 681b ldr r3, [r3, #0]
80024b8: f022 0208 bic.w r2, r2, #8
80024bc: 601a str r2, [r3, #0]
}
/* Disable the stream */
__HAL_DMA_DISABLE(hdma);
80024be: 687b ldr r3, [r7, #4]
80024c0: 681b ldr r3, [r3, #0]
80024c2: 681a ldr r2, [r3, #0]
80024c4: 687b ldr r3, [r7, #4]
80024c6: 681b ldr r3, [r3, #0]
80024c8: f022 0201 bic.w r2, r2, #1
80024cc: 601a str r2, [r3, #0]
/* Check if the DMA Stream is effectively disabled */
while((hdma->Instance->CR & DMA_SxCR_EN) != RESET)
80024ce: e013 b.n 80024f8 <HAL_DMA_Abort+0xac>
{
/* Check for the Timeout */
if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
80024d0: f7ff f962 bl 8001798 <HAL_GetTick>
80024d4: 4602 mov r2, r0
80024d6: 68bb ldr r3, [r7, #8]
80024d8: 1ad3 subs r3, r2, r3
80024da: 2b05 cmp r3, #5
80024dc: d90c bls.n 80024f8 <HAL_DMA_Abort+0xac>
{
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
80024de: 687b ldr r3, [r7, #4]
80024e0: 2220 movs r2, #32
80024e2: 655a str r2, [r3, #84] @ 0x54
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_TIMEOUT;
80024e4: 687b ldr r3, [r7, #4]
80024e6: 2203 movs r2, #3
80024e8: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Process Unlocked */
__HAL_UNLOCK(hdma);
80024ec: 687b ldr r3, [r7, #4]
80024ee: 2200 movs r2, #0
80024f0: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_TIMEOUT;
80024f4: 2303 movs r3, #3
80024f6: e015 b.n 8002524 <HAL_DMA_Abort+0xd8>
while((hdma->Instance->CR & DMA_SxCR_EN) != RESET)
80024f8: 687b ldr r3, [r7, #4]
80024fa: 681b ldr r3, [r3, #0]
80024fc: 681b ldr r3, [r3, #0]
80024fe: f003 0301 and.w r3, r3, #1
8002502: 2b00 cmp r3, #0
8002504: d1e4 bne.n 80024d0 <HAL_DMA_Abort+0x84>
}
}
/* Clear all interrupt flags at correct offset within the register */
regs->IFCR = 0x3FU << hdma->StreamIndex;
8002506: 687b ldr r3, [r7, #4]
8002508: 6ddb ldr r3, [r3, #92] @ 0x5c
800250a: 223f movs r2, #63 @ 0x3f
800250c: 409a lsls r2, r3
800250e: 68fb ldr r3, [r7, #12]
8002510: 609a str r2, [r3, #8]
/* Change the DMA state*/
hdma->State = HAL_DMA_STATE_READY;
8002512: 687b ldr r3, [r7, #4]
8002514: 2201 movs r2, #1
8002516: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Process Unlocked */
__HAL_UNLOCK(hdma);
800251a: 687b ldr r3, [r7, #4]
800251c: 2200 movs r2, #0
800251e: f883 2034 strb.w r2, [r3, #52] @ 0x34
}
return HAL_OK;
8002522: 2300 movs r3, #0
}
8002524: 4618 mov r0, r3
8002526: 3710 adds r7, #16
8002528: 46bd mov sp, r7
800252a: bd80 pop {r7, pc}
0800252c <HAL_DMA_IRQHandler>:
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval None
*/
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
{
800252c: b580 push {r7, lr}
800252e: b086 sub sp, #24
8002530: af00 add r7, sp, #0
8002532: 6078 str r0, [r7, #4]
uint32_t tmpisr;
__IO uint32_t count = 0U;
8002534: 2300 movs r3, #0
8002536: 60bb str r3, [r7, #8]
uint32_t timeout = SystemCoreClock / 9600U;
8002538: 4b8e ldr r3, [pc, #568] @ (8002774 <HAL_DMA_IRQHandler+0x248>)
800253a: 681b ldr r3, [r3, #0]
800253c: 4a8e ldr r2, [pc, #568] @ (8002778 <HAL_DMA_IRQHandler+0x24c>)
800253e: fba2 2303 umull r2, r3, r2, r3
8002542: 0a9b lsrs r3, r3, #10
8002544: 617b str r3, [r7, #20]
/* calculate DMA base and stream number */
DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress;
8002546: 687b ldr r3, [r7, #4]
8002548: 6d9b ldr r3, [r3, #88] @ 0x58
800254a: 613b str r3, [r7, #16]
tmpisr = regs->ISR;
800254c: 693b ldr r3, [r7, #16]
800254e: 681b ldr r3, [r3, #0]
8002550: 60fb str r3, [r7, #12]
/* Transfer Error Interrupt management ***************************************/
if ((tmpisr & (DMA_FLAG_TEIF0_4 << hdma->StreamIndex)) != RESET)
8002552: 687b ldr r3, [r7, #4]
8002554: 6ddb ldr r3, [r3, #92] @ 0x5c
8002556: 2208 movs r2, #8
8002558: 409a lsls r2, r3
800255a: 68fb ldr r3, [r7, #12]
800255c: 4013 ands r3, r2
800255e: 2b00 cmp r3, #0
8002560: d01a beq.n 8002598 <HAL_DMA_IRQHandler+0x6c>
{
if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET)
8002562: 687b ldr r3, [r7, #4]
8002564: 681b ldr r3, [r3, #0]
8002566: 681b ldr r3, [r3, #0]
8002568: f003 0304 and.w r3, r3, #4
800256c: 2b00 cmp r3, #0
800256e: d013 beq.n 8002598 <HAL_DMA_IRQHandler+0x6c>
{
/* Disable the transfer error interrupt */
hdma->Instance->CR &= ~(DMA_IT_TE);
8002570: 687b ldr r3, [r7, #4]
8002572: 681b ldr r3, [r3, #0]
8002574: 681a ldr r2, [r3, #0]
8002576: 687b ldr r3, [r7, #4]
8002578: 681b ldr r3, [r3, #0]
800257a: f022 0204 bic.w r2, r2, #4
800257e: 601a str r2, [r3, #0]
/* Clear the transfer error flag */
regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex;
8002580: 687b ldr r3, [r7, #4]
8002582: 6ddb ldr r3, [r3, #92] @ 0x5c
8002584: 2208 movs r2, #8
8002586: 409a lsls r2, r3
8002588: 693b ldr r3, [r7, #16]
800258a: 609a str r2, [r3, #8]
/* Update error code */
hdma->ErrorCode |= HAL_DMA_ERROR_TE;
800258c: 687b ldr r3, [r7, #4]
800258e: 6d5b ldr r3, [r3, #84] @ 0x54
8002590: f043 0201 orr.w r2, r3, #1
8002594: 687b ldr r3, [r7, #4]
8002596: 655a str r2, [r3, #84] @ 0x54
}
}
/* FIFO Error Interrupt management ******************************************/
if ((tmpisr & (DMA_FLAG_FEIF0_4 << hdma->StreamIndex)) != RESET)
8002598: 687b ldr r3, [r7, #4]
800259a: 6ddb ldr r3, [r3, #92] @ 0x5c
800259c: 2201 movs r2, #1
800259e: 409a lsls r2, r3
80025a0: 68fb ldr r3, [r7, #12]
80025a2: 4013 ands r3, r2
80025a4: 2b00 cmp r3, #0
80025a6: d012 beq.n 80025ce <HAL_DMA_IRQHandler+0xa2>
{
if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != RESET)
80025a8: 687b ldr r3, [r7, #4]
80025aa: 681b ldr r3, [r3, #0]
80025ac: 695b ldr r3, [r3, #20]
80025ae: f003 0380 and.w r3, r3, #128 @ 0x80
80025b2: 2b00 cmp r3, #0
80025b4: d00b beq.n 80025ce <HAL_DMA_IRQHandler+0xa2>
{
/* Clear the FIFO error flag */
regs->IFCR = DMA_FLAG_FEIF0_4 << hdma->StreamIndex;
80025b6: 687b ldr r3, [r7, #4]
80025b8: 6ddb ldr r3, [r3, #92] @ 0x5c
80025ba: 2201 movs r2, #1
80025bc: 409a lsls r2, r3
80025be: 693b ldr r3, [r7, #16]
80025c0: 609a str r2, [r3, #8]
/* Update error code */
hdma->ErrorCode |= HAL_DMA_ERROR_FE;
80025c2: 687b ldr r3, [r7, #4]
80025c4: 6d5b ldr r3, [r3, #84] @ 0x54
80025c6: f043 0202 orr.w r2, r3, #2
80025ca: 687b ldr r3, [r7, #4]
80025cc: 655a str r2, [r3, #84] @ 0x54
}
}
/* Direct Mode Error Interrupt management ***********************************/
if ((tmpisr & (DMA_FLAG_DMEIF0_4 << hdma->StreamIndex)) != RESET)
80025ce: 687b ldr r3, [r7, #4]
80025d0: 6ddb ldr r3, [r3, #92] @ 0x5c
80025d2: 2204 movs r2, #4
80025d4: 409a lsls r2, r3
80025d6: 68fb ldr r3, [r7, #12]
80025d8: 4013 ands r3, r2
80025da: 2b00 cmp r3, #0
80025dc: d012 beq.n 8002604 <HAL_DMA_IRQHandler+0xd8>
{
if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != RESET)
80025de: 687b ldr r3, [r7, #4]
80025e0: 681b ldr r3, [r3, #0]
80025e2: 681b ldr r3, [r3, #0]
80025e4: f003 0302 and.w r3, r3, #2
80025e8: 2b00 cmp r3, #0
80025ea: d00b beq.n 8002604 <HAL_DMA_IRQHandler+0xd8>
{
/* Clear the direct mode error flag */
regs->IFCR = DMA_FLAG_DMEIF0_4 << hdma->StreamIndex;
80025ec: 687b ldr r3, [r7, #4]
80025ee: 6ddb ldr r3, [r3, #92] @ 0x5c
80025f0: 2204 movs r2, #4
80025f2: 409a lsls r2, r3
80025f4: 693b ldr r3, [r7, #16]
80025f6: 609a str r2, [r3, #8]
/* Update error code */
hdma->ErrorCode |= HAL_DMA_ERROR_DME;
80025f8: 687b ldr r3, [r7, #4]
80025fa: 6d5b ldr r3, [r3, #84] @ 0x54
80025fc: f043 0204 orr.w r2, r3, #4
8002600: 687b ldr r3, [r7, #4]
8002602: 655a str r2, [r3, #84] @ 0x54
}
}
/* Half Transfer Complete Interrupt management ******************************/
if ((tmpisr & (DMA_FLAG_HTIF0_4 << hdma->StreamIndex)) != RESET)
8002604: 687b ldr r3, [r7, #4]
8002606: 6ddb ldr r3, [r3, #92] @ 0x5c
8002608: 2210 movs r2, #16
800260a: 409a lsls r2, r3
800260c: 68fb ldr r3, [r7, #12]
800260e: 4013 ands r3, r2
8002610: 2b00 cmp r3, #0
8002612: d043 beq.n 800269c <HAL_DMA_IRQHandler+0x170>
{
if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET)
8002614: 687b ldr r3, [r7, #4]
8002616: 681b ldr r3, [r3, #0]
8002618: 681b ldr r3, [r3, #0]
800261a: f003 0308 and.w r3, r3, #8
800261e: 2b00 cmp r3, #0
8002620: d03c beq.n 800269c <HAL_DMA_IRQHandler+0x170>
{
/* Clear the half transfer complete flag */
regs->IFCR = DMA_FLAG_HTIF0_4 << hdma->StreamIndex;
8002622: 687b ldr r3, [r7, #4]
8002624: 6ddb ldr r3, [r3, #92] @ 0x5c
8002626: 2210 movs r2, #16
8002628: 409a lsls r2, r3
800262a: 693b ldr r3, [r7, #16]
800262c: 609a str r2, [r3, #8]
/* Multi_Buffering mode enabled */
if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != RESET)
800262e: 687b ldr r3, [r7, #4]
8002630: 681b ldr r3, [r3, #0]
8002632: 681b ldr r3, [r3, #0]
8002634: f403 2380 and.w r3, r3, #262144 @ 0x40000
8002638: 2b00 cmp r3, #0
800263a: d018 beq.n 800266e <HAL_DMA_IRQHandler+0x142>
{
/* Current memory buffer used is Memory 0 */
if((hdma->Instance->CR & DMA_SxCR_CT) == RESET)
800263c: 687b ldr r3, [r7, #4]
800263e: 681b ldr r3, [r3, #0]
8002640: 681b ldr r3, [r3, #0]
8002642: f403 2300 and.w r3, r3, #524288 @ 0x80000
8002646: 2b00 cmp r3, #0
8002648: d108 bne.n 800265c <HAL_DMA_IRQHandler+0x130>
{
if(hdma->XferHalfCpltCallback != NULL)
800264a: 687b ldr r3, [r7, #4]
800264c: 6c1b ldr r3, [r3, #64] @ 0x40
800264e: 2b00 cmp r3, #0
8002650: d024 beq.n 800269c <HAL_DMA_IRQHandler+0x170>
{
/* Half transfer callback */
hdma->XferHalfCpltCallback(hdma);
8002652: 687b ldr r3, [r7, #4]
8002654: 6c1b ldr r3, [r3, #64] @ 0x40
8002656: 6878 ldr r0, [r7, #4]
8002658: 4798 blx r3
800265a: e01f b.n 800269c <HAL_DMA_IRQHandler+0x170>
}
}
/* Current memory buffer used is Memory 1 */
else
{
if(hdma->XferM1HalfCpltCallback != NULL)
800265c: 687b ldr r3, [r7, #4]
800265e: 6c9b ldr r3, [r3, #72] @ 0x48
8002660: 2b00 cmp r3, #0
8002662: d01b beq.n 800269c <HAL_DMA_IRQHandler+0x170>
{
/* Half transfer callback */
hdma->XferM1HalfCpltCallback(hdma);
8002664: 687b ldr r3, [r7, #4]
8002666: 6c9b ldr r3, [r3, #72] @ 0x48
8002668: 6878 ldr r0, [r7, #4]
800266a: 4798 blx r3
800266c: e016 b.n 800269c <HAL_DMA_IRQHandler+0x170>
}
}
else
{
/* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET)
800266e: 687b ldr r3, [r7, #4]
8002670: 681b ldr r3, [r3, #0]
8002672: 681b ldr r3, [r3, #0]
8002674: f403 7380 and.w r3, r3, #256 @ 0x100
8002678: 2b00 cmp r3, #0
800267a: d107 bne.n 800268c <HAL_DMA_IRQHandler+0x160>
{
/* Disable the half transfer interrupt */
hdma->Instance->CR &= ~(DMA_IT_HT);
800267c: 687b ldr r3, [r7, #4]
800267e: 681b ldr r3, [r3, #0]
8002680: 681a ldr r2, [r3, #0]
8002682: 687b ldr r3, [r7, #4]
8002684: 681b ldr r3, [r3, #0]
8002686: f022 0208 bic.w r2, r2, #8
800268a: 601a str r2, [r3, #0]
}
if(hdma->XferHalfCpltCallback != NULL)
800268c: 687b ldr r3, [r7, #4]
800268e: 6c1b ldr r3, [r3, #64] @ 0x40
8002690: 2b00 cmp r3, #0
8002692: d003 beq.n 800269c <HAL_DMA_IRQHandler+0x170>
{
/* Half transfer callback */
hdma->XferHalfCpltCallback(hdma);
8002694: 687b ldr r3, [r7, #4]
8002696: 6c1b ldr r3, [r3, #64] @ 0x40
8002698: 6878 ldr r0, [r7, #4]
800269a: 4798 blx r3
}
}
}
}
/* Transfer Complete Interrupt management ***********************************/
if ((tmpisr & (DMA_FLAG_TCIF0_4 << hdma->StreamIndex)) != RESET)
800269c: 687b ldr r3, [r7, #4]
800269e: 6ddb ldr r3, [r3, #92] @ 0x5c
80026a0: 2220 movs r2, #32
80026a2: 409a lsls r2, r3
80026a4: 68fb ldr r3, [r7, #12]
80026a6: 4013 ands r3, r2
80026a8: 2b00 cmp r3, #0
80026aa: f000 808f beq.w 80027cc <HAL_DMA_IRQHandler+0x2a0>
{
if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET)
80026ae: 687b ldr r3, [r7, #4]
80026b0: 681b ldr r3, [r3, #0]
80026b2: 681b ldr r3, [r3, #0]
80026b4: f003 0310 and.w r3, r3, #16
80026b8: 2b00 cmp r3, #0
80026ba: f000 8087 beq.w 80027cc <HAL_DMA_IRQHandler+0x2a0>
{
/* Clear the transfer complete flag */
regs->IFCR = DMA_FLAG_TCIF0_4 << hdma->StreamIndex;
80026be: 687b ldr r3, [r7, #4]
80026c0: 6ddb ldr r3, [r3, #92] @ 0x5c
80026c2: 2220 movs r2, #32
80026c4: 409a lsls r2, r3
80026c6: 693b ldr r3, [r7, #16]
80026c8: 609a str r2, [r3, #8]
if(HAL_DMA_STATE_ABORT == hdma->State)
80026ca: 687b ldr r3, [r7, #4]
80026cc: f893 3035 ldrb.w r3, [r3, #53] @ 0x35
80026d0: b2db uxtb r3, r3
80026d2: 2b05 cmp r3, #5
80026d4: d136 bne.n 8002744 <HAL_DMA_IRQHandler+0x218>
{
/* Disable all the transfer interrupts */
hdma->Instance->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME);
80026d6: 687b ldr r3, [r7, #4]
80026d8: 681b ldr r3, [r3, #0]
80026da: 681a ldr r2, [r3, #0]
80026dc: 687b ldr r3, [r7, #4]
80026de: 681b ldr r3, [r3, #0]
80026e0: f022 0216 bic.w r2, r2, #22
80026e4: 601a str r2, [r3, #0]
hdma->Instance->FCR &= ~(DMA_IT_FE);
80026e6: 687b ldr r3, [r7, #4]
80026e8: 681b ldr r3, [r3, #0]
80026ea: 695a ldr r2, [r3, #20]
80026ec: 687b ldr r3, [r7, #4]
80026ee: 681b ldr r3, [r3, #0]
80026f0: f022 0280 bic.w r2, r2, #128 @ 0x80
80026f4: 615a str r2, [r3, #20]
if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
80026f6: 687b ldr r3, [r7, #4]
80026f8: 6c1b ldr r3, [r3, #64] @ 0x40
80026fa: 2b00 cmp r3, #0
80026fc: d103 bne.n 8002706 <HAL_DMA_IRQHandler+0x1da>
80026fe: 687b ldr r3, [r7, #4]
8002700: 6c9b ldr r3, [r3, #72] @ 0x48
8002702: 2b00 cmp r3, #0
8002704: d007 beq.n 8002716 <HAL_DMA_IRQHandler+0x1ea>
{
hdma->Instance->CR &= ~(DMA_IT_HT);
8002706: 687b ldr r3, [r7, #4]
8002708: 681b ldr r3, [r3, #0]
800270a: 681a ldr r2, [r3, #0]
800270c: 687b ldr r3, [r7, #4]
800270e: 681b ldr r3, [r3, #0]
8002710: f022 0208 bic.w r2, r2, #8
8002714: 601a str r2, [r3, #0]
}
/* Clear all interrupt flags at correct offset within the register */
regs->IFCR = 0x3FU << hdma->StreamIndex;
8002716: 687b ldr r3, [r7, #4]
8002718: 6ddb ldr r3, [r3, #92] @ 0x5c
800271a: 223f movs r2, #63 @ 0x3f
800271c: 409a lsls r2, r3
800271e: 693b ldr r3, [r7, #16]
8002720: 609a str r2, [r3, #8]
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8002722: 687b ldr r3, [r7, #4]
8002724: 2201 movs r2, #1
8002726: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Process Unlocked */
__HAL_UNLOCK(hdma);
800272a: 687b ldr r3, [r7, #4]
800272c: 2200 movs r2, #0
800272e: f883 2034 strb.w r2, [r3, #52] @ 0x34
if(hdma->XferAbortCallback != NULL)
8002732: 687b ldr r3, [r7, #4]
8002734: 6d1b ldr r3, [r3, #80] @ 0x50
8002736: 2b00 cmp r3, #0
8002738: d07e beq.n 8002838 <HAL_DMA_IRQHandler+0x30c>
{
hdma->XferAbortCallback(hdma);
800273a: 687b ldr r3, [r7, #4]
800273c: 6d1b ldr r3, [r3, #80] @ 0x50
800273e: 6878 ldr r0, [r7, #4]
8002740: 4798 blx r3
}
return;
8002742: e079 b.n 8002838 <HAL_DMA_IRQHandler+0x30c>
}
if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != RESET)
8002744: 687b ldr r3, [r7, #4]
8002746: 681b ldr r3, [r3, #0]
8002748: 681b ldr r3, [r3, #0]
800274a: f403 2380 and.w r3, r3, #262144 @ 0x40000
800274e: 2b00 cmp r3, #0
8002750: d01d beq.n 800278e <HAL_DMA_IRQHandler+0x262>
{
/* Current memory buffer used is Memory 0 */
if((hdma->Instance->CR & DMA_SxCR_CT) == RESET)
8002752: 687b ldr r3, [r7, #4]
8002754: 681b ldr r3, [r3, #0]
8002756: 681b ldr r3, [r3, #0]
8002758: f403 2300 and.w r3, r3, #524288 @ 0x80000
800275c: 2b00 cmp r3, #0
800275e: d10d bne.n 800277c <HAL_DMA_IRQHandler+0x250>
{
if(hdma->XferM1CpltCallback != NULL)
8002760: 687b ldr r3, [r7, #4]
8002762: 6c5b ldr r3, [r3, #68] @ 0x44
8002764: 2b00 cmp r3, #0
8002766: d031 beq.n 80027cc <HAL_DMA_IRQHandler+0x2a0>
{
/* Transfer complete Callback for memory1 */
hdma->XferM1CpltCallback(hdma);
8002768: 687b ldr r3, [r7, #4]
800276a: 6c5b ldr r3, [r3, #68] @ 0x44
800276c: 6878 ldr r0, [r7, #4]
800276e: 4798 blx r3
8002770: e02c b.n 80027cc <HAL_DMA_IRQHandler+0x2a0>
8002772: bf00 nop
8002774: 20000000 .word 0x20000000
8002778: 1b4e81b5 .word 0x1b4e81b5
}
}
/* Current memory buffer used is Memory 1 */
else
{
if(hdma->XferCpltCallback != NULL)
800277c: 687b ldr r3, [r7, #4]
800277e: 6bdb ldr r3, [r3, #60] @ 0x3c
8002780: 2b00 cmp r3, #0
8002782: d023 beq.n 80027cc <HAL_DMA_IRQHandler+0x2a0>
{
/* Transfer complete Callback for memory0 */
hdma->XferCpltCallback(hdma);
8002784: 687b ldr r3, [r7, #4]
8002786: 6bdb ldr r3, [r3, #60] @ 0x3c
8002788: 6878 ldr r0, [r7, #4]
800278a: 4798 blx r3
800278c: e01e b.n 80027cc <HAL_DMA_IRQHandler+0x2a0>
}
}
/* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
else
{
if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET)
800278e: 687b ldr r3, [r7, #4]
8002790: 681b ldr r3, [r3, #0]
8002792: 681b ldr r3, [r3, #0]
8002794: f403 7380 and.w r3, r3, #256 @ 0x100
8002798: 2b00 cmp r3, #0
800279a: d10f bne.n 80027bc <HAL_DMA_IRQHandler+0x290>
{
/* Disable the transfer complete interrupt */
hdma->Instance->CR &= ~(DMA_IT_TC);
800279c: 687b ldr r3, [r7, #4]
800279e: 681b ldr r3, [r3, #0]
80027a0: 681a ldr r2, [r3, #0]
80027a2: 687b ldr r3, [r7, #4]
80027a4: 681b ldr r3, [r3, #0]
80027a6: f022 0210 bic.w r2, r2, #16
80027aa: 601a str r2, [r3, #0]
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
80027ac: 687b ldr r3, [r7, #4]
80027ae: 2201 movs r2, #1
80027b0: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Process Unlocked */
__HAL_UNLOCK(hdma);
80027b4: 687b ldr r3, [r7, #4]
80027b6: 2200 movs r2, #0
80027b8: f883 2034 strb.w r2, [r3, #52] @ 0x34
}
if(hdma->XferCpltCallback != NULL)
80027bc: 687b ldr r3, [r7, #4]
80027be: 6bdb ldr r3, [r3, #60] @ 0x3c
80027c0: 2b00 cmp r3, #0
80027c2: d003 beq.n 80027cc <HAL_DMA_IRQHandler+0x2a0>
{
/* Transfer complete callback */
hdma->XferCpltCallback(hdma);
80027c4: 687b ldr r3, [r7, #4]
80027c6: 6bdb ldr r3, [r3, #60] @ 0x3c
80027c8: 6878 ldr r0, [r7, #4]
80027ca: 4798 blx r3
}
}
}
/* manage error case */
if(hdma->ErrorCode != HAL_DMA_ERROR_NONE)
80027cc: 687b ldr r3, [r7, #4]
80027ce: 6d5b ldr r3, [r3, #84] @ 0x54
80027d0: 2b00 cmp r3, #0
80027d2: d032 beq.n 800283a <HAL_DMA_IRQHandler+0x30e>
{
if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != RESET)
80027d4: 687b ldr r3, [r7, #4]
80027d6: 6d5b ldr r3, [r3, #84] @ 0x54
80027d8: f003 0301 and.w r3, r3, #1
80027dc: 2b00 cmp r3, #0
80027de: d022 beq.n 8002826 <HAL_DMA_IRQHandler+0x2fa>
{
hdma->State = HAL_DMA_STATE_ABORT;
80027e0: 687b ldr r3, [r7, #4]
80027e2: 2205 movs r2, #5
80027e4: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Disable the stream */
__HAL_DMA_DISABLE(hdma);
80027e8: 687b ldr r3, [r7, #4]
80027ea: 681b ldr r3, [r3, #0]
80027ec: 681a ldr r2, [r3, #0]
80027ee: 687b ldr r3, [r7, #4]
80027f0: 681b ldr r3, [r3, #0]
80027f2: f022 0201 bic.w r2, r2, #1
80027f6: 601a str r2, [r3, #0]
do
{
if (++count > timeout)
80027f8: 68bb ldr r3, [r7, #8]
80027fa: 3301 adds r3, #1
80027fc: 60bb str r3, [r7, #8]
80027fe: 697a ldr r2, [r7, #20]
8002800: 429a cmp r2, r3
8002802: d307 bcc.n 8002814 <HAL_DMA_IRQHandler+0x2e8>
{
break;
}
}
while((hdma->Instance->CR & DMA_SxCR_EN) != RESET);
8002804: 687b ldr r3, [r7, #4]
8002806: 681b ldr r3, [r3, #0]
8002808: 681b ldr r3, [r3, #0]
800280a: f003 0301 and.w r3, r3, #1
800280e: 2b00 cmp r3, #0
8002810: d1f2 bne.n 80027f8 <HAL_DMA_IRQHandler+0x2cc>
8002812: e000 b.n 8002816 <HAL_DMA_IRQHandler+0x2ea>
break;
8002814: bf00 nop
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8002816: 687b ldr r3, [r7, #4]
8002818: 2201 movs r2, #1
800281a: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Process Unlocked */
__HAL_UNLOCK(hdma);
800281e: 687b ldr r3, [r7, #4]
8002820: 2200 movs r2, #0
8002822: f883 2034 strb.w r2, [r3, #52] @ 0x34
}
if(hdma->XferErrorCallback != NULL)
8002826: 687b ldr r3, [r7, #4]
8002828: 6cdb ldr r3, [r3, #76] @ 0x4c
800282a: 2b00 cmp r3, #0
800282c: d005 beq.n 800283a <HAL_DMA_IRQHandler+0x30e>
{
/* Transfer error callback */
hdma->XferErrorCallback(hdma);
800282e: 687b ldr r3, [r7, #4]
8002830: 6cdb ldr r3, [r3, #76] @ 0x4c
8002832: 6878 ldr r0, [r7, #4]
8002834: 4798 blx r3
8002836: e000 b.n 800283a <HAL_DMA_IRQHandler+0x30e>
return;
8002838: bf00 nop
}
}
}
800283a: 3718 adds r7, #24
800283c: 46bd mov sp, r7
800283e: bd80 pop {r7, pc}
08002840 <DMA_SetConfig>:
* @param DstAddress The destination memory Buffer address
* @param DataLength The length of data to be transferred from source to destination
* @retval HAL status
*/
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
8002840: b480 push {r7}
8002842: b085 sub sp, #20
8002844: af00 add r7, sp, #0
8002846: 60f8 str r0, [r7, #12]
8002848: 60b9 str r1, [r7, #8]
800284a: 607a str r2, [r7, #4]
800284c: 603b str r3, [r7, #0]
/* Clear DBM bit */
hdma->Instance->CR &= (uint32_t)(~DMA_SxCR_DBM);
800284e: 68fb ldr r3, [r7, #12]
8002850: 681b ldr r3, [r3, #0]
8002852: 681a ldr r2, [r3, #0]
8002854: 68fb ldr r3, [r7, #12]
8002856: 681b ldr r3, [r3, #0]
8002858: f422 2280 bic.w r2, r2, #262144 @ 0x40000
800285c: 601a str r2, [r3, #0]
/* Configure DMA Stream data length */
hdma->Instance->NDTR = DataLength;
800285e: 68fb ldr r3, [r7, #12]
8002860: 681b ldr r3, [r3, #0]
8002862: 683a ldr r2, [r7, #0]
8002864: 605a str r2, [r3, #4]
/* Memory to Peripheral */
if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
8002866: 68fb ldr r3, [r7, #12]
8002868: 689b ldr r3, [r3, #8]
800286a: 2b40 cmp r3, #64 @ 0x40
800286c: d108 bne.n 8002880 <DMA_SetConfig+0x40>
{
/* Configure DMA Stream destination address */
hdma->Instance->PAR = DstAddress;
800286e: 68fb ldr r3, [r7, #12]
8002870: 681b ldr r3, [r3, #0]
8002872: 687a ldr r2, [r7, #4]
8002874: 609a str r2, [r3, #8]
/* Configure DMA Stream source address */
hdma->Instance->M0AR = SrcAddress;
8002876: 68fb ldr r3, [r7, #12]
8002878: 681b ldr r3, [r3, #0]
800287a: 68ba ldr r2, [r7, #8]
800287c: 60da str r2, [r3, #12]
hdma->Instance->PAR = SrcAddress;
/* Configure DMA Stream destination address */
hdma->Instance->M0AR = DstAddress;
}
}
800287e: e007 b.n 8002890 <DMA_SetConfig+0x50>
hdma->Instance->PAR = SrcAddress;
8002880: 68fb ldr r3, [r7, #12]
8002882: 681b ldr r3, [r3, #0]
8002884: 68ba ldr r2, [r7, #8]
8002886: 609a str r2, [r3, #8]
hdma->Instance->M0AR = DstAddress;
8002888: 68fb ldr r3, [r7, #12]
800288a: 681b ldr r3, [r3, #0]
800288c: 687a ldr r2, [r7, #4]
800288e: 60da str r2, [r3, #12]
}
8002890: bf00 nop
8002892: 3714 adds r7, #20
8002894: 46bd mov sp, r7
8002896: f85d 7b04 ldr.w r7, [sp], #4
800289a: 4770 bx lr
0800289c <DMA_CalcBaseAndBitshift>:
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval Stream base address
*/
static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
{
800289c: b480 push {r7}
800289e: b085 sub sp, #20
80028a0: af00 add r7, sp, #0
80028a2: 6078 str r0, [r7, #4]
uint32_t stream_number = (((uint32_t)hdma->Instance & 0xFFU) - 16U) / 24U;
80028a4: 687b ldr r3, [r7, #4]
80028a6: 681b ldr r3, [r3, #0]
80028a8: b2db uxtb r3, r3
80028aa: 3b10 subs r3, #16
80028ac: 4a14 ldr r2, [pc, #80] @ (8002900 <DMA_CalcBaseAndBitshift+0x64>)
80028ae: fba2 2303 umull r2, r3, r2, r3
80028b2: 091b lsrs r3, r3, #4
80028b4: 60fb str r3, [r7, #12]
/* lookup table for necessary bitshift of flags within status registers */
static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U};
hdma->StreamIndex = flagBitshiftOffset[stream_number];
80028b6: 4a13 ldr r2, [pc, #76] @ (8002904 <DMA_CalcBaseAndBitshift+0x68>)
80028b8: 68fb ldr r3, [r7, #12]
80028ba: 4413 add r3, r2
80028bc: 781b ldrb r3, [r3, #0]
80028be: 461a mov r2, r3
80028c0: 687b ldr r3, [r7, #4]
80028c2: 65da str r2, [r3, #92] @ 0x5c
if (stream_number > 3U)
80028c4: 68fb ldr r3, [r7, #12]
80028c6: 2b03 cmp r3, #3
80028c8: d909 bls.n 80028de <DMA_CalcBaseAndBitshift+0x42>
{
/* return pointer to HISR and HIFCR */
hdma->StreamBaseAddress = (((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU)) + 4U);
80028ca: 687b ldr r3, [r7, #4]
80028cc: 681b ldr r3, [r3, #0]
80028ce: f423 737f bic.w r3, r3, #1020 @ 0x3fc
80028d2: f023 0303 bic.w r3, r3, #3
80028d6: 1d1a adds r2, r3, #4
80028d8: 687b ldr r3, [r7, #4]
80028da: 659a str r2, [r3, #88] @ 0x58
80028dc: e007 b.n 80028ee <DMA_CalcBaseAndBitshift+0x52>
}
else
{
/* return pointer to LISR and LIFCR */
hdma->StreamBaseAddress = ((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU));
80028de: 687b ldr r3, [r7, #4]
80028e0: 681b ldr r3, [r3, #0]
80028e2: f423 737f bic.w r3, r3, #1020 @ 0x3fc
80028e6: f023 0303 bic.w r3, r3, #3
80028ea: 687a ldr r2, [r7, #4]
80028ec: 6593 str r3, [r2, #88] @ 0x58
}
return hdma->StreamBaseAddress;
80028ee: 687b ldr r3, [r7, #4]
80028f0: 6d9b ldr r3, [r3, #88] @ 0x58
}
80028f2: 4618 mov r0, r3
80028f4: 3714 adds r7, #20
80028f6: 46bd mov sp, r7
80028f8: f85d 7b04 ldr.w r7, [sp], #4
80028fc: 4770 bx lr
80028fe: bf00 nop
8002900: aaaaaaab .word 0xaaaaaaab
8002904: 08013ae8 .word 0x08013ae8
08002908 <DMA_CheckFifoParam>:
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval HAL status
*/
static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma)
{
8002908: b480 push {r7}
800290a: b085 sub sp, #20
800290c: af00 add r7, sp, #0
800290e: 6078 str r0, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8002910: 2300 movs r3, #0
8002912: 73fb strb r3, [r7, #15]
uint32_t tmp = hdma->Init.FIFOThreshold;
8002914: 687b ldr r3, [r7, #4]
8002916: 6a9b ldr r3, [r3, #40] @ 0x28
8002918: 60bb str r3, [r7, #8]
/* Memory Data size equal to Byte */
if(hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE)
800291a: 687b ldr r3, [r7, #4]
800291c: 699b ldr r3, [r3, #24]
800291e: 2b00 cmp r3, #0
8002920: d11f bne.n 8002962 <DMA_CheckFifoParam+0x5a>
{
switch (tmp)
8002922: 68bb ldr r3, [r7, #8]
8002924: 2b03 cmp r3, #3
8002926: d856 bhi.n 80029d6 <DMA_CheckFifoParam+0xce>
8002928: a201 add r2, pc, #4 @ (adr r2, 8002930 <DMA_CheckFifoParam+0x28>)
800292a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800292e: bf00 nop
8002930: 08002941 .word 0x08002941
8002934: 08002953 .word 0x08002953
8002938: 08002941 .word 0x08002941
800293c: 080029d7 .word 0x080029d7
{
case DMA_FIFO_THRESHOLD_1QUARTERFULL:
case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
8002940: 687b ldr r3, [r7, #4]
8002942: 6adb ldr r3, [r3, #44] @ 0x2c
8002944: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
8002948: 2b00 cmp r3, #0
800294a: d046 beq.n 80029da <DMA_CheckFifoParam+0xd2>
{
status = HAL_ERROR;
800294c: 2301 movs r3, #1
800294e: 73fb strb r3, [r7, #15]
}
break;
8002950: e043 b.n 80029da <DMA_CheckFifoParam+0xd2>
case DMA_FIFO_THRESHOLD_HALFFULL:
if (hdma->Init.MemBurst == DMA_MBURST_INC16)
8002952: 687b ldr r3, [r7, #4]
8002954: 6adb ldr r3, [r3, #44] @ 0x2c
8002956: f1b3 7fc0 cmp.w r3, #25165824 @ 0x1800000
800295a: d140 bne.n 80029de <DMA_CheckFifoParam+0xd6>
{
status = HAL_ERROR;
800295c: 2301 movs r3, #1
800295e: 73fb strb r3, [r7, #15]
}
break;
8002960: e03d b.n 80029de <DMA_CheckFifoParam+0xd6>
break;
}
}
/* Memory Data size equal to Half-Word */
else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
8002962: 687b ldr r3, [r7, #4]
8002964: 699b ldr r3, [r3, #24]
8002966: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
800296a: d121 bne.n 80029b0 <DMA_CheckFifoParam+0xa8>
{
switch (tmp)
800296c: 68bb ldr r3, [r7, #8]
800296e: 2b03 cmp r3, #3
8002970: d837 bhi.n 80029e2 <DMA_CheckFifoParam+0xda>
8002972: a201 add r2, pc, #4 @ (adr r2, 8002978 <DMA_CheckFifoParam+0x70>)
8002974: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8002978: 08002989 .word 0x08002989
800297c: 0800298f .word 0x0800298f
8002980: 08002989 .word 0x08002989
8002984: 080029a1 .word 0x080029a1
{
case DMA_FIFO_THRESHOLD_1QUARTERFULL:
case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
status = HAL_ERROR;
8002988: 2301 movs r3, #1
800298a: 73fb strb r3, [r7, #15]
break;
800298c: e030 b.n 80029f0 <DMA_CheckFifoParam+0xe8>
case DMA_FIFO_THRESHOLD_HALFFULL:
if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
800298e: 687b ldr r3, [r7, #4]
8002990: 6adb ldr r3, [r3, #44] @ 0x2c
8002992: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
8002996: 2b00 cmp r3, #0
8002998: d025 beq.n 80029e6 <DMA_CheckFifoParam+0xde>
{
status = HAL_ERROR;
800299a: 2301 movs r3, #1
800299c: 73fb strb r3, [r7, #15]
}
break;
800299e: e022 b.n 80029e6 <DMA_CheckFifoParam+0xde>
case DMA_FIFO_THRESHOLD_FULL:
if (hdma->Init.MemBurst == DMA_MBURST_INC16)
80029a0: 687b ldr r3, [r7, #4]
80029a2: 6adb ldr r3, [r3, #44] @ 0x2c
80029a4: f1b3 7fc0 cmp.w r3, #25165824 @ 0x1800000
80029a8: d11f bne.n 80029ea <DMA_CheckFifoParam+0xe2>
{
status = HAL_ERROR;
80029aa: 2301 movs r3, #1
80029ac: 73fb strb r3, [r7, #15]
}
break;
80029ae: e01c b.n 80029ea <DMA_CheckFifoParam+0xe2>
}
/* Memory Data size equal to Word */
else
{
switch (tmp)
80029b0: 68bb ldr r3, [r7, #8]
80029b2: 2b02 cmp r3, #2
80029b4: d903 bls.n 80029be <DMA_CheckFifoParam+0xb6>
80029b6: 68bb ldr r3, [r7, #8]
80029b8: 2b03 cmp r3, #3
80029ba: d003 beq.n 80029c4 <DMA_CheckFifoParam+0xbc>
{
status = HAL_ERROR;
}
break;
default:
break;
80029bc: e018 b.n 80029f0 <DMA_CheckFifoParam+0xe8>
status = HAL_ERROR;
80029be: 2301 movs r3, #1
80029c0: 73fb strb r3, [r7, #15]
break;
80029c2: e015 b.n 80029f0 <DMA_CheckFifoParam+0xe8>
if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
80029c4: 687b ldr r3, [r7, #4]
80029c6: 6adb ldr r3, [r3, #44] @ 0x2c
80029c8: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
80029cc: 2b00 cmp r3, #0
80029ce: d00e beq.n 80029ee <DMA_CheckFifoParam+0xe6>
status = HAL_ERROR;
80029d0: 2301 movs r3, #1
80029d2: 73fb strb r3, [r7, #15]
break;
80029d4: e00b b.n 80029ee <DMA_CheckFifoParam+0xe6>
break;
80029d6: bf00 nop
80029d8: e00a b.n 80029f0 <DMA_CheckFifoParam+0xe8>
break;
80029da: bf00 nop
80029dc: e008 b.n 80029f0 <DMA_CheckFifoParam+0xe8>
break;
80029de: bf00 nop
80029e0: e006 b.n 80029f0 <DMA_CheckFifoParam+0xe8>
break;
80029e2: bf00 nop
80029e4: e004 b.n 80029f0 <DMA_CheckFifoParam+0xe8>
break;
80029e6: bf00 nop
80029e8: e002 b.n 80029f0 <DMA_CheckFifoParam+0xe8>
break;
80029ea: bf00 nop
80029ec: e000 b.n 80029f0 <DMA_CheckFifoParam+0xe8>
break;
80029ee: bf00 nop
}
}
return status;
80029f0: 7bfb ldrb r3, [r7, #15]
}
80029f2: 4618 mov r0, r3
80029f4: 3714 adds r7, #20
80029f6: 46bd mov sp, r7
80029f8: f85d 7b04 ldr.w r7, [sp], #4
80029fc: 4770 bx lr
80029fe: bf00 nop
08002a00 <HAL_GPIO_Init>:
* @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
8002a00: b480 push {r7}
8002a02: b089 sub sp, #36 @ 0x24
8002a04: af00 add r7, sp, #0
8002a06: 6078 str r0, [r7, #4]
8002a08: 6039 str r1, [r7, #0]
uint32_t position;
uint32_t ioposition = 0x00U;
8002a0a: 2300 movs r3, #0
8002a0c: 617b str r3, [r7, #20]
uint32_t iocurrent = 0x00U;
8002a0e: 2300 movs r3, #0
8002a10: 613b str r3, [r7, #16]
uint32_t temp = 0x00U;
8002a12: 2300 movs r3, #0
8002a14: 61bb str r3, [r7, #24]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
for(position = 0U; position < GPIO_NUMBER; position++)
8002a16: 2300 movs r3, #0
8002a18: 61fb str r3, [r7, #28]
8002a1a: e165 b.n 8002ce8 <HAL_GPIO_Init+0x2e8>
{
/* Get the IO position */
ioposition = 0x01U << position;
8002a1c: 2201 movs r2, #1
8002a1e: 69fb ldr r3, [r7, #28]
8002a20: fa02 f303 lsl.w r3, r2, r3
8002a24: 617b str r3, [r7, #20]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
8002a26: 683b ldr r3, [r7, #0]
8002a28: 681b ldr r3, [r3, #0]
8002a2a: 697a ldr r2, [r7, #20]
8002a2c: 4013 ands r3, r2
8002a2e: 613b str r3, [r7, #16]
if(iocurrent == ioposition)
8002a30: 693a ldr r2, [r7, #16]
8002a32: 697b ldr r3, [r7, #20]
8002a34: 429a cmp r2, r3
8002a36: f040 8154 bne.w 8002ce2 <HAL_GPIO_Init+0x2e2>
{
/*--------------------- GPIO Mode Configuration ------------------------*/
/* In case of Output or Alternate function mode selection */
if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \
8002a3a: 683b ldr r3, [r7, #0]
8002a3c: 685b ldr r3, [r3, #4]
8002a3e: f003 0303 and.w r3, r3, #3
8002a42: 2b01 cmp r3, #1
8002a44: d005 beq.n 8002a52 <HAL_GPIO_Init+0x52>
(GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
8002a46: 683b ldr r3, [r7, #0]
8002a48: 685b ldr r3, [r3, #4]
8002a4a: f003 0303 and.w r3, r3, #3
if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \
8002a4e: 2b02 cmp r3, #2
8002a50: d130 bne.n 8002ab4 <HAL_GPIO_Init+0xb4>
{
/* Check the Speed parameter */
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
/* Configure the IO Speed */
temp = GPIOx->OSPEEDR;
8002a52: 687b ldr r3, [r7, #4]
8002a54: 689b ldr r3, [r3, #8]
8002a56: 61bb str r3, [r7, #24]
temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
8002a58: 69fb ldr r3, [r7, #28]
8002a5a: 005b lsls r3, r3, #1
8002a5c: 2203 movs r2, #3
8002a5e: fa02 f303 lsl.w r3, r2, r3
8002a62: 43db mvns r3, r3
8002a64: 69ba ldr r2, [r7, #24]
8002a66: 4013 ands r3, r2
8002a68: 61bb str r3, [r7, #24]
temp |= (GPIO_Init->Speed << (position * 2U));
8002a6a: 683b ldr r3, [r7, #0]
8002a6c: 68da ldr r2, [r3, #12]
8002a6e: 69fb ldr r3, [r7, #28]
8002a70: 005b lsls r3, r3, #1
8002a72: fa02 f303 lsl.w r3, r2, r3
8002a76: 69ba ldr r2, [r7, #24]
8002a78: 4313 orrs r3, r2
8002a7a: 61bb str r3, [r7, #24]
GPIOx->OSPEEDR = temp;
8002a7c: 687b ldr r3, [r7, #4]
8002a7e: 69ba ldr r2, [r7, #24]
8002a80: 609a str r2, [r3, #8]
/* Configure the IO Output Type */
temp = GPIOx->OTYPER;
8002a82: 687b ldr r3, [r7, #4]
8002a84: 685b ldr r3, [r3, #4]
8002a86: 61bb str r3, [r7, #24]
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
8002a88: 2201 movs r2, #1
8002a8a: 69fb ldr r3, [r7, #28]
8002a8c: fa02 f303 lsl.w r3, r2, r3
8002a90: 43db mvns r3, r3
8002a92: 69ba ldr r2, [r7, #24]
8002a94: 4013 ands r3, r2
8002a96: 61bb str r3, [r7, #24]
temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
8002a98: 683b ldr r3, [r7, #0]
8002a9a: 685b ldr r3, [r3, #4]
8002a9c: 091b lsrs r3, r3, #4
8002a9e: f003 0201 and.w r2, r3, #1
8002aa2: 69fb ldr r3, [r7, #28]
8002aa4: fa02 f303 lsl.w r3, r2, r3
8002aa8: 69ba ldr r2, [r7, #24]
8002aaa: 4313 orrs r3, r2
8002aac: 61bb str r3, [r7, #24]
GPIOx->OTYPER = temp;
8002aae: 687b ldr r3, [r7, #4]
8002ab0: 69ba ldr r2, [r7, #24]
8002ab2: 605a str r2, [r3, #4]
}
if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
8002ab4: 683b ldr r3, [r7, #0]
8002ab6: 685b ldr r3, [r3, #4]
8002ab8: f003 0303 and.w r3, r3, #3
8002abc: 2b03 cmp r3, #3
8002abe: d017 beq.n 8002af0 <HAL_GPIO_Init+0xf0>
{
/* Check the parameters */
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
/* Activate the Pull-up or Pull down resistor for the current IO */
temp = GPIOx->PUPDR;
8002ac0: 687b ldr r3, [r7, #4]
8002ac2: 68db ldr r3, [r3, #12]
8002ac4: 61bb str r3, [r7, #24]
temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
8002ac6: 69fb ldr r3, [r7, #28]
8002ac8: 005b lsls r3, r3, #1
8002aca: 2203 movs r2, #3
8002acc: fa02 f303 lsl.w r3, r2, r3
8002ad0: 43db mvns r3, r3
8002ad2: 69ba ldr r2, [r7, #24]
8002ad4: 4013 ands r3, r2
8002ad6: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Pull) << (position * 2U));
8002ad8: 683b ldr r3, [r7, #0]
8002ada: 689a ldr r2, [r3, #8]
8002adc: 69fb ldr r3, [r7, #28]
8002ade: 005b lsls r3, r3, #1
8002ae0: fa02 f303 lsl.w r3, r2, r3
8002ae4: 69ba ldr r2, [r7, #24]
8002ae6: 4313 orrs r3, r2
8002ae8: 61bb str r3, [r7, #24]
GPIOx->PUPDR = temp;
8002aea: 687b ldr r3, [r7, #4]
8002aec: 69ba ldr r2, [r7, #24]
8002aee: 60da str r2, [r3, #12]
}
/* In case of Alternate function mode selection */
if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
8002af0: 683b ldr r3, [r7, #0]
8002af2: 685b ldr r3, [r3, #4]
8002af4: f003 0303 and.w r3, r3, #3
8002af8: 2b02 cmp r3, #2
8002afa: d123 bne.n 8002b44 <HAL_GPIO_Init+0x144>
{
/* Check the Alternate function parameter */
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
/* Configure Alternate function mapped with the current IO */
temp = GPIOx->AFR[position >> 3U];
8002afc: 69fb ldr r3, [r7, #28]
8002afe: 08da lsrs r2, r3, #3
8002b00: 687b ldr r3, [r7, #4]
8002b02: 3208 adds r2, #8
8002b04: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8002b08: 61bb str r3, [r7, #24]
temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
8002b0a: 69fb ldr r3, [r7, #28]
8002b0c: f003 0307 and.w r3, r3, #7
8002b10: 009b lsls r3, r3, #2
8002b12: 220f movs r2, #15
8002b14: fa02 f303 lsl.w r3, r2, r3
8002b18: 43db mvns r3, r3
8002b1a: 69ba ldr r2, [r7, #24]
8002b1c: 4013 ands r3, r2
8002b1e: 61bb str r3, [r7, #24]
temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
8002b20: 683b ldr r3, [r7, #0]
8002b22: 691a ldr r2, [r3, #16]
8002b24: 69fb ldr r3, [r7, #28]
8002b26: f003 0307 and.w r3, r3, #7
8002b2a: 009b lsls r3, r3, #2
8002b2c: fa02 f303 lsl.w r3, r2, r3
8002b30: 69ba ldr r2, [r7, #24]
8002b32: 4313 orrs r3, r2
8002b34: 61bb str r3, [r7, #24]
GPIOx->AFR[position >> 3U] = temp;
8002b36: 69fb ldr r3, [r7, #28]
8002b38: 08da lsrs r2, r3, #3
8002b3a: 687b ldr r3, [r7, #4]
8002b3c: 3208 adds r2, #8
8002b3e: 69b9 ldr r1, [r7, #24]
8002b40: f843 1022 str.w r1, [r3, r2, lsl #2]
}
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
temp = GPIOx->MODER;
8002b44: 687b ldr r3, [r7, #4]
8002b46: 681b ldr r3, [r3, #0]
8002b48: 61bb str r3, [r7, #24]
temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
8002b4a: 69fb ldr r3, [r7, #28]
8002b4c: 005b lsls r3, r3, #1
8002b4e: 2203 movs r2, #3
8002b50: fa02 f303 lsl.w r3, r2, r3
8002b54: 43db mvns r3, r3
8002b56: 69ba ldr r2, [r7, #24]
8002b58: 4013 ands r3, r2
8002b5a: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
8002b5c: 683b ldr r3, [r7, #0]
8002b5e: 685b ldr r3, [r3, #4]
8002b60: f003 0203 and.w r2, r3, #3
8002b64: 69fb ldr r3, [r7, #28]
8002b66: 005b lsls r3, r3, #1
8002b68: fa02 f303 lsl.w r3, r2, r3
8002b6c: 69ba ldr r2, [r7, #24]
8002b6e: 4313 orrs r3, r2
8002b70: 61bb str r3, [r7, #24]
GPIOx->MODER = temp;
8002b72: 687b ldr r3, [r7, #4]
8002b74: 69ba ldr r2, [r7, #24]
8002b76: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
8002b78: 683b ldr r3, [r7, #0]
8002b7a: 685b ldr r3, [r3, #4]
8002b7c: f403 3340 and.w r3, r3, #196608 @ 0x30000
8002b80: 2b00 cmp r3, #0
8002b82: f000 80ae beq.w 8002ce2 <HAL_GPIO_Init+0x2e2>
{
/* Enable SYSCFG Clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
8002b86: 2300 movs r3, #0
8002b88: 60fb str r3, [r7, #12]
8002b8a: 4b5d ldr r3, [pc, #372] @ (8002d00 <HAL_GPIO_Init+0x300>)
8002b8c: 6c5b ldr r3, [r3, #68] @ 0x44
8002b8e: 4a5c ldr r2, [pc, #368] @ (8002d00 <HAL_GPIO_Init+0x300>)
8002b90: f443 4380 orr.w r3, r3, #16384 @ 0x4000
8002b94: 6453 str r3, [r2, #68] @ 0x44
8002b96: 4b5a ldr r3, [pc, #360] @ (8002d00 <HAL_GPIO_Init+0x300>)
8002b98: 6c5b ldr r3, [r3, #68] @ 0x44
8002b9a: f403 4380 and.w r3, r3, #16384 @ 0x4000
8002b9e: 60fb str r3, [r7, #12]
8002ba0: 68fb ldr r3, [r7, #12]
temp = SYSCFG->EXTICR[position >> 2U];
8002ba2: 4a58 ldr r2, [pc, #352] @ (8002d04 <HAL_GPIO_Init+0x304>)
8002ba4: 69fb ldr r3, [r7, #28]
8002ba6: 089b lsrs r3, r3, #2
8002ba8: 3302 adds r3, #2
8002baa: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8002bae: 61bb str r3, [r7, #24]
temp &= ~(0x0FU << (4U * (position & 0x03U)));
8002bb0: 69fb ldr r3, [r7, #28]
8002bb2: f003 0303 and.w r3, r3, #3
8002bb6: 009b lsls r3, r3, #2
8002bb8: 220f movs r2, #15
8002bba: fa02 f303 lsl.w r3, r2, r3
8002bbe: 43db mvns r3, r3
8002bc0: 69ba ldr r2, [r7, #24]
8002bc2: 4013 ands r3, r2
8002bc4: 61bb str r3, [r7, #24]
temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
8002bc6: 687b ldr r3, [r7, #4]
8002bc8: 4a4f ldr r2, [pc, #316] @ (8002d08 <HAL_GPIO_Init+0x308>)
8002bca: 4293 cmp r3, r2
8002bcc: d025 beq.n 8002c1a <HAL_GPIO_Init+0x21a>
8002bce: 687b ldr r3, [r7, #4]
8002bd0: 4a4e ldr r2, [pc, #312] @ (8002d0c <HAL_GPIO_Init+0x30c>)
8002bd2: 4293 cmp r3, r2
8002bd4: d01f beq.n 8002c16 <HAL_GPIO_Init+0x216>
8002bd6: 687b ldr r3, [r7, #4]
8002bd8: 4a4d ldr r2, [pc, #308] @ (8002d10 <HAL_GPIO_Init+0x310>)
8002bda: 4293 cmp r3, r2
8002bdc: d019 beq.n 8002c12 <HAL_GPIO_Init+0x212>
8002bde: 687b ldr r3, [r7, #4]
8002be0: 4a4c ldr r2, [pc, #304] @ (8002d14 <HAL_GPIO_Init+0x314>)
8002be2: 4293 cmp r3, r2
8002be4: d013 beq.n 8002c0e <HAL_GPIO_Init+0x20e>
8002be6: 687b ldr r3, [r7, #4]
8002be8: 4a4b ldr r2, [pc, #300] @ (8002d18 <HAL_GPIO_Init+0x318>)
8002bea: 4293 cmp r3, r2
8002bec: d00d beq.n 8002c0a <HAL_GPIO_Init+0x20a>
8002bee: 687b ldr r3, [r7, #4]
8002bf0: 4a4a ldr r2, [pc, #296] @ (8002d1c <HAL_GPIO_Init+0x31c>)
8002bf2: 4293 cmp r3, r2
8002bf4: d007 beq.n 8002c06 <HAL_GPIO_Init+0x206>
8002bf6: 687b ldr r3, [r7, #4]
8002bf8: 4a49 ldr r2, [pc, #292] @ (8002d20 <HAL_GPIO_Init+0x320>)
8002bfa: 4293 cmp r3, r2
8002bfc: d101 bne.n 8002c02 <HAL_GPIO_Init+0x202>
8002bfe: 2306 movs r3, #6
8002c00: e00c b.n 8002c1c <HAL_GPIO_Init+0x21c>
8002c02: 2307 movs r3, #7
8002c04: e00a b.n 8002c1c <HAL_GPIO_Init+0x21c>
8002c06: 2305 movs r3, #5
8002c08: e008 b.n 8002c1c <HAL_GPIO_Init+0x21c>
8002c0a: 2304 movs r3, #4
8002c0c: e006 b.n 8002c1c <HAL_GPIO_Init+0x21c>
8002c0e: 2303 movs r3, #3
8002c10: e004 b.n 8002c1c <HAL_GPIO_Init+0x21c>
8002c12: 2302 movs r3, #2
8002c14: e002 b.n 8002c1c <HAL_GPIO_Init+0x21c>
8002c16: 2301 movs r3, #1
8002c18: e000 b.n 8002c1c <HAL_GPIO_Init+0x21c>
8002c1a: 2300 movs r3, #0
8002c1c: 69fa ldr r2, [r7, #28]
8002c1e: f002 0203 and.w r2, r2, #3
8002c22: 0092 lsls r2, r2, #2
8002c24: 4093 lsls r3, r2
8002c26: 69ba ldr r2, [r7, #24]
8002c28: 4313 orrs r3, r2
8002c2a: 61bb str r3, [r7, #24]
SYSCFG->EXTICR[position >> 2U] = temp;
8002c2c: 4935 ldr r1, [pc, #212] @ (8002d04 <HAL_GPIO_Init+0x304>)
8002c2e: 69fb ldr r3, [r7, #28]
8002c30: 089b lsrs r3, r3, #2
8002c32: 3302 adds r3, #2
8002c34: 69ba ldr r2, [r7, #24]
8002c36: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Clear Rising Falling edge configuration */
temp = EXTI->RTSR;
8002c3a: 4b3a ldr r3, [pc, #232] @ (8002d24 <HAL_GPIO_Init+0x324>)
8002c3c: 689b ldr r3, [r3, #8]
8002c3e: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8002c40: 693b ldr r3, [r7, #16]
8002c42: 43db mvns r3, r3
8002c44: 69ba ldr r2, [r7, #24]
8002c46: 4013 ands r3, r2
8002c48: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
8002c4a: 683b ldr r3, [r7, #0]
8002c4c: 685b ldr r3, [r3, #4]
8002c4e: f403 1380 and.w r3, r3, #1048576 @ 0x100000
8002c52: 2b00 cmp r3, #0
8002c54: d003 beq.n 8002c5e <HAL_GPIO_Init+0x25e>
{
temp |= iocurrent;
8002c56: 69ba ldr r2, [r7, #24]
8002c58: 693b ldr r3, [r7, #16]
8002c5a: 4313 orrs r3, r2
8002c5c: 61bb str r3, [r7, #24]
}
EXTI->RTSR = temp;
8002c5e: 4a31 ldr r2, [pc, #196] @ (8002d24 <HAL_GPIO_Init+0x324>)
8002c60: 69bb ldr r3, [r7, #24]
8002c62: 6093 str r3, [r2, #8]
temp = EXTI->FTSR;
8002c64: 4b2f ldr r3, [pc, #188] @ (8002d24 <HAL_GPIO_Init+0x324>)
8002c66: 68db ldr r3, [r3, #12]
8002c68: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8002c6a: 693b ldr r3, [r7, #16]
8002c6c: 43db mvns r3, r3
8002c6e: 69ba ldr r2, [r7, #24]
8002c70: 4013 ands r3, r2
8002c72: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
8002c74: 683b ldr r3, [r7, #0]
8002c76: 685b ldr r3, [r3, #4]
8002c78: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8002c7c: 2b00 cmp r3, #0
8002c7e: d003 beq.n 8002c88 <HAL_GPIO_Init+0x288>
{
temp |= iocurrent;
8002c80: 69ba ldr r2, [r7, #24]
8002c82: 693b ldr r3, [r7, #16]
8002c84: 4313 orrs r3, r2
8002c86: 61bb str r3, [r7, #24]
}
EXTI->FTSR = temp;
8002c88: 4a26 ldr r2, [pc, #152] @ (8002d24 <HAL_GPIO_Init+0x324>)
8002c8a: 69bb ldr r3, [r7, #24]
8002c8c: 60d3 str r3, [r2, #12]
temp = EXTI->EMR;
8002c8e: 4b25 ldr r3, [pc, #148] @ (8002d24 <HAL_GPIO_Init+0x324>)
8002c90: 685b ldr r3, [r3, #4]
8002c92: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8002c94: 693b ldr r3, [r7, #16]
8002c96: 43db mvns r3, r3
8002c98: 69ba ldr r2, [r7, #24]
8002c9a: 4013 ands r3, r2
8002c9c: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
8002c9e: 683b ldr r3, [r7, #0]
8002ca0: 685b ldr r3, [r3, #4]
8002ca2: f403 3300 and.w r3, r3, #131072 @ 0x20000
8002ca6: 2b00 cmp r3, #0
8002ca8: d003 beq.n 8002cb2 <HAL_GPIO_Init+0x2b2>
{
temp |= iocurrent;
8002caa: 69ba ldr r2, [r7, #24]
8002cac: 693b ldr r3, [r7, #16]
8002cae: 4313 orrs r3, r2
8002cb0: 61bb str r3, [r7, #24]
}
EXTI->EMR = temp;
8002cb2: 4a1c ldr r2, [pc, #112] @ (8002d24 <HAL_GPIO_Init+0x324>)
8002cb4: 69bb ldr r3, [r7, #24]
8002cb6: 6053 str r3, [r2, #4]
/* Clear EXTI line configuration */
temp = EXTI->IMR;
8002cb8: 4b1a ldr r3, [pc, #104] @ (8002d24 <HAL_GPIO_Init+0x324>)
8002cba: 681b ldr r3, [r3, #0]
8002cbc: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8002cbe: 693b ldr r3, [r7, #16]
8002cc0: 43db mvns r3, r3
8002cc2: 69ba ldr r2, [r7, #24]
8002cc4: 4013 ands r3, r2
8002cc6: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & EXTI_IT) != 0x00U)
8002cc8: 683b ldr r3, [r7, #0]
8002cca: 685b ldr r3, [r3, #4]
8002ccc: f403 3380 and.w r3, r3, #65536 @ 0x10000
8002cd0: 2b00 cmp r3, #0
8002cd2: d003 beq.n 8002cdc <HAL_GPIO_Init+0x2dc>
{
temp |= iocurrent;
8002cd4: 69ba ldr r2, [r7, #24]
8002cd6: 693b ldr r3, [r7, #16]
8002cd8: 4313 orrs r3, r2
8002cda: 61bb str r3, [r7, #24]
}
EXTI->IMR = temp;
8002cdc: 4a11 ldr r2, [pc, #68] @ (8002d24 <HAL_GPIO_Init+0x324>)
8002cde: 69bb ldr r3, [r7, #24]
8002ce0: 6013 str r3, [r2, #0]
for(position = 0U; position < GPIO_NUMBER; position++)
8002ce2: 69fb ldr r3, [r7, #28]
8002ce4: 3301 adds r3, #1
8002ce6: 61fb str r3, [r7, #28]
8002ce8: 69fb ldr r3, [r7, #28]
8002cea: 2b0f cmp r3, #15
8002cec: f67f ae96 bls.w 8002a1c <HAL_GPIO_Init+0x1c>
}
}
}
}
8002cf0: bf00 nop
8002cf2: bf00 nop
8002cf4: 3724 adds r7, #36 @ 0x24
8002cf6: 46bd mov sp, r7
8002cf8: f85d 7b04 ldr.w r7, [sp], #4
8002cfc: 4770 bx lr
8002cfe: bf00 nop
8002d00: 40023800 .word 0x40023800
8002d04: 40013800 .word 0x40013800
8002d08: 40020000 .word 0x40020000
8002d0c: 40020400 .word 0x40020400
8002d10: 40020800 .word 0x40020800
8002d14: 40020c00 .word 0x40020c00
8002d18: 40021000 .word 0x40021000
8002d1c: 40021400 .word 0x40021400
8002d20: 40021800 .word 0x40021800
8002d24: 40013c00 .word 0x40013c00
08002d28 <HAL_GPIO_DeInit>:
* @param GPIO_Pin specifies the port bit to be written.
* This parameter can be one of GPIO_PIN_x where x can be (0..15).
* @retval None
*/
void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
{
8002d28: b480 push {r7}
8002d2a: b087 sub sp, #28
8002d2c: af00 add r7, sp, #0
8002d2e: 6078 str r0, [r7, #4]
8002d30: 6039 str r1, [r7, #0]
uint32_t position;
uint32_t ioposition = 0x00U;
8002d32: 2300 movs r3, #0
8002d34: 613b str r3, [r7, #16]
uint32_t iocurrent = 0x00U;
8002d36: 2300 movs r3, #0
8002d38: 60fb str r3, [r7, #12]
uint32_t tmp = 0x00U;
8002d3a: 2300 movs r3, #0
8002d3c: 60bb str r3, [r7, #8]
/* Check the parameters */
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
/* Configure the port pins */
for(position = 0U; position < GPIO_NUMBER; position++)
8002d3e: 2300 movs r3, #0
8002d40: 617b str r3, [r7, #20]
8002d42: e0c7 b.n 8002ed4 <HAL_GPIO_DeInit+0x1ac>
{
/* Get the IO position */
ioposition = 0x01U << position;
8002d44: 2201 movs r2, #1
8002d46: 697b ldr r3, [r7, #20]
8002d48: fa02 f303 lsl.w r3, r2, r3
8002d4c: 613b str r3, [r7, #16]
/* Get the current IO position */
iocurrent = (GPIO_Pin) & ioposition;
8002d4e: 683a ldr r2, [r7, #0]
8002d50: 693b ldr r3, [r7, #16]
8002d52: 4013 ands r3, r2
8002d54: 60fb str r3, [r7, #12]
if(iocurrent == ioposition)
8002d56: 68fa ldr r2, [r7, #12]
8002d58: 693b ldr r3, [r7, #16]
8002d5a: 429a cmp r2, r3
8002d5c: f040 80b7 bne.w 8002ece <HAL_GPIO_DeInit+0x1a6>
{
/*------------------------- EXTI Mode Configuration --------------------*/
tmp = SYSCFG->EXTICR[position >> 2U];
8002d60: 4a62 ldr r2, [pc, #392] @ (8002eec <HAL_GPIO_DeInit+0x1c4>)
8002d62: 697b ldr r3, [r7, #20]
8002d64: 089b lsrs r3, r3, #2
8002d66: 3302 adds r3, #2
8002d68: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8002d6c: 60bb str r3, [r7, #8]
tmp &= (0x0FU << (4U * (position & 0x03U)));
8002d6e: 697b ldr r3, [r7, #20]
8002d70: f003 0303 and.w r3, r3, #3
8002d74: 009b lsls r3, r3, #2
8002d76: 220f movs r2, #15
8002d78: fa02 f303 lsl.w r3, r2, r3
8002d7c: 68ba ldr r2, [r7, #8]
8002d7e: 4013 ands r3, r2
8002d80: 60bb str r3, [r7, #8]
if(tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))))
8002d82: 687b ldr r3, [r7, #4]
8002d84: 4a5a ldr r2, [pc, #360] @ (8002ef0 <HAL_GPIO_DeInit+0x1c8>)
8002d86: 4293 cmp r3, r2
8002d88: d025 beq.n 8002dd6 <HAL_GPIO_DeInit+0xae>
8002d8a: 687b ldr r3, [r7, #4]
8002d8c: 4a59 ldr r2, [pc, #356] @ (8002ef4 <HAL_GPIO_DeInit+0x1cc>)
8002d8e: 4293 cmp r3, r2
8002d90: d01f beq.n 8002dd2 <HAL_GPIO_DeInit+0xaa>
8002d92: 687b ldr r3, [r7, #4]
8002d94: 4a58 ldr r2, [pc, #352] @ (8002ef8 <HAL_GPIO_DeInit+0x1d0>)
8002d96: 4293 cmp r3, r2
8002d98: d019 beq.n 8002dce <HAL_GPIO_DeInit+0xa6>
8002d9a: 687b ldr r3, [r7, #4]
8002d9c: 4a57 ldr r2, [pc, #348] @ (8002efc <HAL_GPIO_DeInit+0x1d4>)
8002d9e: 4293 cmp r3, r2
8002da0: d013 beq.n 8002dca <HAL_GPIO_DeInit+0xa2>
8002da2: 687b ldr r3, [r7, #4]
8002da4: 4a56 ldr r2, [pc, #344] @ (8002f00 <HAL_GPIO_DeInit+0x1d8>)
8002da6: 4293 cmp r3, r2
8002da8: d00d beq.n 8002dc6 <HAL_GPIO_DeInit+0x9e>
8002daa: 687b ldr r3, [r7, #4]
8002dac: 4a55 ldr r2, [pc, #340] @ (8002f04 <HAL_GPIO_DeInit+0x1dc>)
8002dae: 4293 cmp r3, r2
8002db0: d007 beq.n 8002dc2 <HAL_GPIO_DeInit+0x9a>
8002db2: 687b ldr r3, [r7, #4]
8002db4: 4a54 ldr r2, [pc, #336] @ (8002f08 <HAL_GPIO_DeInit+0x1e0>)
8002db6: 4293 cmp r3, r2
8002db8: d101 bne.n 8002dbe <HAL_GPIO_DeInit+0x96>
8002dba: 2306 movs r3, #6
8002dbc: e00c b.n 8002dd8 <HAL_GPIO_DeInit+0xb0>
8002dbe: 2307 movs r3, #7
8002dc0: e00a b.n 8002dd8 <HAL_GPIO_DeInit+0xb0>
8002dc2: 2305 movs r3, #5
8002dc4: e008 b.n 8002dd8 <HAL_GPIO_DeInit+0xb0>
8002dc6: 2304 movs r3, #4
8002dc8: e006 b.n 8002dd8 <HAL_GPIO_DeInit+0xb0>
8002dca: 2303 movs r3, #3
8002dcc: e004 b.n 8002dd8 <HAL_GPIO_DeInit+0xb0>
8002dce: 2302 movs r3, #2
8002dd0: e002 b.n 8002dd8 <HAL_GPIO_DeInit+0xb0>
8002dd2: 2301 movs r3, #1
8002dd4: e000 b.n 8002dd8 <HAL_GPIO_DeInit+0xb0>
8002dd6: 2300 movs r3, #0
8002dd8: 697a ldr r2, [r7, #20]
8002dda: f002 0203 and.w r2, r2, #3
8002dde: 0092 lsls r2, r2, #2
8002de0: 4093 lsls r3, r2
8002de2: 68ba ldr r2, [r7, #8]
8002de4: 429a cmp r2, r3
8002de6: d132 bne.n 8002e4e <HAL_GPIO_DeInit+0x126>
{
/* Clear EXTI line configuration */
EXTI->IMR &= ~((uint32_t)iocurrent);
8002de8: 4b48 ldr r3, [pc, #288] @ (8002f0c <HAL_GPIO_DeInit+0x1e4>)
8002dea: 681a ldr r2, [r3, #0]
8002dec: 68fb ldr r3, [r7, #12]
8002dee: 43db mvns r3, r3
8002df0: 4946 ldr r1, [pc, #280] @ (8002f0c <HAL_GPIO_DeInit+0x1e4>)
8002df2: 4013 ands r3, r2
8002df4: 600b str r3, [r1, #0]
EXTI->EMR &= ~((uint32_t)iocurrent);
8002df6: 4b45 ldr r3, [pc, #276] @ (8002f0c <HAL_GPIO_DeInit+0x1e4>)
8002df8: 685a ldr r2, [r3, #4]
8002dfa: 68fb ldr r3, [r7, #12]
8002dfc: 43db mvns r3, r3
8002dfe: 4943 ldr r1, [pc, #268] @ (8002f0c <HAL_GPIO_DeInit+0x1e4>)
8002e00: 4013 ands r3, r2
8002e02: 604b str r3, [r1, #4]
/* Clear Rising Falling edge configuration */
EXTI->FTSR &= ~((uint32_t)iocurrent);
8002e04: 4b41 ldr r3, [pc, #260] @ (8002f0c <HAL_GPIO_DeInit+0x1e4>)
8002e06: 68da ldr r2, [r3, #12]
8002e08: 68fb ldr r3, [r7, #12]
8002e0a: 43db mvns r3, r3
8002e0c: 493f ldr r1, [pc, #252] @ (8002f0c <HAL_GPIO_DeInit+0x1e4>)
8002e0e: 4013 ands r3, r2
8002e10: 60cb str r3, [r1, #12]
EXTI->RTSR &= ~((uint32_t)iocurrent);
8002e12: 4b3e ldr r3, [pc, #248] @ (8002f0c <HAL_GPIO_DeInit+0x1e4>)
8002e14: 689a ldr r2, [r3, #8]
8002e16: 68fb ldr r3, [r7, #12]
8002e18: 43db mvns r3, r3
8002e1a: 493c ldr r1, [pc, #240] @ (8002f0c <HAL_GPIO_DeInit+0x1e4>)
8002e1c: 4013 ands r3, r2
8002e1e: 608b str r3, [r1, #8]
/* Configure the External Interrupt or event for the current IO */
tmp = 0x0FU << (4U * (position & 0x03U));
8002e20: 697b ldr r3, [r7, #20]
8002e22: f003 0303 and.w r3, r3, #3
8002e26: 009b lsls r3, r3, #2
8002e28: 220f movs r2, #15
8002e2a: fa02 f303 lsl.w r3, r2, r3
8002e2e: 60bb str r3, [r7, #8]
SYSCFG->EXTICR[position >> 2U] &= ~tmp;
8002e30: 4a2e ldr r2, [pc, #184] @ (8002eec <HAL_GPIO_DeInit+0x1c4>)
8002e32: 697b ldr r3, [r7, #20]
8002e34: 089b lsrs r3, r3, #2
8002e36: 3302 adds r3, #2
8002e38: f852 1023 ldr.w r1, [r2, r3, lsl #2]
8002e3c: 68bb ldr r3, [r7, #8]
8002e3e: 43da mvns r2, r3
8002e40: 482a ldr r0, [pc, #168] @ (8002eec <HAL_GPIO_DeInit+0x1c4>)
8002e42: 697b ldr r3, [r7, #20]
8002e44: 089b lsrs r3, r3, #2
8002e46: 400a ands r2, r1
8002e48: 3302 adds r3, #2
8002e4a: f840 2023 str.w r2, [r0, r3, lsl #2]
}
/*------------------------- GPIO Mode Configuration --------------------*/
/* Configure IO Direction in Input Floating Mode */
GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2U));
8002e4e: 687b ldr r3, [r7, #4]
8002e50: 681a ldr r2, [r3, #0]
8002e52: 697b ldr r3, [r7, #20]
8002e54: 005b lsls r3, r3, #1
8002e56: 2103 movs r1, #3
8002e58: fa01 f303 lsl.w r3, r1, r3
8002e5c: 43db mvns r3, r3
8002e5e: 401a ands r2, r3
8002e60: 687b ldr r3, [r7, #4]
8002e62: 601a str r2, [r3, #0]
/* Configure the default Alternate Function in current IO */
GPIOx->AFR[position >> 3U] &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
8002e64: 697b ldr r3, [r7, #20]
8002e66: 08da lsrs r2, r3, #3
8002e68: 687b ldr r3, [r7, #4]
8002e6a: 3208 adds r2, #8
8002e6c: f853 1022 ldr.w r1, [r3, r2, lsl #2]
8002e70: 697b ldr r3, [r7, #20]
8002e72: f003 0307 and.w r3, r3, #7
8002e76: 009b lsls r3, r3, #2
8002e78: 220f movs r2, #15
8002e7a: fa02 f303 lsl.w r3, r2, r3
8002e7e: 43db mvns r3, r3
8002e80: 697a ldr r2, [r7, #20]
8002e82: 08d2 lsrs r2, r2, #3
8002e84: 4019 ands r1, r3
8002e86: 687b ldr r3, [r7, #4]
8002e88: 3208 adds r2, #8
8002e8a: f843 1022 str.w r1, [r3, r2, lsl #2]
/* Deactivate the Pull-up and Pull-down resistor for the current IO */
GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
8002e8e: 687b ldr r3, [r7, #4]
8002e90: 68da ldr r2, [r3, #12]
8002e92: 697b ldr r3, [r7, #20]
8002e94: 005b lsls r3, r3, #1
8002e96: 2103 movs r1, #3
8002e98: fa01 f303 lsl.w r3, r1, r3
8002e9c: 43db mvns r3, r3
8002e9e: 401a ands r2, r3
8002ea0: 687b ldr r3, [r7, #4]
8002ea2: 60da str r2, [r3, #12]
/* Configure the default value IO Output Type */
GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ;
8002ea4: 687b ldr r3, [r7, #4]
8002ea6: 685a ldr r2, [r3, #4]
8002ea8: 2101 movs r1, #1
8002eaa: 697b ldr r3, [r7, #20]
8002eac: fa01 f303 lsl.w r3, r1, r3
8002eb0: 43db mvns r3, r3
8002eb2: 401a ands r2, r3
8002eb4: 687b ldr r3, [r7, #4]
8002eb6: 605a str r2, [r3, #4]
/* Configure the default value for IO Speed */
GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
8002eb8: 687b ldr r3, [r7, #4]
8002eba: 689a ldr r2, [r3, #8]
8002ebc: 697b ldr r3, [r7, #20]
8002ebe: 005b lsls r3, r3, #1
8002ec0: 2103 movs r1, #3
8002ec2: fa01 f303 lsl.w r3, r1, r3
8002ec6: 43db mvns r3, r3
8002ec8: 401a ands r2, r3
8002eca: 687b ldr r3, [r7, #4]
8002ecc: 609a str r2, [r3, #8]
for(position = 0U; position < GPIO_NUMBER; position++)
8002ece: 697b ldr r3, [r7, #20]
8002ed0: 3301 adds r3, #1
8002ed2: 617b str r3, [r7, #20]
8002ed4: 697b ldr r3, [r7, #20]
8002ed6: 2b0f cmp r3, #15
8002ed8: f67f af34 bls.w 8002d44 <HAL_GPIO_DeInit+0x1c>
}
}
}
8002edc: bf00 nop
8002ede: bf00 nop
8002ee0: 371c adds r7, #28
8002ee2: 46bd mov sp, r7
8002ee4: f85d 7b04 ldr.w r7, [sp], #4
8002ee8: 4770 bx lr
8002eea: bf00 nop
8002eec: 40013800 .word 0x40013800
8002ef0: 40020000 .word 0x40020000
8002ef4: 40020400 .word 0x40020400
8002ef8: 40020800 .word 0x40020800
8002efc: 40020c00 .word 0x40020c00
8002f00: 40021000 .word 0x40021000
8002f04: 40021400 .word 0x40021400
8002f08: 40021800 .word 0x40021800
8002f0c: 40013c00 .word 0x40013c00
08002f10 <HAL_GPIO_ReadPin>:
* @param GPIO_Pin specifies the port bit to read.
* This parameter can be GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
8002f10: b480 push {r7}
8002f12: b085 sub sp, #20
8002f14: af00 add r7, sp, #0
8002f16: 6078 str r0, [r7, #4]
8002f18: 460b mov r3, r1
8002f1a: 807b strh r3, [r7, #2]
GPIO_PinState bitstatus;
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
8002f1c: 687b ldr r3, [r7, #4]
8002f1e: 691a ldr r2, [r3, #16]
8002f20: 887b ldrh r3, [r7, #2]
8002f22: 4013 ands r3, r2
8002f24: 2b00 cmp r3, #0
8002f26: d002 beq.n 8002f2e <HAL_GPIO_ReadPin+0x1e>
{
bitstatus = GPIO_PIN_SET;
8002f28: 2301 movs r3, #1
8002f2a: 73fb strb r3, [r7, #15]
8002f2c: e001 b.n 8002f32 <HAL_GPIO_ReadPin+0x22>
}
else
{
bitstatus = GPIO_PIN_RESET;
8002f2e: 2300 movs r3, #0
8002f30: 73fb strb r3, [r7, #15]
}
return bitstatus;
8002f32: 7bfb ldrb r3, [r7, #15]
}
8002f34: 4618 mov r0, r3
8002f36: 3714 adds r7, #20
8002f38: 46bd mov sp, r7
8002f3a: f85d 7b04 ldr.w r7, [sp], #4
8002f3e: 4770 bx lr
08002f40 <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
8002f40: b480 push {r7}
8002f42: b083 sub sp, #12
8002f44: af00 add r7, sp, #0
8002f46: 6078 str r0, [r7, #4]
8002f48: 460b mov r3, r1
8002f4a: 807b strh r3, [r7, #2]
8002f4c: 4613 mov r3, r2
8002f4e: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if(PinState != GPIO_PIN_RESET)
8002f50: 787b ldrb r3, [r7, #1]
8002f52: 2b00 cmp r3, #0
8002f54: d003 beq.n 8002f5e <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
8002f56: 887a ldrh r2, [r7, #2]
8002f58: 687b ldr r3, [r7, #4]
8002f5a: 619a str r2, [r3, #24]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
}
}
8002f5c: e003 b.n 8002f66 <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
8002f5e: 887b ldrh r3, [r7, #2]
8002f60: 041a lsls r2, r3, #16
8002f62: 687b ldr r3, [r7, #4]
8002f64: 619a str r2, [r3, #24]
}
8002f66: bf00 nop
8002f68: 370c adds r7, #12
8002f6a: 46bd mov sp, r7
8002f6c: f85d 7b04 ldr.w r7, [sp], #4
8002f70: 4770 bx lr
08002f72 <HAL_MMC_Init>:
MMC_HandleTypeDef and create the associated handle.
* @param hmmc: Pointer to the MMC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc)
{
8002f72: b580 push {r7, lr}
8002f74: b082 sub sp, #8
8002f76: af00 add r7, sp, #0
8002f78: 6078 str r0, [r7, #4]
/* Check the MMC handle allocation */
if(hmmc == NULL)
8002f7a: 687b ldr r3, [r7, #4]
8002f7c: 2b00 cmp r3, #0
8002f7e: d101 bne.n 8002f84 <HAL_MMC_Init+0x12>
{
return HAL_ERROR;
8002f80: 2301 movs r3, #1
8002f82: e031 b.n 8002fe8 <HAL_MMC_Init+0x76>
assert_param(IS_SDIO_CLOCK_POWER_SAVE(hmmc->Init.ClockPowerSave));
assert_param(IS_SDIO_BUS_WIDE(hmmc->Init.BusWide));
assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(hmmc->Init.HardwareFlowControl));
assert_param(IS_SDIO_CLKDIV(hmmc->Init.ClockDiv));
if(hmmc->State == HAL_MMC_STATE_RESET)
8002f84: 687b ldr r3, [r7, #4]
8002f86: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
8002f8a: b2db uxtb r3, r3
8002f8c: 2b00 cmp r3, #0
8002f8e: d105 bne.n 8002f9c <HAL_MMC_Init+0x2a>
{
/* Allocate lock resource and initialize it */
hmmc->Lock = HAL_UNLOCKED;
8002f90: 687b ldr r3, [r7, #4]
8002f92: 2200 movs r2, #0
8002f94: 771a strb r2, [r3, #28]
/* Init the low level hardware */
hmmc->MspInitCallback(hmmc);
#else
/* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
HAL_MMC_MspInit(hmmc);
8002f96: 6878 ldr r0, [r7, #4]
8002f98: f7fe f9e6 bl 8001368 <HAL_MMC_MspInit>
#endif
}
hmmc->State = HAL_MMC_STATE_BUSY;
8002f9c: 687b ldr r3, [r7, #4]
8002f9e: 2203 movs r2, #3
8002fa0: f883 2034 strb.w r2, [r3, #52] @ 0x34
/* Initialize the Card parameters */
if(HAL_MMC_InitCard(hmmc) == HAL_ERROR)
8002fa4: 6878 ldr r0, [r7, #4]
8002fa6: f000 f823 bl 8002ff0 <HAL_MMC_InitCard>
8002faa: 4603 mov r3, r0
8002fac: 2b01 cmp r3, #1
8002fae: d101 bne.n 8002fb4 <HAL_MMC_Init+0x42>
{
return HAL_ERROR;
8002fb0: 2301 movs r3, #1
8002fb2: e019 b.n 8002fe8 <HAL_MMC_Init+0x76>
}
/* Initialize the error code */
hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
8002fb4: 687b ldr r3, [r7, #4]
8002fb6: 2200 movs r2, #0
8002fb8: 639a str r2, [r3, #56] @ 0x38
/* Initialize the MMC operation */
hmmc->Context = MMC_CONTEXT_NONE;
8002fba: 687b ldr r3, [r7, #4]
8002fbc: 2200 movs r2, #0
8002fbe: 631a str r2, [r3, #48] @ 0x30
/* Initialize the MMC state */
hmmc->State = HAL_MMC_STATE_READY;
8002fc0: 687b ldr r3, [r7, #4]
8002fc2: 2201 movs r2, #1
8002fc4: f883 2034 strb.w r2, [r3, #52] @ 0x34
/* Configure bus width */
if (hmmc->Init.BusWide != SDIO_BUS_WIDE_1B)
8002fc8: 687b ldr r3, [r7, #4]
8002fca: 691b ldr r3, [r3, #16]
8002fcc: 2b00 cmp r3, #0
8002fce: d00a beq.n 8002fe6 <HAL_MMC_Init+0x74>
{
if (HAL_MMC_ConfigWideBusOperation(hmmc, hmmc->Init.BusWide) != HAL_OK)
8002fd0: 687b ldr r3, [r7, #4]
8002fd2: 691b ldr r3, [r3, #16]
8002fd4: 4619 mov r1, r3
8002fd6: 6878 ldr r0, [r7, #4]
8002fd8: f000 fe7c bl 8003cd4 <HAL_MMC_ConfigWideBusOperation>
8002fdc: 4603 mov r3, r0
8002fde: 2b00 cmp r3, #0
8002fe0: d001 beq.n 8002fe6 <HAL_MMC_Init+0x74>
{
return HAL_ERROR;
8002fe2: 2301 movs r3, #1
8002fe4: e000 b.n 8002fe8 <HAL_MMC_Init+0x76>
}
}
return HAL_OK;
8002fe6: 2300 movs r3, #0
}
8002fe8: 4618 mov r0, r3
8002fea: 3708 adds r7, #8
8002fec: 46bd mov sp, r7
8002fee: bd80 pop {r7, pc}
08002ff0 <HAL_MMC_InitCard>:
* @note This function initializes the MMC card. It could be used when a card
re-initialization is needed.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc)
{
8002ff0: b5b0 push {r4, r5, r7, lr}
8002ff2: b08e sub sp, #56 @ 0x38
8002ff4: af04 add r7, sp, #16
8002ff6: 6078 str r0, [r7, #4]
uint32_t errorstate;
MMC_InitTypeDef Init;
HAL_StatusTypeDef status;
/* Default SDIO peripheral configuration for MMC card initialization */
Init.ClockEdge = SDIO_CLOCK_EDGE_RISING;
8002ff8: 2300 movs r3, #0
8002ffa: 60bb str r3, [r7, #8]
Init.ClockBypass = SDIO_CLOCK_BYPASS_DISABLE;
8002ffc: 2300 movs r3, #0
8002ffe: 60fb str r3, [r7, #12]
Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE;
8003000: 2300 movs r3, #0
8003002: 613b str r3, [r7, #16]
Init.BusWide = SDIO_BUS_WIDE_1B;
8003004: 2300 movs r3, #0
8003006: 617b str r3, [r7, #20]
Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
8003008: 2300 movs r3, #0
800300a: 61bb str r3, [r7, #24]
Init.ClockDiv = SDIO_INIT_CLK_DIV;
800300c: 2376 movs r3, #118 @ 0x76
800300e: 61fb str r3, [r7, #28]
/* Initialize SDIO peripheral interface with default configuration */
status = SDIO_Init(hmmc->Instance, Init);
8003010: 687b ldr r3, [r7, #4]
8003012: 681d ldr r5, [r3, #0]
8003014: 466c mov r4, sp
8003016: f107 0314 add.w r3, r7, #20
800301a: e893 0007 ldmia.w r3, {r0, r1, r2}
800301e: e884 0007 stmia.w r4, {r0, r1, r2}
8003022: f107 0308 add.w r3, r7, #8
8003026: cb0e ldmia r3, {r1, r2, r3}
8003028: 4628 mov r0, r5
800302a: f003 feff bl 8006e2c <SDIO_Init>
800302e: 4603 mov r3, r0
8003030: f887 3027 strb.w r3, [r7, #39] @ 0x27
if(status == HAL_ERROR)
8003034: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
8003038: 2b01 cmp r3, #1
800303a: d101 bne.n 8003040 <HAL_MMC_InitCard+0x50>
{
return HAL_ERROR;
800303c: 2301 movs r3, #1
800303e: e058 b.n 80030f2 <HAL_MMC_InitCard+0x102>
}
/* Disable SDIO Clock */
__HAL_MMC_DISABLE(hmmc);
8003040: 4b2e ldr r3, [pc, #184] @ (80030fc <HAL_MMC_InitCard+0x10c>)
8003042: 2200 movs r2, #0
8003044: 601a str r2, [r3, #0]
/* Set Power State to ON */
status = SDIO_PowerState_ON(hmmc->Instance);
8003046: 687b ldr r3, [r7, #4]
8003048: 681b ldr r3, [r3, #0]
800304a: 4618 mov r0, r3
800304c: f003 ff37 bl 8006ebe <SDIO_PowerState_ON>
8003050: 4603 mov r3, r0
8003052: f887 3027 strb.w r3, [r7, #39] @ 0x27
if(status == HAL_ERROR)
8003056: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
800305a: 2b01 cmp r3, #1
800305c: d101 bne.n 8003062 <HAL_MMC_InitCard+0x72>
{
return HAL_ERROR;
800305e: 2301 movs r3, #1
8003060: e047 b.n 80030f2 <HAL_MMC_InitCard+0x102>
}
/* Enable MMC Clock */
__HAL_MMC_ENABLE(hmmc);
8003062: 4b26 ldr r3, [pc, #152] @ (80030fc <HAL_MMC_InitCard+0x10c>)
8003064: 2201 movs r2, #1
8003066: 601a str r2, [r3, #0]
/* Required power up waiting time before starting the MMC initialization sequence */
HAL_Delay(2);
8003068: 2002 movs r0, #2
800306a: f7fe fba1 bl 80017b0 <HAL_Delay>
/* Identify card operating voltage */
errorstate = MMC_PowerON(hmmc);
800306e: 6878 ldr r0, [r7, #4]
8003070: f001 f806 bl 8004080 <MMC_PowerON>
8003074: 6238 str r0, [r7, #32]
if(errorstate != HAL_MMC_ERROR_NONE)
8003076: 6a3b ldr r3, [r7, #32]
8003078: 2b00 cmp r3, #0
800307a: d00b beq.n 8003094 <HAL_MMC_InitCard+0xa4>
{
hmmc->State = HAL_MMC_STATE_READY;
800307c: 687b ldr r3, [r7, #4]
800307e: 2201 movs r2, #1
8003080: f883 2034 strb.w r2, [r3, #52] @ 0x34
hmmc->ErrorCode |= errorstate;
8003084: 687b ldr r3, [r7, #4]
8003086: 6b9a ldr r2, [r3, #56] @ 0x38
8003088: 6a3b ldr r3, [r7, #32]
800308a: 431a orrs r2, r3
800308c: 687b ldr r3, [r7, #4]
800308e: 639a str r2, [r3, #56] @ 0x38
return HAL_ERROR;
8003090: 2301 movs r3, #1
8003092: e02e b.n 80030f2 <HAL_MMC_InitCard+0x102>
}
/* Card initialization */
errorstate = MMC_InitCard(hmmc);
8003094: 6878 ldr r0, [r7, #4]
8003096: f000 feef bl 8003e78 <MMC_InitCard>
800309a: 6238 str r0, [r7, #32]
if(errorstate != HAL_MMC_ERROR_NONE)
800309c: 6a3b ldr r3, [r7, #32]
800309e: 2b00 cmp r3, #0
80030a0: d00b beq.n 80030ba <HAL_MMC_InitCard+0xca>
{
hmmc->State = HAL_MMC_STATE_READY;
80030a2: 687b ldr r3, [r7, #4]
80030a4: 2201 movs r2, #1
80030a6: f883 2034 strb.w r2, [r3, #52] @ 0x34
hmmc->ErrorCode |= errorstate;
80030aa: 687b ldr r3, [r7, #4]
80030ac: 6b9a ldr r2, [r3, #56] @ 0x38
80030ae: 6a3b ldr r3, [r7, #32]
80030b0: 431a orrs r2, r3
80030b2: 687b ldr r3, [r7, #4]
80030b4: 639a str r2, [r3, #56] @ 0x38
return HAL_ERROR;
80030b6: 2301 movs r3, #1
80030b8: e01b b.n 80030f2 <HAL_MMC_InitCard+0x102>
}
/* Set Block Size for Card */
errorstate = SDMMC_CmdBlockLength(hmmc->Instance, MMC_BLOCKSIZE);
80030ba: 687b ldr r3, [r7, #4]
80030bc: 681b ldr r3, [r3, #0]
80030be: f44f 7100 mov.w r1, #512 @ 0x200
80030c2: 4618 mov r0, r3
80030c4: f003 ff8d bl 8006fe2 <SDMMC_CmdBlockLength>
80030c8: 6238 str r0, [r7, #32]
if(errorstate != HAL_MMC_ERROR_NONE)
80030ca: 6a3b ldr r3, [r7, #32]
80030cc: 2b00 cmp r3, #0
80030ce: d00f beq.n 80030f0 <HAL_MMC_InitCard+0x100>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
80030d0: 687b ldr r3, [r7, #4]
80030d2: 681b ldr r3, [r3, #0]
80030d4: 4a0a ldr r2, [pc, #40] @ (8003100 <HAL_MMC_InitCard+0x110>)
80030d6: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= errorstate;
80030d8: 687b ldr r3, [r7, #4]
80030da: 6b9a ldr r2, [r3, #56] @ 0x38
80030dc: 6a3b ldr r3, [r7, #32]
80030de: 431a orrs r2, r3
80030e0: 687b ldr r3, [r7, #4]
80030e2: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
80030e4: 687b ldr r3, [r7, #4]
80030e6: 2201 movs r2, #1
80030e8: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
80030ec: 2301 movs r3, #1
80030ee: e000 b.n 80030f2 <HAL_MMC_InitCard+0x102>
}
return HAL_OK;
80030f0: 2300 movs r3, #0
}
80030f2: 4618 mov r0, r3
80030f4: 3728 adds r7, #40 @ 0x28
80030f6: 46bd mov sp, r7
80030f8: bdb0 pop {r4, r5, r7, pc}
80030fa: bf00 nop
80030fc: 422580a0 .word 0x422580a0
8003100: 004005ff .word 0x004005ff
08003104 <HAL_MMC_ReadBlocks>:
* @param NumberOfBlocks: Number of MMC blocks to read
* @param Timeout: Specify timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout)
{
8003104: b580 push {r7, lr}
8003106: b092 sub sp, #72 @ 0x48
8003108: af00 add r7, sp, #0
800310a: 60f8 str r0, [r7, #12]
800310c: 60b9 str r1, [r7, #8]
800310e: 607a str r2, [r7, #4]
8003110: 603b str r3, [r7, #0]
SDIO_DataInitTypeDef config;
uint32_t errorstate;
uint32_t tickstart = HAL_GetTick();
8003112: f7fe fb41 bl 8001798 <HAL_GetTick>
8003116: 6338 str r0, [r7, #48] @ 0x30
uint32_t count, data, dataremaining;
uint32_t add = BlockAdd;
8003118: 687b ldr r3, [r7, #4]
800311a: 63bb str r3, [r7, #56] @ 0x38
uint8_t *tempbuff = pData;
800311c: 68bb ldr r3, [r7, #8]
800311e: 637b str r3, [r7, #52] @ 0x34
if(NULL == pData)
8003120: 68bb ldr r3, [r7, #8]
8003122: 2b00 cmp r3, #0
8003124: d107 bne.n 8003136 <HAL_MMC_ReadBlocks+0x32>
{
hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM;
8003126: 68fb ldr r3, [r7, #12]
8003128: 6b9b ldr r3, [r3, #56] @ 0x38
800312a: f043 6200 orr.w r2, r3, #134217728 @ 0x8000000
800312e: 68fb ldr r3, [r7, #12]
8003130: 639a str r2, [r3, #56] @ 0x38
return HAL_ERROR;
8003132: 2301 movs r3, #1
8003134: e1a4 b.n 8003480 <HAL_MMC_ReadBlocks+0x37c>
}
if(hmmc->State == HAL_MMC_STATE_READY)
8003136: 68fb ldr r3, [r7, #12]
8003138: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
800313c: b2db uxtb r3, r3
800313e: 2b01 cmp r3, #1
8003140: f040 8197 bne.w 8003472 <HAL_MMC_ReadBlocks+0x36e>
{
hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
8003144: 68fb ldr r3, [r7, #12]
8003146: 2200 movs r2, #0
8003148: 639a str r2, [r3, #56] @ 0x38
if((BlockAdd + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr))
800314a: 687a ldr r2, [r7, #4]
800314c: 683b ldr r3, [r7, #0]
800314e: 441a add r2, r3
8003150: 68fb ldr r3, [r7, #12]
8003152: 6d9b ldr r3, [r3, #88] @ 0x58
8003154: 429a cmp r2, r3
8003156: d907 bls.n 8003168 <HAL_MMC_ReadBlocks+0x64>
{
hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE;
8003158: 68fb ldr r3, [r7, #12]
800315a: 6b9b ldr r3, [r3, #56] @ 0x38
800315c: f043 7200 orr.w r2, r3, #33554432 @ 0x2000000
8003160: 68fb ldr r3, [r7, #12]
8003162: 639a str r2, [r3, #56] @ 0x38
return HAL_ERROR;
8003164: 2301 movs r3, #1
8003166: e18b b.n 8003480 <HAL_MMC_ReadBlocks+0x37c>
}
hmmc->State = HAL_MMC_STATE_BUSY;
8003168: 68fb ldr r3, [r7, #12]
800316a: 2203 movs r2, #3
800316c: f883 2034 strb.w r2, [r3, #52] @ 0x34
/* Initialize data control register */
hmmc->Instance->DCTRL = 0U;
8003170: 68fb ldr r3, [r7, #12]
8003172: 681b ldr r3, [r3, #0]
8003174: 2200 movs r2, #0
8003176: 62da str r2, [r3, #44] @ 0x2c
if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD)
8003178: 68fb ldr r3, [r7, #12]
800317a: 6c5b ldr r3, [r3, #68] @ 0x44
800317c: 2b01 cmp r3, #1
800317e: d002 beq.n 8003186 <HAL_MMC_ReadBlocks+0x82>
{
add *= 512U;
8003180: 6bbb ldr r3, [r7, #56] @ 0x38
8003182: 025b lsls r3, r3, #9
8003184: 63bb str r3, [r7, #56] @ 0x38
}
/* Configure the MMC DPSM (Data Path State Machine) */
config.DataTimeOut = SDMMC_DATATIMEOUT;
8003186: f04f 33ff mov.w r3, #4294967295
800318a: 617b str r3, [r7, #20]
config.DataLength = NumberOfBlocks * MMC_BLOCKSIZE;
800318c: 683b ldr r3, [r7, #0]
800318e: 025b lsls r3, r3, #9
8003190: 61bb str r3, [r7, #24]
config.DataBlockSize = SDIO_DATABLOCK_SIZE_512B;
8003192: 2390 movs r3, #144 @ 0x90
8003194: 61fb str r3, [r7, #28]
config.TransferDir = SDIO_TRANSFER_DIR_TO_SDIO;
8003196: 2302 movs r3, #2
8003198: 623b str r3, [r7, #32]
config.TransferMode = SDIO_TRANSFER_MODE_BLOCK;
800319a: 2300 movs r3, #0
800319c: 627b str r3, [r7, #36] @ 0x24
config.DPSM = SDIO_DPSM_ENABLE;
800319e: 2301 movs r3, #1
80031a0: 62bb str r3, [r7, #40] @ 0x28
(void)SDIO_ConfigData(hmmc->Instance, &config);
80031a2: 68fb ldr r3, [r7, #12]
80031a4: 681b ldr r3, [r3, #0]
80031a6: f107 0214 add.w r2, r7, #20
80031aa: 4611 mov r1, r2
80031ac: 4618 mov r0, r3
80031ae: f003 feec bl 8006f8a <SDIO_ConfigData>
/* Read block(s) in polling mode */
if(NumberOfBlocks > 1U)
80031b2: 683b ldr r3, [r7, #0]
80031b4: 2b01 cmp r3, #1
80031b6: d90a bls.n 80031ce <HAL_MMC_ReadBlocks+0xca>
{
hmmc->Context = MMC_CONTEXT_READ_MULTIPLE_BLOCK;
80031b8: 68fb ldr r3, [r7, #12]
80031ba: 2202 movs r2, #2
80031bc: 631a str r2, [r3, #48] @ 0x30
/* Read Multi Block command */
errorstate = SDMMC_CmdReadMultiBlock(hmmc->Instance, add);
80031be: 68fb ldr r3, [r7, #12]
80031c0: 681b ldr r3, [r3, #0]
80031c2: 6bb9 ldr r1, [r7, #56] @ 0x38
80031c4: 4618 mov r0, r3
80031c6: f003 ff50 bl 800706a <SDMMC_CmdReadMultiBlock>
80031ca: 6478 str r0, [r7, #68] @ 0x44
80031cc: e009 b.n 80031e2 <HAL_MMC_ReadBlocks+0xde>
}
else
{
hmmc->Context = MMC_CONTEXT_READ_SINGLE_BLOCK;
80031ce: 68fb ldr r3, [r7, #12]
80031d0: 2201 movs r2, #1
80031d2: 631a str r2, [r3, #48] @ 0x30
/* Read Single Block command */
errorstate = SDMMC_CmdReadSingleBlock(hmmc->Instance, add);
80031d4: 68fb ldr r3, [r7, #12]
80031d6: 681b ldr r3, [r3, #0]
80031d8: 6bb9 ldr r1, [r7, #56] @ 0x38
80031da: 4618 mov r0, r3
80031dc: f003 ff23 bl 8007026 <SDMMC_CmdReadSingleBlock>
80031e0: 6478 str r0, [r7, #68] @ 0x44
}
if(errorstate != HAL_MMC_ERROR_NONE)
80031e2: 6c7b ldr r3, [r7, #68] @ 0x44
80031e4: 2b00 cmp r3, #0
80031e6: d00f beq.n 8003208 <HAL_MMC_ReadBlocks+0x104>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
80031e8: 68fb ldr r3, [r7, #12]
80031ea: 681b ldr r3, [r3, #0]
80031ec: 4a95 ldr r2, [pc, #596] @ (8003444 <HAL_MMC_ReadBlocks+0x340>)
80031ee: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= errorstate;
80031f0: 68fb ldr r3, [r7, #12]
80031f2: 6b9a ldr r2, [r3, #56] @ 0x38
80031f4: 6c7b ldr r3, [r7, #68] @ 0x44
80031f6: 431a orrs r2, r3
80031f8: 68fb ldr r3, [r7, #12]
80031fa: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
80031fc: 68fb ldr r3, [r7, #12]
80031fe: 2201 movs r2, #1
8003200: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
8003204: 2301 movs r3, #1
8003206: e13b b.n 8003480 <HAL_MMC_ReadBlocks+0x37c>
}
/* Poll on SDIO flags */
dataremaining = config.DataLength;
8003208: 69bb ldr r3, [r7, #24]
800320a: 63fb str r3, [r7, #60] @ 0x3c
#if defined(SDIO_STA_STBITERR)
while(!__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND | SDIO_FLAG_STBITERR))
#else /* SDIO_STA_STBITERR not defined */
while(!__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND))
800320c: e05e b.n 80032cc <HAL_MMC_ReadBlocks+0x1c8>
#endif /* SDIO_STA_STBITERR */
{
if(__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_RXFIFOHF) && (dataremaining > 0U))
800320e: 68fb ldr r3, [r7, #12]
8003210: 681b ldr r3, [r3, #0]
8003212: 6b5b ldr r3, [r3, #52] @ 0x34
8003214: f403 4300 and.w r3, r3, #32768 @ 0x8000
8003218: 2b00 cmp r3, #0
800321a: d03c beq.n 8003296 <HAL_MMC_ReadBlocks+0x192>
800321c: 6bfb ldr r3, [r7, #60] @ 0x3c
800321e: 2b00 cmp r3, #0
8003220: d039 beq.n 8003296 <HAL_MMC_ReadBlocks+0x192>
{
/* Read data from SDIO Rx FIFO */
for(count = 0U; count < 8U; count++)
8003222: 2300 movs r3, #0
8003224: 643b str r3, [r7, #64] @ 0x40
8003226: e033 b.n 8003290 <HAL_MMC_ReadBlocks+0x18c>
{
data = SDIO_ReadFIFO(hmmc->Instance);
8003228: 68fb ldr r3, [r7, #12]
800322a: 681b ldr r3, [r3, #0]
800322c: 4618 mov r0, r3
800322e: f003 fe28 bl 8006e82 <SDIO_ReadFIFO>
8003232: 62f8 str r0, [r7, #44] @ 0x2c
*tempbuff = (uint8_t)(data & 0xFFU);
8003234: 6afb ldr r3, [r7, #44] @ 0x2c
8003236: b2da uxtb r2, r3
8003238: 6b7b ldr r3, [r7, #52] @ 0x34
800323a: 701a strb r2, [r3, #0]
tempbuff++;
800323c: 6b7b ldr r3, [r7, #52] @ 0x34
800323e: 3301 adds r3, #1
8003240: 637b str r3, [r7, #52] @ 0x34
dataremaining--;
8003242: 6bfb ldr r3, [r7, #60] @ 0x3c
8003244: 3b01 subs r3, #1
8003246: 63fb str r3, [r7, #60] @ 0x3c
*tempbuff = (uint8_t)((data >> 8U) & 0xFFU);
8003248: 6afb ldr r3, [r7, #44] @ 0x2c
800324a: 0a1b lsrs r3, r3, #8
800324c: b2da uxtb r2, r3
800324e: 6b7b ldr r3, [r7, #52] @ 0x34
8003250: 701a strb r2, [r3, #0]
tempbuff++;
8003252: 6b7b ldr r3, [r7, #52] @ 0x34
8003254: 3301 adds r3, #1
8003256: 637b str r3, [r7, #52] @ 0x34
dataremaining--;
8003258: 6bfb ldr r3, [r7, #60] @ 0x3c
800325a: 3b01 subs r3, #1
800325c: 63fb str r3, [r7, #60] @ 0x3c
*tempbuff = (uint8_t)((data >> 16U) & 0xFFU);
800325e: 6afb ldr r3, [r7, #44] @ 0x2c
8003260: 0c1b lsrs r3, r3, #16
8003262: b2da uxtb r2, r3
8003264: 6b7b ldr r3, [r7, #52] @ 0x34
8003266: 701a strb r2, [r3, #0]
tempbuff++;
8003268: 6b7b ldr r3, [r7, #52] @ 0x34
800326a: 3301 adds r3, #1
800326c: 637b str r3, [r7, #52] @ 0x34
dataremaining--;
800326e: 6bfb ldr r3, [r7, #60] @ 0x3c
8003270: 3b01 subs r3, #1
8003272: 63fb str r3, [r7, #60] @ 0x3c
*tempbuff = (uint8_t)((data >> 24U) & 0xFFU);
8003274: 6afb ldr r3, [r7, #44] @ 0x2c
8003276: 0e1b lsrs r3, r3, #24
8003278: b2da uxtb r2, r3
800327a: 6b7b ldr r3, [r7, #52] @ 0x34
800327c: 701a strb r2, [r3, #0]
tempbuff++;
800327e: 6b7b ldr r3, [r7, #52] @ 0x34
8003280: 3301 adds r3, #1
8003282: 637b str r3, [r7, #52] @ 0x34
dataremaining--;
8003284: 6bfb ldr r3, [r7, #60] @ 0x3c
8003286: 3b01 subs r3, #1
8003288: 63fb str r3, [r7, #60] @ 0x3c
for(count = 0U; count < 8U; count++)
800328a: 6c3b ldr r3, [r7, #64] @ 0x40
800328c: 3301 adds r3, #1
800328e: 643b str r3, [r7, #64] @ 0x40
8003290: 6c3b ldr r3, [r7, #64] @ 0x40
8003292: 2b07 cmp r3, #7
8003294: d9c8 bls.n 8003228 <HAL_MMC_ReadBlocks+0x124>
}
}
if(((HAL_GetTick()-tickstart) >= Timeout) || (Timeout == 0U))
8003296: f7fe fa7f bl 8001798 <HAL_GetTick>
800329a: 4602 mov r2, r0
800329c: 6b3b ldr r3, [r7, #48] @ 0x30
800329e: 1ad3 subs r3, r2, r3
80032a0: 6d3a ldr r2, [r7, #80] @ 0x50
80032a2: 429a cmp r2, r3
80032a4: d902 bls.n 80032ac <HAL_MMC_ReadBlocks+0x1a8>
80032a6: 6d3b ldr r3, [r7, #80] @ 0x50
80032a8: 2b00 cmp r3, #0
80032aa: d10f bne.n 80032cc <HAL_MMC_ReadBlocks+0x1c8>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
80032ac: 68fb ldr r3, [r7, #12]
80032ae: 681b ldr r3, [r3, #0]
80032b0: 4a64 ldr r2, [pc, #400] @ (8003444 <HAL_MMC_ReadBlocks+0x340>)
80032b2: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= HAL_MMC_ERROR_TIMEOUT;
80032b4: 68fb ldr r3, [r7, #12]
80032b6: 6b9b ldr r3, [r3, #56] @ 0x38
80032b8: f043 4200 orr.w r2, r3, #2147483648 @ 0x80000000
80032bc: 68fb ldr r3, [r7, #12]
80032be: 639a str r2, [r3, #56] @ 0x38
hmmc->State= HAL_MMC_STATE_READY;
80032c0: 68fb ldr r3, [r7, #12]
80032c2: 2201 movs r2, #1
80032c4: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_TIMEOUT;
80032c8: 2303 movs r3, #3
80032ca: e0d9 b.n 8003480 <HAL_MMC_ReadBlocks+0x37c>
while(!__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND))
80032cc: 68fb ldr r3, [r7, #12]
80032ce: 681b ldr r3, [r3, #0]
80032d0: 6b5b ldr r3, [r3, #52] @ 0x34
80032d2: f403 7395 and.w r3, r3, #298 @ 0x12a
80032d6: 2b00 cmp r3, #0
80032d8: d099 beq.n 800320e <HAL_MMC_ReadBlocks+0x10a>
}
}
/* Send stop transmission command in case of multiblock read */
if(__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_DATAEND) && (NumberOfBlocks > 1U))
80032da: 68fb ldr r3, [r7, #12]
80032dc: 681b ldr r3, [r3, #0]
80032de: 6b5b ldr r3, [r3, #52] @ 0x34
80032e0: f403 7380 and.w r3, r3, #256 @ 0x100
80032e4: 2b00 cmp r3, #0
80032e6: d01b beq.n 8003320 <HAL_MMC_ReadBlocks+0x21c>
80032e8: 683b ldr r3, [r7, #0]
80032ea: 2b01 cmp r3, #1
80032ec: d918 bls.n 8003320 <HAL_MMC_ReadBlocks+0x21c>
{
/* Send stop transmission command */
errorstate = SDMMC_CmdStopTransfer(hmmc->Instance);
80032ee: 68fb ldr r3, [r7, #12]
80032f0: 681b ldr r3, [r3, #0]
80032f2: 4618 mov r0, r3
80032f4: f003 ff20 bl 8007138 <SDMMC_CmdStopTransfer>
80032f8: 6478 str r0, [r7, #68] @ 0x44
if(errorstate != HAL_MMC_ERROR_NONE)
80032fa: 6c7b ldr r3, [r7, #68] @ 0x44
80032fc: 2b00 cmp r3, #0
80032fe: d00f beq.n 8003320 <HAL_MMC_ReadBlocks+0x21c>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
8003300: 68fb ldr r3, [r7, #12]
8003302: 681b ldr r3, [r3, #0]
8003304: 4a4f ldr r2, [pc, #316] @ (8003444 <HAL_MMC_ReadBlocks+0x340>)
8003306: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= errorstate;
8003308: 68fb ldr r3, [r7, #12]
800330a: 6b9a ldr r2, [r3, #56] @ 0x38
800330c: 6c7b ldr r3, [r7, #68] @ 0x44
800330e: 431a orrs r2, r3
8003310: 68fb ldr r3, [r7, #12]
8003312: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
8003314: 68fb ldr r3, [r7, #12]
8003316: 2201 movs r2, #1
8003318: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
800331c: 2301 movs r3, #1
800331e: e0af b.n 8003480 <HAL_MMC_ReadBlocks+0x37c>
}
}
/* Get error state */
if(__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_DTIMEOUT))
8003320: 68fb ldr r3, [r7, #12]
8003322: 681b ldr r3, [r3, #0]
8003324: 6b5b ldr r3, [r3, #52] @ 0x34
8003326: f003 0308 and.w r3, r3, #8
800332a: 2b00 cmp r3, #0
800332c: d00f beq.n 800334e <HAL_MMC_ReadBlocks+0x24a>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
800332e: 68fb ldr r3, [r7, #12]
8003330: 681b ldr r3, [r3, #0]
8003332: 4a44 ldr r2, [pc, #272] @ (8003444 <HAL_MMC_ReadBlocks+0x340>)
8003334: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT;
8003336: 68fb ldr r3, [r7, #12]
8003338: 6b9b ldr r3, [r3, #56] @ 0x38
800333a: f043 0208 orr.w r2, r3, #8
800333e: 68fb ldr r3, [r7, #12]
8003340: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
8003342: 68fb ldr r3, [r7, #12]
8003344: 2201 movs r2, #1
8003346: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
800334a: 2301 movs r3, #1
800334c: e098 b.n 8003480 <HAL_MMC_ReadBlocks+0x37c>
}
else if(__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_DCRCFAIL))
800334e: 68fb ldr r3, [r7, #12]
8003350: 681b ldr r3, [r3, #0]
8003352: 6b5b ldr r3, [r3, #52] @ 0x34
8003354: f003 0302 and.w r3, r3, #2
8003358: 2b00 cmp r3, #0
800335a: d00f beq.n 800337c <HAL_MMC_ReadBlocks+0x278>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
800335c: 68fb ldr r3, [r7, #12]
800335e: 681b ldr r3, [r3, #0]
8003360: 4a38 ldr r2, [pc, #224] @ (8003444 <HAL_MMC_ReadBlocks+0x340>)
8003362: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL;
8003364: 68fb ldr r3, [r7, #12]
8003366: 6b9b ldr r3, [r3, #56] @ 0x38
8003368: f043 0202 orr.w r2, r3, #2
800336c: 68fb ldr r3, [r7, #12]
800336e: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
8003370: 68fb ldr r3, [r7, #12]
8003372: 2201 movs r2, #1
8003374: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
8003378: 2301 movs r3, #1
800337a: e081 b.n 8003480 <HAL_MMC_ReadBlocks+0x37c>
}
else if(__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_RXOVERR))
800337c: 68fb ldr r3, [r7, #12]
800337e: 681b ldr r3, [r3, #0]
8003380: 6b5b ldr r3, [r3, #52] @ 0x34
8003382: f003 0320 and.w r3, r3, #32
8003386: 2b00 cmp r3, #0
8003388: d05e beq.n 8003448 <HAL_MMC_ReadBlocks+0x344>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
800338a: 68fb ldr r3, [r7, #12]
800338c: 681b ldr r3, [r3, #0]
800338e: 4a2d ldr r2, [pc, #180] @ (8003444 <HAL_MMC_ReadBlocks+0x340>)
8003390: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= HAL_MMC_ERROR_RX_OVERRUN;
8003392: 68fb ldr r3, [r7, #12]
8003394: 6b9b ldr r3, [r3, #56] @ 0x38
8003396: f043 0220 orr.w r2, r3, #32
800339a: 68fb ldr r3, [r7, #12]
800339c: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
800339e: 68fb ldr r3, [r7, #12]
80033a0: 2201 movs r2, #1
80033a2: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
80033a6: 2301 movs r3, #1
80033a8: e06a b.n 8003480 <HAL_MMC_ReadBlocks+0x37c>
}
/* Empty FIFO if there is still any data */
while ((__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_RXDAVL)) && (dataremaining > 0U))
{
data = SDIO_ReadFIFO(hmmc->Instance);
80033aa: 68fb ldr r3, [r7, #12]
80033ac: 681b ldr r3, [r3, #0]
80033ae: 4618 mov r0, r3
80033b0: f003 fd67 bl 8006e82 <SDIO_ReadFIFO>
80033b4: 62f8 str r0, [r7, #44] @ 0x2c
*tempbuff = (uint8_t)(data & 0xFFU);
80033b6: 6afb ldr r3, [r7, #44] @ 0x2c
80033b8: b2da uxtb r2, r3
80033ba: 6b7b ldr r3, [r7, #52] @ 0x34
80033bc: 701a strb r2, [r3, #0]
tempbuff++;
80033be: 6b7b ldr r3, [r7, #52] @ 0x34
80033c0: 3301 adds r3, #1
80033c2: 637b str r3, [r7, #52] @ 0x34
dataremaining--;
80033c4: 6bfb ldr r3, [r7, #60] @ 0x3c
80033c6: 3b01 subs r3, #1
80033c8: 63fb str r3, [r7, #60] @ 0x3c
*tempbuff = (uint8_t)((data >> 8U) & 0xFFU);
80033ca: 6afb ldr r3, [r7, #44] @ 0x2c
80033cc: 0a1b lsrs r3, r3, #8
80033ce: b2da uxtb r2, r3
80033d0: 6b7b ldr r3, [r7, #52] @ 0x34
80033d2: 701a strb r2, [r3, #0]
tempbuff++;
80033d4: 6b7b ldr r3, [r7, #52] @ 0x34
80033d6: 3301 adds r3, #1
80033d8: 637b str r3, [r7, #52] @ 0x34
dataremaining--;
80033da: 6bfb ldr r3, [r7, #60] @ 0x3c
80033dc: 3b01 subs r3, #1
80033de: 63fb str r3, [r7, #60] @ 0x3c
*tempbuff = (uint8_t)((data >> 16U) & 0xFFU);
80033e0: 6afb ldr r3, [r7, #44] @ 0x2c
80033e2: 0c1b lsrs r3, r3, #16
80033e4: b2da uxtb r2, r3
80033e6: 6b7b ldr r3, [r7, #52] @ 0x34
80033e8: 701a strb r2, [r3, #0]
tempbuff++;
80033ea: 6b7b ldr r3, [r7, #52] @ 0x34
80033ec: 3301 adds r3, #1
80033ee: 637b str r3, [r7, #52] @ 0x34
dataremaining--;
80033f0: 6bfb ldr r3, [r7, #60] @ 0x3c
80033f2: 3b01 subs r3, #1
80033f4: 63fb str r3, [r7, #60] @ 0x3c
*tempbuff = (uint8_t)((data >> 24U) & 0xFFU);
80033f6: 6afb ldr r3, [r7, #44] @ 0x2c
80033f8: 0e1b lsrs r3, r3, #24
80033fa: b2da uxtb r2, r3
80033fc: 6b7b ldr r3, [r7, #52] @ 0x34
80033fe: 701a strb r2, [r3, #0]
tempbuff++;
8003400: 6b7b ldr r3, [r7, #52] @ 0x34
8003402: 3301 adds r3, #1
8003404: 637b str r3, [r7, #52] @ 0x34
dataremaining--;
8003406: 6bfb ldr r3, [r7, #60] @ 0x3c
8003408: 3b01 subs r3, #1
800340a: 63fb str r3, [r7, #60] @ 0x3c
if(((HAL_GetTick()-tickstart) >= Timeout) || (Timeout == 0U))
800340c: f7fe f9c4 bl 8001798 <HAL_GetTick>
8003410: 4602 mov r2, r0
8003412: 6b3b ldr r3, [r7, #48] @ 0x30
8003414: 1ad3 subs r3, r2, r3
8003416: 6d3a ldr r2, [r7, #80] @ 0x50
8003418: 429a cmp r2, r3
800341a: d902 bls.n 8003422 <HAL_MMC_ReadBlocks+0x31e>
800341c: 6d3b ldr r3, [r7, #80] @ 0x50
800341e: 2b00 cmp r3, #0
8003420: d112 bne.n 8003448 <HAL_MMC_ReadBlocks+0x344>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
8003422: 68fb ldr r3, [r7, #12]
8003424: 681b ldr r3, [r3, #0]
8003426: 4a07 ldr r2, [pc, #28] @ (8003444 <HAL_MMC_ReadBlocks+0x340>)
8003428: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= HAL_MMC_ERROR_TIMEOUT;
800342a: 68fb ldr r3, [r7, #12]
800342c: 6b9b ldr r3, [r3, #56] @ 0x38
800342e: f043 4200 orr.w r2, r3, #2147483648 @ 0x80000000
8003432: 68fb ldr r3, [r7, #12]
8003434: 639a str r2, [r3, #56] @ 0x38
hmmc->State= HAL_MMC_STATE_READY;
8003436: 68fb ldr r3, [r7, #12]
8003438: 2201 movs r2, #1
800343a: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
800343e: 2301 movs r3, #1
8003440: e01e b.n 8003480 <HAL_MMC_ReadBlocks+0x37c>
8003442: bf00 nop
8003444: 004005ff .word 0x004005ff
while ((__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_RXDAVL)) && (dataremaining > 0U))
8003448: 68fb ldr r3, [r7, #12]
800344a: 681b ldr r3, [r3, #0]
800344c: 6b5b ldr r3, [r3, #52] @ 0x34
800344e: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8003452: 2b00 cmp r3, #0
8003454: d002 beq.n 800345c <HAL_MMC_ReadBlocks+0x358>
8003456: 6bfb ldr r3, [r7, #60] @ 0x3c
8003458: 2b00 cmp r3, #0
800345a: d1a6 bne.n 80033aa <HAL_MMC_ReadBlocks+0x2a6>
}
}
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_DATA_FLAGS);
800345c: 68fb ldr r3, [r7, #12]
800345e: 681b ldr r3, [r3, #0]
8003460: f240 523a movw r2, #1338 @ 0x53a
8003464: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
8003466: 68fb ldr r3, [r7, #12]
8003468: 2201 movs r2, #1
800346a: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_OK;
800346e: 2300 movs r3, #0
8003470: e006 b.n 8003480 <HAL_MMC_ReadBlocks+0x37c>
}
else
{
hmmc->ErrorCode |= HAL_MMC_ERROR_BUSY;
8003472: 68fb ldr r3, [r7, #12]
8003474: 6b9b ldr r3, [r3, #56] @ 0x38
8003476: f043 5200 orr.w r2, r3, #536870912 @ 0x20000000
800347a: 68fb ldr r3, [r7, #12]
800347c: 639a str r2, [r3, #56] @ 0x38
return HAL_ERROR;
800347e: 2301 movs r3, #1
}
}
8003480: 4618 mov r0, r3
8003482: 3748 adds r7, #72 @ 0x48
8003484: 46bd mov sp, r7
8003486: bd80 pop {r7, pc}
08003488 <HAL_MMC_WriteBlocks>:
* @param NumberOfBlocks: Number of MMC blocks to write
* @param Timeout: Specify timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout)
{
8003488: b580 push {r7, lr}
800348a: b092 sub sp, #72 @ 0x48
800348c: af00 add r7, sp, #0
800348e: 60f8 str r0, [r7, #12]
8003490: 60b9 str r1, [r7, #8]
8003492: 607a str r2, [r7, #4]
8003494: 603b str r3, [r7, #0]
SDIO_DataInitTypeDef config;
uint32_t errorstate;
uint32_t tickstart = HAL_GetTick();
8003496: f7fe f97f bl 8001798 <HAL_GetTick>
800349a: 6338 str r0, [r7, #48] @ 0x30
uint32_t count, data, dataremaining;
uint32_t add = BlockAdd;
800349c: 687b ldr r3, [r7, #4]
800349e: 63bb str r3, [r7, #56] @ 0x38
uint8_t *tempbuff = pData;
80034a0: 68bb ldr r3, [r7, #8]
80034a2: 637b str r3, [r7, #52] @ 0x34
if(NULL == pData)
80034a4: 68bb ldr r3, [r7, #8]
80034a6: 2b00 cmp r3, #0
80034a8: d107 bne.n 80034ba <HAL_MMC_WriteBlocks+0x32>
{
hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM;
80034aa: 68fb ldr r3, [r7, #12]
80034ac: 6b9b ldr r3, [r3, #56] @ 0x38
80034ae: f043 6200 orr.w r2, r3, #134217728 @ 0x8000000
80034b2: 68fb ldr r3, [r7, #12]
80034b4: 639a str r2, [r3, #56] @ 0x38
return HAL_ERROR;
80034b6: 2301 movs r3, #1
80034b8: e14f b.n 800375a <HAL_MMC_WriteBlocks+0x2d2>
}
if(hmmc->State == HAL_MMC_STATE_READY)
80034ba: 68fb ldr r3, [r7, #12]
80034bc: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
80034c0: b2db uxtb r3, r3
80034c2: 2b01 cmp r3, #1
80034c4: f040 8142 bne.w 800374c <HAL_MMC_WriteBlocks+0x2c4>
{
hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
80034c8: 68fb ldr r3, [r7, #12]
80034ca: 2200 movs r2, #0
80034cc: 639a str r2, [r3, #56] @ 0x38
if((BlockAdd + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr))
80034ce: 687a ldr r2, [r7, #4]
80034d0: 683b ldr r3, [r7, #0]
80034d2: 441a add r2, r3
80034d4: 68fb ldr r3, [r7, #12]
80034d6: 6d9b ldr r3, [r3, #88] @ 0x58
80034d8: 429a cmp r2, r3
80034da: d907 bls.n 80034ec <HAL_MMC_WriteBlocks+0x64>
{
hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE;
80034dc: 68fb ldr r3, [r7, #12]
80034de: 6b9b ldr r3, [r3, #56] @ 0x38
80034e0: f043 7200 orr.w r2, r3, #33554432 @ 0x2000000
80034e4: 68fb ldr r3, [r7, #12]
80034e6: 639a str r2, [r3, #56] @ 0x38
return HAL_ERROR;
80034e8: 2301 movs r3, #1
80034ea: e136 b.n 800375a <HAL_MMC_WriteBlocks+0x2d2>
}
hmmc->State = HAL_MMC_STATE_BUSY;
80034ec: 68fb ldr r3, [r7, #12]
80034ee: 2203 movs r2, #3
80034f0: f883 2034 strb.w r2, [r3, #52] @ 0x34
/* Initialize data control register */
hmmc->Instance->DCTRL = 0U;
80034f4: 68fb ldr r3, [r7, #12]
80034f6: 681b ldr r3, [r3, #0]
80034f8: 2200 movs r2, #0
80034fa: 62da str r2, [r3, #44] @ 0x2c
if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD)
80034fc: 68fb ldr r3, [r7, #12]
80034fe: 6c5b ldr r3, [r3, #68] @ 0x44
8003500: 2b01 cmp r3, #1
8003502: d002 beq.n 800350a <HAL_MMC_WriteBlocks+0x82>
{
add *= 512U;
8003504: 6bbb ldr r3, [r7, #56] @ 0x38
8003506: 025b lsls r3, r3, #9
8003508: 63bb str r3, [r7, #56] @ 0x38
}
/* Write Blocks in Polling mode */
if(NumberOfBlocks > 1U)
800350a: 683b ldr r3, [r7, #0]
800350c: 2b01 cmp r3, #1
800350e: d90a bls.n 8003526 <HAL_MMC_WriteBlocks+0x9e>
{
hmmc->Context = MMC_CONTEXT_WRITE_MULTIPLE_BLOCK;
8003510: 68fb ldr r3, [r7, #12]
8003512: 2220 movs r2, #32
8003514: 631a str r2, [r3, #48] @ 0x30
/* Write Multi Block command */
errorstate = SDMMC_CmdWriteMultiBlock(hmmc->Instance, add);
8003516: 68fb ldr r3, [r7, #12]
8003518: 681b ldr r3, [r3, #0]
800351a: 6bb9 ldr r1, [r7, #56] @ 0x38
800351c: 4618 mov r0, r3
800351e: f003 fde8 bl 80070f2 <SDMMC_CmdWriteMultiBlock>
8003522: 6478 str r0, [r7, #68] @ 0x44
8003524: e009 b.n 800353a <HAL_MMC_WriteBlocks+0xb2>
}
else
{
hmmc->Context = MMC_CONTEXT_WRITE_SINGLE_BLOCK;
8003526: 68fb ldr r3, [r7, #12]
8003528: 2210 movs r2, #16
800352a: 631a str r2, [r3, #48] @ 0x30
/* Write Single Block command */
errorstate = SDMMC_CmdWriteSingleBlock(hmmc->Instance, add);
800352c: 68fb ldr r3, [r7, #12]
800352e: 681b ldr r3, [r3, #0]
8003530: 6bb9 ldr r1, [r7, #56] @ 0x38
8003532: 4618 mov r0, r3
8003534: f003 fdbb bl 80070ae <SDMMC_CmdWriteSingleBlock>
8003538: 6478 str r0, [r7, #68] @ 0x44
}
if(errorstate != HAL_MMC_ERROR_NONE)
800353a: 6c7b ldr r3, [r7, #68] @ 0x44
800353c: 2b00 cmp r3, #0
800353e: d00f beq.n 8003560 <HAL_MMC_WriteBlocks+0xd8>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
8003540: 68fb ldr r3, [r7, #12]
8003542: 681b ldr r3, [r3, #0]
8003544: 4a87 ldr r2, [pc, #540] @ (8003764 <HAL_MMC_WriteBlocks+0x2dc>)
8003546: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= errorstate;
8003548: 68fb ldr r3, [r7, #12]
800354a: 6b9a ldr r2, [r3, #56] @ 0x38
800354c: 6c7b ldr r3, [r7, #68] @ 0x44
800354e: 431a orrs r2, r3
8003550: 68fb ldr r3, [r7, #12]
8003552: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
8003554: 68fb ldr r3, [r7, #12]
8003556: 2201 movs r2, #1
8003558: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
800355c: 2301 movs r3, #1
800355e: e0fc b.n 800375a <HAL_MMC_WriteBlocks+0x2d2>
}
/* Configure the MMC DPSM (Data Path State Machine) */
config.DataTimeOut = SDMMC_DATATIMEOUT;
8003560: f04f 33ff mov.w r3, #4294967295
8003564: 61bb str r3, [r7, #24]
config.DataLength = NumberOfBlocks * MMC_BLOCKSIZE;
8003566: 683b ldr r3, [r7, #0]
8003568: 025b lsls r3, r3, #9
800356a: 61fb str r3, [r7, #28]
config.DataBlockSize = SDIO_DATABLOCK_SIZE_512B;
800356c: 2390 movs r3, #144 @ 0x90
800356e: 623b str r3, [r7, #32]
config.TransferDir = SDIO_TRANSFER_DIR_TO_CARD;
8003570: 2300 movs r3, #0
8003572: 627b str r3, [r7, #36] @ 0x24
config.TransferMode = SDIO_TRANSFER_MODE_BLOCK;
8003574: 2300 movs r3, #0
8003576: 62bb str r3, [r7, #40] @ 0x28
config.DPSM = SDIO_DPSM_ENABLE;
8003578: 2301 movs r3, #1
800357a: 62fb str r3, [r7, #44] @ 0x2c
(void)SDIO_ConfigData(hmmc->Instance, &config);
800357c: 68fb ldr r3, [r7, #12]
800357e: 681b ldr r3, [r3, #0]
8003580: f107 0218 add.w r2, r7, #24
8003584: 4611 mov r1, r2
8003586: 4618 mov r0, r3
8003588: f003 fcff bl 8006f8a <SDIO_ConfigData>
/* Write block(s) in polling mode */
dataremaining = config.DataLength;
800358c: 69fb ldr r3, [r7, #28]
800358e: 63fb str r3, [r7, #60] @ 0x3c
#if defined(SDIO_STA_STBITERR)
while(!__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND | SDIO_FLAG_STBITERR))
#else /* SDIO_STA_STBITERR not defined */
while(!__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND))
8003590: e062 b.n 8003658 <HAL_MMC_WriteBlocks+0x1d0>
#endif /* SDIO_STA_STBITERR */
{
if(__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_TXFIFOHE) && (dataremaining > 0U))
8003592: 68fb ldr r3, [r7, #12]
8003594: 681b ldr r3, [r3, #0]
8003596: 6b5b ldr r3, [r3, #52] @ 0x34
8003598: f403 4380 and.w r3, r3, #16384 @ 0x4000
800359c: 2b00 cmp r3, #0
800359e: d040 beq.n 8003622 <HAL_MMC_WriteBlocks+0x19a>
80035a0: 6bfb ldr r3, [r7, #60] @ 0x3c
80035a2: 2b00 cmp r3, #0
80035a4: d03d beq.n 8003622 <HAL_MMC_WriteBlocks+0x19a>
{
/* Write data to SDIO Tx FIFO */
for(count = 0U; count < 8U; count++)
80035a6: 2300 movs r3, #0
80035a8: 643b str r3, [r7, #64] @ 0x40
80035aa: e037 b.n 800361c <HAL_MMC_WriteBlocks+0x194>
{
data = (uint32_t)(*tempbuff);
80035ac: 6b7b ldr r3, [r7, #52] @ 0x34
80035ae: 781b ldrb r3, [r3, #0]
80035b0: 617b str r3, [r7, #20]
tempbuff++;
80035b2: 6b7b ldr r3, [r7, #52] @ 0x34
80035b4: 3301 adds r3, #1
80035b6: 637b str r3, [r7, #52] @ 0x34
dataremaining--;
80035b8: 6bfb ldr r3, [r7, #60] @ 0x3c
80035ba: 3b01 subs r3, #1
80035bc: 63fb str r3, [r7, #60] @ 0x3c
data |= ((uint32_t)(*tempbuff) << 8U);
80035be: 6b7b ldr r3, [r7, #52] @ 0x34
80035c0: 781b ldrb r3, [r3, #0]
80035c2: 021a lsls r2, r3, #8
80035c4: 697b ldr r3, [r7, #20]
80035c6: 4313 orrs r3, r2
80035c8: 617b str r3, [r7, #20]
tempbuff++;
80035ca: 6b7b ldr r3, [r7, #52] @ 0x34
80035cc: 3301 adds r3, #1
80035ce: 637b str r3, [r7, #52] @ 0x34
dataremaining--;
80035d0: 6bfb ldr r3, [r7, #60] @ 0x3c
80035d2: 3b01 subs r3, #1
80035d4: 63fb str r3, [r7, #60] @ 0x3c
data |= ((uint32_t)(*tempbuff) << 16U);
80035d6: 6b7b ldr r3, [r7, #52] @ 0x34
80035d8: 781b ldrb r3, [r3, #0]
80035da: 041a lsls r2, r3, #16
80035dc: 697b ldr r3, [r7, #20]
80035de: 4313 orrs r3, r2
80035e0: 617b str r3, [r7, #20]
tempbuff++;
80035e2: 6b7b ldr r3, [r7, #52] @ 0x34
80035e4: 3301 adds r3, #1
80035e6: 637b str r3, [r7, #52] @ 0x34
dataremaining--;
80035e8: 6bfb ldr r3, [r7, #60] @ 0x3c
80035ea: 3b01 subs r3, #1
80035ec: 63fb str r3, [r7, #60] @ 0x3c
data |= ((uint32_t)(*tempbuff) << 24U);
80035ee: 6b7b ldr r3, [r7, #52] @ 0x34
80035f0: 781b ldrb r3, [r3, #0]
80035f2: 061a lsls r2, r3, #24
80035f4: 697b ldr r3, [r7, #20]
80035f6: 4313 orrs r3, r2
80035f8: 617b str r3, [r7, #20]
tempbuff++;
80035fa: 6b7b ldr r3, [r7, #52] @ 0x34
80035fc: 3301 adds r3, #1
80035fe: 637b str r3, [r7, #52] @ 0x34
dataremaining--;
8003600: 6bfb ldr r3, [r7, #60] @ 0x3c
8003602: 3b01 subs r3, #1
8003604: 63fb str r3, [r7, #60] @ 0x3c
(void)SDIO_WriteFIFO(hmmc->Instance, &data);
8003606: 68fb ldr r3, [r7, #12]
8003608: 681b ldr r3, [r3, #0]
800360a: f107 0214 add.w r2, r7, #20
800360e: 4611 mov r1, r2
8003610: 4618 mov r0, r3
8003612: f003 fc43 bl 8006e9c <SDIO_WriteFIFO>
for(count = 0U; count < 8U; count++)
8003616: 6c3b ldr r3, [r7, #64] @ 0x40
8003618: 3301 adds r3, #1
800361a: 643b str r3, [r7, #64] @ 0x40
800361c: 6c3b ldr r3, [r7, #64] @ 0x40
800361e: 2b07 cmp r3, #7
8003620: d9c4 bls.n 80035ac <HAL_MMC_WriteBlocks+0x124>
}
}
if(((HAL_GetTick()-tickstart) >= Timeout) || (Timeout == 0U))
8003622: f7fe f8b9 bl 8001798 <HAL_GetTick>
8003626: 4602 mov r2, r0
8003628: 6b3b ldr r3, [r7, #48] @ 0x30
800362a: 1ad3 subs r3, r2, r3
800362c: 6d3a ldr r2, [r7, #80] @ 0x50
800362e: 429a cmp r2, r3
8003630: d902 bls.n 8003638 <HAL_MMC_WriteBlocks+0x1b0>
8003632: 6d3b ldr r3, [r7, #80] @ 0x50
8003634: 2b00 cmp r3, #0
8003636: d10f bne.n 8003658 <HAL_MMC_WriteBlocks+0x1d0>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
8003638: 68fb ldr r3, [r7, #12]
800363a: 681b ldr r3, [r3, #0]
800363c: 4a49 ldr r2, [pc, #292] @ (8003764 <HAL_MMC_WriteBlocks+0x2dc>)
800363e: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= errorstate;
8003640: 68fb ldr r3, [r7, #12]
8003642: 6b9a ldr r2, [r3, #56] @ 0x38
8003644: 6c7b ldr r3, [r7, #68] @ 0x44
8003646: 431a orrs r2, r3
8003648: 68fb ldr r3, [r7, #12]
800364a: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
800364c: 68fb ldr r3, [r7, #12]
800364e: 2201 movs r2, #1
8003650: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_TIMEOUT;
8003654: 2303 movs r3, #3
8003656: e080 b.n 800375a <HAL_MMC_WriteBlocks+0x2d2>
while(!__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND))
8003658: 68fb ldr r3, [r7, #12]
800365a: 681b ldr r3, [r3, #0]
800365c: 6b5b ldr r3, [r3, #52] @ 0x34
800365e: f403 738d and.w r3, r3, #282 @ 0x11a
8003662: 2b00 cmp r3, #0
8003664: d095 beq.n 8003592 <HAL_MMC_WriteBlocks+0x10a>
}
}
/* Send stop transmission command in case of multiblock write */
if(__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_DATAEND) && (NumberOfBlocks > 1U))
8003666: 68fb ldr r3, [r7, #12]
8003668: 681b ldr r3, [r3, #0]
800366a: 6b5b ldr r3, [r3, #52] @ 0x34
800366c: f403 7380 and.w r3, r3, #256 @ 0x100
8003670: 2b00 cmp r3, #0
8003672: d01b beq.n 80036ac <HAL_MMC_WriteBlocks+0x224>
8003674: 683b ldr r3, [r7, #0]
8003676: 2b01 cmp r3, #1
8003678: d918 bls.n 80036ac <HAL_MMC_WriteBlocks+0x224>
{
/* Send stop transmission command */
errorstate = SDMMC_CmdStopTransfer(hmmc->Instance);
800367a: 68fb ldr r3, [r7, #12]
800367c: 681b ldr r3, [r3, #0]
800367e: 4618 mov r0, r3
8003680: f003 fd5a bl 8007138 <SDMMC_CmdStopTransfer>
8003684: 6478 str r0, [r7, #68] @ 0x44
if(errorstate != HAL_MMC_ERROR_NONE)
8003686: 6c7b ldr r3, [r7, #68] @ 0x44
8003688: 2b00 cmp r3, #0
800368a: d00f beq.n 80036ac <HAL_MMC_WriteBlocks+0x224>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
800368c: 68fb ldr r3, [r7, #12]
800368e: 681b ldr r3, [r3, #0]
8003690: 4a34 ldr r2, [pc, #208] @ (8003764 <HAL_MMC_WriteBlocks+0x2dc>)
8003692: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= errorstate;
8003694: 68fb ldr r3, [r7, #12]
8003696: 6b9a ldr r2, [r3, #56] @ 0x38
8003698: 6c7b ldr r3, [r7, #68] @ 0x44
800369a: 431a orrs r2, r3
800369c: 68fb ldr r3, [r7, #12]
800369e: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
80036a0: 68fb ldr r3, [r7, #12]
80036a2: 2201 movs r2, #1
80036a4: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
80036a8: 2301 movs r3, #1
80036aa: e056 b.n 800375a <HAL_MMC_WriteBlocks+0x2d2>
}
}
/* Get error state */
if(__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_DTIMEOUT))
80036ac: 68fb ldr r3, [r7, #12]
80036ae: 681b ldr r3, [r3, #0]
80036b0: 6b5b ldr r3, [r3, #52] @ 0x34
80036b2: f003 0308 and.w r3, r3, #8
80036b6: 2b00 cmp r3, #0
80036b8: d00f beq.n 80036da <HAL_MMC_WriteBlocks+0x252>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
80036ba: 68fb ldr r3, [r7, #12]
80036bc: 681b ldr r3, [r3, #0]
80036be: 4a29 ldr r2, [pc, #164] @ (8003764 <HAL_MMC_WriteBlocks+0x2dc>)
80036c0: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT;
80036c2: 68fb ldr r3, [r7, #12]
80036c4: 6b9b ldr r3, [r3, #56] @ 0x38
80036c6: f043 0208 orr.w r2, r3, #8
80036ca: 68fb ldr r3, [r7, #12]
80036cc: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
80036ce: 68fb ldr r3, [r7, #12]
80036d0: 2201 movs r2, #1
80036d2: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
80036d6: 2301 movs r3, #1
80036d8: e03f b.n 800375a <HAL_MMC_WriteBlocks+0x2d2>
}
else if(__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_DCRCFAIL))
80036da: 68fb ldr r3, [r7, #12]
80036dc: 681b ldr r3, [r3, #0]
80036de: 6b5b ldr r3, [r3, #52] @ 0x34
80036e0: f003 0302 and.w r3, r3, #2
80036e4: 2b00 cmp r3, #0
80036e6: d00f beq.n 8003708 <HAL_MMC_WriteBlocks+0x280>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
80036e8: 68fb ldr r3, [r7, #12]
80036ea: 681b ldr r3, [r3, #0]
80036ec: 4a1d ldr r2, [pc, #116] @ (8003764 <HAL_MMC_WriteBlocks+0x2dc>)
80036ee: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL;
80036f0: 68fb ldr r3, [r7, #12]
80036f2: 6b9b ldr r3, [r3, #56] @ 0x38
80036f4: f043 0202 orr.w r2, r3, #2
80036f8: 68fb ldr r3, [r7, #12]
80036fa: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
80036fc: 68fb ldr r3, [r7, #12]
80036fe: 2201 movs r2, #1
8003700: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
8003704: 2301 movs r3, #1
8003706: e028 b.n 800375a <HAL_MMC_WriteBlocks+0x2d2>
}
else if(__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_TXUNDERR))
8003708: 68fb ldr r3, [r7, #12]
800370a: 681b ldr r3, [r3, #0]
800370c: 6b5b ldr r3, [r3, #52] @ 0x34
800370e: f003 0310 and.w r3, r3, #16
8003712: 2b00 cmp r3, #0
8003714: d00f beq.n 8003736 <HAL_MMC_WriteBlocks+0x2ae>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
8003716: 68fb ldr r3, [r7, #12]
8003718: 681b ldr r3, [r3, #0]
800371a: 4a12 ldr r2, [pc, #72] @ (8003764 <HAL_MMC_WriteBlocks+0x2dc>)
800371c: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= HAL_MMC_ERROR_TX_UNDERRUN;
800371e: 68fb ldr r3, [r7, #12]
8003720: 6b9b ldr r3, [r3, #56] @ 0x38
8003722: f043 0210 orr.w r2, r3, #16
8003726: 68fb ldr r3, [r7, #12]
8003728: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
800372a: 68fb ldr r3, [r7, #12]
800372c: 2201 movs r2, #1
800372e: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
8003732: 2301 movs r3, #1
8003734: e011 b.n 800375a <HAL_MMC_WriteBlocks+0x2d2>
{
/* Nothing to do */
}
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_DATA_FLAGS);
8003736: 68fb ldr r3, [r7, #12]
8003738: 681b ldr r3, [r3, #0]
800373a: f240 523a movw r2, #1338 @ 0x53a
800373e: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
8003740: 68fb ldr r3, [r7, #12]
8003742: 2201 movs r2, #1
8003744: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_OK;
8003748: 2300 movs r3, #0
800374a: e006 b.n 800375a <HAL_MMC_WriteBlocks+0x2d2>
}
else
{
hmmc->ErrorCode |= HAL_MMC_ERROR_BUSY;
800374c: 68fb ldr r3, [r7, #12]
800374e: 6b9b ldr r3, [r3, #56] @ 0x38
8003750: f043 5200 orr.w r2, r3, #536870912 @ 0x20000000
8003754: 68fb ldr r3, [r7, #12]
8003756: 639a str r2, [r3, #56] @ 0x38
return HAL_ERROR;
8003758: 2301 movs r3, #1
}
}
800375a: 4618 mov r0, r3
800375c: 3748 adds r7, #72 @ 0x48
800375e: 46bd mov sp, r7
8003760: bd80 pop {r7, pc}
8003762: bf00 nop
8003764: 004005ff .word 0x004005ff
08003768 <HAL_MMC_GetCardCSD>:
* @param pCSD: Pointer to a HAL_MMC_CardCSDTypeDef structure that
* contains all CSD register parameters
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD)
{
8003768: b580 push {r7, lr}
800376a: b084 sub sp, #16
800376c: af00 add r7, sp, #0
800376e: 6078 str r0, [r7, #4]
8003770: 6039 str r1, [r7, #0]
uint32_t block_nbr = 0;
8003772: 2300 movs r3, #0
8003774: 60fb str r3, [r7, #12]
pCSD->CSDStruct = (uint8_t)((hmmc->CSD[0] & 0xC0000000U) >> 30U);
8003776: 687b ldr r3, [r7, #4]
8003778: 6e1b ldr r3, [r3, #96] @ 0x60
800377a: 0f9b lsrs r3, r3, #30
800377c: b2da uxtb r2, r3
800377e: 683b ldr r3, [r7, #0]
8003780: 701a strb r2, [r3, #0]
pCSD->SysSpecVersion = (uint8_t)((hmmc->CSD[0] & 0x3C000000U) >> 26U);
8003782: 687b ldr r3, [r7, #4]
8003784: 6e1b ldr r3, [r3, #96] @ 0x60
8003786: 0e9b lsrs r3, r3, #26
8003788: b2db uxtb r3, r3
800378a: f003 030f and.w r3, r3, #15
800378e: b2da uxtb r2, r3
8003790: 683b ldr r3, [r7, #0]
8003792: 705a strb r2, [r3, #1]
pCSD->Reserved1 = (uint8_t)((hmmc->CSD[0] & 0x03000000U) >> 24U);
8003794: 687b ldr r3, [r7, #4]
8003796: 6e1b ldr r3, [r3, #96] @ 0x60
8003798: 0e1b lsrs r3, r3, #24
800379a: b2db uxtb r3, r3
800379c: f003 0303 and.w r3, r3, #3
80037a0: b2da uxtb r2, r3
80037a2: 683b ldr r3, [r7, #0]
80037a4: 709a strb r2, [r3, #2]
pCSD->TAAC = (uint8_t)((hmmc->CSD[0] & 0x00FF0000U) >> 16U);
80037a6: 687b ldr r3, [r7, #4]
80037a8: 6e1b ldr r3, [r3, #96] @ 0x60
80037aa: 0c1b lsrs r3, r3, #16
80037ac: b2da uxtb r2, r3
80037ae: 683b ldr r3, [r7, #0]
80037b0: 70da strb r2, [r3, #3]
pCSD->NSAC = (uint8_t)((hmmc->CSD[0] & 0x0000FF00U) >> 8U);
80037b2: 687b ldr r3, [r7, #4]
80037b4: 6e1b ldr r3, [r3, #96] @ 0x60
80037b6: 0a1b lsrs r3, r3, #8
80037b8: b2da uxtb r2, r3
80037ba: 683b ldr r3, [r7, #0]
80037bc: 711a strb r2, [r3, #4]
pCSD->MaxBusClkFrec = (uint8_t)(hmmc->CSD[0] & 0x000000FFU);
80037be: 687b ldr r3, [r7, #4]
80037c0: 6e1b ldr r3, [r3, #96] @ 0x60
80037c2: b2da uxtb r2, r3
80037c4: 683b ldr r3, [r7, #0]
80037c6: 715a strb r2, [r3, #5]
pCSD->CardComdClasses = (uint16_t)((hmmc->CSD[1] & 0xFFF00000U) >> 20U);
80037c8: 687b ldr r3, [r7, #4]
80037ca: 6e5b ldr r3, [r3, #100] @ 0x64
80037cc: 0d1b lsrs r3, r3, #20
80037ce: b29a uxth r2, r3
80037d0: 683b ldr r3, [r7, #0]
80037d2: 80da strh r2, [r3, #6]
pCSD->RdBlockLen = (uint8_t)((hmmc->CSD[1] & 0x000F0000U) >> 16U);
80037d4: 687b ldr r3, [r7, #4]
80037d6: 6e5b ldr r3, [r3, #100] @ 0x64
80037d8: 0c1b lsrs r3, r3, #16
80037da: b2db uxtb r3, r3
80037dc: f003 030f and.w r3, r3, #15
80037e0: b2da uxtb r2, r3
80037e2: 683b ldr r3, [r7, #0]
80037e4: 721a strb r2, [r3, #8]
pCSD->PartBlockRead = (uint8_t)((hmmc->CSD[1] & 0x00008000U) >> 15U);
80037e6: 687b ldr r3, [r7, #4]
80037e8: 6e5b ldr r3, [r3, #100] @ 0x64
80037ea: 0bdb lsrs r3, r3, #15
80037ec: b2db uxtb r3, r3
80037ee: f003 0301 and.w r3, r3, #1
80037f2: b2da uxtb r2, r3
80037f4: 683b ldr r3, [r7, #0]
80037f6: 725a strb r2, [r3, #9]
pCSD->WrBlockMisalign = (uint8_t)((hmmc->CSD[1] & 0x00004000U) >> 14U);
80037f8: 687b ldr r3, [r7, #4]
80037fa: 6e5b ldr r3, [r3, #100] @ 0x64
80037fc: 0b9b lsrs r3, r3, #14
80037fe: b2db uxtb r3, r3
8003800: f003 0301 and.w r3, r3, #1
8003804: b2da uxtb r2, r3
8003806: 683b ldr r3, [r7, #0]
8003808: 729a strb r2, [r3, #10]
pCSD->RdBlockMisalign = (uint8_t)((hmmc->CSD[1] & 0x00002000U) >> 13U);
800380a: 687b ldr r3, [r7, #4]
800380c: 6e5b ldr r3, [r3, #100] @ 0x64
800380e: 0b5b lsrs r3, r3, #13
8003810: b2db uxtb r3, r3
8003812: f003 0301 and.w r3, r3, #1
8003816: b2da uxtb r2, r3
8003818: 683b ldr r3, [r7, #0]
800381a: 72da strb r2, [r3, #11]
pCSD->DSRImpl = (uint8_t)((hmmc->CSD[1] & 0x00001000U) >> 12U);
800381c: 687b ldr r3, [r7, #4]
800381e: 6e5b ldr r3, [r3, #100] @ 0x64
8003820: 0b1b lsrs r3, r3, #12
8003822: b2db uxtb r3, r3
8003824: f003 0301 and.w r3, r3, #1
8003828: b2da uxtb r2, r3
800382a: 683b ldr r3, [r7, #0]
800382c: 731a strb r2, [r3, #12]
pCSD->Reserved2 = 0U; /*!< Reserved */
800382e: 683b ldr r3, [r7, #0]
8003830: 2200 movs r2, #0
8003832: 735a strb r2, [r3, #13]
pCSD->DeviceSize = (((hmmc->CSD[1] & 0x000003FFU) << 2U) | ((hmmc->CSD[2] & 0xC0000000U) >> 30U));
8003834: 687b ldr r3, [r7, #4]
8003836: 6e5b ldr r3, [r3, #100] @ 0x64
8003838: 009a lsls r2, r3, #2
800383a: f640 73fc movw r3, #4092 @ 0xffc
800383e: 4013 ands r3, r2
8003840: 687a ldr r2, [r7, #4]
8003842: 6e92 ldr r2, [r2, #104] @ 0x68
8003844: 0f92 lsrs r2, r2, #30
8003846: 431a orrs r2, r3
8003848: 683b ldr r3, [r7, #0]
800384a: 611a str r2, [r3, #16]
pCSD->MaxRdCurrentVDDMin = (uint8_t)((hmmc->CSD[2] & 0x38000000U) >> 27U);
800384c: 687b ldr r3, [r7, #4]
800384e: 6e9b ldr r3, [r3, #104] @ 0x68
8003850: 0edb lsrs r3, r3, #27
8003852: b2db uxtb r3, r3
8003854: f003 0307 and.w r3, r3, #7
8003858: b2da uxtb r2, r3
800385a: 683b ldr r3, [r7, #0]
800385c: 751a strb r2, [r3, #20]
pCSD->MaxRdCurrentVDDMax = (uint8_t)((hmmc->CSD[2] & 0x07000000U) >> 24U);
800385e: 687b ldr r3, [r7, #4]
8003860: 6e9b ldr r3, [r3, #104] @ 0x68
8003862: 0e1b lsrs r3, r3, #24
8003864: b2db uxtb r3, r3
8003866: f003 0307 and.w r3, r3, #7
800386a: b2da uxtb r2, r3
800386c: 683b ldr r3, [r7, #0]
800386e: 755a strb r2, [r3, #21]
pCSD->MaxWrCurrentVDDMin = (uint8_t)((hmmc->CSD[2] & 0x00E00000U) >> 21U);
8003870: 687b ldr r3, [r7, #4]
8003872: 6e9b ldr r3, [r3, #104] @ 0x68
8003874: 0d5b lsrs r3, r3, #21
8003876: b2db uxtb r3, r3
8003878: f003 0307 and.w r3, r3, #7
800387c: b2da uxtb r2, r3
800387e: 683b ldr r3, [r7, #0]
8003880: 759a strb r2, [r3, #22]
pCSD->MaxWrCurrentVDDMax = (uint8_t)((hmmc->CSD[2] & 0x001C0000U) >> 18U);
8003882: 687b ldr r3, [r7, #4]
8003884: 6e9b ldr r3, [r3, #104] @ 0x68
8003886: 0c9b lsrs r3, r3, #18
8003888: b2db uxtb r3, r3
800388a: f003 0307 and.w r3, r3, #7
800388e: b2da uxtb r2, r3
8003890: 683b ldr r3, [r7, #0]
8003892: 75da strb r2, [r3, #23]
pCSD->DeviceSizeMul = (uint8_t)((hmmc->CSD[2] & 0x00038000U) >> 15U);
8003894: 687b ldr r3, [r7, #4]
8003896: 6e9b ldr r3, [r3, #104] @ 0x68
8003898: 0bdb lsrs r3, r3, #15
800389a: b2db uxtb r3, r3
800389c: f003 0307 and.w r3, r3, #7
80038a0: b2da uxtb r2, r3
80038a2: 683b ldr r3, [r7, #0]
80038a4: 761a strb r2, [r3, #24]
if(MMC_ReadExtCSD(hmmc, &block_nbr, 212, 0x0FFFFFFFU) != HAL_OK) /* Field SEC_COUNT [215:212] */
80038a6: f107 010c add.w r1, r7, #12
80038aa: f06f 4370 mvn.w r3, #4026531840 @ 0xf0000000
80038ae: 22d4 movs r2, #212 @ 0xd4
80038b0: 6878 ldr r0, [r7, #4]
80038b2: f000 fc5d bl 8004170 <MMC_ReadExtCSD>
80038b6: 4603 mov r3, r0
80038b8: 2b00 cmp r3, #0
80038ba: d001 beq.n 80038c0 <HAL_MMC_GetCardCSD+0x158>
{
return HAL_ERROR;
80038bc: 2301 movs r3, #1
80038be: e0f0 b.n 8003aa2 <HAL_MMC_GetCardCSD+0x33a>
}
if(hmmc->MmcCard.CardType == MMC_LOW_CAPACITY_CARD)
80038c0: 687b ldr r3, [r7, #4]
80038c2: 6c5b ldr r3, [r3, #68] @ 0x44
80038c4: 2b00 cmp r3, #0
80038c6: d12a bne.n 800391e <HAL_MMC_GetCardCSD+0x1b6>
{
hmmc->MmcCard.BlockNbr = (pCSD->DeviceSize + 1U) ;
80038c8: 683b ldr r3, [r7, #0]
80038ca: 691b ldr r3, [r3, #16]
80038cc: 1c5a adds r2, r3, #1
80038ce: 687b ldr r3, [r7, #4]
80038d0: 651a str r2, [r3, #80] @ 0x50
hmmc->MmcCard.BlockNbr *= (1UL << ((pCSD->DeviceSizeMul & 0x07U) + 2U));
80038d2: 683b ldr r3, [r7, #0]
80038d4: 7e1b ldrb r3, [r3, #24]
80038d6: b2db uxtb r3, r3
80038d8: f003 0307 and.w r3, r3, #7
80038dc: 3302 adds r3, #2
80038de: 2201 movs r2, #1
80038e0: fa02 f303 lsl.w r3, r2, r3
80038e4: 687a ldr r2, [r7, #4]
80038e6: 6d12 ldr r2, [r2, #80] @ 0x50
80038e8: fb03 f202 mul.w r2, r3, r2
80038ec: 687b ldr r3, [r7, #4]
80038ee: 651a str r2, [r3, #80] @ 0x50
hmmc->MmcCard.BlockSize = (1UL << (pCSD->RdBlockLen & 0x0FU));
80038f0: 683b ldr r3, [r7, #0]
80038f2: 7a1b ldrb r3, [r3, #8]
80038f4: b2db uxtb r3, r3
80038f6: f003 030f and.w r3, r3, #15
80038fa: 2201 movs r2, #1
80038fc: 409a lsls r2, r3
80038fe: 687b ldr r3, [r7, #4]
8003900: 655a str r2, [r3, #84] @ 0x54
hmmc->MmcCard.LogBlockNbr = (hmmc->MmcCard.BlockNbr) * ((hmmc->MmcCard.BlockSize) / 512U);
8003902: 687b ldr r3, [r7, #4]
8003904: 6d1b ldr r3, [r3, #80] @ 0x50
8003906: 687a ldr r2, [r7, #4]
8003908: 6d52 ldr r2, [r2, #84] @ 0x54
800390a: 0a52 lsrs r2, r2, #9
800390c: fb03 f202 mul.w r2, r3, r2
8003910: 687b ldr r3, [r7, #4]
8003912: 659a str r2, [r3, #88] @ 0x58
hmmc->MmcCard.LogBlockSize = 512U;
8003914: 687b ldr r3, [r7, #4]
8003916: f44f 7200 mov.w r2, #512 @ 0x200
800391a: 65da str r2, [r3, #92] @ 0x5c
800391c: e023 b.n 8003966 <HAL_MMC_GetCardCSD+0x1fe>
}
else if(hmmc->MmcCard.CardType == MMC_HIGH_CAPACITY_CARD)
800391e: 687b ldr r3, [r7, #4]
8003920: 6c5b ldr r3, [r3, #68] @ 0x44
8003922: 2b01 cmp r3, #1
8003924: d10f bne.n 8003946 <HAL_MMC_GetCardCSD+0x1de>
{
hmmc->MmcCard.BlockNbr = block_nbr;
8003926: 68fa ldr r2, [r7, #12]
8003928: 687b ldr r3, [r7, #4]
800392a: 651a str r2, [r3, #80] @ 0x50
hmmc->MmcCard.LogBlockNbr = hmmc->MmcCard.BlockNbr;
800392c: 687b ldr r3, [r7, #4]
800392e: 6d1a ldr r2, [r3, #80] @ 0x50
8003930: 687b ldr r3, [r7, #4]
8003932: 659a str r2, [r3, #88] @ 0x58
hmmc->MmcCard.BlockSize = 512U;
8003934: 687b ldr r3, [r7, #4]
8003936: f44f 7200 mov.w r2, #512 @ 0x200
800393a: 655a str r2, [r3, #84] @ 0x54
hmmc->MmcCard.LogBlockSize = hmmc->MmcCard.BlockSize;
800393c: 687b ldr r3, [r7, #4]
800393e: 6d5a ldr r2, [r3, #84] @ 0x54
8003940: 687b ldr r3, [r7, #4]
8003942: 65da str r2, [r3, #92] @ 0x5c
8003944: e00f b.n 8003966 <HAL_MMC_GetCardCSD+0x1fe>
}
else
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
8003946: 687b ldr r3, [r7, #4]
8003948: 681b ldr r3, [r3, #0]
800394a: 4a58 ldr r2, [pc, #352] @ (8003aac <HAL_MMC_GetCardCSD+0x344>)
800394c: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= HAL_MMC_ERROR_UNSUPPORTED_FEATURE;
800394e: 687b ldr r3, [r7, #4]
8003950: 6b9b ldr r3, [r3, #56] @ 0x38
8003952: f043 5280 orr.w r2, r3, #268435456 @ 0x10000000
8003956: 687b ldr r3, [r7, #4]
8003958: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
800395a: 687b ldr r3, [r7, #4]
800395c: 2201 movs r2, #1
800395e: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
8003962: 2301 movs r3, #1
8003964: e09d b.n 8003aa2 <HAL_MMC_GetCardCSD+0x33a>
}
pCSD->EraseGrSize = (uint8_t)((hmmc->CSD[2] & 0x00004000U) >> 14U);
8003966: 687b ldr r3, [r7, #4]
8003968: 6e9b ldr r3, [r3, #104] @ 0x68
800396a: 0b9b lsrs r3, r3, #14
800396c: b2db uxtb r3, r3
800396e: f003 0301 and.w r3, r3, #1
8003972: b2da uxtb r2, r3
8003974: 683b ldr r3, [r7, #0]
8003976: 765a strb r2, [r3, #25]
pCSD->EraseGrMul = (uint8_t)((hmmc->CSD[2] & 0x00003F80U) >> 7U);
8003978: 687b ldr r3, [r7, #4]
800397a: 6e9b ldr r3, [r3, #104] @ 0x68
800397c: 09db lsrs r3, r3, #7
800397e: b2db uxtb r3, r3
8003980: f003 037f and.w r3, r3, #127 @ 0x7f
8003984: b2da uxtb r2, r3
8003986: 683b ldr r3, [r7, #0]
8003988: 769a strb r2, [r3, #26]
pCSD->WrProtectGrSize = (uint8_t)(hmmc->CSD[2] & 0x0000007FU);
800398a: 687b ldr r3, [r7, #4]
800398c: 6e9b ldr r3, [r3, #104] @ 0x68
800398e: b2db uxtb r3, r3
8003990: f003 037f and.w r3, r3, #127 @ 0x7f
8003994: b2da uxtb r2, r3
8003996: 683b ldr r3, [r7, #0]
8003998: 76da strb r2, [r3, #27]
pCSD->WrProtectGrEnable = (uint8_t)((hmmc->CSD[3] & 0x80000000U) >> 31U);
800399a: 687b ldr r3, [r7, #4]
800399c: 6edb ldr r3, [r3, #108] @ 0x6c
800399e: 0fdb lsrs r3, r3, #31
80039a0: b2da uxtb r2, r3
80039a2: 683b ldr r3, [r7, #0]
80039a4: 771a strb r2, [r3, #28]
pCSD->ManDeflECC = (uint8_t)((hmmc->CSD[3] & 0x60000000U) >> 29U);
80039a6: 687b ldr r3, [r7, #4]
80039a8: 6edb ldr r3, [r3, #108] @ 0x6c
80039aa: 0f5b lsrs r3, r3, #29
80039ac: b2db uxtb r3, r3
80039ae: f003 0303 and.w r3, r3, #3
80039b2: b2da uxtb r2, r3
80039b4: 683b ldr r3, [r7, #0]
80039b6: 775a strb r2, [r3, #29]
pCSD->WrSpeedFact = (uint8_t)((hmmc->CSD[3] & 0x1C000000U) >> 26U);
80039b8: 687b ldr r3, [r7, #4]
80039ba: 6edb ldr r3, [r3, #108] @ 0x6c
80039bc: 0e9b lsrs r3, r3, #26
80039be: b2db uxtb r3, r3
80039c0: f003 0307 and.w r3, r3, #7
80039c4: b2da uxtb r2, r3
80039c6: 683b ldr r3, [r7, #0]
80039c8: 779a strb r2, [r3, #30]
pCSD->MaxWrBlockLen= (uint8_t)((hmmc->CSD[3] & 0x03C00000U) >> 22U);
80039ca: 687b ldr r3, [r7, #4]
80039cc: 6edb ldr r3, [r3, #108] @ 0x6c
80039ce: 0d9b lsrs r3, r3, #22
80039d0: b2db uxtb r3, r3
80039d2: f003 030f and.w r3, r3, #15
80039d6: b2da uxtb r2, r3
80039d8: 683b ldr r3, [r7, #0]
80039da: 77da strb r2, [r3, #31]
pCSD->WriteBlockPaPartial = (uint8_t)((hmmc->CSD[3] & 0x00200000U) >> 21U);
80039dc: 687b ldr r3, [r7, #4]
80039de: 6edb ldr r3, [r3, #108] @ 0x6c
80039e0: 0d5b lsrs r3, r3, #21
80039e2: b2db uxtb r3, r3
80039e4: f003 0301 and.w r3, r3, #1
80039e8: b2da uxtb r2, r3
80039ea: 683b ldr r3, [r7, #0]
80039ec: f883 2020 strb.w r2, [r3, #32]
pCSD->Reserved3 = 0;
80039f0: 683b ldr r3, [r7, #0]
80039f2: 2200 movs r2, #0
80039f4: f883 2021 strb.w r2, [r3, #33] @ 0x21
pCSD->ContentProtectAppli = (uint8_t)((hmmc->CSD[3] & 0x00010000U) >> 16U);
80039f8: 687b ldr r3, [r7, #4]
80039fa: 6edb ldr r3, [r3, #108] @ 0x6c
80039fc: 0c1b lsrs r3, r3, #16
80039fe: b2db uxtb r3, r3
8003a00: f003 0301 and.w r3, r3, #1
8003a04: b2da uxtb r2, r3
8003a06: 683b ldr r3, [r7, #0]
8003a08: f883 2022 strb.w r2, [r3, #34] @ 0x22
pCSD->FileFormatGroup = (uint8_t)((hmmc->CSD[3] & 0x00008000U) >> 15U);
8003a0c: 687b ldr r3, [r7, #4]
8003a0e: 6edb ldr r3, [r3, #108] @ 0x6c
8003a10: 0bdb lsrs r3, r3, #15
8003a12: b2db uxtb r3, r3
8003a14: f003 0301 and.w r3, r3, #1
8003a18: b2da uxtb r2, r3
8003a1a: 683b ldr r3, [r7, #0]
8003a1c: f883 2023 strb.w r2, [r3, #35] @ 0x23
pCSD->CopyFlag = (uint8_t)((hmmc->CSD[3] & 0x00004000U) >> 14U);
8003a20: 687b ldr r3, [r7, #4]
8003a22: 6edb ldr r3, [r3, #108] @ 0x6c
8003a24: 0b9b lsrs r3, r3, #14
8003a26: b2db uxtb r3, r3
8003a28: f003 0301 and.w r3, r3, #1
8003a2c: b2da uxtb r2, r3
8003a2e: 683b ldr r3, [r7, #0]
8003a30: f883 2024 strb.w r2, [r3, #36] @ 0x24
pCSD->PermWrProtect = (uint8_t)((hmmc->CSD[3] & 0x00002000U) >> 13U);
8003a34: 687b ldr r3, [r7, #4]
8003a36: 6edb ldr r3, [r3, #108] @ 0x6c
8003a38: 0b5b lsrs r3, r3, #13
8003a3a: b2db uxtb r3, r3
8003a3c: f003 0301 and.w r3, r3, #1
8003a40: b2da uxtb r2, r3
8003a42: 683b ldr r3, [r7, #0]
8003a44: f883 2025 strb.w r2, [r3, #37] @ 0x25
pCSD->TempWrProtect = (uint8_t)((hmmc->CSD[3] & 0x00001000U) >> 12U);
8003a48: 687b ldr r3, [r7, #4]
8003a4a: 6edb ldr r3, [r3, #108] @ 0x6c
8003a4c: 0b1b lsrs r3, r3, #12
8003a4e: b2db uxtb r3, r3
8003a50: f003 0301 and.w r3, r3, #1
8003a54: b2da uxtb r2, r3
8003a56: 683b ldr r3, [r7, #0]
8003a58: f883 2026 strb.w r2, [r3, #38] @ 0x26
pCSD->FileFormat = (uint8_t)((hmmc->CSD[3] & 0x00000C00U) >> 10U);
8003a5c: 687b ldr r3, [r7, #4]
8003a5e: 6edb ldr r3, [r3, #108] @ 0x6c
8003a60: 0a9b lsrs r3, r3, #10
8003a62: b2db uxtb r3, r3
8003a64: f003 0303 and.w r3, r3, #3
8003a68: b2da uxtb r2, r3
8003a6a: 683b ldr r3, [r7, #0]
8003a6c: f883 2027 strb.w r2, [r3, #39] @ 0x27
pCSD->ECC= (uint8_t)((hmmc->CSD[3] & 0x00000300U) >> 8U);
8003a70: 687b ldr r3, [r7, #4]
8003a72: 6edb ldr r3, [r3, #108] @ 0x6c
8003a74: 0a1b lsrs r3, r3, #8
8003a76: b2db uxtb r3, r3
8003a78: f003 0303 and.w r3, r3, #3
8003a7c: b2da uxtb r2, r3
8003a7e: 683b ldr r3, [r7, #0]
8003a80: f883 2028 strb.w r2, [r3, #40] @ 0x28
pCSD->CSD_CRC = (uint8_t)((hmmc->CSD[3] & 0x000000FEU) >> 1U);
8003a84: 687b ldr r3, [r7, #4]
8003a86: 6edb ldr r3, [r3, #108] @ 0x6c
8003a88: 085b lsrs r3, r3, #1
8003a8a: b2db uxtb r3, r3
8003a8c: f003 037f and.w r3, r3, #127 @ 0x7f
8003a90: b2da uxtb r2, r3
8003a92: 683b ldr r3, [r7, #0]
8003a94: f883 2029 strb.w r2, [r3, #41] @ 0x29
pCSD->Reserved4 = 1;
8003a98: 683b ldr r3, [r7, #0]
8003a9a: 2201 movs r2, #1
8003a9c: f883 202a strb.w r2, [r3, #42] @ 0x2a
return HAL_OK;
8003aa0: 2300 movs r3, #0
}
8003aa2: 4618 mov r0, r3
8003aa4: 3710 adds r7, #16
8003aa6: 46bd mov sp, r7
8003aa8: bd80 pop {r7, pc}
8003aaa: bf00 nop
8003aac: 004005ff .word 0x004005ff
08003ab0 <HAL_MMC_GetCardInfo>:
* @param pCardInfo: Pointer to the HAL_MMC_CardInfoTypeDef structure that
* will contain the MMC card status information
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo)
{
8003ab0: b480 push {r7}
8003ab2: b083 sub sp, #12
8003ab4: af00 add r7, sp, #0
8003ab6: 6078 str r0, [r7, #4]
8003ab8: 6039 str r1, [r7, #0]
pCardInfo->CardType = (uint32_t)(hmmc->MmcCard.CardType);
8003aba: 687b ldr r3, [r7, #4]
8003abc: 6c5a ldr r2, [r3, #68] @ 0x44
8003abe: 683b ldr r3, [r7, #0]
8003ac0: 601a str r2, [r3, #0]
pCardInfo->Class = (uint32_t)(hmmc->MmcCard.Class);
8003ac2: 687b ldr r3, [r7, #4]
8003ac4: 6c9a ldr r2, [r3, #72] @ 0x48
8003ac6: 683b ldr r3, [r7, #0]
8003ac8: 605a str r2, [r3, #4]
pCardInfo->RelCardAdd = (uint32_t)(hmmc->MmcCard.RelCardAdd);
8003aca: 687b ldr r3, [r7, #4]
8003acc: 6cda ldr r2, [r3, #76] @ 0x4c
8003ace: 683b ldr r3, [r7, #0]
8003ad0: 609a str r2, [r3, #8]
pCardInfo->BlockNbr = (uint32_t)(hmmc->MmcCard.BlockNbr);
8003ad2: 687b ldr r3, [r7, #4]
8003ad4: 6d1a ldr r2, [r3, #80] @ 0x50
8003ad6: 683b ldr r3, [r7, #0]
8003ad8: 60da str r2, [r3, #12]
pCardInfo->BlockSize = (uint32_t)(hmmc->MmcCard.BlockSize);
8003ada: 687b ldr r3, [r7, #4]
8003adc: 6d5a ldr r2, [r3, #84] @ 0x54
8003ade: 683b ldr r3, [r7, #0]
8003ae0: 611a str r2, [r3, #16]
pCardInfo->LogBlockNbr = (uint32_t)(hmmc->MmcCard.LogBlockNbr);
8003ae2: 687b ldr r3, [r7, #4]
8003ae4: 6d9a ldr r2, [r3, #88] @ 0x58
8003ae6: 683b ldr r3, [r7, #0]
8003ae8: 615a str r2, [r3, #20]
pCardInfo->LogBlockSize = (uint32_t)(hmmc->MmcCard.LogBlockSize);
8003aea: 687b ldr r3, [r7, #4]
8003aec: 6dda ldr r2, [r3, #92] @ 0x5c
8003aee: 683b ldr r3, [r7, #0]
8003af0: 619a str r2, [r3, #24]
return HAL_OK;
8003af2: 2300 movs r3, #0
}
8003af4: 4618 mov r0, r3
8003af6: 370c adds r7, #12
8003af8: 46bd mov sp, r7
8003afa: f85d 7b04 ldr.w r7, [sp], #4
8003afe: 4770 bx lr
08003b00 <HAL_MMC_GetCardExtCSD>:
* Extended CSD register parameters
* @param Timeout Specify timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_GetCardExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pExtCSD, uint32_t Timeout)
{
8003b00: b580 push {r7, lr}
8003b02: b08e sub sp, #56 @ 0x38
8003b04: af00 add r7, sp, #0
8003b06: 60f8 str r0, [r7, #12]
8003b08: 60b9 str r1, [r7, #8]
8003b0a: 607a str r2, [r7, #4]
SDIO_DataInitTypeDef config;
uint32_t errorstate;
uint32_t tickstart = HAL_GetTick();
8003b0c: f7fd fe44 bl 8001798 <HAL_GetTick>
8003b10: 62f8 str r0, [r7, #44] @ 0x2c
uint32_t count;
uint32_t *tmp_buf;
if(NULL == pExtCSD)
8003b12: 68bb ldr r3, [r7, #8]
8003b14: 2b00 cmp r3, #0
8003b16: d107 bne.n 8003b28 <HAL_MMC_GetCardExtCSD+0x28>
{
hmmc->ErrorCode |= HAL_MMC_ERROR_PARAM;
8003b18: 68fb ldr r3, [r7, #12]
8003b1a: 6b9b ldr r3, [r3, #56] @ 0x38
8003b1c: f043 6200 orr.w r2, r3, #134217728 @ 0x8000000
8003b20: 68fb ldr r3, [r7, #12]
8003b22: 639a str r2, [r3, #56] @ 0x38
return HAL_ERROR;
8003b24: 2301 movs r3, #1
8003b26: e0cf b.n 8003cc8 <HAL_MMC_GetCardExtCSD+0x1c8>
}
if(hmmc->State == HAL_MMC_STATE_READY)
8003b28: 68fb ldr r3, [r7, #12]
8003b2a: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
8003b2e: b2db uxtb r3, r3
8003b30: 2b01 cmp r3, #1
8003b32: f040 80c8 bne.w 8003cc6 <HAL_MMC_GetCardExtCSD+0x1c6>
{
hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
8003b36: 68fb ldr r3, [r7, #12]
8003b38: 2200 movs r2, #0
8003b3a: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_BUSY;
8003b3c: 68fb ldr r3, [r7, #12]
8003b3e: 2203 movs r2, #3
8003b40: f883 2034 strb.w r2, [r3, #52] @ 0x34
/* Initialize data control register */
hmmc->Instance->DCTRL = 0;
8003b44: 68fb ldr r3, [r7, #12]
8003b46: 681b ldr r3, [r3, #0]
8003b48: 2200 movs r2, #0
8003b4a: 62da str r2, [r3, #44] @ 0x2c
/* Initiaize the destination pointer */
tmp_buf = pExtCSD;
8003b4c: 68bb ldr r3, [r7, #8]
8003b4e: 633b str r3, [r7, #48] @ 0x30
/* Configure the MMC DPSM (Data Path State Machine) */
config.DataTimeOut = SDMMC_DATATIMEOUT;
8003b50: f04f 33ff mov.w r3, #4294967295
8003b54: 613b str r3, [r7, #16]
config.DataLength = 512;
8003b56: f44f 7300 mov.w r3, #512 @ 0x200
8003b5a: 617b str r3, [r7, #20]
config.DataBlockSize = SDIO_DATABLOCK_SIZE_512B;
8003b5c: 2390 movs r3, #144 @ 0x90
8003b5e: 61bb str r3, [r7, #24]
config.TransferDir = SDIO_TRANSFER_DIR_TO_SDIO;
8003b60: 2302 movs r3, #2
8003b62: 61fb str r3, [r7, #28]
config.TransferMode = SDIO_TRANSFER_MODE_BLOCK;
8003b64: 2300 movs r3, #0
8003b66: 623b str r3, [r7, #32]
config.DPSM = SDIO_DPSM_ENABLE;
8003b68: 2301 movs r3, #1
8003b6a: 627b str r3, [r7, #36] @ 0x24
(void)SDIO_ConfigData(hmmc->Instance, &config);
8003b6c: 68fb ldr r3, [r7, #12]
8003b6e: 681b ldr r3, [r3, #0]
8003b70: f107 0210 add.w r2, r7, #16
8003b74: 4611 mov r1, r2
8003b76: 4618 mov r0, r3
8003b78: f003 fa07 bl 8006f8a <SDIO_ConfigData>
/* Send ExtCSD Read command to Card */
errorstate = SDMMC_CmdSendEXTCSD(hmmc->Instance, 0);
8003b7c: 68fb ldr r3, [r7, #12]
8003b7e: 681b ldr r3, [r3, #0]
8003b80: 2100 movs r1, #0
8003b82: 4618 mov r0, r3
8003b84: f003 fbff bl 8007386 <SDMMC_CmdSendEXTCSD>
8003b88: 62b8 str r0, [r7, #40] @ 0x28
if(errorstate != HAL_MMC_ERROR_NONE)
8003b8a: 6abb ldr r3, [r7, #40] @ 0x28
8003b8c: 2b00 cmp r3, #0
8003b8e: d045 beq.n 8003c1c <HAL_MMC_GetCardExtCSD+0x11c>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
8003b90: 68fb ldr r3, [r7, #12]
8003b92: 681b ldr r3, [r3, #0]
8003b94: 4a4e ldr r2, [pc, #312] @ (8003cd0 <HAL_MMC_GetCardExtCSD+0x1d0>)
8003b96: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= errorstate;
8003b98: 68fb ldr r3, [r7, #12]
8003b9a: 6b9a ldr r2, [r3, #56] @ 0x38
8003b9c: 6abb ldr r3, [r7, #40] @ 0x28
8003b9e: 431a orrs r2, r3
8003ba0: 68fb ldr r3, [r7, #12]
8003ba2: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
8003ba4: 68fb ldr r3, [r7, #12]
8003ba6: 2201 movs r2, #1
8003ba8: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
8003bac: 2301 movs r3, #1
8003bae: e08b b.n 8003cc8 <HAL_MMC_GetCardExtCSD+0x1c8>
}
/* Poll on SDMMC flags */
while(!__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND))
{
if(__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_RXFIFOHF))
8003bb0: 68fb ldr r3, [r7, #12]
8003bb2: 681b ldr r3, [r3, #0]
8003bb4: 6b5b ldr r3, [r3, #52] @ 0x34
8003bb6: f403 4300 and.w r3, r3, #32768 @ 0x8000
8003bba: 2b00 cmp r3, #0
8003bbc: d013 beq.n 8003be6 <HAL_MMC_GetCardExtCSD+0xe6>
{
/* Read data from SDMMC Rx FIFO */
for(count = 0U; count < 8U; count++)
8003bbe: 2300 movs r3, #0
8003bc0: 637b str r3, [r7, #52] @ 0x34
8003bc2: e00d b.n 8003be0 <HAL_MMC_GetCardExtCSD+0xe0>
{
*tmp_buf = SDIO_ReadFIFO(hmmc->Instance);
8003bc4: 68fb ldr r3, [r7, #12]
8003bc6: 681b ldr r3, [r3, #0]
8003bc8: 4618 mov r0, r3
8003bca: f003 f95a bl 8006e82 <SDIO_ReadFIFO>
8003bce: 4602 mov r2, r0
8003bd0: 6b3b ldr r3, [r7, #48] @ 0x30
8003bd2: 601a str r2, [r3, #0]
tmp_buf++;
8003bd4: 6b3b ldr r3, [r7, #48] @ 0x30
8003bd6: 3304 adds r3, #4
8003bd8: 633b str r3, [r7, #48] @ 0x30
for(count = 0U; count < 8U; count++)
8003bda: 6b7b ldr r3, [r7, #52] @ 0x34
8003bdc: 3301 adds r3, #1
8003bde: 637b str r3, [r7, #52] @ 0x34
8003be0: 6b7b ldr r3, [r7, #52] @ 0x34
8003be2: 2b07 cmp r3, #7
8003be4: d9ee bls.n 8003bc4 <HAL_MMC_GetCardExtCSD+0xc4>
}
}
if(((HAL_GetTick()-tickstart) >= Timeout) || (Timeout == 0U))
8003be6: f7fd fdd7 bl 8001798 <HAL_GetTick>
8003bea: 4602 mov r2, r0
8003bec: 6afb ldr r3, [r7, #44] @ 0x2c
8003bee: 1ad3 subs r3, r2, r3
8003bf0: 687a ldr r2, [r7, #4]
8003bf2: 429a cmp r2, r3
8003bf4: d902 bls.n 8003bfc <HAL_MMC_GetCardExtCSD+0xfc>
8003bf6: 687b ldr r3, [r7, #4]
8003bf8: 2b00 cmp r3, #0
8003bfa: d10f bne.n 8003c1c <HAL_MMC_GetCardExtCSD+0x11c>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
8003bfc: 68fb ldr r3, [r7, #12]
8003bfe: 681b ldr r3, [r3, #0]
8003c00: 4a33 ldr r2, [pc, #204] @ (8003cd0 <HAL_MMC_GetCardExtCSD+0x1d0>)
8003c02: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= HAL_MMC_ERROR_TIMEOUT;
8003c04: 68fb ldr r3, [r7, #12]
8003c06: 6b9b ldr r3, [r3, #56] @ 0x38
8003c08: f043 4200 orr.w r2, r3, #2147483648 @ 0x80000000
8003c0c: 68fb ldr r3, [r7, #12]
8003c0e: 639a str r2, [r3, #56] @ 0x38
hmmc->State= HAL_MMC_STATE_READY;
8003c10: 68fb ldr r3, [r7, #12]
8003c12: 2201 movs r2, #1
8003c14: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_TIMEOUT;
8003c18: 2303 movs r3, #3
8003c1a: e055 b.n 8003cc8 <HAL_MMC_GetCardExtCSD+0x1c8>
while(!__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND))
8003c1c: 68fb ldr r3, [r7, #12]
8003c1e: 681b ldr r3, [r3, #0]
8003c20: 6b5b ldr r3, [r3, #52] @ 0x34
8003c22: f403 7395 and.w r3, r3, #298 @ 0x12a
8003c26: 2b00 cmp r3, #0
8003c28: d0c2 beq.n 8003bb0 <HAL_MMC_GetCardExtCSD+0xb0>
}
}
/* Get error state */
if(__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_DTIMEOUT))
8003c2a: 68fb ldr r3, [r7, #12]
8003c2c: 681b ldr r3, [r3, #0]
8003c2e: 6b5b ldr r3, [r3, #52] @ 0x34
8003c30: f003 0308 and.w r3, r3, #8
8003c34: 2b00 cmp r3, #0
8003c36: d00f beq.n 8003c58 <HAL_MMC_GetCardExtCSD+0x158>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
8003c38: 68fb ldr r3, [r7, #12]
8003c3a: 681b ldr r3, [r3, #0]
8003c3c: 4a24 ldr r2, [pc, #144] @ (8003cd0 <HAL_MMC_GetCardExtCSD+0x1d0>)
8003c3e: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_TIMEOUT;
8003c40: 68fb ldr r3, [r7, #12]
8003c42: 6b9b ldr r3, [r3, #56] @ 0x38
8003c44: f043 0208 orr.w r2, r3, #8
8003c48: 68fb ldr r3, [r7, #12]
8003c4a: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
8003c4c: 68fb ldr r3, [r7, #12]
8003c4e: 2201 movs r2, #1
8003c50: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
8003c54: 2301 movs r3, #1
8003c56: e037 b.n 8003cc8 <HAL_MMC_GetCardExtCSD+0x1c8>
}
else if(__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_DCRCFAIL))
8003c58: 68fb ldr r3, [r7, #12]
8003c5a: 681b ldr r3, [r3, #0]
8003c5c: 6b5b ldr r3, [r3, #52] @ 0x34
8003c5e: f003 0302 and.w r3, r3, #2
8003c62: 2b00 cmp r3, #0
8003c64: d00f beq.n 8003c86 <HAL_MMC_GetCardExtCSD+0x186>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
8003c66: 68fb ldr r3, [r7, #12]
8003c68: 681b ldr r3, [r3, #0]
8003c6a: 4a19 ldr r2, [pc, #100] @ (8003cd0 <HAL_MMC_GetCardExtCSD+0x1d0>)
8003c6c: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= HAL_MMC_ERROR_DATA_CRC_FAIL;
8003c6e: 68fb ldr r3, [r7, #12]
8003c70: 6b9b ldr r3, [r3, #56] @ 0x38
8003c72: f043 0202 orr.w r2, r3, #2
8003c76: 68fb ldr r3, [r7, #12]
8003c78: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
8003c7a: 68fb ldr r3, [r7, #12]
8003c7c: 2201 movs r2, #1
8003c7e: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
8003c82: 2301 movs r3, #1
8003c84: e020 b.n 8003cc8 <HAL_MMC_GetCardExtCSD+0x1c8>
}
else if(__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_RXOVERR))
8003c86: 68fb ldr r3, [r7, #12]
8003c88: 681b ldr r3, [r3, #0]
8003c8a: 6b5b ldr r3, [r3, #52] @ 0x34
8003c8c: f003 0320 and.w r3, r3, #32
8003c90: 2b00 cmp r3, #0
8003c92: d00f beq.n 8003cb4 <HAL_MMC_GetCardExtCSD+0x1b4>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
8003c94: 68fb ldr r3, [r7, #12]
8003c96: 681b ldr r3, [r3, #0]
8003c98: 4a0d ldr r2, [pc, #52] @ (8003cd0 <HAL_MMC_GetCardExtCSD+0x1d0>)
8003c9a: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= HAL_MMC_ERROR_RX_OVERRUN;
8003c9c: 68fb ldr r3, [r7, #12]
8003c9e: 6b9b ldr r3, [r3, #56] @ 0x38
8003ca0: f043 0220 orr.w r2, r3, #32
8003ca4: 68fb ldr r3, [r7, #12]
8003ca6: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
8003ca8: 68fb ldr r3, [r7, #12]
8003caa: 2201 movs r2, #1
8003cac: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
8003cb0: 2301 movs r3, #1
8003cb2: e009 b.n 8003cc8 <HAL_MMC_GetCardExtCSD+0x1c8>
{
/* Nothing to do */
}
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_DATA_FLAGS);
8003cb4: 68fb ldr r3, [r7, #12]
8003cb6: 681b ldr r3, [r3, #0]
8003cb8: f240 523a movw r2, #1338 @ 0x53a
8003cbc: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
8003cbe: 68fb ldr r3, [r7, #12]
8003cc0: 2201 movs r2, #1
8003cc2: f883 2034 strb.w r2, [r3, #52] @ 0x34
}
return HAL_OK;
8003cc6: 2300 movs r3, #0
}
8003cc8: 4618 mov r0, r3
8003cca: 3738 adds r7, #56 @ 0x38
8003ccc: 46bd mov sp, r7
8003cce: bd80 pop {r7, pc}
8003cd0: 004005ff .word 0x004005ff
08003cd4 <HAL_MMC_ConfigWideBusOperation>:
* @arg SDIO_BUS_WIDE_4B: 4-bit data transfer
* @arg SDIO_BUS_WIDE_1B: 1-bit data transfer
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode)
{
8003cd4: b5b0 push {r4, r5, r7, lr}
8003cd6: b090 sub sp, #64 @ 0x40
8003cd8: af04 add r7, sp, #16
8003cda: 6078 str r0, [r7, #4]
8003cdc: 6039 str r1, [r7, #0]
uint32_t count;
SDIO_InitTypeDef Init;
uint32_t errorstate;
uint32_t response = 0U;
8003cde: 2300 movs r3, #0
8003ce0: 627b str r3, [r7, #36] @ 0x24
/* Check the parameters */
assert_param(IS_SDIO_BUS_WIDE(WideMode));
/* Change State */
hmmc->State = HAL_MMC_STATE_BUSY;
8003ce2: 687b ldr r3, [r7, #4]
8003ce4: 2203 movs r2, #3
8003ce6: f883 2034 strb.w r2, [r3, #52] @ 0x34
errorstate = MMC_PwrClassUpdate(hmmc, WideMode);
8003cea: 6839 ldr r1, [r7, #0]
8003cec: 6878 ldr r0, [r7, #4]
8003cee: f000 faed bl 80042cc <MMC_PwrClassUpdate>
8003cf2: 62b8 str r0, [r7, #40] @ 0x28
if(errorstate == HAL_MMC_ERROR_NONE)
8003cf4: 6abb ldr r3, [r7, #40] @ 0x28
8003cf6: 2b00 cmp r3, #0
8003cf8: d17d bne.n 8003df6 <HAL_MMC_ConfigWideBusOperation+0x122>
{
if(WideMode == SDIO_BUS_WIDE_8B)
8003cfa: 683b ldr r3, [r7, #0]
8003cfc: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8003d00: d107 bne.n 8003d12 <HAL_MMC_ConfigWideBusOperation+0x3e>
{
errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70200U);
8003d02: 687b ldr r3, [r7, #4]
8003d04: 681b ldr r3, [r3, #0]
8003d06: 4948 ldr r1, [pc, #288] @ (8003e28 <HAL_MMC_ConfigWideBusOperation+0x154>)
8003d08: 4618 mov r0, r3
8003d0a: f003 fb1a bl 8007342 <SDMMC_CmdSwitch>
8003d0e: 62b8 str r0, [r7, #40] @ 0x28
8003d10: e019 b.n 8003d46 <HAL_MMC_ConfigWideBusOperation+0x72>
}
else if(WideMode == SDIO_BUS_WIDE_4B)
8003d12: 683b ldr r3, [r7, #0]
8003d14: f5b3 6f00 cmp.w r3, #2048 @ 0x800
8003d18: d107 bne.n 8003d2a <HAL_MMC_ConfigWideBusOperation+0x56>
{
errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70100U);
8003d1a: 687b ldr r3, [r7, #4]
8003d1c: 681b ldr r3, [r3, #0]
8003d1e: 4943 ldr r1, [pc, #268] @ (8003e2c <HAL_MMC_ConfigWideBusOperation+0x158>)
8003d20: 4618 mov r0, r3
8003d22: f003 fb0e bl 8007342 <SDMMC_CmdSwitch>
8003d26: 62b8 str r0, [r7, #40] @ 0x28
8003d28: e00d b.n 8003d46 <HAL_MMC_ConfigWideBusOperation+0x72>
}
else if(WideMode == SDIO_BUS_WIDE_1B)
8003d2a: 683b ldr r3, [r7, #0]
8003d2c: 2b00 cmp r3, #0
8003d2e: d107 bne.n 8003d40 <HAL_MMC_ConfigWideBusOperation+0x6c>
{
errorstate = SDMMC_CmdSwitch(hmmc->Instance, 0x03B70000U);
8003d30: 687b ldr r3, [r7, #4]
8003d32: 681b ldr r3, [r3, #0]
8003d34: 493e ldr r1, [pc, #248] @ (8003e30 <HAL_MMC_ConfigWideBusOperation+0x15c>)
8003d36: 4618 mov r0, r3
8003d38: f003 fb03 bl 8007342 <SDMMC_CmdSwitch>
8003d3c: 62b8 str r0, [r7, #40] @ 0x28
8003d3e: e002 b.n 8003d46 <HAL_MMC_ConfigWideBusOperation+0x72>
}
else
{
/* WideMode is not a valid argument*/
errorstate = HAL_MMC_ERROR_PARAM;
8003d40: f04f 6300 mov.w r3, #134217728 @ 0x8000000
8003d44: 62bb str r3, [r7, #40] @ 0x28
}
/* Check for switch error and violation of the trial number of sending CMD 13 */
if(errorstate == HAL_MMC_ERROR_NONE)
8003d46: 6abb ldr r3, [r7, #40] @ 0x28
8003d48: 2b00 cmp r3, #0
8003d4a: d154 bne.n 8003df6 <HAL_MMC_ConfigWideBusOperation+0x122>
{
/* While card is not ready for data and trial number for sending CMD13 is not exceeded */
count = SDMMC_MAX_TRIAL;
8003d4c: f64f 73ff movw r3, #65535 @ 0xffff
8003d50: 62fb str r3, [r7, #44] @ 0x2c
do
{
errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
8003d52: 687b ldr r3, [r7, #4]
8003d54: 681a ldr r2, [r3, #0]
8003d56: 687b ldr r3, [r7, #4]
8003d58: 6cdb ldr r3, [r3, #76] @ 0x4c
8003d5a: 041b lsls r3, r3, #16
8003d5c: 4619 mov r1, r3
8003d5e: 4610 mov r0, r2
8003d60: f003 faae bl 80072c0 <SDMMC_CmdSendStatus>
8003d64: 62b8 str r0, [r7, #40] @ 0x28
if(errorstate != HAL_MMC_ERROR_NONE)
8003d66: 6abb ldr r3, [r7, #40] @ 0x28
8003d68: 2b00 cmp r3, #0
8003d6a: d112 bne.n 8003d92 <HAL_MMC_ConfigWideBusOperation+0xbe>
{
break;
}
/* Get command response */
response = SDIO_GetResponse(hmmc->Instance, SDIO_RESP1);
8003d6c: 687b ldr r3, [r7, #4]
8003d6e: 681b ldr r3, [r3, #0]
8003d70: 2100 movs r1, #0
8003d72: 4618 mov r0, r3
8003d74: f003 f8f6 bl 8006f64 <SDIO_GetResponse>
8003d78: 6278 str r0, [r7, #36] @ 0x24
count--;
8003d7a: 6afb ldr r3, [r7, #44] @ 0x2c
8003d7c: 3b01 subs r3, #1
8003d7e: 62fb str r3, [r7, #44] @ 0x2c
}while(((response & 0x100U) == 0U) && (count != 0U));
8003d80: 6a7b ldr r3, [r7, #36] @ 0x24
8003d82: f403 7380 and.w r3, r3, #256 @ 0x100
8003d86: 2b00 cmp r3, #0
8003d88: d104 bne.n 8003d94 <HAL_MMC_ConfigWideBusOperation+0xc0>
8003d8a: 6afb ldr r3, [r7, #44] @ 0x2c
8003d8c: 2b00 cmp r3, #0
8003d8e: d1e0 bne.n 8003d52 <HAL_MMC_ConfigWideBusOperation+0x7e>
8003d90: e000 b.n 8003d94 <HAL_MMC_ConfigWideBusOperation+0xc0>
break;
8003d92: bf00 nop
/* Check the status after the switch command execution */
if ((count != 0U) && (errorstate == HAL_MMC_ERROR_NONE))
8003d94: 6afb ldr r3, [r7, #44] @ 0x2c
8003d96: 2b00 cmp r3, #0
8003d98: d027 beq.n 8003dea <HAL_MMC_ConfigWideBusOperation+0x116>
8003d9a: 6abb ldr r3, [r7, #40] @ 0x28
8003d9c: 2b00 cmp r3, #0
8003d9e: d124 bne.n 8003dea <HAL_MMC_ConfigWideBusOperation+0x116>
{
/* Check the bit SWITCH_ERROR of the device status */
if ((response & 0x80U) != 0U)
8003da0: 6a7b ldr r3, [r7, #36] @ 0x24
8003da2: f003 0380 and.w r3, r3, #128 @ 0x80
8003da6: 2b00 cmp r3, #0
8003da8: d003 beq.n 8003db2 <HAL_MMC_ConfigWideBusOperation+0xde>
{
errorstate = SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
8003daa: f44f 3380 mov.w r3, #65536 @ 0x10000
8003dae: 62bb str r3, [r7, #40] @ 0x28
if ((response & 0x80U) != 0U)
8003db0: e021 b.n 8003df6 <HAL_MMC_ConfigWideBusOperation+0x122>
}
else
{
/* Configure the SDIO peripheral */
Init = hmmc->Init;
8003db2: 687b ldr r3, [r7, #4]
8003db4: f107 040c add.w r4, r7, #12
8003db8: 1d1d adds r5, r3, #4
8003dba: cd0f ldmia r5!, {r0, r1, r2, r3}
8003dbc: c40f stmia r4!, {r0, r1, r2, r3}
8003dbe: e895 0003 ldmia.w r5, {r0, r1}
8003dc2: e884 0003 stmia.w r4, {r0, r1}
Init.BusWide = WideMode;
8003dc6: 683b ldr r3, [r7, #0]
8003dc8: 61bb str r3, [r7, #24]
(void)SDIO_Init(hmmc->Instance, Init);
8003dca: 687b ldr r3, [r7, #4]
8003dcc: 681d ldr r5, [r3, #0]
8003dce: 466c mov r4, sp
8003dd0: f107 0318 add.w r3, r7, #24
8003dd4: e893 0007 ldmia.w r3, {r0, r1, r2}
8003dd8: e884 0007 stmia.w r4, {r0, r1, r2}
8003ddc: f107 030c add.w r3, r7, #12
8003de0: cb0e ldmia r3, {r1, r2, r3}
8003de2: 4628 mov r0, r5
8003de4: f003 f822 bl 8006e2c <SDIO_Init>
if ((response & 0x80U) != 0U)
8003de8: e005 b.n 8003df6 <HAL_MMC_ConfigWideBusOperation+0x122>
}
}
else if (count == 0U)
8003dea: 6afb ldr r3, [r7, #44] @ 0x2c
8003dec: 2b00 cmp r3, #0
8003dee: d102 bne.n 8003df6 <HAL_MMC_ConfigWideBusOperation+0x122>
{
errorstate = SDMMC_ERROR_TIMEOUT;
8003df0: f04f 4300 mov.w r3, #2147483648 @ 0x80000000
8003df4: 62bb str r3, [r7, #40] @ 0x28
}
}
}
/* Change State */
hmmc->State = HAL_MMC_STATE_READY;
8003df6: 687b ldr r3, [r7, #4]
8003df8: 2201 movs r2, #1
8003dfa: f883 2034 strb.w r2, [r3, #52] @ 0x34
if(errorstate != HAL_MMC_ERROR_NONE)
8003dfe: 6abb ldr r3, [r7, #40] @ 0x28
8003e00: 2b00 cmp r3, #0
8003e02: d00b beq.n 8003e1c <HAL_MMC_ConfigWideBusOperation+0x148>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
8003e04: 687b ldr r3, [r7, #4]
8003e06: 681b ldr r3, [r3, #0]
8003e08: 4a0a ldr r2, [pc, #40] @ (8003e34 <HAL_MMC_ConfigWideBusOperation+0x160>)
8003e0a: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= errorstate;
8003e0c: 687b ldr r3, [r7, #4]
8003e0e: 6b9a ldr r2, [r3, #56] @ 0x38
8003e10: 6abb ldr r3, [r7, #40] @ 0x28
8003e12: 431a orrs r2, r3
8003e14: 687b ldr r3, [r7, #4]
8003e16: 639a str r2, [r3, #56] @ 0x38
return HAL_ERROR;
8003e18: 2301 movs r3, #1
8003e1a: e000 b.n 8003e1e <HAL_MMC_ConfigWideBusOperation+0x14a>
}
return HAL_OK;
8003e1c: 2300 movs r3, #0
}
8003e1e: 4618 mov r0, r3
8003e20: 3730 adds r7, #48 @ 0x30
8003e22: 46bd mov sp, r7
8003e24: bdb0 pop {r4, r5, r7, pc}
8003e26: bf00 nop
8003e28: 03b70200 .word 0x03b70200
8003e2c: 03b70100 .word 0x03b70100
8003e30: 03b70000 .word 0x03b70000
8003e34: 004005ff .word 0x004005ff
08003e38 <HAL_MMC_GetCardState>:
* @brief Gets the current mmc card data state.
* @param hmmc: pointer to MMC handle
* @retval Card state
*/
HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc)
{
8003e38: b580 push {r7, lr}
8003e3a: b086 sub sp, #24
8003e3c: af00 add r7, sp, #0
8003e3e: 6078 str r0, [r7, #4]
uint32_t cardstate;
uint32_t errorstate;
uint32_t resp1 = 0U;
8003e40: 2300 movs r3, #0
8003e42: 60fb str r3, [r7, #12]
errorstate = MMC_SendStatus(hmmc, &resp1);
8003e44: f107 030c add.w r3, r7, #12
8003e48: 4619 mov r1, r3
8003e4a: 6878 ldr r0, [r7, #4]
8003e4c: f000 f968 bl 8004120 <MMC_SendStatus>
8003e50: 6178 str r0, [r7, #20]
if(errorstate != HAL_MMC_ERROR_NONE)
8003e52: 697b ldr r3, [r7, #20]
8003e54: 2b00 cmp r3, #0
8003e56: d005 beq.n 8003e64 <HAL_MMC_GetCardState+0x2c>
{
hmmc->ErrorCode |= errorstate;
8003e58: 687b ldr r3, [r7, #4]
8003e5a: 6b9a ldr r2, [r3, #56] @ 0x38
8003e5c: 697b ldr r3, [r7, #20]
8003e5e: 431a orrs r2, r3
8003e60: 687b ldr r3, [r7, #4]
8003e62: 639a str r2, [r3, #56] @ 0x38
}
cardstate = ((resp1 >> 9U) & 0x0FU);
8003e64: 68fb ldr r3, [r7, #12]
8003e66: 0a5b lsrs r3, r3, #9
8003e68: f003 030f and.w r3, r3, #15
8003e6c: 613b str r3, [r7, #16]
return (HAL_MMC_CardStateTypeDef)cardstate;
8003e6e: 693b ldr r3, [r7, #16]
}
8003e70: 4618 mov r0, r3
8003e72: 3718 adds r7, #24
8003e74: 46bd mov sp, r7
8003e76: bd80 pop {r7, pc}
08003e78 <MMC_InitCard>:
* @brief Initializes the mmc card.
* @param hmmc: Pointer to MMC handle
* @retval MMC Card error state
*/
static uint32_t MMC_InitCard(MMC_HandleTypeDef *hmmc)
{
8003e78: b5b0 push {r4, r5, r7, lr}
8003e7a: b09a sub sp, #104 @ 0x68
8003e7c: af04 add r7, sp, #16
8003e7e: 6078 str r0, [r7, #4]
HAL_MMC_CardCSDTypeDef CSD;
uint32_t errorstate;
uint16_t mmc_rca = 2U;
8003e80: 2302 movs r3, #2
8003e82: f8a7 3056 strh.w r3, [r7, #86] @ 0x56
MMC_InitTypeDef Init;
/* Check the power State */
if(SDIO_GetPowerState(hmmc->Instance) == 0U)
8003e86: 687b ldr r3, [r7, #4]
8003e88: 681b ldr r3, [r3, #0]
8003e8a: 4618 mov r0, r3
8003e8c: f003 f825 bl 8006eda <SDIO_GetPowerState>
8003e90: 4603 mov r3, r0
8003e92: 2b00 cmp r3, #0
8003e94: d102 bne.n 8003e9c <MMC_InitCard+0x24>
{
/* Power off */
return HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE;
8003e96: f04f 6380 mov.w r3, #67108864 @ 0x4000000
8003e9a: e0ec b.n 8004076 <MMC_InitCard+0x1fe>
}
/* Send CMD2 ALL_SEND_CID */
errorstate = SDMMC_CmdSendCID(hmmc->Instance);
8003e9c: 687b ldr r3, [r7, #4]
8003e9e: 681b ldr r3, [r3, #0]
8003ea0: 4618 mov r0, r3
8003ea2: f003 f9ac bl 80071fe <SDMMC_CmdSendCID>
8003ea6: 6538 str r0, [r7, #80] @ 0x50
if(errorstate != HAL_MMC_ERROR_NONE)
8003ea8: 6d3b ldr r3, [r7, #80] @ 0x50
8003eaa: 2b00 cmp r3, #0
8003eac: d001 beq.n 8003eb2 <MMC_InitCard+0x3a>
{
return errorstate;
8003eae: 6d3b ldr r3, [r7, #80] @ 0x50
8003eb0: e0e1 b.n 8004076 <MMC_InitCard+0x1fe>
}
else
{
/* Get Card identification number data */
hmmc->CID[0U] = SDIO_GetResponse(hmmc->Instance, SDIO_RESP1);
8003eb2: 687b ldr r3, [r7, #4]
8003eb4: 681b ldr r3, [r3, #0]
8003eb6: 2100 movs r1, #0
8003eb8: 4618 mov r0, r3
8003eba: f003 f853 bl 8006f64 <SDIO_GetResponse>
8003ebe: 4602 mov r2, r0
8003ec0: 687b ldr r3, [r7, #4]
8003ec2: 671a str r2, [r3, #112] @ 0x70
hmmc->CID[1U] = SDIO_GetResponse(hmmc->Instance, SDIO_RESP2);
8003ec4: 687b ldr r3, [r7, #4]
8003ec6: 681b ldr r3, [r3, #0]
8003ec8: 2104 movs r1, #4
8003eca: 4618 mov r0, r3
8003ecc: f003 f84a bl 8006f64 <SDIO_GetResponse>
8003ed0: 4602 mov r2, r0
8003ed2: 687b ldr r3, [r7, #4]
8003ed4: 675a str r2, [r3, #116] @ 0x74
hmmc->CID[2U] = SDIO_GetResponse(hmmc->Instance, SDIO_RESP3);
8003ed6: 687b ldr r3, [r7, #4]
8003ed8: 681b ldr r3, [r3, #0]
8003eda: 2108 movs r1, #8
8003edc: 4618 mov r0, r3
8003ede: f003 f841 bl 8006f64 <SDIO_GetResponse>
8003ee2: 4602 mov r2, r0
8003ee4: 687b ldr r3, [r7, #4]
8003ee6: 679a str r2, [r3, #120] @ 0x78
hmmc->CID[3U] = SDIO_GetResponse(hmmc->Instance, SDIO_RESP4);
8003ee8: 687b ldr r3, [r7, #4]
8003eea: 681b ldr r3, [r3, #0]
8003eec: 210c movs r1, #12
8003eee: 4618 mov r0, r3
8003ef0: f003 f838 bl 8006f64 <SDIO_GetResponse>
8003ef4: 4602 mov r2, r0
8003ef6: 687b ldr r3, [r7, #4]
8003ef8: 67da str r2, [r3, #124] @ 0x7c
}
/* Send CMD3 SET_REL_ADDR with RCA = 2 (should be greater than 1) */
/* MMC Card publishes its RCA. */
errorstate = SDMMC_CmdSetRelAddMmc(hmmc->Instance, mmc_rca);
8003efa: 687b ldr r3, [r7, #4]
8003efc: 681b ldr r3, [r3, #0]
8003efe: f8b7 2056 ldrh.w r2, [r7, #86] @ 0x56
8003f02: 4611 mov r1, r2
8003f04: 4618 mov r0, r3
8003f06: f003 f9b7 bl 8007278 <SDMMC_CmdSetRelAddMmc>
8003f0a: 6538 str r0, [r7, #80] @ 0x50
if(errorstate != HAL_MMC_ERROR_NONE)
8003f0c: 6d3b ldr r3, [r7, #80] @ 0x50
8003f0e: 2b00 cmp r3, #0
8003f10: d001 beq.n 8003f16 <MMC_InitCard+0x9e>
{
return errorstate;
8003f12: 6d3b ldr r3, [r7, #80] @ 0x50
8003f14: e0af b.n 8004076 <MMC_InitCard+0x1fe>
}
/* Get the MMC card RCA */
hmmc->MmcCard.RelCardAdd = mmc_rca;
8003f16: f8b7 2056 ldrh.w r2, [r7, #86] @ 0x56
8003f1a: 687b ldr r3, [r7, #4]
8003f1c: 64da str r2, [r3, #76] @ 0x4c
/* Send CMD9 SEND_CSD with argument as card's RCA */
errorstate = SDMMC_CmdSendCSD(hmmc->Instance, (uint32_t)(hmmc->MmcCard.RelCardAdd << 16U));
8003f1e: 687b ldr r3, [r7, #4]
8003f20: 681a ldr r2, [r3, #0]
8003f22: 687b ldr r3, [r7, #4]
8003f24: 6cdb ldr r3, [r3, #76] @ 0x4c
8003f26: 041b lsls r3, r3, #16
8003f28: 4619 mov r1, r3
8003f2a: 4610 mov r0, r2
8003f2c: f003 f985 bl 800723a <SDMMC_CmdSendCSD>
8003f30: 6538 str r0, [r7, #80] @ 0x50
if(errorstate != HAL_MMC_ERROR_NONE)
8003f32: 6d3b ldr r3, [r7, #80] @ 0x50
8003f34: 2b00 cmp r3, #0
8003f36: d001 beq.n 8003f3c <MMC_InitCard+0xc4>
{
return errorstate;
8003f38: 6d3b ldr r3, [r7, #80] @ 0x50
8003f3a: e09c b.n 8004076 <MMC_InitCard+0x1fe>
}
else
{
/* Get Card Specific Data */
hmmc->CSD[0U] = SDIO_GetResponse(hmmc->Instance, SDIO_RESP1);
8003f3c: 687b ldr r3, [r7, #4]
8003f3e: 681b ldr r3, [r3, #0]
8003f40: 2100 movs r1, #0
8003f42: 4618 mov r0, r3
8003f44: f003 f80e bl 8006f64 <SDIO_GetResponse>
8003f48: 4602 mov r2, r0
8003f4a: 687b ldr r3, [r7, #4]
8003f4c: 661a str r2, [r3, #96] @ 0x60
hmmc->CSD[1U] = SDIO_GetResponse(hmmc->Instance, SDIO_RESP2);
8003f4e: 687b ldr r3, [r7, #4]
8003f50: 681b ldr r3, [r3, #0]
8003f52: 2104 movs r1, #4
8003f54: 4618 mov r0, r3
8003f56: f003 f805 bl 8006f64 <SDIO_GetResponse>
8003f5a: 4602 mov r2, r0
8003f5c: 687b ldr r3, [r7, #4]
8003f5e: 665a str r2, [r3, #100] @ 0x64
hmmc->CSD[2U] = SDIO_GetResponse(hmmc->Instance, SDIO_RESP3);
8003f60: 687b ldr r3, [r7, #4]
8003f62: 681b ldr r3, [r3, #0]
8003f64: 2108 movs r1, #8
8003f66: 4618 mov r0, r3
8003f68: f002 fffc bl 8006f64 <SDIO_GetResponse>
8003f6c: 4602 mov r2, r0
8003f6e: 687b ldr r3, [r7, #4]
8003f70: 669a str r2, [r3, #104] @ 0x68
hmmc->CSD[3U] = SDIO_GetResponse(hmmc->Instance, SDIO_RESP4);
8003f72: 687b ldr r3, [r7, #4]
8003f74: 681b ldr r3, [r3, #0]
8003f76: 210c movs r1, #12
8003f78: 4618 mov r0, r3
8003f7a: f002 fff3 bl 8006f64 <SDIO_GetResponse>
8003f7e: 4602 mov r2, r0
8003f80: 687b ldr r3, [r7, #4]
8003f82: 66da str r2, [r3, #108] @ 0x6c
}
/* Get the Card Class */
hmmc->MmcCard.Class = (SDIO_GetResponse(hmmc->Instance, SDIO_RESP2) >> 20U);
8003f84: 687b ldr r3, [r7, #4]
8003f86: 681b ldr r3, [r3, #0]
8003f88: 2104 movs r1, #4
8003f8a: 4618 mov r0, r3
8003f8c: f002 ffea bl 8006f64 <SDIO_GetResponse>
8003f90: 4603 mov r3, r0
8003f92: 0d1a lsrs r2, r3, #20
8003f94: 687b ldr r3, [r7, #4]
8003f96: 649a str r2, [r3, #72] @ 0x48
/* Select the Card */
errorstate = SDMMC_CmdSelDesel(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
8003f98: 687b ldr r3, [r7, #4]
8003f9a: 6819 ldr r1, [r3, #0]
8003f9c: 687b ldr r3, [r7, #4]
8003f9e: 6cdb ldr r3, [r3, #76] @ 0x4c
8003fa0: 041b lsls r3, r3, #16
8003fa2: 2200 movs r2, #0
8003fa4: 461c mov r4, r3
8003fa6: 4615 mov r5, r2
8003fa8: 4622 mov r2, r4
8003faa: 462b mov r3, r5
8003fac: 4608 mov r0, r1
8003fae: f003 f8e5 bl 800717c <SDMMC_CmdSelDesel>
8003fb2: 6538 str r0, [r7, #80] @ 0x50
if(errorstate != HAL_MMC_ERROR_NONE)
8003fb4: 6d3b ldr r3, [r7, #80] @ 0x50
8003fb6: 2b00 cmp r3, #0
8003fb8: d001 beq.n 8003fbe <MMC_InitCard+0x146>
{
return errorstate;
8003fba: 6d3b ldr r3, [r7, #80] @ 0x50
8003fbc: e05b b.n 8004076 <MMC_InitCard+0x1fe>
}
/* Get CSD parameters */
if (HAL_MMC_GetCardCSD(hmmc, &CSD) != HAL_OK)
8003fbe: f107 0324 add.w r3, r7, #36 @ 0x24
8003fc2: 4619 mov r1, r3
8003fc4: 6878 ldr r0, [r7, #4]
8003fc6: f7ff fbcf bl 8003768 <HAL_MMC_GetCardCSD>
8003fca: 4603 mov r3, r0
8003fcc: 2b00 cmp r3, #0
8003fce: d002 beq.n 8003fd6 <MMC_InitCard+0x15e>
{
return hmmc->ErrorCode;
8003fd0: 687b ldr r3, [r7, #4]
8003fd2: 6b9b ldr r3, [r3, #56] @ 0x38
8003fd4: e04f b.n 8004076 <MMC_InitCard+0x1fe>
}
/* While card is not ready for data and trial number for sending CMD13 is not exceeded */
errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
8003fd6: 687b ldr r3, [r7, #4]
8003fd8: 681a ldr r2, [r3, #0]
8003fda: 687b ldr r3, [r7, #4]
8003fdc: 6cdb ldr r3, [r3, #76] @ 0x4c
8003fde: 041b lsls r3, r3, #16
8003fe0: 4619 mov r1, r3
8003fe2: 4610 mov r0, r2
8003fe4: f003 f96c bl 80072c0 <SDMMC_CmdSendStatus>
8003fe8: 6538 str r0, [r7, #80] @ 0x50
if(errorstate != HAL_MMC_ERROR_NONE)
8003fea: 6d3b ldr r3, [r7, #80] @ 0x50
8003fec: 2b00 cmp r3, #0
8003fee: d005 beq.n 8003ffc <MMC_InitCard+0x184>
{
hmmc->ErrorCode |= errorstate;
8003ff0: 687b ldr r3, [r7, #4]
8003ff2: 6b9a ldr r2, [r3, #56] @ 0x38
8003ff4: 6d3b ldr r3, [r7, #80] @ 0x50
8003ff6: 431a orrs r2, r3
8003ff8: 687b ldr r3, [r7, #4]
8003ffa: 639a str r2, [r3, #56] @ 0x38
}
/* Get Extended CSD parameters */
if (HAL_MMC_GetCardExtCSD(hmmc, hmmc->Ext_CSD, SDMMC_DATATIMEOUT) != HAL_OK)
8003ffc: 687b ldr r3, [r7, #4]
8003ffe: 3380 adds r3, #128 @ 0x80
8004000: f04f 32ff mov.w r2, #4294967295
8004004: 4619 mov r1, r3
8004006: 6878 ldr r0, [r7, #4]
8004008: f7ff fd7a bl 8003b00 <HAL_MMC_GetCardExtCSD>
800400c: 4603 mov r3, r0
800400e: 2b00 cmp r3, #0
8004010: d002 beq.n 8004018 <MMC_InitCard+0x1a0>
{
return hmmc->ErrorCode;
8004012: 687b ldr r3, [r7, #4]
8004014: 6b9b ldr r3, [r3, #56] @ 0x38
8004016: e02e b.n 8004076 <MMC_InitCard+0x1fe>
}
/* While card is not ready for data and trial number for sending CMD13 is not exceeded */
errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
8004018: 687b ldr r3, [r7, #4]
800401a: 681a ldr r2, [r3, #0]
800401c: 687b ldr r3, [r7, #4]
800401e: 6cdb ldr r3, [r3, #76] @ 0x4c
8004020: 041b lsls r3, r3, #16
8004022: 4619 mov r1, r3
8004024: 4610 mov r0, r2
8004026: f003 f94b bl 80072c0 <SDMMC_CmdSendStatus>
800402a: 6538 str r0, [r7, #80] @ 0x50
if(errorstate != HAL_MMC_ERROR_NONE)
800402c: 6d3b ldr r3, [r7, #80] @ 0x50
800402e: 2b00 cmp r3, #0
8004030: d005 beq.n 800403e <MMC_InitCard+0x1c6>
{
hmmc->ErrorCode |= errorstate;
8004032: 687b ldr r3, [r7, #4]
8004034: 6b9a ldr r2, [r3, #56] @ 0x38
8004036: 6d3b ldr r3, [r7, #80] @ 0x50
8004038: 431a orrs r2, r3
800403a: 687b ldr r3, [r7, #4]
800403c: 639a str r2, [r3, #56] @ 0x38
}
/* Configure the SDIO peripheral */
Init = hmmc->Init;
800403e: 687b ldr r3, [r7, #4]
8004040: f107 040c add.w r4, r7, #12
8004044: 1d1d adds r5, r3, #4
8004046: cd0f ldmia r5!, {r0, r1, r2, r3}
8004048: c40f stmia r4!, {r0, r1, r2, r3}
800404a: e895 0003 ldmia.w r5, {r0, r1}
800404e: e884 0003 stmia.w r4, {r0, r1}
Init.BusWide = SDIO_BUS_WIDE_1B;
8004052: 2300 movs r3, #0
8004054: 61bb str r3, [r7, #24]
(void)SDIO_Init(hmmc->Instance, Init);
8004056: 687b ldr r3, [r7, #4]
8004058: 681d ldr r5, [r3, #0]
800405a: 466c mov r4, sp
800405c: f107 0318 add.w r3, r7, #24
8004060: e893 0007 ldmia.w r3, {r0, r1, r2}
8004064: e884 0007 stmia.w r4, {r0, r1, r2}
8004068: f107 030c add.w r3, r7, #12
800406c: cb0e ldmia r3, {r1, r2, r3}
800406e: 4628 mov r0, r5
8004070: f002 fedc bl 8006e2c <SDIO_Init>
/* All cards are initialized */
return HAL_MMC_ERROR_NONE;
8004074: 2300 movs r3, #0
}
8004076: 4618 mov r0, r3
8004078: 3758 adds r7, #88 @ 0x58
800407a: 46bd mov sp, r7
800407c: bdb0 pop {r4, r5, r7, pc}
...
08004080 <MMC_PowerON>:
* in the MMC handle.
* @param hmmc: Pointer to MMC handle
* @retval error state
*/
static uint32_t MMC_PowerON(MMC_HandleTypeDef *hmmc)
{
8004080: b580 push {r7, lr}
8004082: b086 sub sp, #24
8004084: af00 add r7, sp, #0
8004086: 6078 str r0, [r7, #4]
__IO uint32_t count = 0U;
8004088: 2300 movs r3, #0
800408a: 60bb str r3, [r7, #8]
uint32_t response = 0U, validvoltage = 0U;
800408c: 2300 movs r3, #0
800408e: 617b str r3, [r7, #20]
8004090: 2300 movs r3, #0
8004092: 613b str r3, [r7, #16]
uint32_t errorstate;
/* CMD0: GO_IDLE_STATE */
errorstate = SDMMC_CmdGoIdleState(hmmc->Instance);
8004094: 687b ldr r3, [r7, #4]
8004096: 681b ldr r3, [r3, #0]
8004098: 4618 mov r0, r3
800409a: f003 f892 bl 80071c2 <SDMMC_CmdGoIdleState>
800409e: 60f8 str r0, [r7, #12]
if(errorstate != HAL_MMC_ERROR_NONE)
80040a0: 68fb ldr r3, [r7, #12]
80040a2: 2b00 cmp r3, #0
80040a4: d027 beq.n 80040f6 <MMC_PowerON+0x76>
{
return errorstate;
80040a6: 68fb ldr r3, [r7, #12]
80040a8: e034 b.n 8004114 <MMC_PowerON+0x94>
}
while(validvoltage == 0U)
{
if(count++ == SDMMC_MAX_VOLT_TRIAL)
80040aa: 68bb ldr r3, [r7, #8]
80040ac: 1c5a adds r2, r3, #1
80040ae: 60ba str r2, [r7, #8]
80040b0: f64f 72ff movw r2, #65535 @ 0xffff
80040b4: 4293 cmp r3, r2
80040b6: d102 bne.n 80040be <MMC_PowerON+0x3e>
{
return HAL_MMC_ERROR_INVALID_VOLTRANGE;
80040b8: f04f 7380 mov.w r3, #16777216 @ 0x1000000
80040bc: e02a b.n 8004114 <MMC_PowerON+0x94>
}
/* SEND CMD1 APP_CMD with voltage range as argument */
errorstate = SDMMC_CmdOpCondition(hmmc->Instance, MMC_VOLTAGE_RANGE);
80040be: 687b ldr r3, [r7, #4]
80040c0: 681b ldr r3, [r3, #0]
80040c2: 4916 ldr r1, [pc, #88] @ (800411c <MMC_PowerON+0x9c>)
80040c4: 4618 mov r0, r3
80040c6: f003 f91d bl 8007304 <SDMMC_CmdOpCondition>
80040ca: 60f8 str r0, [r7, #12]
if(errorstate != HAL_MMC_ERROR_NONE)
80040cc: 68fb ldr r3, [r7, #12]
80040ce: 2b00 cmp r3, #0
80040d0: d002 beq.n 80040d8 <MMC_PowerON+0x58>
{
return HAL_MMC_ERROR_UNSUPPORTED_FEATURE;
80040d2: f04f 5380 mov.w r3, #268435456 @ 0x10000000
80040d6: e01d b.n 8004114 <MMC_PowerON+0x94>
}
/* Get command response */
response = SDIO_GetResponse(hmmc->Instance, SDIO_RESP1);
80040d8: 687b ldr r3, [r7, #4]
80040da: 681b ldr r3, [r3, #0]
80040dc: 2100 movs r1, #0
80040de: 4618 mov r0, r3
80040e0: f002 ff40 bl 8006f64 <SDIO_GetResponse>
80040e4: 6178 str r0, [r7, #20]
/* Get operating voltage*/
validvoltage = (((response >> 31U) == 1U) ? 1U : 0U);
80040e6: 697b ldr r3, [r7, #20]
80040e8: 0fdb lsrs r3, r3, #31
80040ea: 2b01 cmp r3, #1
80040ec: d101 bne.n 80040f2 <MMC_PowerON+0x72>
80040ee: 2301 movs r3, #1
80040f0: e000 b.n 80040f4 <MMC_PowerON+0x74>
80040f2: 2300 movs r3, #0
80040f4: 613b str r3, [r7, #16]
while(validvoltage == 0U)
80040f6: 693b ldr r3, [r7, #16]
80040f8: 2b00 cmp r3, #0
80040fa: d0d6 beq.n 80040aa <MMC_PowerON+0x2a>
}
/* When power routine is finished and command returns valid voltage */
if (((response & (0xFF000000U)) >> 24U) == 0xC0U)
80040fc: 697b ldr r3, [r7, #20]
80040fe: 0e1b lsrs r3, r3, #24
8004100: 2bc0 cmp r3, #192 @ 0xc0
8004102: d103 bne.n 800410c <MMC_PowerON+0x8c>
{
hmmc->MmcCard.CardType = MMC_HIGH_CAPACITY_CARD;
8004104: 687b ldr r3, [r7, #4]
8004106: 2201 movs r2, #1
8004108: 645a str r2, [r3, #68] @ 0x44
800410a: e002 b.n 8004112 <MMC_PowerON+0x92>
}
else
{
hmmc->MmcCard.CardType = MMC_LOW_CAPACITY_CARD;
800410c: 687b ldr r3, [r7, #4]
800410e: 2200 movs r2, #0
8004110: 645a str r2, [r3, #68] @ 0x44
}
return HAL_MMC_ERROR_NONE;
8004112: 2300 movs r3, #0
}
8004114: 4618 mov r0, r3
8004116: 3718 adds r7, #24
8004118: 46bd mov sp, r7
800411a: bd80 pop {r7, pc}
800411c: c0ff8000 .word 0xc0ff8000
08004120 <MMC_SendStatus>:
* @param pCardStatus: pointer to the buffer that will contain the MMC card
* status (Card Status register)
* @retval error state
*/
static uint32_t MMC_SendStatus(MMC_HandleTypeDef *hmmc, uint32_t *pCardStatus)
{
8004120: b580 push {r7, lr}
8004122: b084 sub sp, #16
8004124: af00 add r7, sp, #0
8004126: 6078 str r0, [r7, #4]
8004128: 6039 str r1, [r7, #0]
uint32_t errorstate;
if(pCardStatus == NULL)
800412a: 683b ldr r3, [r7, #0]
800412c: 2b00 cmp r3, #0
800412e: d102 bne.n 8004136 <MMC_SendStatus+0x16>
{
return HAL_MMC_ERROR_PARAM;
8004130: f04f 6300 mov.w r3, #134217728 @ 0x8000000
8004134: e018 b.n 8004168 <MMC_SendStatus+0x48>
}
/* Send Status command */
errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(hmmc->MmcCard.RelCardAdd << 16U));
8004136: 687b ldr r3, [r7, #4]
8004138: 681a ldr r2, [r3, #0]
800413a: 687b ldr r3, [r7, #4]
800413c: 6cdb ldr r3, [r3, #76] @ 0x4c
800413e: 041b lsls r3, r3, #16
8004140: 4619 mov r1, r3
8004142: 4610 mov r0, r2
8004144: f003 f8bc bl 80072c0 <SDMMC_CmdSendStatus>
8004148: 60f8 str r0, [r7, #12]
if(errorstate != HAL_MMC_ERROR_NONE)
800414a: 68fb ldr r3, [r7, #12]
800414c: 2b00 cmp r3, #0
800414e: d001 beq.n 8004154 <MMC_SendStatus+0x34>
{
return errorstate;
8004150: 68fb ldr r3, [r7, #12]
8004152: e009 b.n 8004168 <MMC_SendStatus+0x48>
}
/* Get MMC card status */
*pCardStatus = SDIO_GetResponse(hmmc->Instance, SDIO_RESP1);
8004154: 687b ldr r3, [r7, #4]
8004156: 681b ldr r3, [r3, #0]
8004158: 2100 movs r1, #0
800415a: 4618 mov r0, r3
800415c: f002 ff02 bl 8006f64 <SDIO_GetResponse>
8004160: 4602 mov r2, r0
8004162: 683b ldr r3, [r7, #0]
8004164: 601a str r2, [r3, #0]
return HAL_MMC_ERROR_NONE;
8004166: 2300 movs r3, #0
}
8004168: 4618 mov r0, r3
800416a: 3710 adds r7, #16
800416c: 46bd mov sp, r7
800416e: bd80 pop {r7, pc}
08004170 <MMC_ReadExtCSD>:
* @param FieldIndex: Index of the field to be read
* @param Timeout: Specify timeout value
* @retval HAL status
*/
static uint32_t MMC_ReadExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pFieldData, uint16_t FieldIndex, uint32_t Timeout)
{
8004170: b580 push {r7, lr}
8004172: b090 sub sp, #64 @ 0x40
8004174: af00 add r7, sp, #0
8004176: 60f8 str r0, [r7, #12]
8004178: 60b9 str r1, [r7, #8]
800417a: 603b str r3, [r7, #0]
800417c: 4613 mov r3, r2
800417e: 80fb strh r3, [r7, #6]
SDIO_DataInitTypeDef config;
uint32_t errorstate;
uint32_t tickstart = HAL_GetTick();
8004180: f7fd fb0a bl 8001798 <HAL_GetTick>
8004184: 6378 str r0, [r7, #52] @ 0x34
uint32_t count;
uint32_t i = 0;
8004186: 2300 movs r3, #0
8004188: 63bb str r3, [r7, #56] @ 0x38
uint32_t tmp_data;
hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
800418a: 68fb ldr r3, [r7, #12]
800418c: 2200 movs r2, #0
800418e: 639a str r2, [r3, #56] @ 0x38
/* Initialize data control register */
hmmc->Instance->DCTRL = 0;
8004190: 68fb ldr r3, [r7, #12]
8004192: 681b ldr r3, [r3, #0]
8004194: 2200 movs r2, #0
8004196: 62da str r2, [r3, #44] @ 0x2c
/* Configure the MMC DPSM (Data Path State Machine) */
config.DataTimeOut = SDMMC_DATATIMEOUT;
8004198: f04f 33ff mov.w r3, #4294967295
800419c: 617b str r3, [r7, #20]
config.DataLength = 512;
800419e: f44f 7300 mov.w r3, #512 @ 0x200
80041a2: 61bb str r3, [r7, #24]
config.DataBlockSize = SDIO_DATABLOCK_SIZE_512B;
80041a4: 2390 movs r3, #144 @ 0x90
80041a6: 61fb str r3, [r7, #28]
config.TransferDir = SDIO_TRANSFER_DIR_TO_SDIO;
80041a8: 2302 movs r3, #2
80041aa: 623b str r3, [r7, #32]
config.TransferMode = SDIO_TRANSFER_MODE_BLOCK;
80041ac: 2300 movs r3, #0
80041ae: 627b str r3, [r7, #36] @ 0x24
config.DPSM = SDIO_DPSM_ENABLE;
80041b0: 2301 movs r3, #1
80041b2: 62bb str r3, [r7, #40] @ 0x28
(void)SDIO_ConfigData(hmmc->Instance, &config);
80041b4: 68fb ldr r3, [r7, #12]
80041b6: 681b ldr r3, [r3, #0]
80041b8: f107 0214 add.w r2, r7, #20
80041bc: 4611 mov r1, r2
80041be: 4618 mov r0, r3
80041c0: f002 fee3 bl 8006f8a <SDIO_ConfigData>
/* Set Block Size for Card */
errorstate = SDMMC_CmdSendEXTCSD(hmmc->Instance, 0);
80041c4: 68fb ldr r3, [r7, #12]
80041c6: 681b ldr r3, [r3, #0]
80041c8: 2100 movs r1, #0
80041ca: 4618 mov r0, r3
80041cc: f003 f8db bl 8007386 <SDMMC_CmdSendEXTCSD>
80041d0: 6338 str r0, [r7, #48] @ 0x30
if(errorstate != HAL_MMC_ERROR_NONE)
80041d2: 6b3b ldr r3, [r7, #48] @ 0x30
80041d4: 2b00 cmp r3, #0
80041d6: d04e beq.n 8004276 <MMC_ReadExtCSD+0x106>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
80041d8: 68fb ldr r3, [r7, #12]
80041da: 681b ldr r3, [r3, #0]
80041dc: 4a3a ldr r2, [pc, #232] @ (80042c8 <MMC_ReadExtCSD+0x158>)
80041de: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= errorstate;
80041e0: 68fb ldr r3, [r7, #12]
80041e2: 6b9a ldr r2, [r3, #56] @ 0x38
80041e4: 6b3b ldr r3, [r7, #48] @ 0x30
80041e6: 431a orrs r2, r3
80041e8: 68fb ldr r3, [r7, #12]
80041ea: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
80041ec: 68fb ldr r3, [r7, #12]
80041ee: 2201 movs r2, #1
80041f0: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
80041f4: 2301 movs r3, #1
80041f6: e062 b.n 80042be <MMC_ReadExtCSD+0x14e>
}
/* Poll on SDMMC flags */
while(!__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND))
{
if(__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_RXFIFOHF))
80041f8: 68fb ldr r3, [r7, #12]
80041fa: 681b ldr r3, [r3, #0]
80041fc: 6b5b ldr r3, [r3, #52] @ 0x34
80041fe: f403 4300 and.w r3, r3, #32768 @ 0x8000
8004202: 2b00 cmp r3, #0
8004204: d01c beq.n 8004240 <MMC_ReadExtCSD+0xd0>
{
/* Read data from SDMMC Rx FIFO */
for(count = 0U; count < 8U; count++)
8004206: 2300 movs r3, #0
8004208: 63fb str r3, [r7, #60] @ 0x3c
800420a: e013 b.n 8004234 <MMC_ReadExtCSD+0xc4>
{
tmp_data = SDIO_ReadFIFO(hmmc->Instance);
800420c: 68fb ldr r3, [r7, #12]
800420e: 681b ldr r3, [r3, #0]
8004210: 4618 mov r0, r3
8004212: f002 fe36 bl 8006e82 <SDIO_ReadFIFO>
8004216: 62f8 str r0, [r7, #44] @ 0x2c
/* eg : SEC_COUNT : FieldIndex = 212 => i+count = 53 */
/* DEVICE_TYPE : FieldIndex = 196 => i+count = 49 */
if ((i + count) == ((uint32_t)FieldIndex/4U))
8004218: 6bba ldr r2, [r7, #56] @ 0x38
800421a: 6bfb ldr r3, [r7, #60] @ 0x3c
800421c: 4413 add r3, r2
800421e: 88fa ldrh r2, [r7, #6]
8004220: 0892 lsrs r2, r2, #2
8004222: b292 uxth r2, r2
8004224: 4293 cmp r3, r2
8004226: d102 bne.n 800422e <MMC_ReadExtCSD+0xbe>
{
*pFieldData = tmp_data;
8004228: 68bb ldr r3, [r7, #8]
800422a: 6afa ldr r2, [r7, #44] @ 0x2c
800422c: 601a str r2, [r3, #0]
for(count = 0U; count < 8U; count++)
800422e: 6bfb ldr r3, [r7, #60] @ 0x3c
8004230: 3301 adds r3, #1
8004232: 63fb str r3, [r7, #60] @ 0x3c
8004234: 6bfb ldr r3, [r7, #60] @ 0x3c
8004236: 2b07 cmp r3, #7
8004238: d9e8 bls.n 800420c <MMC_ReadExtCSD+0x9c>
}
}
i += 8U;
800423a: 6bbb ldr r3, [r7, #56] @ 0x38
800423c: 3308 adds r3, #8
800423e: 63bb str r3, [r7, #56] @ 0x38
}
if(((HAL_GetTick()-tickstart) >= Timeout) || (Timeout == 0U))
8004240: f7fd faaa bl 8001798 <HAL_GetTick>
8004244: 4602 mov r2, r0
8004246: 6b7b ldr r3, [r7, #52] @ 0x34
8004248: 1ad3 subs r3, r2, r3
800424a: 683a ldr r2, [r7, #0]
800424c: 429a cmp r2, r3
800424e: d902 bls.n 8004256 <MMC_ReadExtCSD+0xe6>
8004250: 683b ldr r3, [r7, #0]
8004252: 2b00 cmp r3, #0
8004254: d10f bne.n 8004276 <MMC_ReadExtCSD+0x106>
{
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
8004256: 68fb ldr r3, [r7, #12]
8004258: 681b ldr r3, [r3, #0]
800425a: 4a1b ldr r2, [pc, #108] @ (80042c8 <MMC_ReadExtCSD+0x158>)
800425c: 639a str r2, [r3, #56] @ 0x38
hmmc->ErrorCode |= HAL_MMC_ERROR_TIMEOUT;
800425e: 68fb ldr r3, [r7, #12]
8004260: 6b9b ldr r3, [r3, #56] @ 0x38
8004262: f043 4200 orr.w r2, r3, #2147483648 @ 0x80000000
8004266: 68fb ldr r3, [r7, #12]
8004268: 639a str r2, [r3, #56] @ 0x38
hmmc->State= HAL_MMC_STATE_READY;
800426a: 68fb ldr r3, [r7, #12]
800426c: 2201 movs r2, #1
800426e: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_TIMEOUT;
8004272: 2303 movs r3, #3
8004274: e023 b.n 80042be <MMC_ReadExtCSD+0x14e>
while(!__HAL_MMC_GET_FLAG(hmmc, SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DATAEND))
8004276: 68fb ldr r3, [r7, #12]
8004278: 681b ldr r3, [r3, #0]
800427a: 6b5b ldr r3, [r3, #52] @ 0x34
800427c: f403 7395 and.w r3, r3, #298 @ 0x12a
8004280: 2b00 cmp r3, #0
8004282: d0b9 beq.n 80041f8 <MMC_ReadExtCSD+0x88>
}
}
/* While card is not ready for data and trial number for sending CMD13 is not exceeded */
errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16));
8004284: 68fb ldr r3, [r7, #12]
8004286: 681a ldr r2, [r3, #0]
8004288: 68fb ldr r3, [r7, #12]
800428a: 6cdb ldr r3, [r3, #76] @ 0x4c
800428c: 041b lsls r3, r3, #16
800428e: 4619 mov r1, r3
8004290: 4610 mov r0, r2
8004292: f003 f815 bl 80072c0 <SDMMC_CmdSendStatus>
8004296: 6338 str r0, [r7, #48] @ 0x30
if(errorstate != HAL_MMC_ERROR_NONE)
8004298: 6b3b ldr r3, [r7, #48] @ 0x30
800429a: 2b00 cmp r3, #0
800429c: d005 beq.n 80042aa <MMC_ReadExtCSD+0x13a>
{
hmmc->ErrorCode |= errorstate;
800429e: 68fb ldr r3, [r7, #12]
80042a0: 6b9a ldr r2, [r3, #56] @ 0x38
80042a2: 6b3b ldr r3, [r7, #48] @ 0x30
80042a4: 431a orrs r2, r3
80042a6: 68fb ldr r3, [r7, #12]
80042a8: 639a str r2, [r3, #56] @ 0x38
}
/* Clear all the static flags */
__HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_DATA_FLAGS);
80042aa: 68fb ldr r3, [r7, #12]
80042ac: 681b ldr r3, [r3, #0]
80042ae: f240 523a movw r2, #1338 @ 0x53a
80042b2: 639a str r2, [r3, #56] @ 0x38
hmmc->State = HAL_MMC_STATE_READY;
80042b4: 68fb ldr r3, [r7, #12]
80042b6: 2201 movs r2, #1
80042b8: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_OK;
80042bc: 2300 movs r3, #0
}
80042be: 4618 mov r0, r3
80042c0: 3740 adds r7, #64 @ 0x40
80042c2: 46bd mov sp, r7
80042c4: bd80 pop {r7, pc}
80042c6: bf00 nop
80042c8: 004005ff .word 0x004005ff
080042cc <MMC_PwrClassUpdate>:
* @param Wide Wide of MMC bus
* @param Speed Speed of the MMC bus
* @retval MMC Card error state
*/
static uint32_t MMC_PwrClassUpdate(MMC_HandleTypeDef *hmmc, uint32_t Wide)
{
80042cc: b580 push {r7, lr}
80042ce: b088 sub sp, #32
80042d0: af00 add r7, sp, #0
80042d2: 6078 str r0, [r7, #4]
80042d4: 6039 str r1, [r7, #0]
uint32_t count;
uint32_t response = 0U;
80042d6: 2300 movs r3, #0
80042d8: 61bb str r3, [r7, #24]
uint32_t errorstate = HAL_MMC_ERROR_NONE;
80042da: 2300 movs r3, #0
80042dc: 617b str r3, [r7, #20]
uint32_t power_class, supported_pwr_class;
if((Wide == SDIO_BUS_WIDE_8B) || (Wide == SDIO_BUS_WIDE_4B))
80042de: 683b ldr r3, [r7, #0]
80042e0: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
80042e4: d003 beq.n 80042ee <MMC_PwrClassUpdate+0x22>
80042e6: 683b ldr r3, [r7, #0]
80042e8: f5b3 6f00 cmp.w r3, #2048 @ 0x800
80042ec: d174 bne.n 80043d8 <MMC_PwrClassUpdate+0x10c>
{
power_class = 0U; /* Default value after power-on or software reset */
80042ee: 2300 movs r3, #0
80042f0: 60fb str r3, [r7, #12]
/* Read the PowerClass field of the Extended CSD register */
if(MMC_ReadExtCSD(hmmc, &power_class, 187, SDMMC_DATATIMEOUT) != HAL_OK) /* Field POWER_CLASS [187] */
80042f2: f107 010c add.w r1, r7, #12
80042f6: f04f 33ff mov.w r3, #4294967295
80042fa: 22bb movs r2, #187 @ 0xbb
80042fc: 6878 ldr r0, [r7, #4]
80042fe: f7ff ff37 bl 8004170 <MMC_ReadExtCSD>
8004302: 4603 mov r3, r0
8004304: 2b00 cmp r3, #0
8004306: d003 beq.n 8004310 <MMC_PwrClassUpdate+0x44>
{
errorstate = SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
8004308: f44f 3380 mov.w r3, #65536 @ 0x10000
800430c: 617b str r3, [r7, #20]
800430e: e002 b.n 8004316 <MMC_PwrClassUpdate+0x4a>
}
else
{
power_class = ((power_class >> 24U) & 0x000000FFU);
8004310: 68fb ldr r3, [r7, #12]
8004312: 0e1b lsrs r3, r3, #24
8004314: 60fb str r3, [r7, #12]
}
/* Get the supported PowerClass field of the Extended CSD register */
/* Field PWR_CL_26_xxx [201 or 203] */
supported_pwr_class = ((hmmc->Ext_CSD[(MMC_EXT_CSD_PWR_CL_26_INDEX/4)] >> MMC_EXT_CSD_PWR_CL_26_POS) & 0x000000FFU);
8004316: 687b ldr r3, [r7, #4]
8004318: f8d3 3148 ldr.w r3, [r3, #328] @ 0x148
800431c: 0e1b lsrs r3, r3, #24
800431e: 613b str r3, [r7, #16]
if(errorstate == HAL_MMC_ERROR_NONE)
8004320: 697b ldr r3, [r7, #20]
8004322: 2b00 cmp r3, #0
8004324: d158 bne.n 80043d8 <MMC_PwrClassUpdate+0x10c>
{
if(Wide == SDIO_BUS_WIDE_8B)
8004326: 683b ldr r3, [r7, #0]
8004328: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800432c: d102 bne.n 8004334 <MMC_PwrClassUpdate+0x68>
{
/* Bit [7:4] : power class for 8-bits bus configuration - Bit [3:0] : power class for 4-bits bus configuration */
supported_pwr_class = (supported_pwr_class >> 4U);
800432e: 693b ldr r3, [r7, #16]
8004330: 091b lsrs r3, r3, #4
8004332: 613b str r3, [r7, #16]
}
if ((power_class & 0x0FU) != (supported_pwr_class & 0x0FU))
8004334: 68fa ldr r2, [r7, #12]
8004336: 693b ldr r3, [r7, #16]
8004338: 4053 eors r3, r2
800433a: f003 030f and.w r3, r3, #15
800433e: 2b00 cmp r3, #0
8004340: d04a beq.n 80043d8 <MMC_PwrClassUpdate+0x10c>
{
/* Need to change current power class */
errorstate = SDMMC_CmdSwitch(hmmc->Instance, (0x03BB0000U | ((supported_pwr_class & 0x0FU) << 8U)));
8004342: 687b ldr r3, [r7, #4]
8004344: 681a ldr r2, [r3, #0]
8004346: 693b ldr r3, [r7, #16]
8004348: 021b lsls r3, r3, #8
800434a: f403 6370 and.w r3, r3, #3840 @ 0xf00
800434e: f043 736e orr.w r3, r3, #62390272 @ 0x3b80000
8004352: f443 3340 orr.w r3, r3, #196608 @ 0x30000
8004356: 4619 mov r1, r3
8004358: 4610 mov r0, r2
800435a: f002 fff2 bl 8007342 <SDMMC_CmdSwitch>
800435e: 6178 str r0, [r7, #20]
if(errorstate == HAL_MMC_ERROR_NONE)
8004360: 697b ldr r3, [r7, #20]
8004362: 2b00 cmp r3, #0
8004364: d138 bne.n 80043d8 <MMC_PwrClassUpdate+0x10c>
{
/* While card is not ready for data and trial number for sending CMD13 is not exceeded */
count = SDMMC_MAX_TRIAL;
8004366: f64f 73ff movw r3, #65535 @ 0xffff
800436a: 61fb str r3, [r7, #28]
do
{
errorstate = SDMMC_CmdSendStatus(hmmc->Instance, (uint32_t)(((uint32_t)hmmc->MmcCard.RelCardAdd) << 16U));
800436c: 687b ldr r3, [r7, #4]
800436e: 681a ldr r2, [r3, #0]
8004370: 687b ldr r3, [r7, #4]
8004372: 6cdb ldr r3, [r3, #76] @ 0x4c
8004374: 041b lsls r3, r3, #16
8004376: 4619 mov r1, r3
8004378: 4610 mov r0, r2
800437a: f002 ffa1 bl 80072c0 <SDMMC_CmdSendStatus>
800437e: 6178 str r0, [r7, #20]
if(errorstate != HAL_MMC_ERROR_NONE)
8004380: 697b ldr r3, [r7, #20]
8004382: 2b00 cmp r3, #0
8004384: d112 bne.n 80043ac <MMC_PwrClassUpdate+0xe0>
{
break;
}
/* Get command response */
response = SDIO_GetResponse(hmmc->Instance, SDIO_RESP1);
8004386: 687b ldr r3, [r7, #4]
8004388: 681b ldr r3, [r3, #0]
800438a: 2100 movs r1, #0
800438c: 4618 mov r0, r3
800438e: f002 fde9 bl 8006f64 <SDIO_GetResponse>
8004392: 61b8 str r0, [r7, #24]
count--;
8004394: 69fb ldr r3, [r7, #28]
8004396: 3b01 subs r3, #1
8004398: 61fb str r3, [r7, #28]
}while(((response & 0x100U) == 0U) && (count != 0U));
800439a: 69bb ldr r3, [r7, #24]
800439c: f403 7380 and.w r3, r3, #256 @ 0x100
80043a0: 2b00 cmp r3, #0
80043a2: d104 bne.n 80043ae <MMC_PwrClassUpdate+0xe2>
80043a4: 69fb ldr r3, [r7, #28]
80043a6: 2b00 cmp r3, #0
80043a8: d1e0 bne.n 800436c <MMC_PwrClassUpdate+0xa0>
80043aa: e000 b.n 80043ae <MMC_PwrClassUpdate+0xe2>
break;
80043ac: bf00 nop
/* Check the status after the switch command execution */
if ((count != 0U) && (errorstate == HAL_MMC_ERROR_NONE))
80043ae: 69fb ldr r3, [r7, #28]
80043b0: 2b00 cmp r3, #0
80043b2: d00b beq.n 80043cc <MMC_PwrClassUpdate+0x100>
80043b4: 697b ldr r3, [r7, #20]
80043b6: 2b00 cmp r3, #0
80043b8: d108 bne.n 80043cc <MMC_PwrClassUpdate+0x100>
{
/* Check the bit SWITCH_ERROR of the device status */
if ((response & 0x80U) != 0U)
80043ba: 69bb ldr r3, [r7, #24]
80043bc: f003 0380 and.w r3, r3, #128 @ 0x80
80043c0: 2b00 cmp r3, #0
80043c2: d009 beq.n 80043d8 <MMC_PwrClassUpdate+0x10c>
{
errorstate = SDMMC_ERROR_UNSUPPORTED_FEATURE;
80043c4: f04f 5380 mov.w r3, #268435456 @ 0x10000000
80043c8: 617b str r3, [r7, #20]
if ((response & 0x80U) != 0U)
80043ca: e005 b.n 80043d8 <MMC_PwrClassUpdate+0x10c>
}
}
else if (count == 0U)
80043cc: 69fb ldr r3, [r7, #28]
80043ce: 2b00 cmp r3, #0
80043d0: d102 bne.n 80043d8 <MMC_PwrClassUpdate+0x10c>
{
errorstate = SDMMC_ERROR_TIMEOUT;
80043d2: f04f 4300 mov.w r3, #2147483648 @ 0x80000000
80043d6: 617b str r3, [r7, #20]
}
}
}
}
return errorstate;
80043d8: 697b ldr r3, [r7, #20]
}
80043da: 4618 mov r0, r3
80043dc: 3720 adds r7, #32
80043de: 46bd mov sp, r7
80043e0: bd80 pop {r7, pc}
080043e2 <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
80043e2: b580 push {r7, lr}
80043e4: b086 sub sp, #24
80043e6: af02 add r7, sp, #8
80043e8: 6078 str r0, [r7, #4]
const USB_OTG_GlobalTypeDef *USBx;
#endif /* defined (USB_OTG_FS) */
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
80043ea: 687b ldr r3, [r7, #4]
80043ec: 2b00 cmp r3, #0
80043ee: d101 bne.n 80043f4 <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
80043f0: 2301 movs r3, #1
80043f2: e108 b.n 8004606 <HAL_PCD_Init+0x224>
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
#if defined (USB_OTG_FS)
USBx = hpcd->Instance;
80043f4: 687b ldr r3, [r7, #4]
80043f6: 681b ldr r3, [r3, #0]
80043f8: 60bb str r3, [r7, #8]
#endif /* defined (USB_OTG_FS) */
if (hpcd->State == HAL_PCD_STATE_RESET)
80043fa: 687b ldr r3, [r7, #4]
80043fc: f893 3495 ldrb.w r3, [r3, #1173] @ 0x495
8004400: b2db uxtb r3, r3
8004402: 2b00 cmp r3, #0
8004404: d106 bne.n 8004414 <HAL_PCD_Init+0x32>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
8004406: 687b ldr r3, [r7, #4]
8004408: 2200 movs r2, #0
800440a: f883 2494 strb.w r2, [r3, #1172] @ 0x494
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
800440e: 6878 ldr r0, [r7, #4]
8004410: f00e fa24 bl 801285c <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
8004414: 687b ldr r3, [r7, #4]
8004416: 2203 movs r2, #3
8004418: f883 2495 strb.w r2, [r3, #1173] @ 0x495
#if defined (USB_OTG_FS)
/* Disable DMA mode for FS instance */
if (USBx == USB_OTG_FS)
800441c: 68bb ldr r3, [r7, #8]
800441e: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000
8004422: d102 bne.n 800442a <HAL_PCD_Init+0x48>
{
hpcd->Init.dma_enable = 0U;
8004424: 687b ldr r3, [r7, #4]
8004426: 2200 movs r2, #0
8004428: 719a strb r2, [r3, #6]
}
#endif /* defined (USB_OTG_FS) */
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
800442a: 687b ldr r3, [r7, #4]
800442c: 681b ldr r3, [r3, #0]
800442e: 4618 mov r0, r3
8004430: f003 fa83 bl 800793a <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8004434: 687b ldr r3, [r7, #4]
8004436: 6818 ldr r0, [r3, #0]
8004438: 687b ldr r3, [r7, #4]
800443a: 7c1a ldrb r2, [r3, #16]
800443c: f88d 2000 strb.w r2, [sp]
8004440: 3304 adds r3, #4
8004442: cb0e ldmia r3, {r1, r2, r3}
8004444: f003 f962 bl 800770c <USB_CoreInit>
8004448: 4603 mov r3, r0
800444a: 2b00 cmp r3, #0
800444c: d005 beq.n 800445a <HAL_PCD_Init+0x78>
{
hpcd->State = HAL_PCD_STATE_ERROR;
800444e: 687b ldr r3, [r7, #4]
8004450: 2202 movs r2, #2
8004452: f883 2495 strb.w r2, [r3, #1173] @ 0x495
return HAL_ERROR;
8004456: 2301 movs r3, #1
8004458: e0d5 b.n 8004606 <HAL_PCD_Init+0x224>
}
/* Force Device Mode */
if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK)
800445a: 687b ldr r3, [r7, #4]
800445c: 681b ldr r3, [r3, #0]
800445e: 2100 movs r1, #0
8004460: 4618 mov r0, r3
8004462: f003 fa7b bl 800795c <USB_SetCurrentMode>
8004466: 4603 mov r3, r0
8004468: 2b00 cmp r3, #0
800446a: d005 beq.n 8004478 <HAL_PCD_Init+0x96>
{
hpcd->State = HAL_PCD_STATE_ERROR;
800446c: 687b ldr r3, [r7, #4]
800446e: 2202 movs r2, #2
8004470: f883 2495 strb.w r2, [r3, #1173] @ 0x495
return HAL_ERROR;
8004474: 2301 movs r3, #1
8004476: e0c6 b.n 8004606 <HAL_PCD_Init+0x224>
}
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8004478: 2300 movs r3, #0
800447a: 73fb strb r3, [r7, #15]
800447c: e04a b.n 8004514 <HAL_PCD_Init+0x132>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
800447e: 7bfa ldrb r2, [r7, #15]
8004480: 6879 ldr r1, [r7, #4]
8004482: 4613 mov r3, r2
8004484: 00db lsls r3, r3, #3
8004486: 4413 add r3, r2
8004488: 009b lsls r3, r3, #2
800448a: 440b add r3, r1
800448c: 3315 adds r3, #21
800448e: 2201 movs r2, #1
8004490: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
8004492: 7bfa ldrb r2, [r7, #15]
8004494: 6879 ldr r1, [r7, #4]
8004496: 4613 mov r3, r2
8004498: 00db lsls r3, r3, #3
800449a: 4413 add r3, r2
800449c: 009b lsls r3, r3, #2
800449e: 440b add r3, r1
80044a0: 3314 adds r3, #20
80044a2: 7bfa ldrb r2, [r7, #15]
80044a4: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].tx_fifo_num = i;
80044a6: 7bfa ldrb r2, [r7, #15]
80044a8: 7bfb ldrb r3, [r7, #15]
80044aa: b298 uxth r0, r3
80044ac: 6879 ldr r1, [r7, #4]
80044ae: 4613 mov r3, r2
80044b0: 00db lsls r3, r3, #3
80044b2: 4413 add r3, r2
80044b4: 009b lsls r3, r3, #2
80044b6: 440b add r3, r1
80044b8: 332e adds r3, #46 @ 0x2e
80044ba: 4602 mov r2, r0
80044bc: 801a strh r2, [r3, #0]
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
80044be: 7bfa ldrb r2, [r7, #15]
80044c0: 6879 ldr r1, [r7, #4]
80044c2: 4613 mov r3, r2
80044c4: 00db lsls r3, r3, #3
80044c6: 4413 add r3, r2
80044c8: 009b lsls r3, r3, #2
80044ca: 440b add r3, r1
80044cc: 3318 adds r3, #24
80044ce: 2200 movs r2, #0
80044d0: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
80044d2: 7bfa ldrb r2, [r7, #15]
80044d4: 6879 ldr r1, [r7, #4]
80044d6: 4613 mov r3, r2
80044d8: 00db lsls r3, r3, #3
80044da: 4413 add r3, r2
80044dc: 009b lsls r3, r3, #2
80044de: 440b add r3, r1
80044e0: 331c adds r3, #28
80044e2: 2200 movs r2, #0
80044e4: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
80044e6: 7bfa ldrb r2, [r7, #15]
80044e8: 6879 ldr r1, [r7, #4]
80044ea: 4613 mov r3, r2
80044ec: 00db lsls r3, r3, #3
80044ee: 4413 add r3, r2
80044f0: 009b lsls r3, r3, #2
80044f2: 440b add r3, r1
80044f4: 3320 adds r3, #32
80044f6: 2200 movs r2, #0
80044f8: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
80044fa: 7bfa ldrb r2, [r7, #15]
80044fc: 6879 ldr r1, [r7, #4]
80044fe: 4613 mov r3, r2
8004500: 00db lsls r3, r3, #3
8004502: 4413 add r3, r2
8004504: 009b lsls r3, r3, #2
8004506: 440b add r3, r1
8004508: 3324 adds r3, #36 @ 0x24
800450a: 2200 movs r2, #0
800450c: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
800450e: 7bfb ldrb r3, [r7, #15]
8004510: 3301 adds r3, #1
8004512: 73fb strb r3, [r7, #15]
8004514: 687b ldr r3, [r7, #4]
8004516: 791b ldrb r3, [r3, #4]
8004518: 7bfa ldrb r2, [r7, #15]
800451a: 429a cmp r2, r3
800451c: d3af bcc.n 800447e <HAL_PCD_Init+0x9c>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
800451e: 2300 movs r3, #0
8004520: 73fb strb r3, [r7, #15]
8004522: e044 b.n 80045ae <HAL_PCD_Init+0x1cc>
{
hpcd->OUT_ep[i].is_in = 0U;
8004524: 7bfa ldrb r2, [r7, #15]
8004526: 6879 ldr r1, [r7, #4]
8004528: 4613 mov r3, r2
800452a: 00db lsls r3, r3, #3
800452c: 4413 add r3, r2
800452e: 009b lsls r3, r3, #2
8004530: 440b add r3, r1
8004532: f203 2355 addw r3, r3, #597 @ 0x255
8004536: 2200 movs r2, #0
8004538: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
800453a: 7bfa ldrb r2, [r7, #15]
800453c: 6879 ldr r1, [r7, #4]
800453e: 4613 mov r3, r2
8004540: 00db lsls r3, r3, #3
8004542: 4413 add r3, r2
8004544: 009b lsls r3, r3, #2
8004546: 440b add r3, r1
8004548: f503 7315 add.w r3, r3, #596 @ 0x254
800454c: 7bfa ldrb r2, [r7, #15]
800454e: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
8004550: 7bfa ldrb r2, [r7, #15]
8004552: 6879 ldr r1, [r7, #4]
8004554: 4613 mov r3, r2
8004556: 00db lsls r3, r3, #3
8004558: 4413 add r3, r2
800455a: 009b lsls r3, r3, #2
800455c: 440b add r3, r1
800455e: f503 7316 add.w r3, r3, #600 @ 0x258
8004562: 2200 movs r2, #0
8004564: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
8004566: 7bfa ldrb r2, [r7, #15]
8004568: 6879 ldr r1, [r7, #4]
800456a: 4613 mov r3, r2
800456c: 00db lsls r3, r3, #3
800456e: 4413 add r3, r2
8004570: 009b lsls r3, r3, #2
8004572: 440b add r3, r1
8004574: f503 7317 add.w r3, r3, #604 @ 0x25c
8004578: 2200 movs r2, #0
800457a: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
800457c: 7bfa ldrb r2, [r7, #15]
800457e: 6879 ldr r1, [r7, #4]
8004580: 4613 mov r3, r2
8004582: 00db lsls r3, r3, #3
8004584: 4413 add r3, r2
8004586: 009b lsls r3, r3, #2
8004588: 440b add r3, r1
800458a: f503 7318 add.w r3, r3, #608 @ 0x260
800458e: 2200 movs r2, #0
8004590: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
8004592: 7bfa ldrb r2, [r7, #15]
8004594: 6879 ldr r1, [r7, #4]
8004596: 4613 mov r3, r2
8004598: 00db lsls r3, r3, #3
800459a: 4413 add r3, r2
800459c: 009b lsls r3, r3, #2
800459e: 440b add r3, r1
80045a0: f503 7319 add.w r3, r3, #612 @ 0x264
80045a4: 2200 movs r2, #0
80045a6: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80045a8: 7bfb ldrb r3, [r7, #15]
80045aa: 3301 adds r3, #1
80045ac: 73fb strb r3, [r7, #15]
80045ae: 687b ldr r3, [r7, #4]
80045b0: 791b ldrb r3, [r3, #4]
80045b2: 7bfa ldrb r2, [r7, #15]
80045b4: 429a cmp r2, r3
80045b6: d3b5 bcc.n 8004524 <HAL_PCD_Init+0x142>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
80045b8: 687b ldr r3, [r7, #4]
80045ba: 6818 ldr r0, [r3, #0]
80045bc: 687b ldr r3, [r7, #4]
80045be: 7c1a ldrb r2, [r3, #16]
80045c0: f88d 2000 strb.w r2, [sp]
80045c4: 3304 adds r3, #4
80045c6: cb0e ldmia r3, {r1, r2, r3}
80045c8: f003 fa14 bl 80079f4 <USB_DevInit>
80045cc: 4603 mov r3, r0
80045ce: 2b00 cmp r3, #0
80045d0: d005 beq.n 80045de <HAL_PCD_Init+0x1fc>
{
hpcd->State = HAL_PCD_STATE_ERROR;
80045d2: 687b ldr r3, [r7, #4]
80045d4: 2202 movs r2, #2
80045d6: f883 2495 strb.w r2, [r3, #1173] @ 0x495
return HAL_ERROR;
80045da: 2301 movs r3, #1
80045dc: e013 b.n 8004606 <HAL_PCD_Init+0x224>
}
hpcd->USB_Address = 0U;
80045de: 687b ldr r3, [r7, #4]
80045e0: 2200 movs r2, #0
80045e2: 745a strb r2, [r3, #17]
hpcd->State = HAL_PCD_STATE_READY;
80045e4: 687b ldr r3, [r7, #4]
80045e6: 2201 movs r2, #1
80045e8: f883 2495 strb.w r2, [r3, #1173] @ 0x495
#if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) \
|| defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) \
|| defined(STM32F423xx)
/* Activate LPM */
if (hpcd->Init.lpm_enable == 1U)
80045ec: 687b ldr r3, [r7, #4]
80045ee: 7b1b ldrb r3, [r3, #12]
80045f0: 2b01 cmp r3, #1
80045f2: d102 bne.n 80045fa <HAL_PCD_Init+0x218>
{
(void)HAL_PCDEx_ActivateLPM(hpcd);
80045f4: 6878 ldr r0, [r7, #4]
80045f6: f001 f9f9 bl 80059ec <HAL_PCDEx_ActivateLPM>
}
#endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||
defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||
defined(STM32F423xx) */
(void)USB_DevDisconnect(hpcd->Instance);
80045fa: 687b ldr r3, [r7, #4]
80045fc: 681b ldr r3, [r3, #0]
80045fe: 4618 mov r0, r3
8004600: f004 faa0 bl 8008b44 <USB_DevDisconnect>
return HAL_OK;
8004604: 2300 movs r3, #0
}
8004606: 4618 mov r0, r3
8004608: 3710 adds r7, #16
800460a: 46bd mov sp, r7
800460c: bd80 pop {r7, pc}
0800460e <HAL_PCD_DeInit>:
* @brief DeInitializes the PCD peripheral.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd)
{
800460e: b580 push {r7, lr}
8004610: b082 sub sp, #8
8004612: af00 add r7, sp, #0
8004614: 6078 str r0, [r7, #4]
/* Check the PCD handle allocation */
if (hpcd == NULL)
8004616: 687b ldr r3, [r7, #4]
8004618: 2b00 cmp r3, #0
800461a: d101 bne.n 8004620 <HAL_PCD_DeInit+0x12>
{
return HAL_ERROR;
800461c: 2301 movs r3, #1
800461e: e015 b.n 800464c <HAL_PCD_DeInit+0x3e>
}
hpcd->State = HAL_PCD_STATE_BUSY;
8004620: 687b ldr r3, [r7, #4]
8004622: 2203 movs r2, #3
8004624: f883 2495 strb.w r2, [r3, #1173] @ 0x495
/* Stop Device */
if (USB_StopDevice(hpcd->Instance) != HAL_OK)
8004628: 687b ldr r3, [r7, #4]
800462a: 681b ldr r3, [r3, #0]
800462c: 4618 mov r0, r3
800462e: f004 f9f3 bl 8008a18 <USB_StopDevice>
8004632: 4603 mov r3, r0
8004634: 2b00 cmp r3, #0
8004636: d001 beq.n 800463c <HAL_PCD_DeInit+0x2e>
{
return HAL_ERROR;
8004638: 2301 movs r3, #1
800463a: e007 b.n 800464c <HAL_PCD_DeInit+0x3e>
/* DeInit the low level hardware */
hpcd->MspDeInitCallback(hpcd);
#else
/* DeInit the low level hardware: CLOCK, NVIC.*/
HAL_PCD_MspDeInit(hpcd);
800463c: 6878 ldr r0, [r7, #4]
800463e: f00e f977 bl 8012930 <HAL_PCD_MspDeInit>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
hpcd->State = HAL_PCD_STATE_RESET;
8004642: 687b ldr r3, [r7, #4]
8004644: 2200 movs r2, #0
8004646: f883 2495 strb.w r2, [r3, #1173] @ 0x495
return HAL_OK;
800464a: 2300 movs r3, #0
}
800464c: 4618 mov r0, r3
800464e: 3708 adds r7, #8
8004650: 46bd mov sp, r7
8004652: bd80 pop {r7, pc}
08004654 <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
8004654: b580 push {r7, lr}
8004656: b084 sub sp, #16
8004658: af00 add r7, sp, #0
800465a: 6078 str r0, [r7, #4]
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
800465c: 687b ldr r3, [r7, #4]
800465e: 681b ldr r3, [r3, #0]
8004660: 60fb str r3, [r7, #12]
__HAL_LOCK(hpcd);
8004662: 687b ldr r3, [r7, #4]
8004664: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494
8004668: 2b01 cmp r3, #1
800466a: d101 bne.n 8004670 <HAL_PCD_Start+0x1c>
800466c: 2302 movs r3, #2
800466e: e022 b.n 80046b6 <HAL_PCD_Start+0x62>
8004670: 687b ldr r3, [r7, #4]
8004672: 2201 movs r2, #1
8004674: f883 2494 strb.w r2, [r3, #1172] @ 0x494
if (((USBx->GUSBCFG & USB_OTG_GUSBCFG_PHYSEL) != 0U) &&
8004678: 68fb ldr r3, [r7, #12]
800467a: 68db ldr r3, [r3, #12]
800467c: f003 0340 and.w r3, r3, #64 @ 0x40
8004680: 2b00 cmp r3, #0
8004682: d009 beq.n 8004698 <HAL_PCD_Start+0x44>
(hpcd->Init.battery_charging_enable == 1U))
8004684: 687b ldr r3, [r7, #4]
8004686: 7b5b ldrb r3, [r3, #13]
if (((USBx->GUSBCFG & USB_OTG_GUSBCFG_PHYSEL) != 0U) &&
8004688: 2b01 cmp r3, #1
800468a: d105 bne.n 8004698 <HAL_PCD_Start+0x44>
{
/* Enable USB Transceiver */
USBx->GCCFG |= USB_OTG_GCCFG_PWRDWN;
800468c: 68fb ldr r3, [r7, #12]
800468e: 6b9b ldr r3, [r3, #56] @ 0x38
8004690: f443 3280 orr.w r2, r3, #65536 @ 0x10000
8004694: 68fb ldr r3, [r7, #12]
8004696: 639a str r2, [r3, #56] @ 0x38
}
__HAL_PCD_ENABLE(hpcd);
8004698: 687b ldr r3, [r7, #4]
800469a: 681b ldr r3, [r3, #0]
800469c: 4618 mov r0, r3
800469e: f003 f93b bl 8007918 <USB_EnableGlobalInt>
(void)USB_DevConnect(hpcd->Instance);
80046a2: 687b ldr r3, [r7, #4]
80046a4: 681b ldr r3, [r3, #0]
80046a6: 4618 mov r0, r3
80046a8: f004 fa2b bl 8008b02 <USB_DevConnect>
__HAL_UNLOCK(hpcd);
80046ac: 687b ldr r3, [r7, #4]
80046ae: 2200 movs r2, #0
80046b0: f883 2494 strb.w r2, [r3, #1172] @ 0x494
return HAL_OK;
80046b4: 2300 movs r3, #0
}
80046b6: 4618 mov r0, r3
80046b8: 3710 adds r7, #16
80046ba: 46bd mov sp, r7
80046bc: bd80 pop {r7, pc}
080046be <HAL_PCD_Stop>:
* @brief Stop the USB device.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd)
{
80046be: b580 push {r7, lr}
80046c0: b084 sub sp, #16
80046c2: af00 add r7, sp, #0
80046c4: 6078 str r0, [r7, #4]
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
80046c6: 687b ldr r3, [r7, #4]
80046c8: 681b ldr r3, [r3, #0]
80046ca: 60fb str r3, [r7, #12]
__HAL_LOCK(hpcd);
80046cc: 687b ldr r3, [r7, #4]
80046ce: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494
80046d2: 2b01 cmp r3, #1
80046d4: d101 bne.n 80046da <HAL_PCD_Stop+0x1c>
80046d6: 2302 movs r3, #2
80046d8: e028 b.n 800472c <HAL_PCD_Stop+0x6e>
80046da: 687b ldr r3, [r7, #4]
80046dc: 2201 movs r2, #1
80046de: f883 2494 strb.w r2, [r3, #1172] @ 0x494
__HAL_PCD_DISABLE(hpcd);
80046e2: 687b ldr r3, [r7, #4]
80046e4: 681b ldr r3, [r3, #0]
80046e6: 4618 mov r0, r3
80046e8: f003 f927 bl 800793a <USB_DisableGlobalInt>
(void)USB_DevDisconnect(hpcd->Instance);
80046ec: 687b ldr r3, [r7, #4]
80046ee: 681b ldr r3, [r3, #0]
80046f0: 4618 mov r0, r3
80046f2: f004 fa27 bl 8008b44 <USB_DevDisconnect>
(void)USB_FlushTxFifo(hpcd->Instance, 0x10U);
80046f6: 687b ldr r3, [r7, #4]
80046f8: 681b ldr r3, [r3, #0]
80046fa: 2110 movs r1, #16
80046fc: 4618 mov r0, r3
80046fe: f003 fad7 bl 8007cb0 <USB_FlushTxFifo>
if (((USBx->GUSBCFG & USB_OTG_GUSBCFG_PHYSEL) != 0U) &&
8004702: 68fb ldr r3, [r7, #12]
8004704: 68db ldr r3, [r3, #12]
8004706: f003 0340 and.w r3, r3, #64 @ 0x40
800470a: 2b00 cmp r3, #0
800470c: d009 beq.n 8004722 <HAL_PCD_Stop+0x64>
(hpcd->Init.battery_charging_enable == 1U))
800470e: 687b ldr r3, [r7, #4]
8004710: 7b5b ldrb r3, [r3, #13]
if (((USBx->GUSBCFG & USB_OTG_GUSBCFG_PHYSEL) != 0U) &&
8004712: 2b01 cmp r3, #1
8004714: d105 bne.n 8004722 <HAL_PCD_Stop+0x64>
{
/* Disable USB Transceiver */
USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
8004716: 68fb ldr r3, [r7, #12]
8004718: 6b9b ldr r3, [r3, #56] @ 0x38
800471a: f423 3280 bic.w r2, r3, #65536 @ 0x10000
800471e: 68fb ldr r3, [r7, #12]
8004720: 639a str r2, [r3, #56] @ 0x38
}
__HAL_UNLOCK(hpcd);
8004722: 687b ldr r3, [r7, #4]
8004724: 2200 movs r2, #0
8004726: f883 2494 strb.w r2, [r3, #1172] @ 0x494
return HAL_OK;
800472a: 2300 movs r3, #0
}
800472c: 4618 mov r0, r3
800472e: 3710 adds r7, #16
8004730: 46bd mov sp, r7
8004732: bd80 pop {r7, pc}
08004734 <HAL_PCD_IRQHandler>:
* @brief Handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
8004734: b590 push {r4, r7, lr}
8004736: b08d sub sp, #52 @ 0x34
8004738: af00 add r7, sp, #0
800473a: 6078 str r0, [r7, #4]
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
800473c: 687b ldr r3, [r7, #4]
800473e: 681b ldr r3, [r3, #0]
8004740: 623b str r3, [r7, #32]
uint32_t USBx_BASE = (uint32_t)USBx;
8004742: 6a3b ldr r3, [r7, #32]
8004744: 61fb str r3, [r7, #28]
uint32_t epnum;
uint32_t fifoemptymsk;
uint32_t RegVal;
/* ensure that we are in device mode */
if (USB_GetMode(hpcd->Instance) == USB_OTG_MODE_DEVICE)
8004746: 687b ldr r3, [r7, #4]
8004748: 681b ldr r3, [r3, #0]
800474a: 4618 mov r0, r3
800474c: f004 faae bl 8008cac <USB_GetMode>
8004750: 4603 mov r3, r0
8004752: 2b00 cmp r3, #0
8004754: f040 84b9 bne.w 80050ca <HAL_PCD_IRQHandler+0x996>
{
/* avoid spurious interrupt */
if (__HAL_PCD_IS_INVALID_INTERRUPT(hpcd))
8004758: 687b ldr r3, [r7, #4]
800475a: 681b ldr r3, [r3, #0]
800475c: 4618 mov r0, r3
800475e: f004 fa12 bl 8008b86 <USB_ReadInterrupts>
8004762: 4603 mov r3, r0
8004764: 2b00 cmp r3, #0
8004766: f000 84af beq.w 80050c8 <HAL_PCD_IRQHandler+0x994>
{
return;
}
/* store current frame number */
hpcd->FrameNumber = (USBx_DEVICE->DSTS & USB_OTG_DSTS_FNSOF_Msk) >> USB_OTG_DSTS_FNSOF_Pos;
800476a: 69fb ldr r3, [r7, #28]
800476c: f503 6300 add.w r3, r3, #2048 @ 0x800
8004770: 689b ldr r3, [r3, #8]
8004772: 0a1b lsrs r3, r3, #8
8004774: f3c3 020d ubfx r2, r3, #0, #14
8004778: 687b ldr r3, [r7, #4]
800477a: f8c3 24d4 str.w r2, [r3, #1236] @ 0x4d4
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_MMIS))
800477e: 687b ldr r3, [r7, #4]
8004780: 681b ldr r3, [r3, #0]
8004782: 4618 mov r0, r3
8004784: f004 f9ff bl 8008b86 <USB_ReadInterrupts>
8004788: 4603 mov r3, r0
800478a: f003 0302 and.w r3, r3, #2
800478e: 2b02 cmp r3, #2
8004790: d107 bne.n 80047a2 <HAL_PCD_IRQHandler+0x6e>
{
/* incorrect mode, acknowledge the interrupt */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_MMIS);
8004792: 687b ldr r3, [r7, #4]
8004794: 681b ldr r3, [r3, #0]
8004796: 695a ldr r2, [r3, #20]
8004798: 687b ldr r3, [r7, #4]
800479a: 681b ldr r3, [r3, #0]
800479c: f002 0202 and.w r2, r2, #2
80047a0: 615a str r2, [r3, #20]
}
/* Handle RxQLevel Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
80047a2: 687b ldr r3, [r7, #4]
80047a4: 681b ldr r3, [r3, #0]
80047a6: 4618 mov r0, r3
80047a8: f004 f9ed bl 8008b86 <USB_ReadInterrupts>
80047ac: 4603 mov r3, r0
80047ae: f003 0310 and.w r3, r3, #16
80047b2: 2b10 cmp r3, #16
80047b4: d161 bne.n 800487a <HAL_PCD_IRQHandler+0x146>
{
USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
80047b6: 687b ldr r3, [r7, #4]
80047b8: 681b ldr r3, [r3, #0]
80047ba: 699a ldr r2, [r3, #24]
80047bc: 687b ldr r3, [r7, #4]
80047be: 681b ldr r3, [r3, #0]
80047c0: f022 0210 bic.w r2, r2, #16
80047c4: 619a str r2, [r3, #24]
RegVal = USBx->GRXSTSP;
80047c6: 6a3b ldr r3, [r7, #32]
80047c8: 6a1b ldr r3, [r3, #32]
80047ca: 61bb str r3, [r7, #24]
ep = &hpcd->OUT_ep[RegVal & USB_OTG_GRXSTSP_EPNUM];
80047cc: 69bb ldr r3, [r7, #24]
80047ce: f003 020f and.w r2, r3, #15
80047d2: 4613 mov r3, r2
80047d4: 00db lsls r3, r3, #3
80047d6: 4413 add r3, r2
80047d8: 009b lsls r3, r3, #2
80047da: f503 7314 add.w r3, r3, #592 @ 0x250
80047de: 687a ldr r2, [r7, #4]
80047e0: 4413 add r3, r2
80047e2: 3304 adds r3, #4
80047e4: 617b str r3, [r7, #20]
if (((RegVal & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT)
80047e6: 69bb ldr r3, [r7, #24]
80047e8: 0c5b lsrs r3, r3, #17
80047ea: f003 030f and.w r3, r3, #15
80047ee: 2b02 cmp r3, #2
80047f0: d124 bne.n 800483c <HAL_PCD_IRQHandler+0x108>
{
if ((RegVal & USB_OTG_GRXSTSP_BCNT) != 0U)
80047f2: 69ba ldr r2, [r7, #24]
80047f4: f647 73f0 movw r3, #32752 @ 0x7ff0
80047f8: 4013 ands r3, r2
80047fa: 2b00 cmp r3, #0
80047fc: d035 beq.n 800486a <HAL_PCD_IRQHandler+0x136>
{
(void)USB_ReadPacket(USBx, ep->xfer_buff,
80047fe: 697b ldr r3, [r7, #20]
8004800: 68d9 ldr r1, [r3, #12]
(uint16_t)((RegVal & USB_OTG_GRXSTSP_BCNT) >> 4));
8004802: 69bb ldr r3, [r7, #24]
8004804: 091b lsrs r3, r3, #4
8004806: b29b uxth r3, r3
(void)USB_ReadPacket(USBx, ep->xfer_buff,
8004808: f3c3 030a ubfx r3, r3, #0, #11
800480c: b29b uxth r3, r3
800480e: 461a mov r2, r3
8004810: 6a38 ldr r0, [r7, #32]
8004812: f003 ffd5 bl 80087c0 <USB_ReadPacket>
ep->xfer_buff += (RegVal & USB_OTG_GRXSTSP_BCNT) >> 4;
8004816: 697b ldr r3, [r7, #20]
8004818: 68da ldr r2, [r3, #12]
800481a: 69bb ldr r3, [r7, #24]
800481c: 091b lsrs r3, r3, #4
800481e: f3c3 030a ubfx r3, r3, #0, #11
8004822: 441a add r2, r3
8004824: 697b ldr r3, [r7, #20]
8004826: 60da str r2, [r3, #12]
ep->xfer_count += (RegVal & USB_OTG_GRXSTSP_BCNT) >> 4;
8004828: 697b ldr r3, [r7, #20]
800482a: 695a ldr r2, [r3, #20]
800482c: 69bb ldr r3, [r7, #24]
800482e: 091b lsrs r3, r3, #4
8004830: f3c3 030a ubfx r3, r3, #0, #11
8004834: 441a add r2, r3
8004836: 697b ldr r3, [r7, #20]
8004838: 615a str r2, [r3, #20]
800483a: e016 b.n 800486a <HAL_PCD_IRQHandler+0x136>
}
}
else if (((RegVal & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT)
800483c: 69bb ldr r3, [r7, #24]
800483e: 0c5b lsrs r3, r3, #17
8004840: f003 030f and.w r3, r3, #15
8004844: 2b06 cmp r3, #6
8004846: d110 bne.n 800486a <HAL_PCD_IRQHandler+0x136>
{
(void)USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U);
8004848: 687b ldr r3, [r7, #4]
800484a: f203 439c addw r3, r3, #1180 @ 0x49c
800484e: 2208 movs r2, #8
8004850: 4619 mov r1, r3
8004852: 6a38 ldr r0, [r7, #32]
8004854: f003 ffb4 bl 80087c0 <USB_ReadPacket>
ep->xfer_count += (RegVal & USB_OTG_GRXSTSP_BCNT) >> 4;
8004858: 697b ldr r3, [r7, #20]
800485a: 695a ldr r2, [r3, #20]
800485c: 69bb ldr r3, [r7, #24]
800485e: 091b lsrs r3, r3, #4
8004860: f3c3 030a ubfx r3, r3, #0, #11
8004864: 441a add r2, r3
8004866: 697b ldr r3, [r7, #20]
8004868: 615a str r2, [r3, #20]
else
{
/* ... */
}
USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
800486a: 687b ldr r3, [r7, #4]
800486c: 681b ldr r3, [r3, #0]
800486e: 699a ldr r2, [r3, #24]
8004870: 687b ldr r3, [r7, #4]
8004872: 681b ldr r3, [r3, #0]
8004874: f042 0210 orr.w r2, r2, #16
8004878: 619a str r2, [r3, #24]
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OEPINT))
800487a: 687b ldr r3, [r7, #4]
800487c: 681b ldr r3, [r3, #0]
800487e: 4618 mov r0, r3
8004880: f004 f981 bl 8008b86 <USB_ReadInterrupts>
8004884: 4603 mov r3, r0
8004886: f403 2300 and.w r3, r3, #524288 @ 0x80000
800488a: f5b3 2f00 cmp.w r3, #524288 @ 0x80000
800488e: f040 80a7 bne.w 80049e0 <HAL_PCD_IRQHandler+0x2ac>
{
epnum = 0U;
8004892: 2300 movs r3, #0
8004894: 627b str r3, [r7, #36] @ 0x24
/* Read in the device interrupt bits */
ep_intr = USB_ReadDevAllOutEpInterrupt(hpcd->Instance);
8004896: 687b ldr r3, [r7, #4]
8004898: 681b ldr r3, [r3, #0]
800489a: 4618 mov r0, r3
800489c: f004 f986 bl 8008bac <USB_ReadDevAllOutEpInterrupt>
80048a0: 62b8 str r0, [r7, #40] @ 0x28
while (ep_intr != 0U)
80048a2: e099 b.n 80049d8 <HAL_PCD_IRQHandler+0x2a4>
{
if ((ep_intr & 0x1U) != 0U)
80048a4: 6abb ldr r3, [r7, #40] @ 0x28
80048a6: f003 0301 and.w r3, r3, #1
80048aa: 2b00 cmp r3, #0
80048ac: f000 808e beq.w 80049cc <HAL_PCD_IRQHandler+0x298>
{
epint = USB_ReadDevOutEPInterrupt(hpcd->Instance, (uint8_t)epnum);
80048b0: 687b ldr r3, [r7, #4]
80048b2: 681b ldr r3, [r3, #0]
80048b4: 6a7a ldr r2, [r7, #36] @ 0x24
80048b6: b2d2 uxtb r2, r2
80048b8: 4611 mov r1, r2
80048ba: 4618 mov r0, r3
80048bc: f004 f9aa bl 8008c14 <USB_ReadDevOutEPInterrupt>
80048c0: 6138 str r0, [r7, #16]
if ((epint & USB_OTG_DOEPINT_XFRC) == USB_OTG_DOEPINT_XFRC)
80048c2: 693b ldr r3, [r7, #16]
80048c4: f003 0301 and.w r3, r3, #1
80048c8: 2b00 cmp r3, #0
80048ca: d00c beq.n 80048e6 <HAL_PCD_IRQHandler+0x1b2>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_XFRC);
80048cc: 6a7b ldr r3, [r7, #36] @ 0x24
80048ce: 015a lsls r2, r3, #5
80048d0: 69fb ldr r3, [r7, #28]
80048d2: 4413 add r3, r2
80048d4: f503 6330 add.w r3, r3, #2816 @ 0xb00
80048d8: 461a mov r2, r3
80048da: 2301 movs r3, #1
80048dc: 6093 str r3, [r2, #8]
(void)PCD_EP_OutXfrComplete_int(hpcd, epnum);
80048de: 6a79 ldr r1, [r7, #36] @ 0x24
80048e0: 6878 ldr r0, [r7, #4]
80048e2: f000 fefd bl 80056e0 <PCD_EP_OutXfrComplete_int>
}
if ((epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP)
80048e6: 693b ldr r3, [r7, #16]
80048e8: f003 0308 and.w r3, r3, #8
80048ec: 2b00 cmp r3, #0
80048ee: d00c beq.n 800490a <HAL_PCD_IRQHandler+0x1d6>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STUP);
80048f0: 6a7b ldr r3, [r7, #36] @ 0x24
80048f2: 015a lsls r2, r3, #5
80048f4: 69fb ldr r3, [r7, #28]
80048f6: 4413 add r3, r2
80048f8: f503 6330 add.w r3, r3, #2816 @ 0xb00
80048fc: 461a mov r2, r3
80048fe: 2308 movs r3, #8
8004900: 6093 str r3, [r2, #8]
/* Class B setup phase done for previous decoded setup */
(void)PCD_EP_OutSetupPacket_int(hpcd, epnum);
8004902: 6a79 ldr r1, [r7, #36] @ 0x24
8004904: 6878 ldr r0, [r7, #4]
8004906: f000 ffd3 bl 80058b0 <PCD_EP_OutSetupPacket_int>
}
if ((epint & USB_OTG_DOEPINT_OTEPDIS) == USB_OTG_DOEPINT_OTEPDIS)
800490a: 693b ldr r3, [r7, #16]
800490c: f003 0310 and.w r3, r3, #16
8004910: 2b00 cmp r3, #0
8004912: d008 beq.n 8004926 <HAL_PCD_IRQHandler+0x1f2>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPDIS);
8004914: 6a7b ldr r3, [r7, #36] @ 0x24
8004916: 015a lsls r2, r3, #5
8004918: 69fb ldr r3, [r7, #28]
800491a: 4413 add r3, r2
800491c: f503 6330 add.w r3, r3, #2816 @ 0xb00
8004920: 461a mov r2, r3
8004922: 2310 movs r3, #16
8004924: 6093 str r3, [r2, #8]
}
/* Clear OUT Endpoint disable interrupt */
if ((epint & USB_OTG_DOEPINT_EPDISD) == USB_OTG_DOEPINT_EPDISD)
8004926: 693b ldr r3, [r7, #16]
8004928: f003 0302 and.w r3, r3, #2
800492c: 2b00 cmp r3, #0
800492e: d030 beq.n 8004992 <HAL_PCD_IRQHandler+0x25e>
{
if ((USBx->GINTSTS & USB_OTG_GINTSTS_BOUTNAKEFF) == USB_OTG_GINTSTS_BOUTNAKEFF)
8004930: 6a3b ldr r3, [r7, #32]
8004932: 695b ldr r3, [r3, #20]
8004934: f003 0380 and.w r3, r3, #128 @ 0x80
8004938: 2b80 cmp r3, #128 @ 0x80
800493a: d109 bne.n 8004950 <HAL_PCD_IRQHandler+0x21c>
{
USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK;
800493c: 69fb ldr r3, [r7, #28]
800493e: f503 6300 add.w r3, r3, #2048 @ 0x800
8004942: 685b ldr r3, [r3, #4]
8004944: 69fa ldr r2, [r7, #28]
8004946: f502 6200 add.w r2, r2, #2048 @ 0x800
800494a: f443 6380 orr.w r3, r3, #1024 @ 0x400
800494e: 6053 str r3, [r2, #4]
}
ep = &hpcd->OUT_ep[epnum];
8004950: 6a7a ldr r2, [r7, #36] @ 0x24
8004952: 4613 mov r3, r2
8004954: 00db lsls r3, r3, #3
8004956: 4413 add r3, r2
8004958: 009b lsls r3, r3, #2
800495a: f503 7314 add.w r3, r3, #592 @ 0x250
800495e: 687a ldr r2, [r7, #4]
8004960: 4413 add r3, r2
8004962: 3304 adds r3, #4
8004964: 617b str r3, [r7, #20]
if (ep->is_iso_incomplete == 1U)
8004966: 697b ldr r3, [r7, #20]
8004968: 78db ldrb r3, [r3, #3]
800496a: 2b01 cmp r3, #1
800496c: d108 bne.n 8004980 <HAL_PCD_IRQHandler+0x24c>
{
ep->is_iso_incomplete = 0U;
800496e: 697b ldr r3, [r7, #20]
8004970: 2200 movs r2, #0
8004972: 70da strb r2, [r3, #3]
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ISOOUTIncompleteCallback(hpcd, (uint8_t)epnum);
#else
HAL_PCD_ISOOUTIncompleteCallback(hpcd, (uint8_t)epnum);
8004974: 6a7b ldr r3, [r7, #36] @ 0x24
8004976: b2db uxtb r3, r3
8004978: 4619 mov r1, r3
800497a: 6878 ldr r0, [r7, #4]
800497c: f00e f8a0 bl 8012ac0 <HAL_PCD_ISOOUTIncompleteCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_EPDISD);
8004980: 6a7b ldr r3, [r7, #36] @ 0x24
8004982: 015a lsls r2, r3, #5
8004984: 69fb ldr r3, [r7, #28]
8004986: 4413 add r3, r2
8004988: f503 6330 add.w r3, r3, #2816 @ 0xb00
800498c: 461a mov r2, r3
800498e: 2302 movs r3, #2
8004990: 6093 str r3, [r2, #8]
}
/* Clear Status Phase Received interrupt */
if ((epint & USB_OTG_DOEPINT_OTEPSPR) == USB_OTG_DOEPINT_OTEPSPR)
8004992: 693b ldr r3, [r7, #16]
8004994: f003 0320 and.w r3, r3, #32
8004998: 2b00 cmp r3, #0
800499a: d008 beq.n 80049ae <HAL_PCD_IRQHandler+0x27a>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPSPR);
800499c: 6a7b ldr r3, [r7, #36] @ 0x24
800499e: 015a lsls r2, r3, #5
80049a0: 69fb ldr r3, [r7, #28]
80049a2: 4413 add r3, r2
80049a4: f503 6330 add.w r3, r3, #2816 @ 0xb00
80049a8: 461a mov r2, r3
80049aa: 2320 movs r3, #32
80049ac: 6093 str r3, [r2, #8]
}
/* Clear OUT NAK interrupt */
if ((epint & USB_OTG_DOEPINT_NAK) == USB_OTG_DOEPINT_NAK)
80049ae: 693b ldr r3, [r7, #16]
80049b0: f403 5300 and.w r3, r3, #8192 @ 0x2000
80049b4: 2b00 cmp r3, #0
80049b6: d009 beq.n 80049cc <HAL_PCD_IRQHandler+0x298>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_NAK);
80049b8: 6a7b ldr r3, [r7, #36] @ 0x24
80049ba: 015a lsls r2, r3, #5
80049bc: 69fb ldr r3, [r7, #28]
80049be: 4413 add r3, r2
80049c0: f503 6330 add.w r3, r3, #2816 @ 0xb00
80049c4: 461a mov r2, r3
80049c6: f44f 5300 mov.w r3, #8192 @ 0x2000
80049ca: 6093 str r3, [r2, #8]
}
}
epnum++;
80049cc: 6a7b ldr r3, [r7, #36] @ 0x24
80049ce: 3301 adds r3, #1
80049d0: 627b str r3, [r7, #36] @ 0x24
ep_intr >>= 1U;
80049d2: 6abb ldr r3, [r7, #40] @ 0x28
80049d4: 085b lsrs r3, r3, #1
80049d6: 62bb str r3, [r7, #40] @ 0x28
while (ep_intr != 0U)
80049d8: 6abb ldr r3, [r7, #40] @ 0x28
80049da: 2b00 cmp r3, #0
80049dc: f47f af62 bne.w 80048a4 <HAL_PCD_IRQHandler+0x170>
}
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_IEPINT))
80049e0: 687b ldr r3, [r7, #4]
80049e2: 681b ldr r3, [r3, #0]
80049e4: 4618 mov r0, r3
80049e6: f004 f8ce bl 8008b86 <USB_ReadInterrupts>
80049ea: 4603 mov r3, r0
80049ec: f403 2380 and.w r3, r3, #262144 @ 0x40000
80049f0: f5b3 2f80 cmp.w r3, #262144 @ 0x40000
80049f4: f040 80db bne.w 8004bae <HAL_PCD_IRQHandler+0x47a>
{
/* Read in the device interrupt bits */
ep_intr = USB_ReadDevAllInEpInterrupt(hpcd->Instance);
80049f8: 687b ldr r3, [r7, #4]
80049fa: 681b ldr r3, [r3, #0]
80049fc: 4618 mov r0, r3
80049fe: f004 f8ef bl 8008be0 <USB_ReadDevAllInEpInterrupt>
8004a02: 62b8 str r0, [r7, #40] @ 0x28
epnum = 0U;
8004a04: 2300 movs r3, #0
8004a06: 627b str r3, [r7, #36] @ 0x24
while (ep_intr != 0U)
8004a08: e0cd b.n 8004ba6 <HAL_PCD_IRQHandler+0x472>
{
if ((ep_intr & 0x1U) != 0U) /* In ITR */
8004a0a: 6abb ldr r3, [r7, #40] @ 0x28
8004a0c: f003 0301 and.w r3, r3, #1
8004a10: 2b00 cmp r3, #0
8004a12: f000 80c2 beq.w 8004b9a <HAL_PCD_IRQHandler+0x466>
{
epint = USB_ReadDevInEPInterrupt(hpcd->Instance, (uint8_t)epnum);
8004a16: 687b ldr r3, [r7, #4]
8004a18: 681b ldr r3, [r3, #0]
8004a1a: 6a7a ldr r2, [r7, #36] @ 0x24
8004a1c: b2d2 uxtb r2, r2
8004a1e: 4611 mov r1, r2
8004a20: 4618 mov r0, r3
8004a22: f004 f915 bl 8008c50 <USB_ReadDevInEPInterrupt>
8004a26: 6138 str r0, [r7, #16]
if ((epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC)
8004a28: 693b ldr r3, [r7, #16]
8004a2a: f003 0301 and.w r3, r3, #1
8004a2e: 2b00 cmp r3, #0
8004a30: d057 beq.n 8004ae2 <HAL_PCD_IRQHandler+0x3ae>
{
fifoemptymsk = (uint32_t)(0x1UL << (epnum & EP_ADDR_MSK));
8004a32: 6a7b ldr r3, [r7, #36] @ 0x24
8004a34: f003 030f and.w r3, r3, #15
8004a38: 2201 movs r2, #1
8004a3a: fa02 f303 lsl.w r3, r2, r3
8004a3e: 60fb str r3, [r7, #12]
USBx_DEVICE->DIEPEMPMSK &= ~fifoemptymsk;
8004a40: 69fb ldr r3, [r7, #28]
8004a42: f503 6300 add.w r3, r3, #2048 @ 0x800
8004a46: 6b5a ldr r2, [r3, #52] @ 0x34
8004a48: 68fb ldr r3, [r7, #12]
8004a4a: 43db mvns r3, r3
8004a4c: 69f9 ldr r1, [r7, #28]
8004a4e: f501 6100 add.w r1, r1, #2048 @ 0x800
8004a52: 4013 ands r3, r2
8004a54: 634b str r3, [r1, #52] @ 0x34
CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_XFRC);
8004a56: 6a7b ldr r3, [r7, #36] @ 0x24
8004a58: 015a lsls r2, r3, #5
8004a5a: 69fb ldr r3, [r7, #28]
8004a5c: 4413 add r3, r2
8004a5e: f503 6310 add.w r3, r3, #2304 @ 0x900
8004a62: 461a mov r2, r3
8004a64: 2301 movs r3, #1
8004a66: 6093 str r3, [r2, #8]
if (hpcd->Init.dma_enable == 1U)
8004a68: 687b ldr r3, [r7, #4]
8004a6a: 799b ldrb r3, [r3, #6]
8004a6c: 2b01 cmp r3, #1
8004a6e: d132 bne.n 8004ad6 <HAL_PCD_IRQHandler+0x3a2>
{
hpcd->IN_ep[epnum].xfer_buff += hpcd->IN_ep[epnum].maxpacket;
8004a70: 6879 ldr r1, [r7, #4]
8004a72: 6a7a ldr r2, [r7, #36] @ 0x24
8004a74: 4613 mov r3, r2
8004a76: 00db lsls r3, r3, #3
8004a78: 4413 add r3, r2
8004a7a: 009b lsls r3, r3, #2
8004a7c: 440b add r3, r1
8004a7e: 3320 adds r3, #32
8004a80: 6819 ldr r1, [r3, #0]
8004a82: 6878 ldr r0, [r7, #4]
8004a84: 6a7a ldr r2, [r7, #36] @ 0x24
8004a86: 4613 mov r3, r2
8004a88: 00db lsls r3, r3, #3
8004a8a: 4413 add r3, r2
8004a8c: 009b lsls r3, r3, #2
8004a8e: 4403 add r3, r0
8004a90: 331c adds r3, #28
8004a92: 681b ldr r3, [r3, #0]
8004a94: 4419 add r1, r3
8004a96: 6878 ldr r0, [r7, #4]
8004a98: 6a7a ldr r2, [r7, #36] @ 0x24
8004a9a: 4613 mov r3, r2
8004a9c: 00db lsls r3, r3, #3
8004a9e: 4413 add r3, r2
8004aa0: 009b lsls r3, r3, #2
8004aa2: 4403 add r3, r0
8004aa4: 3320 adds r3, #32
8004aa6: 6019 str r1, [r3, #0]
/* this is ZLP, so prepare EP0 for next setup */
if ((epnum == 0U) && (hpcd->IN_ep[epnum].xfer_len == 0U))
8004aa8: 6a7b ldr r3, [r7, #36] @ 0x24
8004aaa: 2b00 cmp r3, #0
8004aac: d113 bne.n 8004ad6 <HAL_PCD_IRQHandler+0x3a2>
8004aae: 6879 ldr r1, [r7, #4]
8004ab0: 6a7a ldr r2, [r7, #36] @ 0x24
8004ab2: 4613 mov r3, r2
8004ab4: 00db lsls r3, r3, #3
8004ab6: 4413 add r3, r2
8004ab8: 009b lsls r3, r3, #2
8004aba: 440b add r3, r1
8004abc: 3324 adds r3, #36 @ 0x24
8004abe: 681b ldr r3, [r3, #0]
8004ac0: 2b00 cmp r3, #0
8004ac2: d108 bne.n 8004ad6 <HAL_PCD_IRQHandler+0x3a2>
{
/* prepare to rx more setup packets */
(void)USB_EP0_OutStart(hpcd->Instance, 1U, (uint8_t *)hpcd->Setup);
8004ac4: 687b ldr r3, [r7, #4]
8004ac6: 6818 ldr r0, [r3, #0]
8004ac8: 687b ldr r3, [r7, #4]
8004aca: f203 439c addw r3, r3, #1180 @ 0x49c
8004ace: 461a mov r2, r3
8004ad0: 2101 movs r1, #1
8004ad2: f004 f91d bl 8008d10 <USB_EP0_OutStart>
}
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, (uint8_t)epnum);
#else
HAL_PCD_DataInStageCallback(hpcd, (uint8_t)epnum);
8004ad6: 6a7b ldr r3, [r7, #36] @ 0x24
8004ad8: b2db uxtb r3, r3
8004ada: 4619 mov r1, r3
8004adc: 6878 ldr r0, [r7, #4]
8004ade: f00d ff74 bl 80129ca <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
if ((epint & USB_OTG_DIEPINT_TOC) == USB_OTG_DIEPINT_TOC)
8004ae2: 693b ldr r3, [r7, #16]
8004ae4: f003 0308 and.w r3, r3, #8
8004ae8: 2b00 cmp r3, #0
8004aea: d008 beq.n 8004afe <HAL_PCD_IRQHandler+0x3ca>
{
CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_TOC);
8004aec: 6a7b ldr r3, [r7, #36] @ 0x24
8004aee: 015a lsls r2, r3, #5
8004af0: 69fb ldr r3, [r7, #28]
8004af2: 4413 add r3, r2
8004af4: f503 6310 add.w r3, r3, #2304 @ 0x900
8004af8: 461a mov r2, r3
8004afa: 2308 movs r3, #8
8004afc: 6093 str r3, [r2, #8]
}
if ((epint & USB_OTG_DIEPINT_ITTXFE) == USB_OTG_DIEPINT_ITTXFE)
8004afe: 693b ldr r3, [r7, #16]
8004b00: f003 0310 and.w r3, r3, #16
8004b04: 2b00 cmp r3, #0
8004b06: d008 beq.n 8004b1a <HAL_PCD_IRQHandler+0x3e6>
{
CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_ITTXFE);
8004b08: 6a7b ldr r3, [r7, #36] @ 0x24
8004b0a: 015a lsls r2, r3, #5
8004b0c: 69fb ldr r3, [r7, #28]
8004b0e: 4413 add r3, r2
8004b10: f503 6310 add.w r3, r3, #2304 @ 0x900
8004b14: 461a mov r2, r3
8004b16: 2310 movs r3, #16
8004b18: 6093 str r3, [r2, #8]
}
if ((epint & USB_OTG_DIEPINT_INEPNE) == USB_OTG_DIEPINT_INEPNE)
8004b1a: 693b ldr r3, [r7, #16]
8004b1c: f003 0340 and.w r3, r3, #64 @ 0x40
8004b20: 2b00 cmp r3, #0
8004b22: d008 beq.n 8004b36 <HAL_PCD_IRQHandler+0x402>
{
CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_INEPNE);
8004b24: 6a7b ldr r3, [r7, #36] @ 0x24
8004b26: 015a lsls r2, r3, #5
8004b28: 69fb ldr r3, [r7, #28]
8004b2a: 4413 add r3, r2
8004b2c: f503 6310 add.w r3, r3, #2304 @ 0x900
8004b30: 461a mov r2, r3
8004b32: 2340 movs r3, #64 @ 0x40
8004b34: 6093 str r3, [r2, #8]
}
if ((epint & USB_OTG_DIEPINT_EPDISD) == USB_OTG_DIEPINT_EPDISD)
8004b36: 693b ldr r3, [r7, #16]
8004b38: f003 0302 and.w r3, r3, #2
8004b3c: 2b00 cmp r3, #0
8004b3e: d023 beq.n 8004b88 <HAL_PCD_IRQHandler+0x454>
{
(void)USB_FlushTxFifo(USBx, epnum);
8004b40: 6a79 ldr r1, [r7, #36] @ 0x24
8004b42: 6a38 ldr r0, [r7, #32]
8004b44: f003 f8b4 bl 8007cb0 <USB_FlushTxFifo>
ep = &hpcd->IN_ep[epnum];
8004b48: 6a7a ldr r2, [r7, #36] @ 0x24
8004b4a: 4613 mov r3, r2
8004b4c: 00db lsls r3, r3, #3
8004b4e: 4413 add r3, r2
8004b50: 009b lsls r3, r3, #2
8004b52: 3310 adds r3, #16
8004b54: 687a ldr r2, [r7, #4]
8004b56: 4413 add r3, r2
8004b58: 3304 adds r3, #4
8004b5a: 617b str r3, [r7, #20]
if (ep->is_iso_incomplete == 1U)
8004b5c: 697b ldr r3, [r7, #20]
8004b5e: 78db ldrb r3, [r3, #3]
8004b60: 2b01 cmp r3, #1
8004b62: d108 bne.n 8004b76 <HAL_PCD_IRQHandler+0x442>
{
ep->is_iso_incomplete = 0U;
8004b64: 697b ldr r3, [r7, #20]
8004b66: 2200 movs r2, #0
8004b68: 70da strb r2, [r3, #3]
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ISOINIncompleteCallback(hpcd, (uint8_t)epnum);
#else
HAL_PCD_ISOINIncompleteCallback(hpcd, (uint8_t)epnum);
8004b6a: 6a7b ldr r3, [r7, #36] @ 0x24
8004b6c: b2db uxtb r3, r3
8004b6e: 4619 mov r1, r3
8004b70: 6878 ldr r0, [r7, #4]
8004b72: f00d ffb7 bl 8012ae4 <HAL_PCD_ISOINIncompleteCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_EPDISD);
8004b76: 6a7b ldr r3, [r7, #36] @ 0x24
8004b78: 015a lsls r2, r3, #5
8004b7a: 69fb ldr r3, [r7, #28]
8004b7c: 4413 add r3, r2
8004b7e: f503 6310 add.w r3, r3, #2304 @ 0x900
8004b82: 461a mov r2, r3
8004b84: 2302 movs r3, #2
8004b86: 6093 str r3, [r2, #8]
}
if ((epint & USB_OTG_DIEPINT_TXFE) == USB_OTG_DIEPINT_TXFE)
8004b88: 693b ldr r3, [r7, #16]
8004b8a: f003 0380 and.w r3, r3, #128 @ 0x80
8004b8e: 2b00 cmp r3, #0
8004b90: d003 beq.n 8004b9a <HAL_PCD_IRQHandler+0x466>
{
(void)PCD_WriteEmptyTxFifo(hpcd, epnum);
8004b92: 6a79 ldr r1, [r7, #36] @ 0x24
8004b94: 6878 ldr r0, [r7, #4]
8004b96: f000 fd17 bl 80055c8 <PCD_WriteEmptyTxFifo>
}
}
epnum++;
8004b9a: 6a7b ldr r3, [r7, #36] @ 0x24
8004b9c: 3301 adds r3, #1
8004b9e: 627b str r3, [r7, #36] @ 0x24
ep_intr >>= 1U;
8004ba0: 6abb ldr r3, [r7, #40] @ 0x28
8004ba2: 085b lsrs r3, r3, #1
8004ba4: 62bb str r3, [r7, #40] @ 0x28
while (ep_intr != 0U)
8004ba6: 6abb ldr r3, [r7, #40] @ 0x28
8004ba8: 2b00 cmp r3, #0
8004baa: f47f af2e bne.w 8004a0a <HAL_PCD_IRQHandler+0x2d6>
}
}
/* Handle Resume Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_WKUINT))
8004bae: 687b ldr r3, [r7, #4]
8004bb0: 681b ldr r3, [r3, #0]
8004bb2: 4618 mov r0, r3
8004bb4: f003 ffe7 bl 8008b86 <USB_ReadInterrupts>
8004bb8: 4603 mov r3, r0
8004bba: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8004bbe: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
8004bc2: d122 bne.n 8004c0a <HAL_PCD_IRQHandler+0x4d6>
{
/* Clear the Remote Wake-up Signaling */
USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_RWUSIG;
8004bc4: 69fb ldr r3, [r7, #28]
8004bc6: f503 6300 add.w r3, r3, #2048 @ 0x800
8004bca: 685b ldr r3, [r3, #4]
8004bcc: 69fa ldr r2, [r7, #28]
8004bce: f502 6200 add.w r2, r2, #2048 @ 0x800
8004bd2: f023 0301 bic.w r3, r3, #1
8004bd6: 6053 str r3, [r2, #4]
if (hpcd->LPM_State == LPM_L1)
8004bd8: 687b ldr r3, [r7, #4]
8004bda: f893 34cc ldrb.w r3, [r3, #1228] @ 0x4cc
8004bde: 2b01 cmp r3, #1
8004be0: d108 bne.n 8004bf4 <HAL_PCD_IRQHandler+0x4c0>
{
hpcd->LPM_State = LPM_L0;
8004be2: 687b ldr r3, [r7, #4]
8004be4: 2200 movs r2, #0
8004be6: f883 24cc strb.w r2, [r3, #1228] @ 0x4cc
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->LPMCallback(hpcd, PCD_LPM_L0_ACTIVE);
#else
HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L0_ACTIVE);
8004bea: 2100 movs r1, #0
8004bec: 6878 ldr r0, [r7, #4]
8004bee: f000 ff21 bl 8005a34 <HAL_PCDEx_LPM_Callback>
8004bf2: e002 b.n 8004bfa <HAL_PCD_IRQHandler+0x4c6>
else
{
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
8004bf4: 6878 ldr r0, [r7, #4]
8004bf6: f00d ff55 bl 8012aa4 <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_WKUINT);
8004bfa: 687b ldr r3, [r7, #4]
8004bfc: 681b ldr r3, [r3, #0]
8004bfe: 695a ldr r2, [r3, #20]
8004c00: 687b ldr r3, [r7, #4]
8004c02: 681b ldr r3, [r3, #0]
8004c04: f002 4200 and.w r2, r2, #2147483648 @ 0x80000000
8004c08: 615a str r2, [r3, #20]
}
/* Handle Suspend Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP))
8004c0a: 687b ldr r3, [r7, #4]
8004c0c: 681b ldr r3, [r3, #0]
8004c0e: 4618 mov r0, r3
8004c10: f003 ffb9 bl 8008b86 <USB_ReadInterrupts>
8004c14: 4603 mov r3, r0
8004c16: f403 6300 and.w r3, r3, #2048 @ 0x800
8004c1a: f5b3 6f00 cmp.w r3, #2048 @ 0x800
8004c1e: d112 bne.n 8004c46 <HAL_PCD_IRQHandler+0x512>
{
if ((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS)
8004c20: 69fb ldr r3, [r7, #28]
8004c22: f503 6300 add.w r3, r3, #2048 @ 0x800
8004c26: 689b ldr r3, [r3, #8]
8004c28: f003 0301 and.w r3, r3, #1
8004c2c: 2b01 cmp r3, #1
8004c2e: d102 bne.n 8004c36 <HAL_PCD_IRQHandler+0x502>
{
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
8004c30: 6878 ldr r0, [r7, #4]
8004c32: f00d ff11 bl 8012a58 <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP);
8004c36: 687b ldr r3, [r7, #4]
8004c38: 681b ldr r3, [r3, #0]
8004c3a: 695a ldr r2, [r3, #20]
8004c3c: 687b ldr r3, [r7, #4]
8004c3e: 681b ldr r3, [r3, #0]
8004c40: f402 6200 and.w r2, r2, #2048 @ 0x800
8004c44: 615a str r2, [r3, #20]
}
#if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) \
|| defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) \
|| defined(STM32F423xx)
/* Handle LPM Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_LPMINT))
8004c46: 687b ldr r3, [r7, #4]
8004c48: 681b ldr r3, [r3, #0]
8004c4a: 4618 mov r0, r3
8004c4c: f003 ff9b bl 8008b86 <USB_ReadInterrupts>
8004c50: 4603 mov r3, r0
8004c52: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
8004c56: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
8004c5a: d121 bne.n 8004ca0 <HAL_PCD_IRQHandler+0x56c>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_LPMINT);
8004c5c: 687b ldr r3, [r7, #4]
8004c5e: 681b ldr r3, [r3, #0]
8004c60: 695a ldr r2, [r3, #20]
8004c62: 687b ldr r3, [r7, #4]
8004c64: 681b ldr r3, [r3, #0]
8004c66: f002 6200 and.w r2, r2, #134217728 @ 0x8000000
8004c6a: 615a str r2, [r3, #20]
if (hpcd->LPM_State == LPM_L0)
8004c6c: 687b ldr r3, [r7, #4]
8004c6e: f893 34cc ldrb.w r3, [r3, #1228] @ 0x4cc
8004c72: 2b00 cmp r3, #0
8004c74: d111 bne.n 8004c9a <HAL_PCD_IRQHandler+0x566>
{
hpcd->LPM_State = LPM_L1;
8004c76: 687b ldr r3, [r7, #4]
8004c78: 2201 movs r2, #1
8004c7a: f883 24cc strb.w r2, [r3, #1228] @ 0x4cc
hpcd->BESL = (hpcd->Instance->GLPMCFG & USB_OTG_GLPMCFG_BESL) >> 2U;
8004c7e: 687b ldr r3, [r7, #4]
8004c80: 681b ldr r3, [r3, #0]
8004c82: 6d5b ldr r3, [r3, #84] @ 0x54
8004c84: 089b lsrs r3, r3, #2
8004c86: f003 020f and.w r2, r3, #15
8004c8a: 687b ldr r3, [r7, #4]
8004c8c: f8c3 24d0 str.w r2, [r3, #1232] @ 0x4d0
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->LPMCallback(hpcd, PCD_LPM_L1_ACTIVE);
#else
HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L1_ACTIVE);
8004c90: 2101 movs r1, #1
8004c92: 6878 ldr r0, [r7, #4]
8004c94: f000 fece bl 8005a34 <HAL_PCDEx_LPM_Callback>
8004c98: e002 b.n 8004ca0 <HAL_PCD_IRQHandler+0x56c>
else
{
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
8004c9a: 6878 ldr r0, [r7, #4]
8004c9c: f00d fedc bl 8012a58 <HAL_PCD_SuspendCallback>
}
#endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||
defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||
defined(STM32F423xx) */
/* Handle Reset Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBRST))
8004ca0: 687b ldr r3, [r7, #4]
8004ca2: 681b ldr r3, [r3, #0]
8004ca4: 4618 mov r0, r3
8004ca6: f003 ff6e bl 8008b86 <USB_ReadInterrupts>
8004caa: 4603 mov r3, r0
8004cac: f403 5380 and.w r3, r3, #4096 @ 0x1000
8004cb0: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8004cb4: f040 80b7 bne.w 8004e26 <HAL_PCD_IRQHandler+0x6f2>
{
USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_RWUSIG;
8004cb8: 69fb ldr r3, [r7, #28]
8004cba: f503 6300 add.w r3, r3, #2048 @ 0x800
8004cbe: 685b ldr r3, [r3, #4]
8004cc0: 69fa ldr r2, [r7, #28]
8004cc2: f502 6200 add.w r2, r2, #2048 @ 0x800
8004cc6: f023 0301 bic.w r3, r3, #1
8004cca: 6053 str r3, [r2, #4]
(void)USB_FlushTxFifo(hpcd->Instance, 0x10U);
8004ccc: 687b ldr r3, [r7, #4]
8004cce: 681b ldr r3, [r3, #0]
8004cd0: 2110 movs r1, #16
8004cd2: 4618 mov r0, r3
8004cd4: f002 ffec bl 8007cb0 <USB_FlushTxFifo>
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8004cd8: 2300 movs r3, #0
8004cda: 62fb str r3, [r7, #44] @ 0x2c
8004cdc: e046 b.n 8004d6c <HAL_PCD_IRQHandler+0x638>
{
USBx_INEP(i)->DIEPINT = 0xFB7FU;
8004cde: 6afb ldr r3, [r7, #44] @ 0x2c
8004ce0: 015a lsls r2, r3, #5
8004ce2: 69fb ldr r3, [r7, #28]
8004ce4: 4413 add r3, r2
8004ce6: f503 6310 add.w r3, r3, #2304 @ 0x900
8004cea: 461a mov r2, r3
8004cec: f64f 337f movw r3, #64383 @ 0xfb7f
8004cf0: 6093 str r3, [r2, #8]
USBx_INEP(i)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
8004cf2: 6afb ldr r3, [r7, #44] @ 0x2c
8004cf4: 015a lsls r2, r3, #5
8004cf6: 69fb ldr r3, [r7, #28]
8004cf8: 4413 add r3, r2
8004cfa: f503 6310 add.w r3, r3, #2304 @ 0x900
8004cfe: 681b ldr r3, [r3, #0]
8004d00: 6afa ldr r2, [r7, #44] @ 0x2c
8004d02: 0151 lsls r1, r2, #5
8004d04: 69fa ldr r2, [r7, #28]
8004d06: 440a add r2, r1
8004d08: f502 6210 add.w r2, r2, #2304 @ 0x900
8004d0c: f423 1300 bic.w r3, r3, #2097152 @ 0x200000
8004d10: 6013 str r3, [r2, #0]
USBx_OUTEP(i)->DOEPINT = 0xFB7FU;
8004d12: 6afb ldr r3, [r7, #44] @ 0x2c
8004d14: 015a lsls r2, r3, #5
8004d16: 69fb ldr r3, [r7, #28]
8004d18: 4413 add r3, r2
8004d1a: f503 6330 add.w r3, r3, #2816 @ 0xb00
8004d1e: 461a mov r2, r3
8004d20: f64f 337f movw r3, #64383 @ 0xfb7f
8004d24: 6093 str r3, [r2, #8]
USBx_OUTEP(i)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL;
8004d26: 6afb ldr r3, [r7, #44] @ 0x2c
8004d28: 015a lsls r2, r3, #5
8004d2a: 69fb ldr r3, [r7, #28]
8004d2c: 4413 add r3, r2
8004d2e: f503 6330 add.w r3, r3, #2816 @ 0xb00
8004d32: 681b ldr r3, [r3, #0]
8004d34: 6afa ldr r2, [r7, #44] @ 0x2c
8004d36: 0151 lsls r1, r2, #5
8004d38: 69fa ldr r2, [r7, #28]
8004d3a: 440a add r2, r1
8004d3c: f502 6230 add.w r2, r2, #2816 @ 0xb00
8004d40: f423 1300 bic.w r3, r3, #2097152 @ 0x200000
8004d44: 6013 str r3, [r2, #0]
USBx_OUTEP(i)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK;
8004d46: 6afb ldr r3, [r7, #44] @ 0x2c
8004d48: 015a lsls r2, r3, #5
8004d4a: 69fb ldr r3, [r7, #28]
8004d4c: 4413 add r3, r2
8004d4e: f503 6330 add.w r3, r3, #2816 @ 0xb00
8004d52: 681b ldr r3, [r3, #0]
8004d54: 6afa ldr r2, [r7, #44] @ 0x2c
8004d56: 0151 lsls r1, r2, #5
8004d58: 69fa ldr r2, [r7, #28]
8004d5a: 440a add r2, r1
8004d5c: f502 6230 add.w r2, r2, #2816 @ 0xb00
8004d60: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000
8004d64: 6013 str r3, [r2, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8004d66: 6afb ldr r3, [r7, #44] @ 0x2c
8004d68: 3301 adds r3, #1
8004d6a: 62fb str r3, [r7, #44] @ 0x2c
8004d6c: 687b ldr r3, [r7, #4]
8004d6e: 791b ldrb r3, [r3, #4]
8004d70: 461a mov r2, r3
8004d72: 6afb ldr r3, [r7, #44] @ 0x2c
8004d74: 4293 cmp r3, r2
8004d76: d3b2 bcc.n 8004cde <HAL_PCD_IRQHandler+0x5aa>
}
USBx_DEVICE->DAINTMSK |= 0x10001U;
8004d78: 69fb ldr r3, [r7, #28]
8004d7a: f503 6300 add.w r3, r3, #2048 @ 0x800
8004d7e: 69db ldr r3, [r3, #28]
8004d80: 69fa ldr r2, [r7, #28]
8004d82: f502 6200 add.w r2, r2, #2048 @ 0x800
8004d86: f043 1301 orr.w r3, r3, #65537 @ 0x10001
8004d8a: 61d3 str r3, [r2, #28]
if (hpcd->Init.use_dedicated_ep1 != 0U)
8004d8c: 687b ldr r3, [r7, #4]
8004d8e: 7bdb ldrb r3, [r3, #15]
8004d90: 2b00 cmp r3, #0
8004d92: d016 beq.n 8004dc2 <HAL_PCD_IRQHandler+0x68e>
{
USBx_DEVICE->DOUTEP1MSK |= USB_OTG_DOEPMSK_STUPM |
8004d94: 69fb ldr r3, [r7, #28]
8004d96: f503 6300 add.w r3, r3, #2048 @ 0x800
8004d9a: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
8004d9e: 69fa ldr r2, [r7, #28]
8004da0: f502 6200 add.w r2, r2, #2048 @ 0x800
8004da4: f043 030b orr.w r3, r3, #11
8004da8: f8c2 3084 str.w r3, [r2, #132] @ 0x84
USB_OTG_DOEPMSK_XFRCM |
USB_OTG_DOEPMSK_EPDM;
USBx_DEVICE->DINEP1MSK |= USB_OTG_DIEPMSK_TOM |
8004dac: 69fb ldr r3, [r7, #28]
8004dae: f503 6300 add.w r3, r3, #2048 @ 0x800
8004db2: 6c5b ldr r3, [r3, #68] @ 0x44
8004db4: 69fa ldr r2, [r7, #28]
8004db6: f502 6200 add.w r2, r2, #2048 @ 0x800
8004dba: f043 030b orr.w r3, r3, #11
8004dbe: 6453 str r3, [r2, #68] @ 0x44
8004dc0: e015 b.n 8004dee <HAL_PCD_IRQHandler+0x6ba>
USB_OTG_DIEPMSK_XFRCM |
USB_OTG_DIEPMSK_EPDM;
}
else
{
USBx_DEVICE->DOEPMSK |= USB_OTG_DOEPMSK_STUPM |
8004dc2: 69fb ldr r3, [r7, #28]
8004dc4: f503 6300 add.w r3, r3, #2048 @ 0x800
8004dc8: 695b ldr r3, [r3, #20]
8004dca: 69fa ldr r2, [r7, #28]
8004dcc: f502 6200 add.w r2, r2, #2048 @ 0x800
8004dd0: f443 5300 orr.w r3, r3, #8192 @ 0x2000
8004dd4: f043 032b orr.w r3, r3, #43 @ 0x2b
8004dd8: 6153 str r3, [r2, #20]
USB_OTG_DOEPMSK_XFRCM |
USB_OTG_DOEPMSK_EPDM |
USB_OTG_DOEPMSK_OTEPSPRM |
USB_OTG_DOEPMSK_NAKM;
USBx_DEVICE->DIEPMSK |= USB_OTG_DIEPMSK_TOM |
8004dda: 69fb ldr r3, [r7, #28]
8004ddc: f503 6300 add.w r3, r3, #2048 @ 0x800
8004de0: 691b ldr r3, [r3, #16]
8004de2: 69fa ldr r2, [r7, #28]
8004de4: f502 6200 add.w r2, r2, #2048 @ 0x800
8004de8: f043 030b orr.w r3, r3, #11
8004dec: 6113 str r3, [r2, #16]
USB_OTG_DIEPMSK_XFRCM |
USB_OTG_DIEPMSK_EPDM;
}
/* Set Default Address to 0 */
USBx_DEVICE->DCFG &= ~USB_OTG_DCFG_DAD;
8004dee: 69fb ldr r3, [r7, #28]
8004df0: f503 6300 add.w r3, r3, #2048 @ 0x800
8004df4: 681b ldr r3, [r3, #0]
8004df6: 69fa ldr r2, [r7, #28]
8004df8: f502 6200 add.w r2, r2, #2048 @ 0x800
8004dfc: f423 63fe bic.w r3, r3, #2032 @ 0x7f0
8004e00: 6013 str r3, [r2, #0]
/* setup EP0 to receive SETUP packets */
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t)hpcd->Init.dma_enable,
8004e02: 687b ldr r3, [r7, #4]
8004e04: 6818 ldr r0, [r3, #0]
8004e06: 687b ldr r3, [r7, #4]
8004e08: 7999 ldrb r1, [r3, #6]
(uint8_t *)hpcd->Setup);
8004e0a: 687b ldr r3, [r7, #4]
8004e0c: f203 439c addw r3, r3, #1180 @ 0x49c
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t)hpcd->Init.dma_enable,
8004e10: 461a mov r2, r3
8004e12: f003 ff7d bl 8008d10 <USB_EP0_OutStart>
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_USBRST);
8004e16: 687b ldr r3, [r7, #4]
8004e18: 681b ldr r3, [r3, #0]
8004e1a: 695a ldr r2, [r3, #20]
8004e1c: 687b ldr r3, [r7, #4]
8004e1e: 681b ldr r3, [r3, #0]
8004e20: f402 5280 and.w r2, r2, #4096 @ 0x1000
8004e24: 615a str r2, [r3, #20]
}
/* Handle Enumeration done Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_ENUMDNE))
8004e26: 687b ldr r3, [r7, #4]
8004e28: 681b ldr r3, [r3, #0]
8004e2a: 4618 mov r0, r3
8004e2c: f003 feab bl 8008b86 <USB_ReadInterrupts>
8004e30: 4603 mov r3, r0
8004e32: f403 5300 and.w r3, r3, #8192 @ 0x2000
8004e36: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8004e3a: d123 bne.n 8004e84 <HAL_PCD_IRQHandler+0x750>
{
(void)USB_ActivateSetup(hpcd->Instance);
8004e3c: 687b ldr r3, [r7, #4]
8004e3e: 681b ldr r3, [r3, #0]
8004e40: 4618 mov r0, r3
8004e42: f003 ff41 bl 8008cc8 <USB_ActivateSetup>
hpcd->Init.speed = USB_GetDevSpeed(hpcd->Instance);
8004e46: 687b ldr r3, [r7, #4]
8004e48: 681b ldr r3, [r3, #0]
8004e4a: 4618 mov r0, r3
8004e4c: f002 ffa9 bl 8007da2 <USB_GetDevSpeed>
8004e50: 4603 mov r3, r0
8004e52: 461a mov r2, r3
8004e54: 687b ldr r3, [r7, #4]
8004e56: 71da strb r2, [r3, #7]
/* Set USB Turnaround time */
(void)USB_SetTurnaroundTime(hpcd->Instance,
8004e58: 687b ldr r3, [r7, #4]
8004e5a: 681c ldr r4, [r3, #0]
8004e5c: f000 ffe2 bl 8005e24 <HAL_RCC_GetHCLKFreq>
8004e60: 4601 mov r1, r0
HAL_RCC_GetHCLKFreq(),
(uint8_t)hpcd->Init.speed);
8004e62: 687b ldr r3, [r7, #4]
8004e64: 79db ldrb r3, [r3, #7]
(void)USB_SetTurnaroundTime(hpcd->Instance,
8004e66: 461a mov r2, r3
8004e68: 4620 mov r0, r4
8004e6a: f002 fcb3 bl 80077d4 <USB_SetTurnaroundTime>
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
8004e6e: 6878 ldr r0, [r7, #4]
8004e70: f00d fdd3 bl 8012a1a <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_ENUMDNE);
8004e74: 687b ldr r3, [r7, #4]
8004e76: 681b ldr r3, [r3, #0]
8004e78: 695a ldr r2, [r3, #20]
8004e7a: 687b ldr r3, [r7, #4]
8004e7c: 681b ldr r3, [r3, #0]
8004e7e: f402 5200 and.w r2, r2, #8192 @ 0x2000
8004e82: 615a str r2, [r3, #20]
}
/* Handle SOF Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_SOF))
8004e84: 687b ldr r3, [r7, #4]
8004e86: 681b ldr r3, [r3, #0]
8004e88: 4618 mov r0, r3
8004e8a: f003 fe7c bl 8008b86 <USB_ReadInterrupts>
8004e8e: 4603 mov r3, r0
8004e90: f003 0308 and.w r3, r3, #8
8004e94: 2b08 cmp r3, #8
8004e96: d10a bne.n 8004eae <HAL_PCD_IRQHandler+0x77a>
{
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
8004e98: 6878 ldr r0, [r7, #4]
8004e9a: f00d fdb0 bl 80129fe <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_SOF);
8004e9e: 687b ldr r3, [r7, #4]
8004ea0: 681b ldr r3, [r3, #0]
8004ea2: 695a ldr r2, [r3, #20]
8004ea4: 687b ldr r3, [r7, #4]
8004ea6: 681b ldr r3, [r3, #0]
8004ea8: f002 0208 and.w r2, r2, #8
8004eac: 615a str r2, [r3, #20]
}
/* Handle Global OUT NAK effective Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_BOUTNAKEFF))
8004eae: 687b ldr r3, [r7, #4]
8004eb0: 681b ldr r3, [r3, #0]
8004eb2: 4618 mov r0, r3
8004eb4: f003 fe67 bl 8008b86 <USB_ReadInterrupts>
8004eb8: 4603 mov r3, r0
8004eba: f003 0380 and.w r3, r3, #128 @ 0x80
8004ebe: 2b80 cmp r3, #128 @ 0x80
8004ec0: d123 bne.n 8004f0a <HAL_PCD_IRQHandler+0x7d6>
{
USBx->GINTMSK &= ~USB_OTG_GINTMSK_GONAKEFFM;
8004ec2: 6a3b ldr r3, [r7, #32]
8004ec4: 699b ldr r3, [r3, #24]
8004ec6: f023 0280 bic.w r2, r3, #128 @ 0x80
8004eca: 6a3b ldr r3, [r7, #32]
8004ecc: 619a str r2, [r3, #24]
for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++)
8004ece: 2301 movs r3, #1
8004ed0: 627b str r3, [r7, #36] @ 0x24
8004ed2: e014 b.n 8004efe <HAL_PCD_IRQHandler+0x7ca>
{
if (hpcd->OUT_ep[epnum].is_iso_incomplete == 1U)
8004ed4: 6879 ldr r1, [r7, #4]
8004ed6: 6a7a ldr r2, [r7, #36] @ 0x24
8004ed8: 4613 mov r3, r2
8004eda: 00db lsls r3, r3, #3
8004edc: 4413 add r3, r2
8004ede: 009b lsls r3, r3, #2
8004ee0: 440b add r3, r1
8004ee2: f203 2357 addw r3, r3, #599 @ 0x257
8004ee6: 781b ldrb r3, [r3, #0]
8004ee8: 2b01 cmp r3, #1
8004eea: d105 bne.n 8004ef8 <HAL_PCD_IRQHandler+0x7c4>
{
/* Abort current transaction and disable the EP */
(void)HAL_PCD_EP_Abort(hpcd, (uint8_t)epnum);
8004eec: 6a7b ldr r3, [r7, #36] @ 0x24
8004eee: b2db uxtb r3, r3
8004ef0: 4619 mov r1, r3
8004ef2: 6878 ldr r0, [r7, #4]
8004ef4: f000 fb0a bl 800550c <HAL_PCD_EP_Abort>
for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++)
8004ef8: 6a7b ldr r3, [r7, #36] @ 0x24
8004efa: 3301 adds r3, #1
8004efc: 627b str r3, [r7, #36] @ 0x24
8004efe: 687b ldr r3, [r7, #4]
8004f00: 791b ldrb r3, [r3, #4]
8004f02: 461a mov r2, r3
8004f04: 6a7b ldr r3, [r7, #36] @ 0x24
8004f06: 4293 cmp r3, r2
8004f08: d3e4 bcc.n 8004ed4 <HAL_PCD_IRQHandler+0x7a0>
}
}
}
/* Handle Incomplete ISO IN Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_IISOIXFR))
8004f0a: 687b ldr r3, [r7, #4]
8004f0c: 681b ldr r3, [r3, #0]
8004f0e: 4618 mov r0, r3
8004f10: f003 fe39 bl 8008b86 <USB_ReadInterrupts>
8004f14: 4603 mov r3, r0
8004f16: f403 1380 and.w r3, r3, #1048576 @ 0x100000
8004f1a: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
8004f1e: d13c bne.n 8004f9a <HAL_PCD_IRQHandler+0x866>
{
for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++)
8004f20: 2301 movs r3, #1
8004f22: 627b str r3, [r7, #36] @ 0x24
8004f24: e02b b.n 8004f7e <HAL_PCD_IRQHandler+0x84a>
{
RegVal = USBx_INEP(epnum)->DIEPCTL;
8004f26: 6a7b ldr r3, [r7, #36] @ 0x24
8004f28: 015a lsls r2, r3, #5
8004f2a: 69fb ldr r3, [r7, #28]
8004f2c: 4413 add r3, r2
8004f2e: f503 6310 add.w r3, r3, #2304 @ 0x900
8004f32: 681b ldr r3, [r3, #0]
8004f34: 61bb str r3, [r7, #24]
if ((hpcd->IN_ep[epnum].type == EP_TYPE_ISOC) &&
8004f36: 6879 ldr r1, [r7, #4]
8004f38: 6a7a ldr r2, [r7, #36] @ 0x24
8004f3a: 4613 mov r3, r2
8004f3c: 00db lsls r3, r3, #3
8004f3e: 4413 add r3, r2
8004f40: 009b lsls r3, r3, #2
8004f42: 440b add r3, r1
8004f44: 3318 adds r3, #24
8004f46: 781b ldrb r3, [r3, #0]
8004f48: 2b01 cmp r3, #1
8004f4a: d115 bne.n 8004f78 <HAL_PCD_IRQHandler+0x844>
((RegVal & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA))
8004f4c: 69bb ldr r3, [r7, #24]
if ((hpcd->IN_ep[epnum].type == EP_TYPE_ISOC) &&
8004f4e: 2b00 cmp r3, #0
8004f50: da12 bge.n 8004f78 <HAL_PCD_IRQHandler+0x844>
{
hpcd->IN_ep[epnum].is_iso_incomplete = 1U;
8004f52: 6879 ldr r1, [r7, #4]
8004f54: 6a7a ldr r2, [r7, #36] @ 0x24
8004f56: 4613 mov r3, r2
8004f58: 00db lsls r3, r3, #3
8004f5a: 4413 add r3, r2
8004f5c: 009b lsls r3, r3, #2
8004f5e: 440b add r3, r1
8004f60: 3317 adds r3, #23
8004f62: 2201 movs r2, #1
8004f64: 701a strb r2, [r3, #0]
/* Abort current transaction and disable the EP */
(void)HAL_PCD_EP_Abort(hpcd, (uint8_t)(epnum | 0x80U));
8004f66: 6a7b ldr r3, [r7, #36] @ 0x24
8004f68: b2db uxtb r3, r3
8004f6a: f063 037f orn r3, r3, #127 @ 0x7f
8004f6e: b2db uxtb r3, r3
8004f70: 4619 mov r1, r3
8004f72: 6878 ldr r0, [r7, #4]
8004f74: f000 faca bl 800550c <HAL_PCD_EP_Abort>
for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++)
8004f78: 6a7b ldr r3, [r7, #36] @ 0x24
8004f7a: 3301 adds r3, #1
8004f7c: 627b str r3, [r7, #36] @ 0x24
8004f7e: 687b ldr r3, [r7, #4]
8004f80: 791b ldrb r3, [r3, #4]
8004f82: 461a mov r2, r3
8004f84: 6a7b ldr r3, [r7, #36] @ 0x24
8004f86: 4293 cmp r3, r2
8004f88: d3cd bcc.n 8004f26 <HAL_PCD_IRQHandler+0x7f2>
}
}
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_IISOIXFR);
8004f8a: 687b ldr r3, [r7, #4]
8004f8c: 681b ldr r3, [r3, #0]
8004f8e: 695a ldr r2, [r3, #20]
8004f90: 687b ldr r3, [r7, #4]
8004f92: 681b ldr r3, [r3, #0]
8004f94: f402 1280 and.w r2, r2, #1048576 @ 0x100000
8004f98: 615a str r2, [r3, #20]
}
/* Handle Incomplete ISO OUT Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT))
8004f9a: 687b ldr r3, [r7, #4]
8004f9c: 681b ldr r3, [r3, #0]
8004f9e: 4618 mov r0, r3
8004fa0: f003 fdf1 bl 8008b86 <USB_ReadInterrupts>
8004fa4: 4603 mov r3, r0
8004fa6: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8004faa: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
8004fae: d156 bne.n 800505e <HAL_PCD_IRQHandler+0x92a>
{
for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++)
8004fb0: 2301 movs r3, #1
8004fb2: 627b str r3, [r7, #36] @ 0x24
8004fb4: e045 b.n 8005042 <HAL_PCD_IRQHandler+0x90e>
{
RegVal = USBx_OUTEP(epnum)->DOEPCTL;
8004fb6: 6a7b ldr r3, [r7, #36] @ 0x24
8004fb8: 015a lsls r2, r3, #5
8004fba: 69fb ldr r3, [r7, #28]
8004fbc: 4413 add r3, r2
8004fbe: f503 6330 add.w r3, r3, #2816 @ 0xb00
8004fc2: 681b ldr r3, [r3, #0]
8004fc4: 61bb str r3, [r7, #24]
if ((hpcd->OUT_ep[epnum].type == EP_TYPE_ISOC) &&
8004fc6: 6879 ldr r1, [r7, #4]
8004fc8: 6a7a ldr r2, [r7, #36] @ 0x24
8004fca: 4613 mov r3, r2
8004fcc: 00db lsls r3, r3, #3
8004fce: 4413 add r3, r2
8004fd0: 009b lsls r3, r3, #2
8004fd2: 440b add r3, r1
8004fd4: f503 7316 add.w r3, r3, #600 @ 0x258
8004fd8: 781b ldrb r3, [r3, #0]
8004fda: 2b01 cmp r3, #1
8004fdc: d12e bne.n 800503c <HAL_PCD_IRQHandler+0x908>
((RegVal & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) &&
8004fde: 69bb ldr r3, [r7, #24]
if ((hpcd->OUT_ep[epnum].type == EP_TYPE_ISOC) &&
8004fe0: 2b00 cmp r3, #0
8004fe2: da2b bge.n 800503c <HAL_PCD_IRQHandler+0x908>
((RegVal & (0x1U << 16)) == (hpcd->FrameNumber & 0x1U)))
8004fe4: 69bb ldr r3, [r7, #24]
8004fe6: f403 3280 and.w r2, r3, #65536 @ 0x10000
8004fea: 687b ldr r3, [r7, #4]
8004fec: f8d3 34d4 ldr.w r3, [r3, #1236] @ 0x4d4
8004ff0: f003 0301 and.w r3, r3, #1
((RegVal & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) &&
8004ff4: 429a cmp r2, r3
8004ff6: d121 bne.n 800503c <HAL_PCD_IRQHandler+0x908>
{
hpcd->OUT_ep[epnum].is_iso_incomplete = 1U;
8004ff8: 6879 ldr r1, [r7, #4]
8004ffa: 6a7a ldr r2, [r7, #36] @ 0x24
8004ffc: 4613 mov r3, r2
8004ffe: 00db lsls r3, r3, #3
8005000: 4413 add r3, r2
8005002: 009b lsls r3, r3, #2
8005004: 440b add r3, r1
8005006: f203 2357 addw r3, r3, #599 @ 0x257
800500a: 2201 movs r2, #1
800500c: 701a strb r2, [r3, #0]
USBx->GINTMSK |= USB_OTG_GINTMSK_GONAKEFFM;
800500e: 6a3b ldr r3, [r7, #32]
8005010: 699b ldr r3, [r3, #24]
8005012: f043 0280 orr.w r2, r3, #128 @ 0x80
8005016: 6a3b ldr r3, [r7, #32]
8005018: 619a str r2, [r3, #24]
if ((USBx->GINTSTS & USB_OTG_GINTSTS_BOUTNAKEFF) == 0U)
800501a: 6a3b ldr r3, [r7, #32]
800501c: 695b ldr r3, [r3, #20]
800501e: f003 0380 and.w r3, r3, #128 @ 0x80
8005022: 2b00 cmp r3, #0
8005024: d10a bne.n 800503c <HAL_PCD_IRQHandler+0x908>
{
USBx_DEVICE->DCTL |= USB_OTG_DCTL_SGONAK;
8005026: 69fb ldr r3, [r7, #28]
8005028: f503 6300 add.w r3, r3, #2048 @ 0x800
800502c: 685b ldr r3, [r3, #4]
800502e: 69fa ldr r2, [r7, #28]
8005030: f502 6200 add.w r2, r2, #2048 @ 0x800
8005034: f443 7300 orr.w r3, r3, #512 @ 0x200
8005038: 6053 str r3, [r2, #4]
break;
800503a: e008 b.n 800504e <HAL_PCD_IRQHandler+0x91a>
for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++)
800503c: 6a7b ldr r3, [r7, #36] @ 0x24
800503e: 3301 adds r3, #1
8005040: 627b str r3, [r7, #36] @ 0x24
8005042: 687b ldr r3, [r7, #4]
8005044: 791b ldrb r3, [r3, #4]
8005046: 461a mov r2, r3
8005048: 6a7b ldr r3, [r7, #36] @ 0x24
800504a: 4293 cmp r3, r2
800504c: d3b3 bcc.n 8004fb6 <HAL_PCD_IRQHandler+0x882>
}
}
}
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT);
800504e: 687b ldr r3, [r7, #4]
8005050: 681b ldr r3, [r3, #0]
8005052: 695a ldr r2, [r3, #20]
8005054: 687b ldr r3, [r7, #4]
8005056: 681b ldr r3, [r3, #0]
8005058: f402 1200 and.w r2, r2, #2097152 @ 0x200000
800505c: 615a str r2, [r3, #20]
}
/* Handle Connection event Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_SRQINT))
800505e: 687b ldr r3, [r7, #4]
8005060: 681b ldr r3, [r3, #0]
8005062: 4618 mov r0, r3
8005064: f003 fd8f bl 8008b86 <USB_ReadInterrupts>
8005068: 4603 mov r3, r0
800506a: f003 4380 and.w r3, r3, #1073741824 @ 0x40000000
800506e: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8005072: d10a bne.n 800508a <HAL_PCD_IRQHandler+0x956>
{
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ConnectCallback(hpcd);
#else
HAL_PCD_ConnectCallback(hpcd);
8005074: 6878 ldr r0, [r7, #4]
8005076: f00d fd47 bl 8012b08 <HAL_PCD_ConnectCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_SRQINT);
800507a: 687b ldr r3, [r7, #4]
800507c: 681b ldr r3, [r3, #0]
800507e: 695a ldr r2, [r3, #20]
8005080: 687b ldr r3, [r7, #4]
8005082: 681b ldr r3, [r3, #0]
8005084: f002 4280 and.w r2, r2, #1073741824 @ 0x40000000
8005088: 615a str r2, [r3, #20]
}
/* Handle Disconnection event Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OTGINT))
800508a: 687b ldr r3, [r7, #4]
800508c: 681b ldr r3, [r3, #0]
800508e: 4618 mov r0, r3
8005090: f003 fd79 bl 8008b86 <USB_ReadInterrupts>
8005094: 4603 mov r3, r0
8005096: f003 0304 and.w r3, r3, #4
800509a: 2b04 cmp r3, #4
800509c: d115 bne.n 80050ca <HAL_PCD_IRQHandler+0x996>
{
RegVal = hpcd->Instance->GOTGINT;
800509e: 687b ldr r3, [r7, #4]
80050a0: 681b ldr r3, [r3, #0]
80050a2: 685b ldr r3, [r3, #4]
80050a4: 61bb str r3, [r7, #24]
if ((RegVal & USB_OTG_GOTGINT_SEDET) == USB_OTG_GOTGINT_SEDET)
80050a6: 69bb ldr r3, [r7, #24]
80050a8: f003 0304 and.w r3, r3, #4
80050ac: 2b00 cmp r3, #0
80050ae: d002 beq.n 80050b6 <HAL_PCD_IRQHandler+0x982>
{
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DisconnectCallback(hpcd);
#else
HAL_PCD_DisconnectCallback(hpcd);
80050b0: 6878 ldr r0, [r7, #4]
80050b2: f00d fd37 bl 8012b24 <HAL_PCD_DisconnectCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
hpcd->Instance->GOTGINT |= RegVal;
80050b6: 687b ldr r3, [r7, #4]
80050b8: 681b ldr r3, [r3, #0]
80050ba: 6859 ldr r1, [r3, #4]
80050bc: 687b ldr r3, [r7, #4]
80050be: 681b ldr r3, [r3, #0]
80050c0: 69ba ldr r2, [r7, #24]
80050c2: 430a orrs r2, r1
80050c4: 605a str r2, [r3, #4]
80050c6: e000 b.n 80050ca <HAL_PCD_IRQHandler+0x996>
return;
80050c8: bf00 nop
}
}
}
80050ca: 3734 adds r7, #52 @ 0x34
80050cc: 46bd mov sp, r7
80050ce: bd90 pop {r4, r7, pc}
080050d0 <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
80050d0: b580 push {r7, lr}
80050d2: b082 sub sp, #8
80050d4: af00 add r7, sp, #0
80050d6: 6078 str r0, [r7, #4]
80050d8: 460b mov r3, r1
80050da: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
80050dc: 687b ldr r3, [r7, #4]
80050de: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494
80050e2: 2b01 cmp r3, #1
80050e4: d101 bne.n 80050ea <HAL_PCD_SetAddress+0x1a>
80050e6: 2302 movs r3, #2
80050e8: e012 b.n 8005110 <HAL_PCD_SetAddress+0x40>
80050ea: 687b ldr r3, [r7, #4]
80050ec: 2201 movs r2, #1
80050ee: f883 2494 strb.w r2, [r3, #1172] @ 0x494
hpcd->USB_Address = address;
80050f2: 687b ldr r3, [r7, #4]
80050f4: 78fa ldrb r2, [r7, #3]
80050f6: 745a strb r2, [r3, #17]
(void)USB_SetDevAddress(hpcd->Instance, address);
80050f8: 687b ldr r3, [r7, #4]
80050fa: 681b ldr r3, [r3, #0]
80050fc: 78fa ldrb r2, [r7, #3]
80050fe: 4611 mov r1, r2
8005100: 4618 mov r0, r3
8005102: f003 fcd8 bl 8008ab6 <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
8005106: 687b ldr r3, [r7, #4]
8005108: 2200 movs r2, #0
800510a: f883 2494 strb.w r2, [r3, #1172] @ 0x494
return HAL_OK;
800510e: 2300 movs r3, #0
}
8005110: 4618 mov r0, r3
8005112: 3708 adds r7, #8
8005114: 46bd mov sp, r7
8005116: bd80 pop {r7, pc}
08005118 <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
8005118: b580 push {r7, lr}
800511a: b084 sub sp, #16
800511c: af00 add r7, sp, #0
800511e: 6078 str r0, [r7, #4]
8005120: 4608 mov r0, r1
8005122: 4611 mov r1, r2
8005124: 461a mov r2, r3
8005126: 4603 mov r3, r0
8005128: 70fb strb r3, [r7, #3]
800512a: 460b mov r3, r1
800512c: 803b strh r3, [r7, #0]
800512e: 4613 mov r3, r2
8005130: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
8005132: 2300 movs r3, #0
8005134: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8005136: f997 3003 ldrsb.w r3, [r7, #3]
800513a: 2b00 cmp r3, #0
800513c: da0f bge.n 800515e <HAL_PCD_EP_Open+0x46>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
800513e: 78fb ldrb r3, [r7, #3]
8005140: f003 020f and.w r2, r3, #15
8005144: 4613 mov r3, r2
8005146: 00db lsls r3, r3, #3
8005148: 4413 add r3, r2
800514a: 009b lsls r3, r3, #2
800514c: 3310 adds r3, #16
800514e: 687a ldr r2, [r7, #4]
8005150: 4413 add r3, r2
8005152: 3304 adds r3, #4
8005154: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8005156: 68fb ldr r3, [r7, #12]
8005158: 2201 movs r2, #1
800515a: 705a strb r2, [r3, #1]
800515c: e00f b.n 800517e <HAL_PCD_EP_Open+0x66>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
800515e: 78fb ldrb r3, [r7, #3]
8005160: f003 020f and.w r2, r3, #15
8005164: 4613 mov r3, r2
8005166: 00db lsls r3, r3, #3
8005168: 4413 add r3, r2
800516a: 009b lsls r3, r3, #2
800516c: f503 7314 add.w r3, r3, #592 @ 0x250
8005170: 687a ldr r2, [r7, #4]
8005172: 4413 add r3, r2
8005174: 3304 adds r3, #4
8005176: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8005178: 68fb ldr r3, [r7, #12]
800517a: 2200 movs r2, #0
800517c: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
800517e: 78fb ldrb r3, [r7, #3]
8005180: f003 030f and.w r3, r3, #15
8005184: b2da uxtb r2, r3
8005186: 68fb ldr r3, [r7, #12]
8005188: 701a strb r2, [r3, #0]
ep->maxpacket = (uint32_t)ep_mps & 0x7FFU;
800518a: 883b ldrh r3, [r7, #0]
800518c: f3c3 020a ubfx r2, r3, #0, #11
8005190: 68fb ldr r3, [r7, #12]
8005192: 609a str r2, [r3, #8]
ep->type = ep_type;
8005194: 68fb ldr r3, [r7, #12]
8005196: 78ba ldrb r2, [r7, #2]
8005198: 711a strb r2, [r3, #4]
if (ep->is_in != 0U)
800519a: 68fb ldr r3, [r7, #12]
800519c: 785b ldrb r3, [r3, #1]
800519e: 2b00 cmp r3, #0
80051a0: d004 beq.n 80051ac <HAL_PCD_EP_Open+0x94>
{
/* Assign a Tx FIFO */
ep->tx_fifo_num = ep->num;
80051a2: 68fb ldr r3, [r7, #12]
80051a4: 781b ldrb r3, [r3, #0]
80051a6: 461a mov r2, r3
80051a8: 68fb ldr r3, [r7, #12]
80051aa: 835a strh r2, [r3, #26]
}
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
80051ac: 78bb ldrb r3, [r7, #2]
80051ae: 2b02 cmp r3, #2
80051b0: d102 bne.n 80051b8 <HAL_PCD_EP_Open+0xa0>
{
ep->data_pid_start = 0U;
80051b2: 68fb ldr r3, [r7, #12]
80051b4: 2200 movs r2, #0
80051b6: 715a strb r2, [r3, #5]
}
__HAL_LOCK(hpcd);
80051b8: 687b ldr r3, [r7, #4]
80051ba: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494
80051be: 2b01 cmp r3, #1
80051c0: d101 bne.n 80051c6 <HAL_PCD_EP_Open+0xae>
80051c2: 2302 movs r3, #2
80051c4: e00e b.n 80051e4 <HAL_PCD_EP_Open+0xcc>
80051c6: 687b ldr r3, [r7, #4]
80051c8: 2201 movs r2, #1
80051ca: f883 2494 strb.w r2, [r3, #1172] @ 0x494
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
80051ce: 687b ldr r3, [r7, #4]
80051d0: 681b ldr r3, [r3, #0]
80051d2: 68f9 ldr r1, [r7, #12]
80051d4: 4618 mov r0, r3
80051d6: f002 fe09 bl 8007dec <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
80051da: 687b ldr r3, [r7, #4]
80051dc: 2200 movs r2, #0
80051de: f883 2494 strb.w r2, [r3, #1172] @ 0x494
return ret;
80051e2: 7afb ldrb r3, [r7, #11]
}
80051e4: 4618 mov r0, r3
80051e6: 3710 adds r7, #16
80051e8: 46bd mov sp, r7
80051ea: bd80 pop {r7, pc}
080051ec <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
80051ec: b580 push {r7, lr}
80051ee: b084 sub sp, #16
80051f0: af00 add r7, sp, #0
80051f2: 6078 str r0, [r7, #4]
80051f4: 460b mov r3, r1
80051f6: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
80051f8: f997 3003 ldrsb.w r3, [r7, #3]
80051fc: 2b00 cmp r3, #0
80051fe: da0f bge.n 8005220 <HAL_PCD_EP_Close+0x34>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8005200: 78fb ldrb r3, [r7, #3]
8005202: f003 020f and.w r2, r3, #15
8005206: 4613 mov r3, r2
8005208: 00db lsls r3, r3, #3
800520a: 4413 add r3, r2
800520c: 009b lsls r3, r3, #2
800520e: 3310 adds r3, #16
8005210: 687a ldr r2, [r7, #4]
8005212: 4413 add r3, r2
8005214: 3304 adds r3, #4
8005216: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8005218: 68fb ldr r3, [r7, #12]
800521a: 2201 movs r2, #1
800521c: 705a strb r2, [r3, #1]
800521e: e00f b.n 8005240 <HAL_PCD_EP_Close+0x54>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8005220: 78fb ldrb r3, [r7, #3]
8005222: f003 020f and.w r2, r3, #15
8005226: 4613 mov r3, r2
8005228: 00db lsls r3, r3, #3
800522a: 4413 add r3, r2
800522c: 009b lsls r3, r3, #2
800522e: f503 7314 add.w r3, r3, #592 @ 0x250
8005232: 687a ldr r2, [r7, #4]
8005234: 4413 add r3, r2
8005236: 3304 adds r3, #4
8005238: 60fb str r3, [r7, #12]
ep->is_in = 0U;
800523a: 68fb ldr r3, [r7, #12]
800523c: 2200 movs r2, #0
800523e: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8005240: 78fb ldrb r3, [r7, #3]
8005242: f003 030f and.w r3, r3, #15
8005246: b2da uxtb r2, r3
8005248: 68fb ldr r3, [r7, #12]
800524a: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
800524c: 687b ldr r3, [r7, #4]
800524e: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494
8005252: 2b01 cmp r3, #1
8005254: d101 bne.n 800525a <HAL_PCD_EP_Close+0x6e>
8005256: 2302 movs r3, #2
8005258: e00e b.n 8005278 <HAL_PCD_EP_Close+0x8c>
800525a: 687b ldr r3, [r7, #4]
800525c: 2201 movs r2, #1
800525e: f883 2494 strb.w r2, [r3, #1172] @ 0x494
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
8005262: 687b ldr r3, [r7, #4]
8005264: 681b ldr r3, [r3, #0]
8005266: 68f9 ldr r1, [r7, #12]
8005268: 4618 mov r0, r3
800526a: f002 fe47 bl 8007efc <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
800526e: 687b ldr r3, [r7, #4]
8005270: 2200 movs r2, #0
8005272: f883 2494 strb.w r2, [r3, #1172] @ 0x494
return HAL_OK;
8005276: 2300 movs r3, #0
}
8005278: 4618 mov r0, r3
800527a: 3710 adds r7, #16
800527c: 46bd mov sp, r7
800527e: bd80 pop {r7, pc}
08005280 <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8005280: b580 push {r7, lr}
8005282: b086 sub sp, #24
8005284: af00 add r7, sp, #0
8005286: 60f8 str r0, [r7, #12]
8005288: 607a str r2, [r7, #4]
800528a: 603b str r3, [r7, #0]
800528c: 460b mov r3, r1
800528e: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8005290: 7afb ldrb r3, [r7, #11]
8005292: f003 020f and.w r2, r3, #15
8005296: 4613 mov r3, r2
8005298: 00db lsls r3, r3, #3
800529a: 4413 add r3, r2
800529c: 009b lsls r3, r3, #2
800529e: f503 7314 add.w r3, r3, #592 @ 0x250
80052a2: 68fa ldr r2, [r7, #12]
80052a4: 4413 add r3, r2
80052a6: 3304 adds r3, #4
80052a8: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
80052aa: 697b ldr r3, [r7, #20]
80052ac: 687a ldr r2, [r7, #4]
80052ae: 60da str r2, [r3, #12]
ep->xfer_len = len;
80052b0: 697b ldr r3, [r7, #20]
80052b2: 683a ldr r2, [r7, #0]
80052b4: 611a str r2, [r3, #16]
ep->xfer_count = 0U;
80052b6: 697b ldr r3, [r7, #20]
80052b8: 2200 movs r2, #0
80052ba: 615a str r2, [r3, #20]
ep->is_in = 0U;
80052bc: 697b ldr r3, [r7, #20]
80052be: 2200 movs r2, #0
80052c0: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
80052c2: 7afb ldrb r3, [r7, #11]
80052c4: f003 030f and.w r3, r3, #15
80052c8: b2da uxtb r2, r3
80052ca: 697b ldr r3, [r7, #20]
80052cc: 701a strb r2, [r3, #0]
if (hpcd->Init.dma_enable == 1U)
80052ce: 68fb ldr r3, [r7, #12]
80052d0: 799b ldrb r3, [r3, #6]
80052d2: 2b01 cmp r3, #1
80052d4: d102 bne.n 80052dc <HAL_PCD_EP_Receive+0x5c>
{
ep->dma_addr = (uint32_t)pBuf;
80052d6: 687a ldr r2, [r7, #4]
80052d8: 697b ldr r3, [r7, #20]
80052da: 61da str r2, [r3, #28]
}
(void)USB_EPStartXfer(hpcd->Instance, ep, (uint8_t)hpcd->Init.dma_enable);
80052dc: 68fb ldr r3, [r7, #12]
80052de: 6818 ldr r0, [r3, #0]
80052e0: 68fb ldr r3, [r7, #12]
80052e2: 799b ldrb r3, [r3, #6]
80052e4: 461a mov r2, r3
80052e6: 6979 ldr r1, [r7, #20]
80052e8: f002 fee4 bl 80080b4 <USB_EPStartXfer>
return HAL_OK;
80052ec: 2300 movs r3, #0
}
80052ee: 4618 mov r0, r3
80052f0: 3718 adds r7, #24
80052f2: 46bd mov sp, r7
80052f4: bd80 pop {r7, pc}
080052f6 <HAL_PCD_EP_GetRxCount>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr)
{
80052f6: b480 push {r7}
80052f8: b083 sub sp, #12
80052fa: af00 add r7, sp, #0
80052fc: 6078 str r0, [r7, #4]
80052fe: 460b mov r3, r1
8005300: 70fb strb r3, [r7, #3]
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
8005302: 78fb ldrb r3, [r7, #3]
8005304: f003 020f and.w r2, r3, #15
8005308: 6879 ldr r1, [r7, #4]
800530a: 4613 mov r3, r2
800530c: 00db lsls r3, r3, #3
800530e: 4413 add r3, r2
8005310: 009b lsls r3, r3, #2
8005312: 440b add r3, r1
8005314: f503 731a add.w r3, r3, #616 @ 0x268
8005318: 681b ldr r3, [r3, #0]
}
800531a: 4618 mov r0, r3
800531c: 370c adds r7, #12
800531e: 46bd mov sp, r7
8005320: f85d 7b04 ldr.w r7, [sp], #4
8005324: 4770 bx lr
08005326 <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8005326: b580 push {r7, lr}
8005328: b086 sub sp, #24
800532a: af00 add r7, sp, #0
800532c: 60f8 str r0, [r7, #12]
800532e: 607a str r2, [r7, #4]
8005330: 603b str r3, [r7, #0]
8005332: 460b mov r3, r1
8005334: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8005336: 7afb ldrb r3, [r7, #11]
8005338: f003 020f and.w r2, r3, #15
800533c: 4613 mov r3, r2
800533e: 00db lsls r3, r3, #3
8005340: 4413 add r3, r2
8005342: 009b lsls r3, r3, #2
8005344: 3310 adds r3, #16
8005346: 68fa ldr r2, [r7, #12]
8005348: 4413 add r3, r2
800534a: 3304 adds r3, #4
800534c: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
800534e: 697b ldr r3, [r7, #20]
8005350: 687a ldr r2, [r7, #4]
8005352: 60da str r2, [r3, #12]
ep->xfer_len = len;
8005354: 697b ldr r3, [r7, #20]
8005356: 683a ldr r2, [r7, #0]
8005358: 611a str r2, [r3, #16]
ep->xfer_count = 0U;
800535a: 697b ldr r3, [r7, #20]
800535c: 2200 movs r2, #0
800535e: 615a str r2, [r3, #20]
ep->is_in = 1U;
8005360: 697b ldr r3, [r7, #20]
8005362: 2201 movs r2, #1
8005364: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8005366: 7afb ldrb r3, [r7, #11]
8005368: f003 030f and.w r3, r3, #15
800536c: b2da uxtb r2, r3
800536e: 697b ldr r3, [r7, #20]
8005370: 701a strb r2, [r3, #0]
if (hpcd->Init.dma_enable == 1U)
8005372: 68fb ldr r3, [r7, #12]
8005374: 799b ldrb r3, [r3, #6]
8005376: 2b01 cmp r3, #1
8005378: d102 bne.n 8005380 <HAL_PCD_EP_Transmit+0x5a>
{
ep->dma_addr = (uint32_t)pBuf;
800537a: 687a ldr r2, [r7, #4]
800537c: 697b ldr r3, [r7, #20]
800537e: 61da str r2, [r3, #28]
}
(void)USB_EPStartXfer(hpcd->Instance, ep, (uint8_t)hpcd->Init.dma_enable);
8005380: 68fb ldr r3, [r7, #12]
8005382: 6818 ldr r0, [r3, #0]
8005384: 68fb ldr r3, [r7, #12]
8005386: 799b ldrb r3, [r3, #6]
8005388: 461a mov r2, r3
800538a: 6979 ldr r1, [r7, #20]
800538c: f002 fe92 bl 80080b4 <USB_EPStartXfer>
return HAL_OK;
8005390: 2300 movs r3, #0
}
8005392: 4618 mov r0, r3
8005394: 3718 adds r7, #24
8005396: 46bd mov sp, r7
8005398: bd80 pop {r7, pc}
0800539a <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
800539a: b580 push {r7, lr}
800539c: b084 sub sp, #16
800539e: af00 add r7, sp, #0
80053a0: 6078 str r0, [r7, #4]
80053a2: 460b mov r3, r1
80053a4: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
80053a6: 78fb ldrb r3, [r7, #3]
80053a8: f003 030f and.w r3, r3, #15
80053ac: 687a ldr r2, [r7, #4]
80053ae: 7912 ldrb r2, [r2, #4]
80053b0: 4293 cmp r3, r2
80053b2: d901 bls.n 80053b8 <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
80053b4: 2301 movs r3, #1
80053b6: e04f b.n 8005458 <HAL_PCD_EP_SetStall+0xbe>
}
if ((0x80U & ep_addr) == 0x80U)
80053b8: f997 3003 ldrsb.w r3, [r7, #3]
80053bc: 2b00 cmp r3, #0
80053be: da0f bge.n 80053e0 <HAL_PCD_EP_SetStall+0x46>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80053c0: 78fb ldrb r3, [r7, #3]
80053c2: f003 020f and.w r2, r3, #15
80053c6: 4613 mov r3, r2
80053c8: 00db lsls r3, r3, #3
80053ca: 4413 add r3, r2
80053cc: 009b lsls r3, r3, #2
80053ce: 3310 adds r3, #16
80053d0: 687a ldr r2, [r7, #4]
80053d2: 4413 add r3, r2
80053d4: 3304 adds r3, #4
80053d6: 60fb str r3, [r7, #12]
ep->is_in = 1U;
80053d8: 68fb ldr r3, [r7, #12]
80053da: 2201 movs r2, #1
80053dc: 705a strb r2, [r3, #1]
80053de: e00d b.n 80053fc <HAL_PCD_EP_SetStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
80053e0: 78fa ldrb r2, [r7, #3]
80053e2: 4613 mov r3, r2
80053e4: 00db lsls r3, r3, #3
80053e6: 4413 add r3, r2
80053e8: 009b lsls r3, r3, #2
80053ea: f503 7314 add.w r3, r3, #592 @ 0x250
80053ee: 687a ldr r2, [r7, #4]
80053f0: 4413 add r3, r2
80053f2: 3304 adds r3, #4
80053f4: 60fb str r3, [r7, #12]
ep->is_in = 0U;
80053f6: 68fb ldr r3, [r7, #12]
80053f8: 2200 movs r2, #0
80053fa: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
80053fc: 68fb ldr r3, [r7, #12]
80053fe: 2201 movs r2, #1
8005400: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8005402: 78fb ldrb r3, [r7, #3]
8005404: f003 030f and.w r3, r3, #15
8005408: b2da uxtb r2, r3
800540a: 68fb ldr r3, [r7, #12]
800540c: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
800540e: 687b ldr r3, [r7, #4]
8005410: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494
8005414: 2b01 cmp r3, #1
8005416: d101 bne.n 800541c <HAL_PCD_EP_SetStall+0x82>
8005418: 2302 movs r3, #2
800541a: e01d b.n 8005458 <HAL_PCD_EP_SetStall+0xbe>
800541c: 687b ldr r3, [r7, #4]
800541e: 2201 movs r2, #1
8005420: f883 2494 strb.w r2, [r3, #1172] @ 0x494
(void)USB_EPSetStall(hpcd->Instance, ep);
8005424: 687b ldr r3, [r7, #4]
8005426: 681b ldr r3, [r3, #0]
8005428: 68f9 ldr r1, [r7, #12]
800542a: 4618 mov r0, r3
800542c: f003 fa20 bl 8008870 <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
8005430: 78fb ldrb r3, [r7, #3]
8005432: f003 030f and.w r3, r3, #15
8005436: 2b00 cmp r3, #0
8005438: d109 bne.n 800544e <HAL_PCD_EP_SetStall+0xb4>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t)hpcd->Init.dma_enable, (uint8_t *)hpcd->Setup);
800543a: 687b ldr r3, [r7, #4]
800543c: 6818 ldr r0, [r3, #0]
800543e: 687b ldr r3, [r7, #4]
8005440: 7999 ldrb r1, [r3, #6]
8005442: 687b ldr r3, [r7, #4]
8005444: f203 439c addw r3, r3, #1180 @ 0x49c
8005448: 461a mov r2, r3
800544a: f003 fc61 bl 8008d10 <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
800544e: 687b ldr r3, [r7, #4]
8005450: 2200 movs r2, #0
8005452: f883 2494 strb.w r2, [r3, #1172] @ 0x494
return HAL_OK;
8005456: 2300 movs r3, #0
}
8005458: 4618 mov r0, r3
800545a: 3710 adds r7, #16
800545c: 46bd mov sp, r7
800545e: bd80 pop {r7, pc}
08005460 <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8005460: b580 push {r7, lr}
8005462: b084 sub sp, #16
8005464: af00 add r7, sp, #0
8005466: 6078 str r0, [r7, #4]
8005468: 460b mov r3, r1
800546a: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
800546c: 78fb ldrb r3, [r7, #3]
800546e: f003 030f and.w r3, r3, #15
8005472: 687a ldr r2, [r7, #4]
8005474: 7912 ldrb r2, [r2, #4]
8005476: 4293 cmp r3, r2
8005478: d901 bls.n 800547e <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
800547a: 2301 movs r3, #1
800547c: e042 b.n 8005504 <HAL_PCD_EP_ClrStall+0xa4>
}
if ((0x80U & ep_addr) == 0x80U)
800547e: f997 3003 ldrsb.w r3, [r7, #3]
8005482: 2b00 cmp r3, #0
8005484: da0f bge.n 80054a6 <HAL_PCD_EP_ClrStall+0x46>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8005486: 78fb ldrb r3, [r7, #3]
8005488: f003 020f and.w r2, r3, #15
800548c: 4613 mov r3, r2
800548e: 00db lsls r3, r3, #3
8005490: 4413 add r3, r2
8005492: 009b lsls r3, r3, #2
8005494: 3310 adds r3, #16
8005496: 687a ldr r2, [r7, #4]
8005498: 4413 add r3, r2
800549a: 3304 adds r3, #4
800549c: 60fb str r3, [r7, #12]
ep->is_in = 1U;
800549e: 68fb ldr r3, [r7, #12]
80054a0: 2201 movs r2, #1
80054a2: 705a strb r2, [r3, #1]
80054a4: e00f b.n 80054c6 <HAL_PCD_EP_ClrStall+0x66>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80054a6: 78fb ldrb r3, [r7, #3]
80054a8: f003 020f and.w r2, r3, #15
80054ac: 4613 mov r3, r2
80054ae: 00db lsls r3, r3, #3
80054b0: 4413 add r3, r2
80054b2: 009b lsls r3, r3, #2
80054b4: f503 7314 add.w r3, r3, #592 @ 0x250
80054b8: 687a ldr r2, [r7, #4]
80054ba: 4413 add r3, r2
80054bc: 3304 adds r3, #4
80054be: 60fb str r3, [r7, #12]
ep->is_in = 0U;
80054c0: 68fb ldr r3, [r7, #12]
80054c2: 2200 movs r2, #0
80054c4: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
80054c6: 68fb ldr r3, [r7, #12]
80054c8: 2200 movs r2, #0
80054ca: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
80054cc: 78fb ldrb r3, [r7, #3]
80054ce: f003 030f and.w r3, r3, #15
80054d2: b2da uxtb r2, r3
80054d4: 68fb ldr r3, [r7, #12]
80054d6: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
80054d8: 687b ldr r3, [r7, #4]
80054da: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494
80054de: 2b01 cmp r3, #1
80054e0: d101 bne.n 80054e6 <HAL_PCD_EP_ClrStall+0x86>
80054e2: 2302 movs r3, #2
80054e4: e00e b.n 8005504 <HAL_PCD_EP_ClrStall+0xa4>
80054e6: 687b ldr r3, [r7, #4]
80054e8: 2201 movs r2, #1
80054ea: f883 2494 strb.w r2, [r3, #1172] @ 0x494
(void)USB_EPClearStall(hpcd->Instance, ep);
80054ee: 687b ldr r3, [r7, #4]
80054f0: 681b ldr r3, [r3, #0]
80054f2: 68f9 ldr r1, [r7, #12]
80054f4: 4618 mov r0, r3
80054f6: f003 fa29 bl 800894c <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
80054fa: 687b ldr r3, [r7, #4]
80054fc: 2200 movs r2, #0
80054fe: f883 2494 strb.w r2, [r3, #1172] @ 0x494
return HAL_OK;
8005502: 2300 movs r3, #0
}
8005504: 4618 mov r0, r3
8005506: 3710 adds r7, #16
8005508: 46bd mov sp, r7
800550a: bd80 pop {r7, pc}
0800550c <HAL_PCD_EP_Abort>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
800550c: b580 push {r7, lr}
800550e: b084 sub sp, #16
8005510: af00 add r7, sp, #0
8005512: 6078 str r0, [r7, #4]
8005514: 460b mov r3, r1
8005516: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef ret;
PCD_EPTypeDef *ep;
if ((0x80U & ep_addr) == 0x80U)
8005518: f997 3003 ldrsb.w r3, [r7, #3]
800551c: 2b00 cmp r3, #0
800551e: da0c bge.n 800553a <HAL_PCD_EP_Abort+0x2e>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8005520: 78fb ldrb r3, [r7, #3]
8005522: f003 020f and.w r2, r3, #15
8005526: 4613 mov r3, r2
8005528: 00db lsls r3, r3, #3
800552a: 4413 add r3, r2
800552c: 009b lsls r3, r3, #2
800552e: 3310 adds r3, #16
8005530: 687a ldr r2, [r7, #4]
8005532: 4413 add r3, r2
8005534: 3304 adds r3, #4
8005536: 60fb str r3, [r7, #12]
8005538: e00c b.n 8005554 <HAL_PCD_EP_Abort+0x48>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
800553a: 78fb ldrb r3, [r7, #3]
800553c: f003 020f and.w r2, r3, #15
8005540: 4613 mov r3, r2
8005542: 00db lsls r3, r3, #3
8005544: 4413 add r3, r2
8005546: 009b lsls r3, r3, #2
8005548: f503 7314 add.w r3, r3, #592 @ 0x250
800554c: 687a ldr r2, [r7, #4]
800554e: 4413 add r3, r2
8005550: 3304 adds r3, #4
8005552: 60fb str r3, [r7, #12]
}
/* Stop Xfer */
ret = USB_EPStopXfer(hpcd->Instance, ep);
8005554: 687b ldr r3, [r7, #4]
8005556: 681b ldr r3, [r3, #0]
8005558: 68f9 ldr r1, [r7, #12]
800555a: 4618 mov r0, r3
800555c: f003 f848 bl 80085f0 <USB_EPStopXfer>
8005560: 4603 mov r3, r0
8005562: 72fb strb r3, [r7, #11]
return ret;
8005564: 7afb ldrb r3, [r7, #11]
}
8005566: 4618 mov r0, r3
8005568: 3710 adds r7, #16
800556a: 46bd mov sp, r7
800556c: bd80 pop {r7, pc}
0800556e <HAL_PCD_EP_Flush>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
800556e: b580 push {r7, lr}
8005570: b082 sub sp, #8
8005572: af00 add r7, sp, #0
8005574: 6078 str r0, [r7, #4]
8005576: 460b mov r3, r1
8005578: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
800557a: 687b ldr r3, [r7, #4]
800557c: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494
8005580: 2b01 cmp r3, #1
8005582: d101 bne.n 8005588 <HAL_PCD_EP_Flush+0x1a>
8005584: 2302 movs r3, #2
8005586: e01b b.n 80055c0 <HAL_PCD_EP_Flush+0x52>
8005588: 687b ldr r3, [r7, #4]
800558a: 2201 movs r2, #1
800558c: f883 2494 strb.w r2, [r3, #1172] @ 0x494
if ((ep_addr & 0x80U) == 0x80U)
8005590: f997 3003 ldrsb.w r3, [r7, #3]
8005594: 2b00 cmp r3, #0
8005596: da09 bge.n 80055ac <HAL_PCD_EP_Flush+0x3e>
{
(void)USB_FlushTxFifo(hpcd->Instance, (uint32_t)ep_addr & EP_ADDR_MSK);
8005598: 687b ldr r3, [r7, #4]
800559a: 681a ldr r2, [r3, #0]
800559c: 78fb ldrb r3, [r7, #3]
800559e: f003 030f and.w r3, r3, #15
80055a2: 4619 mov r1, r3
80055a4: 4610 mov r0, r2
80055a6: f002 fb83 bl 8007cb0 <USB_FlushTxFifo>
80055aa: e004 b.n 80055b6 <HAL_PCD_EP_Flush+0x48>
}
else
{
(void)USB_FlushRxFifo(hpcd->Instance);
80055ac: 687b ldr r3, [r7, #4]
80055ae: 681b ldr r3, [r3, #0]
80055b0: 4618 mov r0, r3
80055b2: f002 fbaf bl 8007d14 <USB_FlushRxFifo>
}
__HAL_UNLOCK(hpcd);
80055b6: 687b ldr r3, [r7, #4]
80055b8: 2200 movs r2, #0
80055ba: f883 2494 strb.w r2, [r3, #1172] @ 0x494
return HAL_OK;
80055be: 2300 movs r3, #0
}
80055c0: 4618 mov r0, r3
80055c2: 3708 adds r7, #8
80055c4: 46bd mov sp, r7
80055c6: bd80 pop {r7, pc}
080055c8 <PCD_WriteEmptyTxFifo>:
* @param hpcd PCD handle
* @param epnum endpoint number
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum)
{
80055c8: b580 push {r7, lr}
80055ca: b08a sub sp, #40 @ 0x28
80055cc: af02 add r7, sp, #8
80055ce: 6078 str r0, [r7, #4]
80055d0: 6039 str r1, [r7, #0]
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
80055d2: 687b ldr r3, [r7, #4]
80055d4: 681b ldr r3, [r3, #0]
80055d6: 617b str r3, [r7, #20]
uint32_t USBx_BASE = (uint32_t)USBx;
80055d8: 697b ldr r3, [r7, #20]
80055da: 613b str r3, [r7, #16]
USB_OTG_EPTypeDef *ep;
uint32_t len;
uint32_t len32b;
uint32_t fifoemptymsk;
ep = &hpcd->IN_ep[epnum];
80055dc: 683a ldr r2, [r7, #0]
80055de: 4613 mov r3, r2
80055e0: 00db lsls r3, r3, #3
80055e2: 4413 add r3, r2
80055e4: 009b lsls r3, r3, #2
80055e6: 3310 adds r3, #16
80055e8: 687a ldr r2, [r7, #4]
80055ea: 4413 add r3, r2
80055ec: 3304 adds r3, #4
80055ee: 60fb str r3, [r7, #12]
if (ep->xfer_count > ep->xfer_len)
80055f0: 68fb ldr r3, [r7, #12]
80055f2: 695a ldr r2, [r3, #20]
80055f4: 68fb ldr r3, [r7, #12]
80055f6: 691b ldr r3, [r3, #16]
80055f8: 429a cmp r2, r3
80055fa: d901 bls.n 8005600 <PCD_WriteEmptyTxFifo+0x38>
{
return HAL_ERROR;
80055fc: 2301 movs r3, #1
80055fe: e06b b.n 80056d8 <PCD_WriteEmptyTxFifo+0x110>
}
len = ep->xfer_len - ep->xfer_count;
8005600: 68fb ldr r3, [r7, #12]
8005602: 691a ldr r2, [r3, #16]
8005604: 68fb ldr r3, [r7, #12]
8005606: 695b ldr r3, [r3, #20]
8005608: 1ad3 subs r3, r2, r3
800560a: 61fb str r3, [r7, #28]
if (len > ep->maxpacket)
800560c: 68fb ldr r3, [r7, #12]
800560e: 689b ldr r3, [r3, #8]
8005610: 69fa ldr r2, [r7, #28]
8005612: 429a cmp r2, r3
8005614: d902 bls.n 800561c <PCD_WriteEmptyTxFifo+0x54>
{
len = ep->maxpacket;
8005616: 68fb ldr r3, [r7, #12]
8005618: 689b ldr r3, [r3, #8]
800561a: 61fb str r3, [r7, #28]
}
len32b = (len + 3U) / 4U;
800561c: 69fb ldr r3, [r7, #28]
800561e: 3303 adds r3, #3
8005620: 089b lsrs r3, r3, #2
8005622: 61bb str r3, [r7, #24]
while (((USBx_INEP(epnum)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) >= len32b) &&
8005624: e02a b.n 800567c <PCD_WriteEmptyTxFifo+0xb4>
(ep->xfer_count < ep->xfer_len) && (ep->xfer_len != 0U))
{
/* Write the FIFO */
len = ep->xfer_len - ep->xfer_count;
8005626: 68fb ldr r3, [r7, #12]
8005628: 691a ldr r2, [r3, #16]
800562a: 68fb ldr r3, [r7, #12]
800562c: 695b ldr r3, [r3, #20]
800562e: 1ad3 subs r3, r2, r3
8005630: 61fb str r3, [r7, #28]
if (len > ep->maxpacket)
8005632: 68fb ldr r3, [r7, #12]
8005634: 689b ldr r3, [r3, #8]
8005636: 69fa ldr r2, [r7, #28]
8005638: 429a cmp r2, r3
800563a: d902 bls.n 8005642 <PCD_WriteEmptyTxFifo+0x7a>
{
len = ep->maxpacket;
800563c: 68fb ldr r3, [r7, #12]
800563e: 689b ldr r3, [r3, #8]
8005640: 61fb str r3, [r7, #28]
}
len32b = (len + 3U) / 4U;
8005642: 69fb ldr r3, [r7, #28]
8005644: 3303 adds r3, #3
8005646: 089b lsrs r3, r3, #2
8005648: 61bb str r3, [r7, #24]
(void)USB_WritePacket(USBx, ep->xfer_buff, (uint8_t)epnum, (uint16_t)len,
800564a: 68fb ldr r3, [r7, #12]
800564c: 68d9 ldr r1, [r3, #12]
800564e: 683b ldr r3, [r7, #0]
8005650: b2da uxtb r2, r3
8005652: 69fb ldr r3, [r7, #28]
8005654: b298 uxth r0, r3
(uint8_t)hpcd->Init.dma_enable);
8005656: 687b ldr r3, [r7, #4]
8005658: 799b ldrb r3, [r3, #6]
(void)USB_WritePacket(USBx, ep->xfer_buff, (uint8_t)epnum, (uint16_t)len,
800565a: 9300 str r3, [sp, #0]
800565c: 4603 mov r3, r0
800565e: 6978 ldr r0, [r7, #20]
8005660: f003 f870 bl 8008744 <USB_WritePacket>
ep->xfer_buff += len;
8005664: 68fb ldr r3, [r7, #12]
8005666: 68da ldr r2, [r3, #12]
8005668: 69fb ldr r3, [r7, #28]
800566a: 441a add r2, r3
800566c: 68fb ldr r3, [r7, #12]
800566e: 60da str r2, [r3, #12]
ep->xfer_count += len;
8005670: 68fb ldr r3, [r7, #12]
8005672: 695a ldr r2, [r3, #20]
8005674: 69fb ldr r3, [r7, #28]
8005676: 441a add r2, r3
8005678: 68fb ldr r3, [r7, #12]
800567a: 615a str r2, [r3, #20]
while (((USBx_INEP(epnum)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) >= len32b) &&
800567c: 683b ldr r3, [r7, #0]
800567e: 015a lsls r2, r3, #5
8005680: 693b ldr r3, [r7, #16]
8005682: 4413 add r3, r2
8005684: f503 6310 add.w r3, r3, #2304 @ 0x900
8005688: 699b ldr r3, [r3, #24]
800568a: b29b uxth r3, r3
(ep->xfer_count < ep->xfer_len) && (ep->xfer_len != 0U))
800568c: 69ba ldr r2, [r7, #24]
800568e: 429a cmp r2, r3
8005690: d809 bhi.n 80056a6 <PCD_WriteEmptyTxFifo+0xde>
8005692: 68fb ldr r3, [r7, #12]
8005694: 695a ldr r2, [r3, #20]
8005696: 68fb ldr r3, [r7, #12]
8005698: 691b ldr r3, [r3, #16]
while (((USBx_INEP(epnum)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) >= len32b) &&
800569a: 429a cmp r2, r3
800569c: d203 bcs.n 80056a6 <PCD_WriteEmptyTxFifo+0xde>
(ep->xfer_count < ep->xfer_len) && (ep->xfer_len != 0U))
800569e: 68fb ldr r3, [r7, #12]
80056a0: 691b ldr r3, [r3, #16]
80056a2: 2b00 cmp r3, #0
80056a4: d1bf bne.n 8005626 <PCD_WriteEmptyTxFifo+0x5e>
}
if (ep->xfer_len <= ep->xfer_count)
80056a6: 68fb ldr r3, [r7, #12]
80056a8: 691a ldr r2, [r3, #16]
80056aa: 68fb ldr r3, [r7, #12]
80056ac: 695b ldr r3, [r3, #20]
80056ae: 429a cmp r2, r3
80056b0: d811 bhi.n 80056d6 <PCD_WriteEmptyTxFifo+0x10e>
{
fifoemptymsk = (uint32_t)(0x1UL << (epnum & EP_ADDR_MSK));
80056b2: 683b ldr r3, [r7, #0]
80056b4: f003 030f and.w r3, r3, #15
80056b8: 2201 movs r2, #1
80056ba: fa02 f303 lsl.w r3, r2, r3
80056be: 60bb str r3, [r7, #8]
USBx_DEVICE->DIEPEMPMSK &= ~fifoemptymsk;
80056c0: 693b ldr r3, [r7, #16]
80056c2: f503 6300 add.w r3, r3, #2048 @ 0x800
80056c6: 6b5a ldr r2, [r3, #52] @ 0x34
80056c8: 68bb ldr r3, [r7, #8]
80056ca: 43db mvns r3, r3
80056cc: 6939 ldr r1, [r7, #16]
80056ce: f501 6100 add.w r1, r1, #2048 @ 0x800
80056d2: 4013 ands r3, r2
80056d4: 634b str r3, [r1, #52] @ 0x34
}
return HAL_OK;
80056d6: 2300 movs r3, #0
}
80056d8: 4618 mov r0, r3
80056da: 3720 adds r7, #32
80056dc: 46bd mov sp, r7
80056de: bd80 pop {r7, pc}
080056e0 <PCD_EP_OutXfrComplete_int>:
* @param hpcd PCD handle
* @param epnum endpoint number
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_OutXfrComplete_int(PCD_HandleTypeDef *hpcd, uint32_t epnum)
{
80056e0: b580 push {r7, lr}
80056e2: b088 sub sp, #32
80056e4: af00 add r7, sp, #0
80056e6: 6078 str r0, [r7, #4]
80056e8: 6039 str r1, [r7, #0]
USB_OTG_EPTypeDef *ep;
const USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
80056ea: 687b ldr r3, [r7, #4]
80056ec: 681b ldr r3, [r3, #0]
80056ee: 61fb str r3, [r7, #28]
uint32_t USBx_BASE = (uint32_t)USBx;
80056f0: 69fb ldr r3, [r7, #28]
80056f2: 61bb str r3, [r7, #24]
uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U);
80056f4: 69fb ldr r3, [r7, #28]
80056f6: 333c adds r3, #60 @ 0x3c
80056f8: 3304 adds r3, #4
80056fa: 681b ldr r3, [r3, #0]
80056fc: 617b str r3, [r7, #20]
uint32_t DoepintReg = USBx_OUTEP(epnum)->DOEPINT;
80056fe: 683b ldr r3, [r7, #0]
8005700: 015a lsls r2, r3, #5
8005702: 69bb ldr r3, [r7, #24]
8005704: 4413 add r3, r2
8005706: f503 6330 add.w r3, r3, #2816 @ 0xb00
800570a: 689b ldr r3, [r3, #8]
800570c: 613b str r3, [r7, #16]
if (hpcd->Init.dma_enable == 1U)
800570e: 687b ldr r3, [r7, #4]
8005710: 799b ldrb r3, [r3, #6]
8005712: 2b01 cmp r3, #1
8005714: d17b bne.n 800580e <PCD_EP_OutXfrComplete_int+0x12e>
{
if ((DoepintReg & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) /* Class C */
8005716: 693b ldr r3, [r7, #16]
8005718: f003 0308 and.w r3, r3, #8
800571c: 2b00 cmp r3, #0
800571e: d015 beq.n 800574c <PCD_EP_OutXfrComplete_int+0x6c>
{
/* StupPktRcvd = 1 this is a setup packet */
if ((gSNPSiD > USB_OTG_CORE_ID_300A) &&
8005720: 697b ldr r3, [r7, #20]
8005722: 4a61 ldr r2, [pc, #388] @ (80058a8 <PCD_EP_OutXfrComplete_int+0x1c8>)
8005724: 4293 cmp r3, r2
8005726: f240 80b9 bls.w 800589c <PCD_EP_OutXfrComplete_int+0x1bc>
((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX))
800572a: 693b ldr r3, [r7, #16]
800572c: f403 4300 and.w r3, r3, #32768 @ 0x8000
if ((gSNPSiD > USB_OTG_CORE_ID_300A) &&
8005730: 2b00 cmp r3, #0
8005732: f000 80b3 beq.w 800589c <PCD_EP_OutXfrComplete_int+0x1bc>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX);
8005736: 683b ldr r3, [r7, #0]
8005738: 015a lsls r2, r3, #5
800573a: 69bb ldr r3, [r7, #24]
800573c: 4413 add r3, r2
800573e: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005742: 461a mov r2, r3
8005744: f44f 4300 mov.w r3, #32768 @ 0x8000
8005748: 6093 str r3, [r2, #8]
800574a: e0a7 b.n 800589c <PCD_EP_OutXfrComplete_int+0x1bc>
}
}
else if ((DoepintReg & USB_OTG_DOEPINT_OTEPSPR) == USB_OTG_DOEPINT_OTEPSPR) /* Class E */
800574c: 693b ldr r3, [r7, #16]
800574e: f003 0320 and.w r3, r3, #32
8005752: 2b00 cmp r3, #0
8005754: d009 beq.n 800576a <PCD_EP_OutXfrComplete_int+0x8a>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPSPR);
8005756: 683b ldr r3, [r7, #0]
8005758: 015a lsls r2, r3, #5
800575a: 69bb ldr r3, [r7, #24]
800575c: 4413 add r3, r2
800575e: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005762: 461a mov r2, r3
8005764: 2320 movs r3, #32
8005766: 6093 str r3, [r2, #8]
8005768: e098 b.n 800589c <PCD_EP_OutXfrComplete_int+0x1bc>
}
else if ((DoepintReg & (USB_OTG_DOEPINT_STUP | USB_OTG_DOEPINT_OTEPSPR)) == 0U)
800576a: 693b ldr r3, [r7, #16]
800576c: f003 0328 and.w r3, r3, #40 @ 0x28
8005770: 2b00 cmp r3, #0
8005772: f040 8093 bne.w 800589c <PCD_EP_OutXfrComplete_int+0x1bc>
{
/* StupPktRcvd = 1 this is a setup packet */
if ((gSNPSiD > USB_OTG_CORE_ID_300A) &&
8005776: 697b ldr r3, [r7, #20]
8005778: 4a4b ldr r2, [pc, #300] @ (80058a8 <PCD_EP_OutXfrComplete_int+0x1c8>)
800577a: 4293 cmp r3, r2
800577c: d90f bls.n 800579e <PCD_EP_OutXfrComplete_int+0xbe>
((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX))
800577e: 693b ldr r3, [r7, #16]
8005780: f403 4300 and.w r3, r3, #32768 @ 0x8000
if ((gSNPSiD > USB_OTG_CORE_ID_300A) &&
8005784: 2b00 cmp r3, #0
8005786: d00a beq.n 800579e <PCD_EP_OutXfrComplete_int+0xbe>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX);
8005788: 683b ldr r3, [r7, #0]
800578a: 015a lsls r2, r3, #5
800578c: 69bb ldr r3, [r7, #24]
800578e: 4413 add r3, r2
8005790: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005794: 461a mov r2, r3
8005796: f44f 4300 mov.w r3, #32768 @ 0x8000
800579a: 6093 str r3, [r2, #8]
800579c: e07e b.n 800589c <PCD_EP_OutXfrComplete_int+0x1bc>
}
else
{
ep = &hpcd->OUT_ep[epnum];
800579e: 683a ldr r2, [r7, #0]
80057a0: 4613 mov r3, r2
80057a2: 00db lsls r3, r3, #3
80057a4: 4413 add r3, r2
80057a6: 009b lsls r3, r3, #2
80057a8: f503 7314 add.w r3, r3, #592 @ 0x250
80057ac: 687a ldr r2, [r7, #4]
80057ae: 4413 add r3, r2
80057b0: 3304 adds r3, #4
80057b2: 60fb str r3, [r7, #12]
/* out data packet received over EP */
ep->xfer_count = ep->xfer_size - (USBx_OUTEP(epnum)->DOEPTSIZ & USB_OTG_DOEPTSIZ_XFRSIZ);
80057b4: 68fb ldr r3, [r7, #12]
80057b6: 6a1a ldr r2, [r3, #32]
80057b8: 683b ldr r3, [r7, #0]
80057ba: 0159 lsls r1, r3, #5
80057bc: 69bb ldr r3, [r7, #24]
80057be: 440b add r3, r1
80057c0: f503 6330 add.w r3, r3, #2816 @ 0xb00
80057c4: 691b ldr r3, [r3, #16]
80057c6: f3c3 0312 ubfx r3, r3, #0, #19
80057ca: 1ad2 subs r2, r2, r3
80057cc: 68fb ldr r3, [r7, #12]
80057ce: 615a str r2, [r3, #20]
if (epnum == 0U)
80057d0: 683b ldr r3, [r7, #0]
80057d2: 2b00 cmp r3, #0
80057d4: d114 bne.n 8005800 <PCD_EP_OutXfrComplete_int+0x120>
{
if (ep->xfer_len == 0U)
80057d6: 68fb ldr r3, [r7, #12]
80057d8: 691b ldr r3, [r3, #16]
80057da: 2b00 cmp r3, #0
80057dc: d109 bne.n 80057f2 <PCD_EP_OutXfrComplete_int+0x112>
{
/* this is ZLP, so prepare EP0 for next setup */
(void)USB_EP0_OutStart(hpcd->Instance, 1U, (uint8_t *)hpcd->Setup);
80057de: 687b ldr r3, [r7, #4]
80057e0: 6818 ldr r0, [r3, #0]
80057e2: 687b ldr r3, [r7, #4]
80057e4: f203 439c addw r3, r3, #1180 @ 0x49c
80057e8: 461a mov r2, r3
80057ea: 2101 movs r1, #1
80057ec: f003 fa90 bl 8008d10 <USB_EP0_OutStart>
80057f0: e006 b.n 8005800 <PCD_EP_OutXfrComplete_int+0x120>
}
else
{
ep->xfer_buff += ep->xfer_count;
80057f2: 68fb ldr r3, [r7, #12]
80057f4: 68da ldr r2, [r3, #12]
80057f6: 68fb ldr r3, [r7, #12]
80057f8: 695b ldr r3, [r3, #20]
80057fa: 441a add r2, r3
80057fc: 68fb ldr r3, [r7, #12]
80057fe: 60da str r2, [r3, #12]
}
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, (uint8_t)epnum);
#else
HAL_PCD_DataOutStageCallback(hpcd, (uint8_t)epnum);
8005800: 683b ldr r3, [r7, #0]
8005802: b2db uxtb r3, r3
8005804: 4619 mov r1, r3
8005806: 6878 ldr r0, [r7, #4]
8005808: f00d f8c4 bl 8012994 <HAL_PCD_DataOutStageCallback>
800580c: e046 b.n 800589c <PCD_EP_OutXfrComplete_int+0x1bc>
/* ... */
}
}
else
{
if (gSNPSiD == USB_OTG_CORE_ID_310A)
800580e: 697b ldr r3, [r7, #20]
8005810: 4a26 ldr r2, [pc, #152] @ (80058ac <PCD_EP_OutXfrComplete_int+0x1cc>)
8005812: 4293 cmp r3, r2
8005814: d124 bne.n 8005860 <PCD_EP_OutXfrComplete_int+0x180>
{
/* StupPktRcvd = 1 this is a setup packet */
if ((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX)
8005816: 693b ldr r3, [r7, #16]
8005818: f403 4300 and.w r3, r3, #32768 @ 0x8000
800581c: 2b00 cmp r3, #0
800581e: d00a beq.n 8005836 <PCD_EP_OutXfrComplete_int+0x156>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX);
8005820: 683b ldr r3, [r7, #0]
8005822: 015a lsls r2, r3, #5
8005824: 69bb ldr r3, [r7, #24]
8005826: 4413 add r3, r2
8005828: f503 6330 add.w r3, r3, #2816 @ 0xb00
800582c: 461a mov r2, r3
800582e: f44f 4300 mov.w r3, #32768 @ 0x8000
8005832: 6093 str r3, [r2, #8]
8005834: e032 b.n 800589c <PCD_EP_OutXfrComplete_int+0x1bc>
}
else
{
if ((DoepintReg & USB_OTG_DOEPINT_OTEPSPR) == USB_OTG_DOEPINT_OTEPSPR)
8005836: 693b ldr r3, [r7, #16]
8005838: f003 0320 and.w r3, r3, #32
800583c: 2b00 cmp r3, #0
800583e: d008 beq.n 8005852 <PCD_EP_OutXfrComplete_int+0x172>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPSPR);
8005840: 683b ldr r3, [r7, #0]
8005842: 015a lsls r2, r3, #5
8005844: 69bb ldr r3, [r7, #24]
8005846: 4413 add r3, r2
8005848: f503 6330 add.w r3, r3, #2816 @ 0xb00
800584c: 461a mov r2, r3
800584e: 2320 movs r3, #32
8005850: 6093 str r3, [r2, #8]
}
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, (uint8_t)epnum);
#else
HAL_PCD_DataOutStageCallback(hpcd, (uint8_t)epnum);
8005852: 683b ldr r3, [r7, #0]
8005854: b2db uxtb r3, r3
8005856: 4619 mov r1, r3
8005858: 6878 ldr r0, [r7, #4]
800585a: f00d f89b bl 8012994 <HAL_PCD_DataOutStageCallback>
800585e: e01d b.n 800589c <PCD_EP_OutXfrComplete_int+0x1bc>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
}
else
{
if ((epnum == 0U) && (hpcd->OUT_ep[epnum].xfer_len == 0U))
8005860: 683b ldr r3, [r7, #0]
8005862: 2b00 cmp r3, #0
8005864: d114 bne.n 8005890 <PCD_EP_OutXfrComplete_int+0x1b0>
8005866: 6879 ldr r1, [r7, #4]
8005868: 683a ldr r2, [r7, #0]
800586a: 4613 mov r3, r2
800586c: 00db lsls r3, r3, #3
800586e: 4413 add r3, r2
8005870: 009b lsls r3, r3, #2
8005872: 440b add r3, r1
8005874: f503 7319 add.w r3, r3, #612 @ 0x264
8005878: 681b ldr r3, [r3, #0]
800587a: 2b00 cmp r3, #0
800587c: d108 bne.n 8005890 <PCD_EP_OutXfrComplete_int+0x1b0>
{
/* this is ZLP, so prepare EP0 for next setup */
(void)USB_EP0_OutStart(hpcd->Instance, 0U, (uint8_t *)hpcd->Setup);
800587e: 687b ldr r3, [r7, #4]
8005880: 6818 ldr r0, [r3, #0]
8005882: 687b ldr r3, [r7, #4]
8005884: f203 439c addw r3, r3, #1180 @ 0x49c
8005888: 461a mov r2, r3
800588a: 2100 movs r1, #0
800588c: f003 fa40 bl 8008d10 <USB_EP0_OutStart>
}
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, (uint8_t)epnum);
#else
HAL_PCD_DataOutStageCallback(hpcd, (uint8_t)epnum);
8005890: 683b ldr r3, [r7, #0]
8005892: b2db uxtb r3, r3
8005894: 4619 mov r1, r3
8005896: 6878 ldr r0, [r7, #4]
8005898: f00d f87c bl 8012994 <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
}
return HAL_OK;
800589c: 2300 movs r3, #0
}
800589e: 4618 mov r0, r3
80058a0: 3720 adds r7, #32
80058a2: 46bd mov sp, r7
80058a4: bd80 pop {r7, pc}
80058a6: bf00 nop
80058a8: 4f54300a .word 0x4f54300a
80058ac: 4f54310a .word 0x4f54310a
080058b0 <PCD_EP_OutSetupPacket_int>:
* @param hpcd PCD handle
* @param epnum endpoint number
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_OutSetupPacket_int(PCD_HandleTypeDef *hpcd, uint32_t epnum)
{
80058b0: b580 push {r7, lr}
80058b2: b086 sub sp, #24
80058b4: af00 add r7, sp, #0
80058b6: 6078 str r0, [r7, #4]
80058b8: 6039 str r1, [r7, #0]
const USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
80058ba: 687b ldr r3, [r7, #4]
80058bc: 681b ldr r3, [r3, #0]
80058be: 617b str r3, [r7, #20]
uint32_t USBx_BASE = (uint32_t)USBx;
80058c0: 697b ldr r3, [r7, #20]
80058c2: 613b str r3, [r7, #16]
uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U);
80058c4: 697b ldr r3, [r7, #20]
80058c6: 333c adds r3, #60 @ 0x3c
80058c8: 3304 adds r3, #4
80058ca: 681b ldr r3, [r3, #0]
80058cc: 60fb str r3, [r7, #12]
uint32_t DoepintReg = USBx_OUTEP(epnum)->DOEPINT;
80058ce: 683b ldr r3, [r7, #0]
80058d0: 015a lsls r2, r3, #5
80058d2: 693b ldr r3, [r7, #16]
80058d4: 4413 add r3, r2
80058d6: f503 6330 add.w r3, r3, #2816 @ 0xb00
80058da: 689b ldr r3, [r3, #8]
80058dc: 60bb str r3, [r7, #8]
if ((gSNPSiD > USB_OTG_CORE_ID_300A) &&
80058de: 68fb ldr r3, [r7, #12]
80058e0: 4a15 ldr r2, [pc, #84] @ (8005938 <PCD_EP_OutSetupPacket_int+0x88>)
80058e2: 4293 cmp r3, r2
80058e4: d90e bls.n 8005904 <PCD_EP_OutSetupPacket_int+0x54>
((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX))
80058e6: 68bb ldr r3, [r7, #8]
80058e8: f403 4300 and.w r3, r3, #32768 @ 0x8000
if ((gSNPSiD > USB_OTG_CORE_ID_300A) &&
80058ec: 2b00 cmp r3, #0
80058ee: d009 beq.n 8005904 <PCD_EP_OutSetupPacket_int+0x54>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX);
80058f0: 683b ldr r3, [r7, #0]
80058f2: 015a lsls r2, r3, #5
80058f4: 693b ldr r3, [r7, #16]
80058f6: 4413 add r3, r2
80058f8: f503 6330 add.w r3, r3, #2816 @ 0xb00
80058fc: 461a mov r2, r3
80058fe: f44f 4300 mov.w r3, #32768 @ 0x8000
8005902: 6093 str r3, [r2, #8]
/* Inform the upper layer that a setup packet is available */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
8005904: 6878 ldr r0, [r7, #4]
8005906: f00d f833 bl 8012970 <HAL_PCD_SetupStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((gSNPSiD > USB_OTG_CORE_ID_300A) && (hpcd->Init.dma_enable == 1U))
800590a: 68fb ldr r3, [r7, #12]
800590c: 4a0a ldr r2, [pc, #40] @ (8005938 <PCD_EP_OutSetupPacket_int+0x88>)
800590e: 4293 cmp r3, r2
8005910: d90c bls.n 800592c <PCD_EP_OutSetupPacket_int+0x7c>
8005912: 687b ldr r3, [r7, #4]
8005914: 799b ldrb r3, [r3, #6]
8005916: 2b01 cmp r3, #1
8005918: d108 bne.n 800592c <PCD_EP_OutSetupPacket_int+0x7c>
{
(void)USB_EP0_OutStart(hpcd->Instance, 1U, (uint8_t *)hpcd->Setup);
800591a: 687b ldr r3, [r7, #4]
800591c: 6818 ldr r0, [r3, #0]
800591e: 687b ldr r3, [r7, #4]
8005920: f203 439c addw r3, r3, #1180 @ 0x49c
8005924: 461a mov r2, r3
8005926: 2101 movs r1, #1
8005928: f003 f9f2 bl 8008d10 <USB_EP0_OutStart>
}
return HAL_OK;
800592c: 2300 movs r3, #0
}
800592e: 4618 mov r0, r3
8005930: 3718 adds r7, #24
8005932: 46bd mov sp, r7
8005934: bd80 pop {r7, pc}
8005936: bf00 nop
8005938: 4f54300a .word 0x4f54300a
0800593c <HAL_PCDEx_SetTxFiFo>:
* @param fifo The number of Tx fifo
* @param size Fifo size
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size)
{
800593c: b480 push {r7}
800593e: b085 sub sp, #20
8005940: af00 add r7, sp, #0
8005942: 6078 str r0, [r7, #4]
8005944: 460b mov r3, r1
8005946: 70fb strb r3, [r7, #3]
8005948: 4613 mov r3, r2
800594a: 803b strh r3, [r7, #0]
--> Txn should be configured with the minimum space of 16 words
The FIFO is used optimally when used TxFIFOs are allocated in the top
of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
When DMA is used 3n * FIFO locations should be reserved for internal DMA registers */
Tx_Offset = hpcd->Instance->GRXFSIZ;
800594c: 687b ldr r3, [r7, #4]
800594e: 681b ldr r3, [r3, #0]
8005950: 6a5b ldr r3, [r3, #36] @ 0x24
8005952: 60bb str r3, [r7, #8]
if (fifo == 0U)
8005954: 78fb ldrb r3, [r7, #3]
8005956: 2b00 cmp r3, #0
8005958: d107 bne.n 800596a <HAL_PCDEx_SetTxFiFo+0x2e>
{
hpcd->Instance->DIEPTXF0_HNPTXFSIZ = ((uint32_t)size << 16) | Tx_Offset;
800595a: 883b ldrh r3, [r7, #0]
800595c: 0419 lsls r1, r3, #16
800595e: 687b ldr r3, [r7, #4]
8005960: 681b ldr r3, [r3, #0]
8005962: 68ba ldr r2, [r7, #8]
8005964: 430a orrs r2, r1
8005966: 629a str r2, [r3, #40] @ 0x28
8005968: e028 b.n 80059bc <HAL_PCDEx_SetTxFiFo+0x80>
}
else
{
Tx_Offset += (hpcd->Instance->DIEPTXF0_HNPTXFSIZ) >> 16;
800596a: 687b ldr r3, [r7, #4]
800596c: 681b ldr r3, [r3, #0]
800596e: 6a9b ldr r3, [r3, #40] @ 0x28
8005970: 0c1b lsrs r3, r3, #16
8005972: 68ba ldr r2, [r7, #8]
8005974: 4413 add r3, r2
8005976: 60bb str r3, [r7, #8]
for (i = 0U; i < (fifo - 1U); i++)
8005978: 2300 movs r3, #0
800597a: 73fb strb r3, [r7, #15]
800597c: e00d b.n 800599a <HAL_PCDEx_SetTxFiFo+0x5e>
{
Tx_Offset += (hpcd->Instance->DIEPTXF[i] >> 16);
800597e: 687b ldr r3, [r7, #4]
8005980: 681a ldr r2, [r3, #0]
8005982: 7bfb ldrb r3, [r7, #15]
8005984: 3340 adds r3, #64 @ 0x40
8005986: 009b lsls r3, r3, #2
8005988: 4413 add r3, r2
800598a: 685b ldr r3, [r3, #4]
800598c: 0c1b lsrs r3, r3, #16
800598e: 68ba ldr r2, [r7, #8]
8005990: 4413 add r3, r2
8005992: 60bb str r3, [r7, #8]
for (i = 0U; i < (fifo - 1U); i++)
8005994: 7bfb ldrb r3, [r7, #15]
8005996: 3301 adds r3, #1
8005998: 73fb strb r3, [r7, #15]
800599a: 7bfa ldrb r2, [r7, #15]
800599c: 78fb ldrb r3, [r7, #3]
800599e: 3b01 subs r3, #1
80059a0: 429a cmp r2, r3
80059a2: d3ec bcc.n 800597e <HAL_PCDEx_SetTxFiFo+0x42>
}
/* Multiply Tx_Size by 2 to get higher performance */
hpcd->Instance->DIEPTXF[fifo - 1U] = ((uint32_t)size << 16) | Tx_Offset;
80059a4: 883b ldrh r3, [r7, #0]
80059a6: 0418 lsls r0, r3, #16
80059a8: 687b ldr r3, [r7, #4]
80059aa: 6819 ldr r1, [r3, #0]
80059ac: 78fb ldrb r3, [r7, #3]
80059ae: 3b01 subs r3, #1
80059b0: 68ba ldr r2, [r7, #8]
80059b2: 4302 orrs r2, r0
80059b4: 3340 adds r3, #64 @ 0x40
80059b6: 009b lsls r3, r3, #2
80059b8: 440b add r3, r1
80059ba: 605a str r2, [r3, #4]
}
return HAL_OK;
80059bc: 2300 movs r3, #0
}
80059be: 4618 mov r0, r3
80059c0: 3714 adds r7, #20
80059c2: 46bd mov sp, r7
80059c4: f85d 7b04 ldr.w r7, [sp], #4
80059c8: 4770 bx lr
080059ca <HAL_PCDEx_SetRxFiFo>:
* @param hpcd PCD handle
* @param size Size of Rx fifo
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size)
{
80059ca: b480 push {r7}
80059cc: b083 sub sp, #12
80059ce: af00 add r7, sp, #0
80059d0: 6078 str r0, [r7, #4]
80059d2: 460b mov r3, r1
80059d4: 807b strh r3, [r7, #2]
hpcd->Instance->GRXFSIZ = size;
80059d6: 687b ldr r3, [r7, #4]
80059d8: 681b ldr r3, [r3, #0]
80059da: 887a ldrh r2, [r7, #2]
80059dc: 625a str r2, [r3, #36] @ 0x24
return HAL_OK;
80059de: 2300 movs r3, #0
}
80059e0: 4618 mov r0, r3
80059e2: 370c adds r7, #12
80059e4: 46bd mov sp, r7
80059e6: f85d 7b04 ldr.w r7, [sp], #4
80059ea: 4770 bx lr
080059ec <HAL_PCDEx_ActivateLPM>:
* @brief Activate LPM feature.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd)
{
80059ec: b480 push {r7}
80059ee: b085 sub sp, #20
80059f0: af00 add r7, sp, #0
80059f2: 6078 str r0, [r7, #4]
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
80059f4: 687b ldr r3, [r7, #4]
80059f6: 681b ldr r3, [r3, #0]
80059f8: 60fb str r3, [r7, #12]
hpcd->lpm_active = 1U;
80059fa: 687b ldr r3, [r7, #4]
80059fc: 2201 movs r2, #1
80059fe: f8c3 24d8 str.w r2, [r3, #1240] @ 0x4d8
hpcd->LPM_State = LPM_L0;
8005a02: 687b ldr r3, [r7, #4]
8005a04: 2200 movs r2, #0
8005a06: f883 24cc strb.w r2, [r3, #1228] @ 0x4cc
USBx->GINTMSK |= USB_OTG_GINTMSK_LPMINTM;
8005a0a: 68fb ldr r3, [r7, #12]
8005a0c: 699b ldr r3, [r3, #24]
8005a0e: f043 6200 orr.w r2, r3, #134217728 @ 0x8000000
8005a12: 68fb ldr r3, [r7, #12]
8005a14: 619a str r2, [r3, #24]
USBx->GLPMCFG |= (USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL);
8005a16: 68fb ldr r3, [r7, #12]
8005a18: 6d5b ldr r3, [r3, #84] @ 0x54
8005a1a: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8005a1e: f043 0303 orr.w r3, r3, #3
8005a22: 68fa ldr r2, [r7, #12]
8005a24: 6553 str r3, [r2, #84] @ 0x54
return HAL_OK;
8005a26: 2300 movs r3, #0
}
8005a28: 4618 mov r0, r3
8005a2a: 3714 adds r7, #20
8005a2c: 46bd mov sp, r7
8005a2e: f85d 7b04 ldr.w r7, [sp], #4
8005a32: 4770 bx lr
08005a34 <HAL_PCDEx_LPM_Callback>:
* @param hpcd PCD handle
* @param msg LPM message
* @retval HAL status
*/
__weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg)
{
8005a34: b480 push {r7}
8005a36: b083 sub sp, #12
8005a38: af00 add r7, sp, #0
8005a3a: 6078 str r0, [r7, #4]
8005a3c: 460b mov r3, r1
8005a3e: 70fb strb r3, [r7, #3]
UNUSED(msg);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_PCDEx_LPM_Callback could be implemented in the user file
*/
}
8005a40: bf00 nop
8005a42: 370c adds r7, #12
8005a44: 46bd mov sp, r7
8005a46: f85d 7b04 ldr.w r7, [sp], #4
8005a4a: 4770 bx lr
08005a4c <HAL_RCC_ClockConfig>:
* HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
* (for more details refer to section above "Initialization/de-initialization functions")
* @retval None
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8005a4c: b580 push {r7, lr}
8005a4e: b084 sub sp, #16
8005a50: af00 add r7, sp, #0
8005a52: 6078 str r0, [r7, #4]
8005a54: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
8005a56: 687b ldr r3, [r7, #4]
8005a58: 2b00 cmp r3, #0
8005a5a: d101 bne.n 8005a60 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
8005a5c: 2301 movs r3, #1
8005a5e: e0cc b.n 8005bfa <HAL_RCC_ClockConfig+0x1ae>
/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
must be correctly programmed according to the frequency of the CPU clock
(HCLK) and the supply voltage of the device. */
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
8005a60: 4b68 ldr r3, [pc, #416] @ (8005c04 <HAL_RCC_ClockConfig+0x1b8>)
8005a62: 681b ldr r3, [r3, #0]
8005a64: f003 0307 and.w r3, r3, #7
8005a68: 683a ldr r2, [r7, #0]
8005a6a: 429a cmp r2, r3
8005a6c: d90c bls.n 8005a88 <HAL_RCC_ClockConfig+0x3c>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8005a6e: 4b65 ldr r3, [pc, #404] @ (8005c04 <HAL_RCC_ClockConfig+0x1b8>)
8005a70: 683a ldr r2, [r7, #0]
8005a72: b2d2 uxtb r2, r2
8005a74: 701a strb r2, [r3, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8005a76: 4b63 ldr r3, [pc, #396] @ (8005c04 <HAL_RCC_ClockConfig+0x1b8>)
8005a78: 681b ldr r3, [r3, #0]
8005a7a: f003 0307 and.w r3, r3, #7
8005a7e: 683a ldr r2, [r7, #0]
8005a80: 429a cmp r2, r3
8005a82: d001 beq.n 8005a88 <HAL_RCC_ClockConfig+0x3c>
{
return HAL_ERROR;
8005a84: 2301 movs r3, #1
8005a86: e0b8 b.n 8005bfa <HAL_RCC_ClockConfig+0x1ae>
}
}
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
8005a88: 687b ldr r3, [r7, #4]
8005a8a: 681b ldr r3, [r3, #0]
8005a8c: f003 0302 and.w r3, r3, #2
8005a90: 2b00 cmp r3, #0
8005a92: d020 beq.n 8005ad6 <HAL_RCC_ClockConfig+0x8a>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8005a94: 687b ldr r3, [r7, #4]
8005a96: 681b ldr r3, [r3, #0]
8005a98: f003 0304 and.w r3, r3, #4
8005a9c: 2b00 cmp r3, #0
8005a9e: d005 beq.n 8005aac <HAL_RCC_ClockConfig+0x60>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
8005aa0: 4b59 ldr r3, [pc, #356] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005aa2: 689b ldr r3, [r3, #8]
8005aa4: 4a58 ldr r2, [pc, #352] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005aa6: f443 53e0 orr.w r3, r3, #7168 @ 0x1c00
8005aaa: 6093 str r3, [r2, #8]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8005aac: 687b ldr r3, [r7, #4]
8005aae: 681b ldr r3, [r3, #0]
8005ab0: f003 0308 and.w r3, r3, #8
8005ab4: 2b00 cmp r3, #0
8005ab6: d005 beq.n 8005ac4 <HAL_RCC_ClockConfig+0x78>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
8005ab8: 4b53 ldr r3, [pc, #332] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005aba: 689b ldr r3, [r3, #8]
8005abc: 4a52 ldr r2, [pc, #328] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005abe: f443 4360 orr.w r3, r3, #57344 @ 0xe000
8005ac2: 6093 str r3, [r2, #8]
}
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
8005ac4: 4b50 ldr r3, [pc, #320] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005ac6: 689b ldr r3, [r3, #8]
8005ac8: f023 02f0 bic.w r2, r3, #240 @ 0xf0
8005acc: 687b ldr r3, [r7, #4]
8005ace: 689b ldr r3, [r3, #8]
8005ad0: 494d ldr r1, [pc, #308] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005ad2: 4313 orrs r3, r2
8005ad4: 608b str r3, [r1, #8]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
8005ad6: 687b ldr r3, [r7, #4]
8005ad8: 681b ldr r3, [r3, #0]
8005ada: f003 0301 and.w r3, r3, #1
8005ade: 2b00 cmp r3, #0
8005ae0: d044 beq.n 8005b6c <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
8005ae2: 687b ldr r3, [r7, #4]
8005ae4: 685b ldr r3, [r3, #4]
8005ae6: 2b01 cmp r3, #1
8005ae8: d107 bne.n 8005afa <HAL_RCC_ClockConfig+0xae>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8005aea: 4b47 ldr r3, [pc, #284] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005aec: 681b ldr r3, [r3, #0]
8005aee: f403 3300 and.w r3, r3, #131072 @ 0x20000
8005af2: 2b00 cmp r3, #0
8005af4: d119 bne.n 8005b2a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8005af6: 2301 movs r3, #1
8005af8: e07f b.n 8005bfa <HAL_RCC_ClockConfig+0x1ae>
}
}
/* PLL is selected as System Clock Source */
else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
8005afa: 687b ldr r3, [r7, #4]
8005afc: 685b ldr r3, [r3, #4]
8005afe: 2b02 cmp r3, #2
8005b00: d003 beq.n 8005b0a <HAL_RCC_ClockConfig+0xbe>
(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
8005b02: 687b ldr r3, [r7, #4]
8005b04: 685b ldr r3, [r3, #4]
else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
8005b06: 2b03 cmp r3, #3
8005b08: d107 bne.n 8005b1a <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8005b0a: 4b3f ldr r3, [pc, #252] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005b0c: 681b ldr r3, [r3, #0]
8005b0e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8005b12: 2b00 cmp r3, #0
8005b14: d109 bne.n 8005b2a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8005b16: 2301 movs r3, #1
8005b18: e06f b.n 8005bfa <HAL_RCC_ClockConfig+0x1ae>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8005b1a: 4b3b ldr r3, [pc, #236] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005b1c: 681b ldr r3, [r3, #0]
8005b1e: f003 0302 and.w r3, r3, #2
8005b22: 2b00 cmp r3, #0
8005b24: d101 bne.n 8005b2a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8005b26: 2301 movs r3, #1
8005b28: e067 b.n 8005bfa <HAL_RCC_ClockConfig+0x1ae>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
8005b2a: 4b37 ldr r3, [pc, #220] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005b2c: 689b ldr r3, [r3, #8]
8005b2e: f023 0203 bic.w r2, r3, #3
8005b32: 687b ldr r3, [r7, #4]
8005b34: 685b ldr r3, [r3, #4]
8005b36: 4934 ldr r1, [pc, #208] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005b38: 4313 orrs r3, r2
8005b3a: 608b str r3, [r1, #8]
/* Get Start Tick */
tickstart = HAL_GetTick();
8005b3c: f7fb fe2c bl 8001798 <HAL_GetTick>
8005b40: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8005b42: e00a b.n 8005b5a <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
8005b44: f7fb fe28 bl 8001798 <HAL_GetTick>
8005b48: 4602 mov r2, r0
8005b4a: 68fb ldr r3, [r7, #12]
8005b4c: 1ad3 subs r3, r2, r3
8005b4e: f241 3288 movw r2, #5000 @ 0x1388
8005b52: 4293 cmp r3, r2
8005b54: d901 bls.n 8005b5a <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
8005b56: 2303 movs r3, #3
8005b58: e04f b.n 8005bfa <HAL_RCC_ClockConfig+0x1ae>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8005b5a: 4b2b ldr r3, [pc, #172] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005b5c: 689b ldr r3, [r3, #8]
8005b5e: f003 020c and.w r2, r3, #12
8005b62: 687b ldr r3, [r7, #4]
8005b64: 685b ldr r3, [r3, #4]
8005b66: 009b lsls r3, r3, #2
8005b68: 429a cmp r2, r3
8005b6a: d1eb bne.n 8005b44 <HAL_RCC_ClockConfig+0xf8>
}
}
}
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
8005b6c: 4b25 ldr r3, [pc, #148] @ (8005c04 <HAL_RCC_ClockConfig+0x1b8>)
8005b6e: 681b ldr r3, [r3, #0]
8005b70: f003 0307 and.w r3, r3, #7
8005b74: 683a ldr r2, [r7, #0]
8005b76: 429a cmp r2, r3
8005b78: d20c bcs.n 8005b94 <HAL_RCC_ClockConfig+0x148>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8005b7a: 4b22 ldr r3, [pc, #136] @ (8005c04 <HAL_RCC_ClockConfig+0x1b8>)
8005b7c: 683a ldr r2, [r7, #0]
8005b7e: b2d2 uxtb r2, r2
8005b80: 701a strb r2, [r3, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8005b82: 4b20 ldr r3, [pc, #128] @ (8005c04 <HAL_RCC_ClockConfig+0x1b8>)
8005b84: 681b ldr r3, [r3, #0]
8005b86: f003 0307 and.w r3, r3, #7
8005b8a: 683a ldr r2, [r7, #0]
8005b8c: 429a cmp r2, r3
8005b8e: d001 beq.n 8005b94 <HAL_RCC_ClockConfig+0x148>
{
return HAL_ERROR;
8005b90: 2301 movs r3, #1
8005b92: e032 b.n 8005bfa <HAL_RCC_ClockConfig+0x1ae>
}
}
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8005b94: 687b ldr r3, [r7, #4]
8005b96: 681b ldr r3, [r3, #0]
8005b98: f003 0304 and.w r3, r3, #4
8005b9c: 2b00 cmp r3, #0
8005b9e: d008 beq.n 8005bb2 <HAL_RCC_ClockConfig+0x166>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
8005ba0: 4b19 ldr r3, [pc, #100] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005ba2: 689b ldr r3, [r3, #8]
8005ba4: f423 52e0 bic.w r2, r3, #7168 @ 0x1c00
8005ba8: 687b ldr r3, [r7, #4]
8005baa: 68db ldr r3, [r3, #12]
8005bac: 4916 ldr r1, [pc, #88] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005bae: 4313 orrs r3, r2
8005bb0: 608b str r3, [r1, #8]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8005bb2: 687b ldr r3, [r7, #4]
8005bb4: 681b ldr r3, [r3, #0]
8005bb6: f003 0308 and.w r3, r3, #8
8005bba: 2b00 cmp r3, #0
8005bbc: d009 beq.n 8005bd2 <HAL_RCC_ClockConfig+0x186>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
8005bbe: 4b12 ldr r3, [pc, #72] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005bc0: 689b ldr r3, [r3, #8]
8005bc2: f423 4260 bic.w r2, r3, #57344 @ 0xe000
8005bc6: 687b ldr r3, [r7, #4]
8005bc8: 691b ldr r3, [r3, #16]
8005bca: 00db lsls r3, r3, #3
8005bcc: 490e ldr r1, [pc, #56] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005bce: 4313 orrs r3, r2
8005bd0: 608b str r3, [r1, #8]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
8005bd2: f000 f821 bl 8005c18 <HAL_RCC_GetSysClockFreq>
8005bd6: 4602 mov r2, r0
8005bd8: 4b0b ldr r3, [pc, #44] @ (8005c08 <HAL_RCC_ClockConfig+0x1bc>)
8005bda: 689b ldr r3, [r3, #8]
8005bdc: 091b lsrs r3, r3, #4
8005bde: f003 030f and.w r3, r3, #15
8005be2: 490a ldr r1, [pc, #40] @ (8005c0c <HAL_RCC_ClockConfig+0x1c0>)
8005be4: 5ccb ldrb r3, [r1, r3]
8005be6: fa22 f303 lsr.w r3, r2, r3
8005bea: 4a09 ldr r2, [pc, #36] @ (8005c10 <HAL_RCC_ClockConfig+0x1c4>)
8005bec: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings */
HAL_InitTick(uwTickPrio);
8005bee: 4b09 ldr r3, [pc, #36] @ (8005c14 <HAL_RCC_ClockConfig+0x1c8>)
8005bf0: 681b ldr r3, [r3, #0]
8005bf2: 4618 mov r0, r3
8005bf4: f7fb fc72 bl 80014dc <HAL_InitTick>
return HAL_OK;
8005bf8: 2300 movs r3, #0
}
8005bfa: 4618 mov r0, r3
8005bfc: 3710 adds r7, #16
8005bfe: 46bd mov sp, r7
8005c00: bd80 pop {r7, pc}
8005c02: bf00 nop
8005c04: 40023c00 .word 0x40023c00
8005c08: 40023800 .word 0x40023800
8005c0c: 08013ad0 .word 0x08013ad0
8005c10: 20000000 .word 0x20000000
8005c14: 20000004 .word 0x20000004
08005c18 <HAL_RCC_GetSysClockFreq>:
*
*
* @retval SYSCLK frequency
*/
__weak uint32_t HAL_RCC_GetSysClockFreq(void)
{
8005c18: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
8005c1c: b094 sub sp, #80 @ 0x50
8005c1e: af00 add r7, sp, #0
uint32_t pllm = 0U;
8005c20: 2300 movs r3, #0
8005c22: 647b str r3, [r7, #68] @ 0x44
uint32_t pllvco = 0U;
8005c24: 2300 movs r3, #0
8005c26: 64fb str r3, [r7, #76] @ 0x4c
uint32_t pllp = 0U;
8005c28: 2300 movs r3, #0
8005c2a: 643b str r3, [r7, #64] @ 0x40
uint32_t sysclockfreq = 0U;
8005c2c: 2300 movs r3, #0
8005c2e: 64bb str r3, [r7, #72] @ 0x48
/* Get SYSCLK source -------------------------------------------------------*/
switch (RCC->CFGR & RCC_CFGR_SWS)
8005c30: 4b79 ldr r3, [pc, #484] @ (8005e18 <HAL_RCC_GetSysClockFreq+0x200>)
8005c32: 689b ldr r3, [r3, #8]
8005c34: f003 030c and.w r3, r3, #12
8005c38: 2b08 cmp r3, #8
8005c3a: d00d beq.n 8005c58 <HAL_RCC_GetSysClockFreq+0x40>
8005c3c: 2b08 cmp r3, #8
8005c3e: f200 80e1 bhi.w 8005e04 <HAL_RCC_GetSysClockFreq+0x1ec>
8005c42: 2b00 cmp r3, #0
8005c44: d002 beq.n 8005c4c <HAL_RCC_GetSysClockFreq+0x34>
8005c46: 2b04 cmp r3, #4
8005c48: d003 beq.n 8005c52 <HAL_RCC_GetSysClockFreq+0x3a>
8005c4a: e0db b.n 8005e04 <HAL_RCC_GetSysClockFreq+0x1ec>
{
case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
{
sysclockfreq = HSI_VALUE;
8005c4c: 4b73 ldr r3, [pc, #460] @ (8005e1c <HAL_RCC_GetSysClockFreq+0x204>)
8005c4e: 64bb str r3, [r7, #72] @ 0x48
break;
8005c50: e0db b.n 8005e0a <HAL_RCC_GetSysClockFreq+0x1f2>
}
case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
{
sysclockfreq = HSE_VALUE;
8005c52: 4b73 ldr r3, [pc, #460] @ (8005e20 <HAL_RCC_GetSysClockFreq+0x208>)
8005c54: 64bb str r3, [r7, #72] @ 0x48
break;
8005c56: e0d8 b.n 8005e0a <HAL_RCC_GetSysClockFreq+0x1f2>
}
case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */
{
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
SYSCLK = PLL_VCO / PLLP */
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
8005c58: 4b6f ldr r3, [pc, #444] @ (8005e18 <HAL_RCC_GetSysClockFreq+0x200>)
8005c5a: 685b ldr r3, [r3, #4]
8005c5c: f003 033f and.w r3, r3, #63 @ 0x3f
8005c60: 647b str r3, [r7, #68] @ 0x44
if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
8005c62: 4b6d ldr r3, [pc, #436] @ (8005e18 <HAL_RCC_GetSysClockFreq+0x200>)
8005c64: 685b ldr r3, [r3, #4]
8005c66: f403 0380 and.w r3, r3, #4194304 @ 0x400000
8005c6a: 2b00 cmp r3, #0
8005c6c: d063 beq.n 8005d36 <HAL_RCC_GetSysClockFreq+0x11e>
{
/* HSE used as PLL clock source */
pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
8005c6e: 4b6a ldr r3, [pc, #424] @ (8005e18 <HAL_RCC_GetSysClockFreq+0x200>)
8005c70: 685b ldr r3, [r3, #4]
8005c72: 099b lsrs r3, r3, #6
8005c74: 2200 movs r2, #0
8005c76: 63bb str r3, [r7, #56] @ 0x38
8005c78: 63fa str r2, [r7, #60] @ 0x3c
8005c7a: 6bbb ldr r3, [r7, #56] @ 0x38
8005c7c: f3c3 0308 ubfx r3, r3, #0, #9
8005c80: 633b str r3, [r7, #48] @ 0x30
8005c82: 2300 movs r3, #0
8005c84: 637b str r3, [r7, #52] @ 0x34
8005c86: e9d7 450c ldrd r4, r5, [r7, #48] @ 0x30
8005c8a: 4622 mov r2, r4
8005c8c: 462b mov r3, r5
8005c8e: f04f 0000 mov.w r0, #0
8005c92: f04f 0100 mov.w r1, #0
8005c96: 0159 lsls r1, r3, #5
8005c98: ea41 61d2 orr.w r1, r1, r2, lsr #27
8005c9c: 0150 lsls r0, r2, #5
8005c9e: 4602 mov r2, r0
8005ca0: 460b mov r3, r1
8005ca2: 4621 mov r1, r4
8005ca4: 1a51 subs r1, r2, r1
8005ca6: 6139 str r1, [r7, #16]
8005ca8: 4629 mov r1, r5
8005caa: eb63 0301 sbc.w r3, r3, r1
8005cae: 617b str r3, [r7, #20]
8005cb0: f04f 0200 mov.w r2, #0
8005cb4: f04f 0300 mov.w r3, #0
8005cb8: e9d7 ab04 ldrd sl, fp, [r7, #16]
8005cbc: 4659 mov r1, fp
8005cbe: 018b lsls r3, r1, #6
8005cc0: 4651 mov r1, sl
8005cc2: ea43 6391 orr.w r3, r3, r1, lsr #26
8005cc6: 4651 mov r1, sl
8005cc8: 018a lsls r2, r1, #6
8005cca: 4651 mov r1, sl
8005ccc: ebb2 0801 subs.w r8, r2, r1
8005cd0: 4659 mov r1, fp
8005cd2: eb63 0901 sbc.w r9, r3, r1
8005cd6: f04f 0200 mov.w r2, #0
8005cda: f04f 0300 mov.w r3, #0
8005cde: ea4f 03c9 mov.w r3, r9, lsl #3
8005ce2: ea43 7358 orr.w r3, r3, r8, lsr #29
8005ce6: ea4f 02c8 mov.w r2, r8, lsl #3
8005cea: 4690 mov r8, r2
8005cec: 4699 mov r9, r3
8005cee: 4623 mov r3, r4
8005cf0: eb18 0303 adds.w r3, r8, r3
8005cf4: 60bb str r3, [r7, #8]
8005cf6: 462b mov r3, r5
8005cf8: eb49 0303 adc.w r3, r9, r3
8005cfc: 60fb str r3, [r7, #12]
8005cfe: f04f 0200 mov.w r2, #0
8005d02: f04f 0300 mov.w r3, #0
8005d06: e9d7 4502 ldrd r4, r5, [r7, #8]
8005d0a: 4629 mov r1, r5
8005d0c: 024b lsls r3, r1, #9
8005d0e: 4621 mov r1, r4
8005d10: ea43 53d1 orr.w r3, r3, r1, lsr #23
8005d14: 4621 mov r1, r4
8005d16: 024a lsls r2, r1, #9
8005d18: 4610 mov r0, r2
8005d1a: 4619 mov r1, r3
8005d1c: 6c7b ldr r3, [r7, #68] @ 0x44
8005d1e: 2200 movs r2, #0
8005d20: 62bb str r3, [r7, #40] @ 0x28
8005d22: 62fa str r2, [r7, #44] @ 0x2c
8005d24: e9d7 230a ldrd r2, r3, [r7, #40] @ 0x28
8005d28: f7fa faca bl 80002c0 <__aeabi_uldivmod>
8005d2c: 4602 mov r2, r0
8005d2e: 460b mov r3, r1
8005d30: 4613 mov r3, r2
8005d32: 64fb str r3, [r7, #76] @ 0x4c
8005d34: e058 b.n 8005de8 <HAL_RCC_GetSysClockFreq+0x1d0>
}
else
{
/* HSI used as PLL clock source */
pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
8005d36: 4b38 ldr r3, [pc, #224] @ (8005e18 <HAL_RCC_GetSysClockFreq+0x200>)
8005d38: 685b ldr r3, [r3, #4]
8005d3a: 099b lsrs r3, r3, #6
8005d3c: 2200 movs r2, #0
8005d3e: 4618 mov r0, r3
8005d40: 4611 mov r1, r2
8005d42: f3c0 0308 ubfx r3, r0, #0, #9
8005d46: 623b str r3, [r7, #32]
8005d48: 2300 movs r3, #0
8005d4a: 627b str r3, [r7, #36] @ 0x24
8005d4c: e9d7 8908 ldrd r8, r9, [r7, #32]
8005d50: 4642 mov r2, r8
8005d52: 464b mov r3, r9
8005d54: f04f 0000 mov.w r0, #0
8005d58: f04f 0100 mov.w r1, #0
8005d5c: 0159 lsls r1, r3, #5
8005d5e: ea41 61d2 orr.w r1, r1, r2, lsr #27
8005d62: 0150 lsls r0, r2, #5
8005d64: 4602 mov r2, r0
8005d66: 460b mov r3, r1
8005d68: 4641 mov r1, r8
8005d6a: ebb2 0a01 subs.w sl, r2, r1
8005d6e: 4649 mov r1, r9
8005d70: eb63 0b01 sbc.w fp, r3, r1
8005d74: f04f 0200 mov.w r2, #0
8005d78: f04f 0300 mov.w r3, #0
8005d7c: ea4f 138b mov.w r3, fp, lsl #6
8005d80: ea43 639a orr.w r3, r3, sl, lsr #26
8005d84: ea4f 128a mov.w r2, sl, lsl #6
8005d88: ebb2 040a subs.w r4, r2, sl
8005d8c: eb63 050b sbc.w r5, r3, fp
8005d90: f04f 0200 mov.w r2, #0
8005d94: f04f 0300 mov.w r3, #0
8005d98: 00eb lsls r3, r5, #3
8005d9a: ea43 7354 orr.w r3, r3, r4, lsr #29
8005d9e: 00e2 lsls r2, r4, #3
8005da0: 4614 mov r4, r2
8005da2: 461d mov r5, r3
8005da4: 4643 mov r3, r8
8005da6: 18e3 adds r3, r4, r3
8005da8: 603b str r3, [r7, #0]
8005daa: 464b mov r3, r9
8005dac: eb45 0303 adc.w r3, r5, r3
8005db0: 607b str r3, [r7, #4]
8005db2: f04f 0200 mov.w r2, #0
8005db6: f04f 0300 mov.w r3, #0
8005dba: e9d7 4500 ldrd r4, r5, [r7]
8005dbe: 4629 mov r1, r5
8005dc0: 028b lsls r3, r1, #10
8005dc2: 4621 mov r1, r4
8005dc4: ea43 5391 orr.w r3, r3, r1, lsr #22
8005dc8: 4621 mov r1, r4
8005dca: 028a lsls r2, r1, #10
8005dcc: 4610 mov r0, r2
8005dce: 4619 mov r1, r3
8005dd0: 6c7b ldr r3, [r7, #68] @ 0x44
8005dd2: 2200 movs r2, #0
8005dd4: 61bb str r3, [r7, #24]
8005dd6: 61fa str r2, [r7, #28]
8005dd8: e9d7 2306 ldrd r2, r3, [r7, #24]
8005ddc: f7fa fa70 bl 80002c0 <__aeabi_uldivmod>
8005de0: 4602 mov r2, r0
8005de2: 460b mov r3, r1
8005de4: 4613 mov r3, r2
8005de6: 64fb str r3, [r7, #76] @ 0x4c
}
pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) * 2U);
8005de8: 4b0b ldr r3, [pc, #44] @ (8005e18 <HAL_RCC_GetSysClockFreq+0x200>)
8005dea: 685b ldr r3, [r3, #4]
8005dec: 0c1b lsrs r3, r3, #16
8005dee: f003 0303 and.w r3, r3, #3
8005df2: 3301 adds r3, #1
8005df4: 005b lsls r3, r3, #1
8005df6: 643b str r3, [r7, #64] @ 0x40
sysclockfreq = pllvco / pllp;
8005df8: 6cfa ldr r2, [r7, #76] @ 0x4c
8005dfa: 6c3b ldr r3, [r7, #64] @ 0x40
8005dfc: fbb2 f3f3 udiv r3, r2, r3
8005e00: 64bb str r3, [r7, #72] @ 0x48
break;
8005e02: e002 b.n 8005e0a <HAL_RCC_GetSysClockFreq+0x1f2>
}
default:
{
sysclockfreq = HSI_VALUE;
8005e04: 4b05 ldr r3, [pc, #20] @ (8005e1c <HAL_RCC_GetSysClockFreq+0x204>)
8005e06: 64bb str r3, [r7, #72] @ 0x48
break;
8005e08: bf00 nop
}
}
return sysclockfreq;
8005e0a: 6cbb ldr r3, [r7, #72] @ 0x48
}
8005e0c: 4618 mov r0, r3
8005e0e: 3750 adds r7, #80 @ 0x50
8005e10: 46bd mov sp, r7
8005e12: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
8005e16: bf00 nop
8005e18: 40023800 .word 0x40023800
8005e1c: 00f42400 .word 0x00f42400
8005e20: 007a1200 .word 0x007a1200
08005e24 <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
8005e24: b480 push {r7}
8005e26: af00 add r7, sp, #0
return SystemCoreClock;
8005e28: 4b03 ldr r3, [pc, #12] @ (8005e38 <HAL_RCC_GetHCLKFreq+0x14>)
8005e2a: 681b ldr r3, [r3, #0]
}
8005e2c: 4618 mov r0, r3
8005e2e: 46bd mov sp, r7
8005e30: f85d 7b04 ldr.w r7, [sp], #4
8005e34: 4770 bx lr
8005e36: bf00 nop
8005e38: 20000000 .word 0x20000000
08005e3c <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
8005e3c: b580 push {r7, lr}
8005e3e: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
8005e40: f7ff fff0 bl 8005e24 <HAL_RCC_GetHCLKFreq>
8005e44: 4602 mov r2, r0
8005e46: 4b05 ldr r3, [pc, #20] @ (8005e5c <HAL_RCC_GetPCLK1Freq+0x20>)
8005e48: 689b ldr r3, [r3, #8]
8005e4a: 0a9b lsrs r3, r3, #10
8005e4c: f003 0307 and.w r3, r3, #7
8005e50: 4903 ldr r1, [pc, #12] @ (8005e60 <HAL_RCC_GetPCLK1Freq+0x24>)
8005e52: 5ccb ldrb r3, [r1, r3]
8005e54: fa22 f303 lsr.w r3, r2, r3
}
8005e58: 4618 mov r0, r3
8005e5a: bd80 pop {r7, pc}
8005e5c: 40023800 .word 0x40023800
8005e60: 08013ae0 .word 0x08013ae0
08005e64 <HAL_RCC_GetClockConfig>:
* will be configured.
* @param pFLatency Pointer on the Flash Latency.
* @retval None
*/
void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
{
8005e64: b480 push {r7}
8005e66: b083 sub sp, #12
8005e68: af00 add r7, sp, #0
8005e6a: 6078 str r0, [r7, #4]
8005e6c: 6039 str r1, [r7, #0]
/* Set all possible values for the Clock type parameter --------------------*/
RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
8005e6e: 687b ldr r3, [r7, #4]
8005e70: 220f movs r2, #15
8005e72: 601a str r2, [r3, #0]
/* Get the SYSCLK configuration --------------------------------------------*/
RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
8005e74: 4b12 ldr r3, [pc, #72] @ (8005ec0 <HAL_RCC_GetClockConfig+0x5c>)
8005e76: 689b ldr r3, [r3, #8]
8005e78: f003 0203 and.w r2, r3, #3
8005e7c: 687b ldr r3, [r7, #4]
8005e7e: 605a str r2, [r3, #4]
/* Get the HCLK configuration ----------------------------------------------*/
RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
8005e80: 4b0f ldr r3, [pc, #60] @ (8005ec0 <HAL_RCC_GetClockConfig+0x5c>)
8005e82: 689b ldr r3, [r3, #8]
8005e84: f003 02f0 and.w r2, r3, #240 @ 0xf0
8005e88: 687b ldr r3, [r7, #4]
8005e8a: 609a str r2, [r3, #8]
/* Get the APB1 configuration ----------------------------------------------*/
RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
8005e8c: 4b0c ldr r3, [pc, #48] @ (8005ec0 <HAL_RCC_GetClockConfig+0x5c>)
8005e8e: 689b ldr r3, [r3, #8]
8005e90: f403 52e0 and.w r2, r3, #7168 @ 0x1c00
8005e94: 687b ldr r3, [r7, #4]
8005e96: 60da str r2, [r3, #12]
/* Get the APB2 configuration ----------------------------------------------*/
RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U);
8005e98: 4b09 ldr r3, [pc, #36] @ (8005ec0 <HAL_RCC_GetClockConfig+0x5c>)
8005e9a: 689b ldr r3, [r3, #8]
8005e9c: 08db lsrs r3, r3, #3
8005e9e: f403 52e0 and.w r2, r3, #7168 @ 0x1c00
8005ea2: 687b ldr r3, [r7, #4]
8005ea4: 611a str r2, [r3, #16]
/* Get the Flash Wait State (Latency) configuration ------------------------*/
*pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
8005ea6: 4b07 ldr r3, [pc, #28] @ (8005ec4 <HAL_RCC_GetClockConfig+0x60>)
8005ea8: 681b ldr r3, [r3, #0]
8005eaa: f003 0207 and.w r2, r3, #7
8005eae: 683b ldr r3, [r7, #0]
8005eb0: 601a str r2, [r3, #0]
}
8005eb2: bf00 nop
8005eb4: 370c adds r7, #12
8005eb6: 46bd mov sp, r7
8005eb8: f85d 7b04 ldr.w r7, [sp], #4
8005ebc: 4770 bx lr
8005ebe: bf00 nop
8005ec0: 40023800 .word 0x40023800
8005ec4: 40023c00 .word 0x40023c00
08005ec8 <HAL_RCCEx_PeriphCLKConfig>:
* the backup registers) and RCC_BDCR register are set to their reset values.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
8005ec8: b580 push {r7, lr}
8005eca: b088 sub sp, #32
8005ecc: af00 add r7, sp, #0
8005ece: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8005ed0: 2300 movs r3, #0
8005ed2: 61bb str r3, [r7, #24]
uint32_t tmpreg1 = 0U;
8005ed4: 2300 movs r3, #0
8005ed6: 617b str r3, [r7, #20]
#if defined(STM32F413xx) || defined(STM32F423xx)
uint32_t plli2sq = 0U;
8005ed8: 2300 movs r3, #0
8005eda: 613b str r3, [r7, #16]
#endif /* STM32F413xx || STM32F423xx */
uint32_t plli2sused = 0U;
8005edc: 2300 movs r3, #0
8005ede: 61fb str r3, [r7, #28]
/* Check the peripheral clock selection parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*----------------------------------- I2S APB1 configuration ---------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == (RCC_PERIPHCLK_I2S_APB1))
8005ee0: 687b ldr r3, [r7, #4]
8005ee2: 681b ldr r3, [r3, #0]
8005ee4: f003 0301 and.w r3, r3, #1
8005ee8: 2b00 cmp r3, #0
8005eea: d010 beq.n 8005f0e <HAL_RCCEx_PeriphCLKConfig+0x46>
{
/* Check the parameters */
assert_param(IS_RCC_I2SAPB1CLKSOURCE(PeriphClkInit->I2sApb1ClockSelection));
/* Configure I2S Clock source */
__HAL_RCC_I2S_APB1_CONFIG(PeriphClkInit->I2sApb1ClockSelection);
8005eec: 4b7a ldr r3, [pc, #488] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8005eee: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
8005ef2: f023 62c0 bic.w r2, r3, #100663296 @ 0x6000000
8005ef6: 687b ldr r3, [r7, #4]
8005ef8: 69db ldr r3, [r3, #28]
8005efa: 4977 ldr r1, [pc, #476] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8005efc: 4313 orrs r3, r2
8005efe: f8c1 308c str.w r3, [r1, #140] @ 0x8c
/* Enable the PLLI2S when it's used as clock source for I2S */
if (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)
8005f02: 687b ldr r3, [r7, #4]
8005f04: 69db ldr r3, [r3, #28]
8005f06: 2b00 cmp r3, #0
8005f08: d101 bne.n 8005f0e <HAL_RCCEx_PeriphCLKConfig+0x46>
{
plli2sused = 1U;
8005f0a: 2301 movs r3, #1
8005f0c: 61fb str r3, [r7, #28]
}
}
/*--------------------------------------------------------------------------*/
/*----------------------------------- I2S APB2 configuration ---------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == (RCC_PERIPHCLK_I2S_APB2))
8005f0e: 687b ldr r3, [r7, #4]
8005f10: 681b ldr r3, [r3, #0]
8005f12: f003 0302 and.w r3, r3, #2
8005f16: 2b00 cmp r3, #0
8005f18: d010 beq.n 8005f3c <HAL_RCCEx_PeriphCLKConfig+0x74>
{
/* Check the parameters */
assert_param(IS_RCC_I2SAPB2CLKSOURCE(PeriphClkInit->I2sApb2ClockSelection));
/* Configure I2S Clock source */
__HAL_RCC_I2S_APB2_CONFIG(PeriphClkInit->I2sApb2ClockSelection);
8005f1a: 4b6f ldr r3, [pc, #444] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8005f1c: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
8005f20: f023 52c0 bic.w r2, r3, #402653184 @ 0x18000000
8005f24: 687b ldr r3, [r7, #4]
8005f26: 6a1b ldr r3, [r3, #32]
8005f28: 496b ldr r1, [pc, #428] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8005f2a: 4313 orrs r3, r2
8005f2c: f8c1 308c str.w r3, [r1, #140] @ 0x8c
/* Enable the PLLI2S when it's used as clock source for I2S */
if (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S)
8005f30: 687b ldr r3, [r7, #4]
8005f32: 6a1b ldr r3, [r3, #32]
8005f34: 2b00 cmp r3, #0
8005f36: d101 bne.n 8005f3c <HAL_RCCEx_PeriphCLKConfig+0x74>
{
plli2sused = 1U;
8005f38: 2301 movs r3, #1
8005f3a: 61fb str r3, [r7, #28]
}
/*--------------------------------------------------------------------------*/
#if defined(STM32F413xx) || defined(STM32F423xx)
/*----------------------- SAI1 Block A configuration -----------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAIA) == (RCC_PERIPHCLK_SAIA))
8005f3c: 687b ldr r3, [r7, #4]
8005f3e: 681b ldr r3, [r3, #0]
8005f40: f403 5300 and.w r3, r3, #8192 @ 0x2000
8005f44: 2b00 cmp r3, #0
8005f46: d022 beq.n 8005f8e <HAL_RCCEx_PeriphCLKConfig+0xc6>
{
/* Check the parameters */
assert_param(IS_RCC_SAIACLKSOURCE(PeriphClkInit->SaiAClockSelection));
/* Configure SAI1 Clock source */
__HAL_RCC_SAI_BLOCKACLKSOURCE_CONFIG(PeriphClkInit->SaiAClockSelection);
8005f48: 4b63 ldr r3, [pc, #396] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8005f4a: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
8005f4e: f423 1240 bic.w r2, r3, #3145728 @ 0x300000
8005f52: 687b ldr r3, [r7, #4]
8005f54: 6c9b ldr r3, [r3, #72] @ 0x48
8005f56: 4960 ldr r1, [pc, #384] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8005f58: 4313 orrs r3, r2
8005f5a: f8c1 308c str.w r3, [r1, #140] @ 0x8c
/* Enable the PLLI2S when it's used as clock source for SAI */
if (PeriphClkInit->SaiAClockSelection == RCC_SAIACLKSOURCE_PLLI2SR)
8005f5e: 687b ldr r3, [r7, #4]
8005f60: 6c9b ldr r3, [r3, #72] @ 0x48
8005f62: 2b00 cmp r3, #0
8005f64: d101 bne.n 8005f6a <HAL_RCCEx_PeriphCLKConfig+0xa2>
{
plli2sused = 1U;
8005f66: 2301 movs r3, #1
8005f68: 61fb str r3, [r7, #28]
}
/* Enable the PLLSAI when it's used as clock source for SAI */
if (PeriphClkInit->SaiAClockSelection == RCC_SAIACLKSOURCE_PLLR)
8005f6a: 687b ldr r3, [r7, #4]
8005f6c: 6c9b ldr r3, [r3, #72] @ 0x48
8005f6e: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
8005f72: d10c bne.n 8005f8e <HAL_RCCEx_PeriphCLKConfig+0xc6>
{
/* Check for PLL/DIVR parameters */
assert_param(IS_RCC_PLL_DIVR_VALUE(PeriphClkInit->PLLDivR));
/* SAI_CLK_x = SAI_CLK(first level)/PLLDIVR */
__HAL_RCC_PLL_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLDivR);
8005f74: 4b58 ldr r3, [pc, #352] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8005f76: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
8005f7a: f423 52f8 bic.w r2, r3, #7936 @ 0x1f00
8005f7e: 687b ldr r3, [r7, #4]
8005f80: 695b ldr r3, [r3, #20]
8005f82: 3b01 subs r3, #1
8005f84: 021b lsls r3, r3, #8
8005f86: 4954 ldr r1, [pc, #336] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8005f88: 4313 orrs r3, r2
8005f8a: f8c1 308c str.w r3, [r1, #140] @ 0x8c
}
}
/*--------------------------------------------------------------------------*/
/*---------------------- SAI1 Block B configuration ------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAIB) == (RCC_PERIPHCLK_SAIB))
8005f8e: 687b ldr r3, [r7, #4]
8005f90: 681b ldr r3, [r3, #0]
8005f92: f403 4380 and.w r3, r3, #16384 @ 0x4000
8005f96: 2b00 cmp r3, #0
8005f98: d022 beq.n 8005fe0 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
/* Check the parameters */
assert_param(IS_RCC_SAIBCLKSOURCE(PeriphClkInit->SaiBClockSelection));
/* Configure SAI1 Clock source */
__HAL_RCC_SAI_BLOCKBCLKSOURCE_CONFIG(PeriphClkInit->SaiBClockSelection);
8005f9a: 4b4f ldr r3, [pc, #316] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8005f9c: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
8005fa0: f423 0240 bic.w r2, r3, #12582912 @ 0xc00000
8005fa4: 687b ldr r3, [r7, #4]
8005fa6: 6cdb ldr r3, [r3, #76] @ 0x4c
8005fa8: 494b ldr r1, [pc, #300] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8005faa: 4313 orrs r3, r2
8005fac: f8c1 308c str.w r3, [r1, #140] @ 0x8c
/* Enable the PLLI2S when it's used as clock source for SAI */
if (PeriphClkInit->SaiBClockSelection == RCC_SAIBCLKSOURCE_PLLI2SR)
8005fb0: 687b ldr r3, [r7, #4]
8005fb2: 6cdb ldr r3, [r3, #76] @ 0x4c
8005fb4: 2b00 cmp r3, #0
8005fb6: d101 bne.n 8005fbc <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
plli2sused = 1U;
8005fb8: 2301 movs r3, #1
8005fba: 61fb str r3, [r7, #28]
}
/* Enable the PLLSAI when it's used as clock source for SAI */
if (PeriphClkInit->SaiBClockSelection == RCC_SAIBCLKSOURCE_PLLR)
8005fbc: 687b ldr r3, [r7, #4]
8005fbe: 6cdb ldr r3, [r3, #76] @ 0x4c
8005fc0: f5b3 0f00 cmp.w r3, #8388608 @ 0x800000
8005fc4: d10c bne.n 8005fe0 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
/* Check for PLL/DIVR parameters */
assert_param(IS_RCC_PLL_DIVR_VALUE(PeriphClkInit->PLLDivR));
/* SAI_CLK_x = SAI_CLK(first level)/PLLDIVR */
__HAL_RCC_PLL_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLDivR);
8005fc6: 4b44 ldr r3, [pc, #272] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8005fc8: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
8005fcc: f423 52f8 bic.w r2, r3, #7936 @ 0x1f00
8005fd0: 687b ldr r3, [r7, #4]
8005fd2: 695b ldr r3, [r3, #20]
8005fd4: 3b01 subs r3, #1
8005fd6: 021b lsls r3, r3, #8
8005fd8: 493f ldr r1, [pc, #252] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8005fda: 4313 orrs r3, r2
8005fdc: f8c1 308c str.w r3, [r1, #140] @ 0x8c
}
/*--------------------------------------------------------------------------*/
#endif /* STM32F413xx || STM32F423xx */
/*------------------------------------ RTC configuration -------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
8005fe0: 687b ldr r3, [r7, #4]
8005fe2: 681b ldr r3, [r3, #0]
8005fe4: f003 0308 and.w r3, r3, #8
8005fe8: 2b00 cmp r3, #0
8005fea: f000 808a beq.w 8006102 <HAL_RCCEx_PeriphCLKConfig+0x23a>
{
/* Check for RTC Parameters used to output RTCCLK */
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* Enable Power Clock*/
__HAL_RCC_PWR_CLK_ENABLE();
8005fee: 2300 movs r3, #0
8005ff0: 60fb str r3, [r7, #12]
8005ff2: 4b39 ldr r3, [pc, #228] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8005ff4: 6c1b ldr r3, [r3, #64] @ 0x40
8005ff6: 4a38 ldr r2, [pc, #224] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8005ff8: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8005ffc: 6413 str r3, [r2, #64] @ 0x40
8005ffe: 4b36 ldr r3, [pc, #216] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8006000: 6c1b ldr r3, [r3, #64] @ 0x40
8006002: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8006006: 60fb str r3, [r7, #12]
8006008: 68fb ldr r3, [r7, #12]
/* Enable write access to Backup domain */
PWR->CR |= PWR_CR_DBP;
800600a: 4b34 ldr r3, [pc, #208] @ (80060dc <HAL_RCCEx_PeriphCLKConfig+0x214>)
800600c: 681b ldr r3, [r3, #0]
800600e: 4a33 ldr r2, [pc, #204] @ (80060dc <HAL_RCCEx_PeriphCLKConfig+0x214>)
8006010: f443 7380 orr.w r3, r3, #256 @ 0x100
8006014: 6013 str r3, [r2, #0]
/* Get tick */
tickstart = HAL_GetTick();
8006016: f7fb fbbf bl 8001798 <HAL_GetTick>
800601a: 61b8 str r0, [r7, #24]
while ((PWR->CR & PWR_CR_DBP) == RESET)
800601c: e008 b.n 8006030 <HAL_RCCEx_PeriphCLKConfig+0x168>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
800601e: f7fb fbbb bl 8001798 <HAL_GetTick>
8006022: 4602 mov r2, r0
8006024: 69bb ldr r3, [r7, #24]
8006026: 1ad3 subs r3, r2, r3
8006028: 2b02 cmp r3, #2
800602a: d901 bls.n 8006030 <HAL_RCCEx_PeriphCLKConfig+0x168>
{
return HAL_TIMEOUT;
800602c: 2303 movs r3, #3
800602e: e1d1 b.n 80063d4 <HAL_RCCEx_PeriphCLKConfig+0x50c>
while ((PWR->CR & PWR_CR_DBP) == RESET)
8006030: 4b2a ldr r3, [pc, #168] @ (80060dc <HAL_RCCEx_PeriphCLKConfig+0x214>)
8006032: 681b ldr r3, [r3, #0]
8006034: f403 7380 and.w r3, r3, #256 @ 0x100
8006038: 2b00 cmp r3, #0
800603a: d0f0 beq.n 800601e <HAL_RCCEx_PeriphCLKConfig+0x156>
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
tmpreg1 = (RCC->BDCR & RCC_BDCR_RTCSEL);
800603c: 4b26 ldr r3, [pc, #152] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
800603e: 6f1b ldr r3, [r3, #112] @ 0x70
8006040: f403 7340 and.w r3, r3, #768 @ 0x300
8006044: 617b str r3, [r7, #20]
if ((tmpreg1 != 0x00000000U) && ((tmpreg1) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
8006046: 697b ldr r3, [r7, #20]
8006048: 2b00 cmp r3, #0
800604a: d02f beq.n 80060ac <HAL_RCCEx_PeriphCLKConfig+0x1e4>
800604c: 687b ldr r3, [r7, #4]
800604e: 6a5b ldr r3, [r3, #36] @ 0x24
8006050: f403 7340 and.w r3, r3, #768 @ 0x300
8006054: 697a ldr r2, [r7, #20]
8006056: 429a cmp r2, r3
8006058: d028 beq.n 80060ac <HAL_RCCEx_PeriphCLKConfig+0x1e4>
{
/* Store the content of BDCR register before the reset of Backup Domain */
tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
800605a: 4b1f ldr r3, [pc, #124] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
800605c: 6f1b ldr r3, [r3, #112] @ 0x70
800605e: f423 7340 bic.w r3, r3, #768 @ 0x300
8006062: 617b str r3, [r7, #20]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
8006064: 4b1e ldr r3, [pc, #120] @ (80060e0 <HAL_RCCEx_PeriphCLKConfig+0x218>)
8006066: 2201 movs r2, #1
8006068: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
800606a: 4b1d ldr r3, [pc, #116] @ (80060e0 <HAL_RCCEx_PeriphCLKConfig+0x218>)
800606c: 2200 movs r2, #0
800606e: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = tmpreg1;
8006070: 4a19 ldr r2, [pc, #100] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8006072: 697b ldr r3, [r7, #20]
8006074: 6713 str r3, [r2, #112] @ 0x70
/* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
if (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
8006076: 4b18 ldr r3, [pc, #96] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
8006078: 6f1b ldr r3, [r3, #112] @ 0x70
800607a: f003 0301 and.w r3, r3, #1
800607e: 2b01 cmp r3, #1
8006080: d114 bne.n 80060ac <HAL_RCCEx_PeriphCLKConfig+0x1e4>
{
/* Get tick */
tickstart = HAL_GetTick();
8006082: f7fb fb89 bl 8001798 <HAL_GetTick>
8006086: 61b8 str r0, [r7, #24]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8006088: e00a b.n 80060a0 <HAL_RCCEx_PeriphCLKConfig+0x1d8>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
800608a: f7fb fb85 bl 8001798 <HAL_GetTick>
800608e: 4602 mov r2, r0
8006090: 69bb ldr r3, [r7, #24]
8006092: 1ad3 subs r3, r2, r3
8006094: f241 3288 movw r2, #5000 @ 0x1388
8006098: 4293 cmp r3, r2
800609a: d901 bls.n 80060a0 <HAL_RCCEx_PeriphCLKConfig+0x1d8>
{
return HAL_TIMEOUT;
800609c: 2303 movs r3, #3
800609e: e199 b.n 80063d4 <HAL_RCCEx_PeriphCLKConfig+0x50c>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
80060a0: 4b0d ldr r3, [pc, #52] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
80060a2: 6f1b ldr r3, [r3, #112] @ 0x70
80060a4: f003 0302 and.w r3, r3, #2
80060a8: 2b00 cmp r3, #0
80060aa: d0ee beq.n 800608a <HAL_RCCEx_PeriphCLKConfig+0x1c2>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
80060ac: 687b ldr r3, [r7, #4]
80060ae: 6a5b ldr r3, [r3, #36] @ 0x24
80060b0: f403 7340 and.w r3, r3, #768 @ 0x300
80060b4: f5b3 7f40 cmp.w r3, #768 @ 0x300
80060b8: d114 bne.n 80060e4 <HAL_RCCEx_PeriphCLKConfig+0x21c>
80060ba: 4b07 ldr r3, [pc, #28] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
80060bc: 689b ldr r3, [r3, #8]
80060be: f423 12f8 bic.w r2, r3, #2031616 @ 0x1f0000
80060c2: 687b ldr r3, [r7, #4]
80060c4: 6a5b ldr r3, [r3, #36] @ 0x24
80060c6: f023 4370 bic.w r3, r3, #4026531840 @ 0xf0000000
80060ca: f423 7340 bic.w r3, r3, #768 @ 0x300
80060ce: 4902 ldr r1, [pc, #8] @ (80060d8 <HAL_RCCEx_PeriphCLKConfig+0x210>)
80060d0: 4313 orrs r3, r2
80060d2: 608b str r3, [r1, #8]
80060d4: e00c b.n 80060f0 <HAL_RCCEx_PeriphCLKConfig+0x228>
80060d6: bf00 nop
80060d8: 40023800 .word 0x40023800
80060dc: 40007000 .word 0x40007000
80060e0: 42470e40 .word 0x42470e40
80060e4: 4b89 ldr r3, [pc, #548] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
80060e6: 689b ldr r3, [r3, #8]
80060e8: 4a88 ldr r2, [pc, #544] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
80060ea: f423 13f8 bic.w r3, r3, #2031616 @ 0x1f0000
80060ee: 6093 str r3, [r2, #8]
80060f0: 4b86 ldr r3, [pc, #536] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
80060f2: 6f1a ldr r2, [r3, #112] @ 0x70
80060f4: 687b ldr r3, [r7, #4]
80060f6: 6a5b ldr r3, [r3, #36] @ 0x24
80060f8: f3c3 030b ubfx r3, r3, #0, #12
80060fc: 4983 ldr r1, [pc, #524] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
80060fe: 4313 orrs r3, r2
8006100: 670b str r3, [r1, #112] @ 0x70
}
/*--------------------------------------------------------------------------*/
/*------------------------------------ TIM configuration -------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
8006102: 687b ldr r3, [r7, #4]
8006104: 681b ldr r3, [r3, #0]
8006106: f003 0304 and.w r3, r3, #4
800610a: 2b00 cmp r3, #0
800610c: d004 beq.n 8006118 <HAL_RCCEx_PeriphCLKConfig+0x250>
{
/* Configure Timer Prescaler */
__HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
800610e: 687b ldr r3, [r7, #4]
8006110: f893 2054 ldrb.w r2, [r3, #84] @ 0x54
8006114: 4b7e ldr r3, [pc, #504] @ (8006310 <HAL_RCCEx_PeriphCLKConfig+0x448>)
8006116: 601a str r2, [r3, #0]
}
/*--------------------------------------------------------------------------*/
/*------------------------------------- FMPI2C1 Configuration --------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMPI2C1) == RCC_PERIPHCLK_FMPI2C1)
8006118: 687b ldr r3, [r7, #4]
800611a: 681b ldr r3, [r3, #0]
800611c: f003 0310 and.w r3, r3, #16
8006120: 2b00 cmp r3, #0
8006122: d00a beq.n 800613a <HAL_RCCEx_PeriphCLKConfig+0x272>
{
/* Check the parameters */
assert_param(IS_RCC_FMPI2C1CLKSOURCE(PeriphClkInit->Fmpi2c1ClockSelection));
/* Configure the FMPI2C1 clock source */
__HAL_RCC_FMPI2C1_CONFIG(PeriphClkInit->Fmpi2c1ClockSelection);
8006124: 4b79 ldr r3, [pc, #484] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
8006126: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94
800612a: f423 0240 bic.w r2, r3, #12582912 @ 0xc00000
800612e: 687b ldr r3, [r7, #4]
8006130: 6adb ldr r3, [r3, #44] @ 0x2c
8006132: 4976 ldr r1, [pc, #472] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
8006134: 4313 orrs r3, r2
8006136: f8c1 3094 str.w r3, [r1, #148] @ 0x94
}
/*--------------------------------------------------------------------------*/
/*------------------------------------- CLK48 Configuration ----------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48)
800613a: 687b ldr r3, [r7, #4]
800613c: 681b ldr r3, [r3, #0]
800613e: f003 0320 and.w r3, r3, #32
8006142: 2b00 cmp r3, #0
8006144: d011 beq.n 800616a <HAL_RCCEx_PeriphCLKConfig+0x2a2>
{
/* Check the parameters */
assert_param(IS_RCC_CLK48CLKSOURCE(PeriphClkInit->Clk48ClockSelection));
/* Configure the SDIO clock source */
__HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection);
8006146: 4b71 ldr r3, [pc, #452] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
8006148: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94
800614c: f023 6200 bic.w r2, r3, #134217728 @ 0x8000000
8006150: 687b ldr r3, [r7, #4]
8006152: 6b1b ldr r3, [r3, #48] @ 0x30
8006154: 496d ldr r1, [pc, #436] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
8006156: 4313 orrs r3, r2
8006158: f8c1 3094 str.w r3, [r1, #148] @ 0x94
/* Enable the PLLI2S when it's used as clock source for CLK48 */
if (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLI2SQ)
800615c: 687b ldr r3, [r7, #4]
800615e: 6b1b ldr r3, [r3, #48] @ 0x30
8006160: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
8006164: d101 bne.n 800616a <HAL_RCCEx_PeriphCLKConfig+0x2a2>
{
plli2sused = 1U;
8006166: 2301 movs r3, #1
8006168: 61fb str r3, [r7, #28]
}
}
/*--------------------------------------------------------------------------*/
/*------------------------------------- SDIO Configuration -----------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDIO) == RCC_PERIPHCLK_SDIO)
800616a: 687b ldr r3, [r7, #4]
800616c: 681b ldr r3, [r3, #0]
800616e: f003 0340 and.w r3, r3, #64 @ 0x40
8006172: 2b00 cmp r3, #0
8006174: d00a beq.n 800618c <HAL_RCCEx_PeriphCLKConfig+0x2c4>
{
/* Check the parameters */
assert_param(IS_RCC_SDIOCLKSOURCE(PeriphClkInit->SdioClockSelection));
/* Configure the SDIO clock source */
__HAL_RCC_SDIO_CONFIG(PeriphClkInit->SdioClockSelection);
8006176: 4b65 ldr r3, [pc, #404] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
8006178: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94
800617c: f023 5280 bic.w r2, r3, #268435456 @ 0x10000000
8006180: 687b ldr r3, [r7, #4]
8006182: 6a9b ldr r3, [r3, #40] @ 0x28
8006184: 4961 ldr r1, [pc, #388] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
8006186: 4313 orrs r3, r2
8006188: f8c1 3094 str.w r3, [r1, #148] @ 0x94
/*--------------------------------------------------------------------------*/
/*-------------------------------------- PLLI2S Configuration --------------*/
/* PLLI2S is configured when a peripheral will use it as source clock : I2S on APB1 or
I2S on APB2*/
if ((plli2sused == 1U) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S))
800618c: 69fb ldr r3, [r7, #28]
800618e: 2b01 cmp r3, #1
8006190: d004 beq.n 800619c <HAL_RCCEx_PeriphCLKConfig+0x2d4>
8006192: 687b ldr r3, [r7, #4]
8006194: 681b ldr r3, [r3, #0]
8006196: 2b80 cmp r3, #128 @ 0x80
8006198: f040 80c6 bne.w 8006328 <HAL_RCCEx_PeriphCLKConfig+0x460>
{
/* Disable the PLLI2S */
__HAL_RCC_PLLI2S_DISABLE();
800619c: 4b5d ldr r3, [pc, #372] @ (8006314 <HAL_RCCEx_PeriphCLKConfig+0x44c>)
800619e: 2200 movs r2, #0
80061a0: 601a str r2, [r3, #0]
/* Get tick */
tickstart = HAL_GetTick();
80061a2: f7fb faf9 bl 8001798 <HAL_GetTick>
80061a6: 61b8 str r0, [r7, #24]
/* Wait till PLLI2S is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
80061a8: e008 b.n 80061bc <HAL_RCCEx_PeriphCLKConfig+0x2f4>
{
if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
80061aa: f7fb faf5 bl 8001798 <HAL_GetTick>
80061ae: 4602 mov r2, r0
80061b0: 69bb ldr r3, [r7, #24]
80061b2: 1ad3 subs r3, r2, r3
80061b4: 2b02 cmp r3, #2
80061b6: d901 bls.n 80061bc <HAL_RCCEx_PeriphCLKConfig+0x2f4>
{
/* return in case of Timeout detected */
return HAL_TIMEOUT;
80061b8: 2303 movs r3, #3
80061ba: e10b b.n 80063d4 <HAL_RCCEx_PeriphCLKConfig+0x50c>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
80061bc: 4b53 ldr r3, [pc, #332] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
80061be: 681b ldr r3, [r3, #0]
80061c0: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
80061c4: 2b00 cmp r3, #0
80061c6: d1f0 bne.n 80061aa <HAL_RCCEx_PeriphCLKConfig+0x2e2>
/* check for common PLLI2S Parameters */
assert_param(IS_RCC_PLLI2SCLKSOURCE(PeriphClkInit->PLLI2SSelection));
assert_param(IS_RCC_PLLI2SM_VALUE(PeriphClkInit->PLLI2S.PLLI2SM));
assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
/*-------------------- Set the PLL I2S clock -----------------------------*/
__HAL_RCC_PLL_I2S_CONFIG(PeriphClkInit->PLLI2SSelection);
80061c8: 4a53 ldr r2, [pc, #332] @ (8006318 <HAL_RCCEx_PeriphCLKConfig+0x450>)
80061ca: 687b ldr r3, [r7, #4]
80061cc: 6d1b ldr r3, [r3, #80] @ 0x50
80061ce: 6013 str r3, [r2, #0]
/*------- In Case of PLLI2S is selected as source clock for I2S ----------*/
if (((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == RCC_PERIPHCLK_I2S_APB1)
80061d0: 687b ldr r3, [r7, #4]
80061d2: 681b ldr r3, [r3, #0]
80061d4: f003 0301 and.w r3, r3, #1
80061d8: 2b00 cmp r3, #0
80061da: d003 beq.n 80061e4 <HAL_RCCEx_PeriphCLKConfig+0x31c>
&& (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)) ||
80061dc: 687b ldr r3, [r7, #4]
80061de: 69db ldr r3, [r3, #28]
80061e0: 2b00 cmp r3, #0
80061e2: d023 beq.n 800622c <HAL_RCCEx_PeriphCLKConfig+0x364>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == RCC_PERIPHCLK_I2S_APB2) && (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S)) ||
80061e4: 687b ldr r3, [r7, #4]
80061e6: 681b ldr r3, [r3, #0]
80061e8: f003 0302 and.w r3, r3, #2
&& (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)) ||
80061ec: 2b00 cmp r3, #0
80061ee: d003 beq.n 80061f8 <HAL_RCCEx_PeriphCLKConfig+0x330>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == RCC_PERIPHCLK_I2S_APB2) && (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S)) ||
80061f0: 687b ldr r3, [r7, #4]
80061f2: 6a1b ldr r3, [r3, #32]
80061f4: 2b00 cmp r3, #0
80061f6: d019 beq.n 800622c <HAL_RCCEx_PeriphCLKConfig+0x364>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLI2SQ)) ||
80061f8: 687b ldr r3, [r7, #4]
80061fa: 681b ldr r3, [r3, #0]
80061fc: f003 0320 and.w r3, r3, #32
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == RCC_PERIPHCLK_I2S_APB2) && (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S)) ||
8006200: 2b00 cmp r3, #0
8006202: d004 beq.n 800620e <HAL_RCCEx_PeriphCLKConfig+0x346>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLI2SQ)) ||
8006204: 687b ldr r3, [r7, #4]
8006206: 6b1b ldr r3, [r3, #48] @ 0x30
8006208: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
800620c: d00e beq.n 800622c <HAL_RCCEx_PeriphCLKConfig+0x364>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDIO) == RCC_PERIPHCLK_SDIO) && (PeriphClkInit->SdioClockSelection == RCC_SDIOCLKSOURCE_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLI2SQ)))
800620e: 687b ldr r3, [r7, #4]
8006210: 681b ldr r3, [r3, #0]
8006212: f003 0340 and.w r3, r3, #64 @ 0x40
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLI2SQ)) ||
8006216: 2b00 cmp r3, #0
8006218: d019 beq.n 800624e <HAL_RCCEx_PeriphCLKConfig+0x386>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDIO) == RCC_PERIPHCLK_SDIO) && (PeriphClkInit->SdioClockSelection == RCC_SDIOCLKSOURCE_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLI2SQ)))
800621a: 687b ldr r3, [r7, #4]
800621c: 6a9b ldr r3, [r3, #40] @ 0x28
800621e: 2b00 cmp r3, #0
8006220: d115 bne.n 800624e <HAL_RCCEx_PeriphCLKConfig+0x386>
8006222: 687b ldr r3, [r7, #4]
8006224: 6b1b ldr r3, [r3, #48] @ 0x30
8006226: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
800622a: d110 bne.n 800624e <HAL_RCCEx_PeriphCLKConfig+0x386>
assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
/* Configure the PLLI2S division factors */
/* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM)*/
/* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SQ,
800622c: 687b ldr r3, [r7, #4]
800622e: 685a ldr r2, [r3, #4]
8006230: 687b ldr r3, [r7, #4]
8006232: 689b ldr r3, [r3, #8]
8006234: 019b lsls r3, r3, #6
8006236: 431a orrs r2, r3
8006238: 687b ldr r3, [r7, #4]
800623a: 68db ldr r3, [r3, #12]
800623c: 061b lsls r3, r3, #24
800623e: 431a orrs r2, r3
8006240: 687b ldr r3, [r7, #4]
8006242: 691b ldr r3, [r3, #16]
8006244: 071b lsls r3, r3, #28
8006246: 4931 ldr r1, [pc, #196] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
8006248: 4313 orrs r3, r2
800624a: f8c1 3084 str.w r3, [r1, #132] @ 0x84
PeriphClkInit->PLLI2S.PLLI2SR);
}
#if defined(STM32F413xx) || defined(STM32F423xx)
/*------- In Case of PLLI2S is selected as source clock for SAI ----------*/
if (((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAIA) == RCC_PERIPHCLK_SAIA)
800624e: 687b ldr r3, [r7, #4]
8006250: 681b ldr r3, [r3, #0]
8006252: f403 5300 and.w r3, r3, #8192 @ 0x2000
8006256: 2b00 cmp r3, #0
8006258: d003 beq.n 8006262 <HAL_RCCEx_PeriphCLKConfig+0x39a>
&& (PeriphClkInit->SaiAClockSelection == RCC_SAIACLKSOURCE_PLLI2SR)) ||
800625a: 687b ldr r3, [r7, #4]
800625c: 6c9b ldr r3, [r3, #72] @ 0x48
800625e: 2b00 cmp r3, #0
8006260: d009 beq.n 8006276 <HAL_RCCEx_PeriphCLKConfig+0x3ae>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAIB) == RCC_PERIPHCLK_SAIB) && (PeriphClkInit->SaiBClockSelection == RCC_SAIBCLKSOURCE_PLLI2SR)))
8006262: 687b ldr r3, [r7, #4]
8006264: 681b ldr r3, [r3, #0]
8006266: f403 4380 and.w r3, r3, #16384 @ 0x4000
&& (PeriphClkInit->SaiAClockSelection == RCC_SAIACLKSOURCE_PLLI2SR)) ||
800626a: 2b00 cmp r3, #0
800626c: d026 beq.n 80062bc <HAL_RCCEx_PeriphCLKConfig+0x3f4>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAIB) == RCC_PERIPHCLK_SAIB) && (PeriphClkInit->SaiBClockSelection == RCC_SAIBCLKSOURCE_PLLI2SR)))
800626e: 687b ldr r3, [r7, #4]
8006270: 6cdb ldr r3, [r3, #76] @ 0x4c
8006272: 2b00 cmp r3, #0
8006274: d122 bne.n 80062bc <HAL_RCCEx_PeriphCLKConfig+0x3f4>
assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
/* Check for PLLI2S/DIVR parameters */
assert_param(IS_RCC_PLLI2S_DIVR_VALUE(PeriphClkInit->PLLI2SDivR));
/* Read PLLI2SQ value from PLLI2SCFGR register (this value is not needed for SAI configuration) */
plli2sq = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
8006276: 4b25 ldr r3, [pc, #148] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
8006278: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
800627c: 0e1b lsrs r3, r3, #24
800627e: f003 030f and.w r3, r3, #15
8006282: 613b str r3, [r7, #16]
/* Configure the PLLI2S division factors */
/* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */
/* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
/* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, plli2sq,
8006284: 687b ldr r3, [r7, #4]
8006286: 685a ldr r2, [r3, #4]
8006288: 687b ldr r3, [r7, #4]
800628a: 689b ldr r3, [r3, #8]
800628c: 019b lsls r3, r3, #6
800628e: 431a orrs r2, r3
8006290: 693b ldr r3, [r7, #16]
8006292: 061b lsls r3, r3, #24
8006294: 431a orrs r2, r3
8006296: 687b ldr r3, [r7, #4]
8006298: 691b ldr r3, [r3, #16]
800629a: 071b lsls r3, r3, #28
800629c: 491b ldr r1, [pc, #108] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
800629e: 4313 orrs r3, r2
80062a0: f8c1 3084 str.w r3, [r1, #132] @ 0x84
PeriphClkInit->PLLI2S.PLLI2SR);
/* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVR */
__HAL_RCC_PLLI2S_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLI2SDivR);
80062a4: 4b19 ldr r3, [pc, #100] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
80062a6: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
80062aa: f023 021f bic.w r2, r3, #31
80062ae: 687b ldr r3, [r7, #4]
80062b0: 699b ldr r3, [r3, #24]
80062b2: 3b01 subs r3, #1
80062b4: 4915 ldr r1, [pc, #84] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
80062b6: 4313 orrs r3, r2
80062b8: f8c1 308c str.w r3, [r1, #140] @ 0x8c
}
#endif /* STM32F413xx || STM32F423xx */
/*----------------- In Case of PLLI2S is just selected ------------------*/
if ((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S)
80062bc: 687b ldr r3, [r7, #4]
80062be: 681b ldr r3, [r3, #0]
80062c0: f003 0380 and.w r3, r3, #128 @ 0x80
80062c4: 2b00 cmp r3, #0
80062c6: d010 beq.n 80062ea <HAL_RCCEx_PeriphCLKConfig+0x422>
assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
/* Configure the PLLI2S division factors */
/* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM)*/
/* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SQ,
80062c8: 687b ldr r3, [r7, #4]
80062ca: 685a ldr r2, [r3, #4]
80062cc: 687b ldr r3, [r7, #4]
80062ce: 689b ldr r3, [r3, #8]
80062d0: 019b lsls r3, r3, #6
80062d2: 431a orrs r2, r3
80062d4: 687b ldr r3, [r7, #4]
80062d6: 68db ldr r3, [r3, #12]
80062d8: 061b lsls r3, r3, #24
80062da: 431a orrs r2, r3
80062dc: 687b ldr r3, [r7, #4]
80062de: 691b ldr r3, [r3, #16]
80062e0: 071b lsls r3, r3, #28
80062e2: 490a ldr r1, [pc, #40] @ (800630c <HAL_RCCEx_PeriphCLKConfig+0x444>)
80062e4: 4313 orrs r3, r2
80062e6: f8c1 3084 str.w r3, [r1, #132] @ 0x84
PeriphClkInit->PLLI2S.PLLI2SR);
}
/* Enable the PLLI2S */
__HAL_RCC_PLLI2S_ENABLE();
80062ea: 4b0a ldr r3, [pc, #40] @ (8006314 <HAL_RCCEx_PeriphCLKConfig+0x44c>)
80062ec: 2201 movs r2, #1
80062ee: 601a str r2, [r3, #0]
/* Get tick */
tickstart = HAL_GetTick();
80062f0: f7fb fa52 bl 8001798 <HAL_GetTick>
80062f4: 61b8 str r0, [r7, #24]
/* Wait till PLLI2S is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
80062f6: e011 b.n 800631c <HAL_RCCEx_PeriphCLKConfig+0x454>
{
if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
80062f8: f7fb fa4e bl 8001798 <HAL_GetTick>
80062fc: 4602 mov r2, r0
80062fe: 69bb ldr r3, [r7, #24]
8006300: 1ad3 subs r3, r2, r3
8006302: 2b02 cmp r3, #2
8006304: d90a bls.n 800631c <HAL_RCCEx_PeriphCLKConfig+0x454>
{
/* return in case of Timeout detected */
return HAL_TIMEOUT;
8006306: 2303 movs r3, #3
8006308: e064 b.n 80063d4 <HAL_RCCEx_PeriphCLKConfig+0x50c>
800630a: bf00 nop
800630c: 40023800 .word 0x40023800
8006310: 424711e0 .word 0x424711e0
8006314: 42470068 .word 0x42470068
8006318: 424710d8 .word 0x424710d8
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
800631c: 4b2f ldr r3, [pc, #188] @ (80063dc <HAL_RCCEx_PeriphCLKConfig+0x514>)
800631e: 681b ldr r3, [r3, #0]
8006320: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
8006324: 2b00 cmp r3, #0
8006326: d0e7 beq.n 80062f8 <HAL_RCCEx_PeriphCLKConfig+0x430>
}
}
/*--------------------------------------------------------------------------*/
/*-------------------- DFSDM1 clock source configuration -------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1)
8006328: 687b ldr r3, [r7, #4]
800632a: 681b ldr r3, [r3, #0]
800632c: f403 7380 and.w r3, r3, #256 @ 0x100
8006330: 2b00 cmp r3, #0
8006332: d00a beq.n 800634a <HAL_RCCEx_PeriphCLKConfig+0x482>
{
/* Check the parameters */
assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection));
/* Configure the DFSDM1 interface clock source */
__HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection);
8006334: 4b29 ldr r3, [pc, #164] @ (80063dc <HAL_RCCEx_PeriphCLKConfig+0x514>)
8006336: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
800633a: f023 4200 bic.w r2, r3, #2147483648 @ 0x80000000
800633e: 687b ldr r3, [r7, #4]
8006340: 6b5b ldr r3, [r3, #52] @ 0x34
8006342: 4926 ldr r1, [pc, #152] @ (80063dc <HAL_RCCEx_PeriphCLKConfig+0x514>)
8006344: 4313 orrs r3, r2
8006346: f8c1 308c str.w r3, [r1, #140] @ 0x8c
}
/*--------------------------------------------------------------------------*/
/*-------------------- DFSDM1 Audio clock source configuration -------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1_AUDIO) == RCC_PERIPHCLK_DFSDM1_AUDIO)
800634a: 687b ldr r3, [r7, #4]
800634c: 681b ldr r3, [r3, #0]
800634e: f403 7300 and.w r3, r3, #512 @ 0x200
8006352: 2b00 cmp r3, #0
8006354: d00a beq.n 800636c <HAL_RCCEx_PeriphCLKConfig+0x4a4>
{
/* Check the parameters */
assert_param(IS_RCC_DFSDM1AUDIOCLKSOURCE(PeriphClkInit->Dfsdm1AudioClockSelection));
/* Configure the DFSDM1 Audio interface clock source */
__HAL_RCC_DFSDM1AUDIO_CONFIG(PeriphClkInit->Dfsdm1AudioClockSelection);
8006356: 4b21 ldr r3, [pc, #132] @ (80063dc <HAL_RCCEx_PeriphCLKConfig+0x514>)
8006358: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
800635c: f423 4200 bic.w r2, r3, #32768 @ 0x8000
8006360: 687b ldr r3, [r7, #4]
8006362: 6b9b ldr r3, [r3, #56] @ 0x38
8006364: 491d ldr r1, [pc, #116] @ (80063dc <HAL_RCCEx_PeriphCLKConfig+0x514>)
8006366: 4313 orrs r3, r2
8006368: f8c1 308c str.w r3, [r1, #140] @ 0x8c
}
/*--------------------------------------------------------------------------*/
#if defined(STM32F413xx) || defined(STM32F423xx)
/*-------------------- DFSDM2 clock source configuration -------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM2) == RCC_PERIPHCLK_DFSDM2)
800636c: 687b ldr r3, [r7, #4]
800636e: 681b ldr r3, [r3, #0]
8006370: f403 6380 and.w r3, r3, #1024 @ 0x400
8006374: 2b00 cmp r3, #0
8006376: d00a beq.n 800638e <HAL_RCCEx_PeriphCLKConfig+0x4c6>
{
/* Check the parameters */
assert_param(IS_RCC_DFSDM2CLKSOURCE(PeriphClkInit->Dfsdm2ClockSelection));
/* Configure the DFSDM1 interface clock source */
__HAL_RCC_DFSDM2_CONFIG(PeriphClkInit->Dfsdm2ClockSelection);
8006378: 4b18 ldr r3, [pc, #96] @ (80063dc <HAL_RCCEx_PeriphCLKConfig+0x514>)
800637a: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
800637e: f023 4200 bic.w r2, r3, #2147483648 @ 0x80000000
8006382: 687b ldr r3, [r7, #4]
8006384: 6bdb ldr r3, [r3, #60] @ 0x3c
8006386: 4915 ldr r1, [pc, #84] @ (80063dc <HAL_RCCEx_PeriphCLKConfig+0x514>)
8006388: 4313 orrs r3, r2
800638a: f8c1 308c str.w r3, [r1, #140] @ 0x8c
}
/*--------------------------------------------------------------------------*/
/*-------------------- DFSDM2 Audio clock source configuration -------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM2_AUDIO) == RCC_PERIPHCLK_DFSDM2_AUDIO)
800638e: 687b ldr r3, [r7, #4]
8006390: 681b ldr r3, [r3, #0]
8006392: f403 6300 and.w r3, r3, #2048 @ 0x800
8006396: 2b00 cmp r3, #0
8006398: d00a beq.n 80063b0 <HAL_RCCEx_PeriphCLKConfig+0x4e8>
{
/* Check the parameters */
assert_param(IS_RCC_DFSDM2AUDIOCLKSOURCE(PeriphClkInit->Dfsdm2AudioClockSelection));
/* Configure the DFSDM1 Audio interface clock source */
__HAL_RCC_DFSDM2AUDIO_CONFIG(PeriphClkInit->Dfsdm2AudioClockSelection);
800639a: 4b10 ldr r3, [pc, #64] @ (80063dc <HAL_RCCEx_PeriphCLKConfig+0x514>)
800639c: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
80063a0: f423 4280 bic.w r2, r3, #16384 @ 0x4000
80063a4: 687b ldr r3, [r7, #4]
80063a6: 6c1b ldr r3, [r3, #64] @ 0x40
80063a8: 490c ldr r1, [pc, #48] @ (80063dc <HAL_RCCEx_PeriphCLKConfig+0x514>)
80063aa: 4313 orrs r3, r2
80063ac: f8c1 308c str.w r3, [r1, #140] @ 0x8c
}
/*--------------------------------------------------------------------------*/
/*---------------------------- LPTIM1 Configuration ------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
80063b0: 687b ldr r3, [r7, #4]
80063b2: 681b ldr r3, [r3, #0]
80063b4: f403 5380 and.w r3, r3, #4096 @ 0x1000
80063b8: 2b00 cmp r3, #0
80063ba: d00a beq.n 80063d2 <HAL_RCCEx_PeriphCLKConfig+0x50a>
{
/* Check the parameters */
assert_param(IS_RCC_LPTIM1CLKSOURCE(PeriphClkInit->Lptim1ClockSelection));
/* Configure the LPTIM1 clock source */
__HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
80063bc: 4b07 ldr r3, [pc, #28] @ (80063dc <HAL_RCCEx_PeriphCLKConfig+0x514>)
80063be: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94
80063c2: f023 4240 bic.w r2, r3, #3221225472 @ 0xc0000000
80063c6: 687b ldr r3, [r7, #4]
80063c8: 6c5b ldr r3, [r3, #68] @ 0x44
80063ca: 4904 ldr r1, [pc, #16] @ (80063dc <HAL_RCCEx_PeriphCLKConfig+0x514>)
80063cc: 4313 orrs r3, r2
80063ce: f8c1 3094 str.w r3, [r1, #148] @ 0x94
}
/*--------------------------------------------------------------------------*/
#endif /* STM32F413xx || STM32F423xx */
return HAL_OK;
80063d2: 2300 movs r3, #0
}
80063d4: 4618 mov r0, r3
80063d6: 3720 adds r7, #32
80063d8: 46bd mov sp, r7
80063da: bd80 pop {r7, pc}
80063dc: 40023800 .word 0x40023800
080063e0 <HAL_RCC_OscConfig>:
* @note This function add the PLL/PLLR factor management during PLL configuration this feature
* is only available in STM32F410xx/STM32F446xx/STM32F469xx/STM32F479xx/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx devices
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
80063e0: b580 push {r7, lr}
80063e2: b086 sub sp, #24
80063e4: af00 add r7, sp, #0
80063e6: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
80063e8: 687b ldr r3, [r7, #4]
80063ea: 2b00 cmp r3, #0
80063ec: d101 bne.n 80063f2 <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
80063ee: 2301 movs r3, #1
80063f0: e273 b.n 80068da <HAL_RCC_OscConfig+0x4fa>
}
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
80063f2: 687b ldr r3, [r7, #4]
80063f4: 681b ldr r3, [r3, #0]
80063f6: f003 0301 and.w r3, r3, #1
80063fa: 2b00 cmp r3, #0
80063fc: d075 beq.n 80064ea <HAL_RCC_OscConfig+0x10a>
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE)
|| \
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)) || \
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
#else
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE)
80063fe: 4b88 ldr r3, [pc, #544] @ (8006620 <HAL_RCC_OscConfig+0x240>)
8006400: 689b ldr r3, [r3, #8]
8006402: f003 030c and.w r3, r3, #12
8006406: 2b04 cmp r3, #4
8006408: d00c beq.n 8006424 <HAL_RCC_OscConfig+0x44>
|| \
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
800640a: 4b85 ldr r3, [pc, #532] @ (8006620 <HAL_RCC_OscConfig+0x240>)
800640c: 689b ldr r3, [r3, #8]
800640e: f003 030c and.w r3, r3, #12
|| \
8006412: 2b08 cmp r3, #8
8006414: d112 bne.n 800643c <HAL_RCC_OscConfig+0x5c>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
8006416: 4b82 ldr r3, [pc, #520] @ (8006620 <HAL_RCC_OscConfig+0x240>)
8006418: 685b ldr r3, [r3, #4]
800641a: f403 0380 and.w r3, r3, #4194304 @ 0x400000
800641e: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000
8006422: d10b bne.n 800643c <HAL_RCC_OscConfig+0x5c>
#endif /* STM32F446xx */
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8006424: 4b7e ldr r3, [pc, #504] @ (8006620 <HAL_RCC_OscConfig+0x240>)
8006426: 681b ldr r3, [r3, #0]
8006428: f403 3300 and.w r3, r3, #131072 @ 0x20000
800642c: 2b00 cmp r3, #0
800642e: d05b beq.n 80064e8 <HAL_RCC_OscConfig+0x108>
8006430: 687b ldr r3, [r7, #4]
8006432: 685b ldr r3, [r3, #4]
8006434: 2b00 cmp r3, #0
8006436: d157 bne.n 80064e8 <HAL_RCC_OscConfig+0x108>
{
return HAL_ERROR;
8006438: 2301 movs r3, #1
800643a: e24e b.n 80068da <HAL_RCC_OscConfig+0x4fa>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
800643c: 687b ldr r3, [r7, #4]
800643e: 685b ldr r3, [r3, #4]
8006440: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8006444: d106 bne.n 8006454 <HAL_RCC_OscConfig+0x74>
8006446: 4b76 ldr r3, [pc, #472] @ (8006620 <HAL_RCC_OscConfig+0x240>)
8006448: 681b ldr r3, [r3, #0]
800644a: 4a75 ldr r2, [pc, #468] @ (8006620 <HAL_RCC_OscConfig+0x240>)
800644c: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8006450: 6013 str r3, [r2, #0]
8006452: e01d b.n 8006490 <HAL_RCC_OscConfig+0xb0>
8006454: 687b ldr r3, [r7, #4]
8006456: 685b ldr r3, [r3, #4]
8006458: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
800645c: d10c bne.n 8006478 <HAL_RCC_OscConfig+0x98>
800645e: 4b70 ldr r3, [pc, #448] @ (8006620 <HAL_RCC_OscConfig+0x240>)
8006460: 681b ldr r3, [r3, #0]
8006462: 4a6f ldr r2, [pc, #444] @ (8006620 <HAL_RCC_OscConfig+0x240>)
8006464: f443 2380 orr.w r3, r3, #262144 @ 0x40000
8006468: 6013 str r3, [r2, #0]
800646a: 4b6d ldr r3, [pc, #436] @ (8006620 <HAL_RCC_OscConfig+0x240>)
800646c: 681b ldr r3, [r3, #0]
800646e: 4a6c ldr r2, [pc, #432] @ (8006620 <HAL_RCC_OscConfig+0x240>)
8006470: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8006474: 6013 str r3, [r2, #0]
8006476: e00b b.n 8006490 <HAL_RCC_OscConfig+0xb0>
8006478: 4b69 ldr r3, [pc, #420] @ (8006620 <HAL_RCC_OscConfig+0x240>)
800647a: 681b ldr r3, [r3, #0]
800647c: 4a68 ldr r2, [pc, #416] @ (8006620 <HAL_RCC_OscConfig+0x240>)
800647e: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8006482: 6013 str r3, [r2, #0]
8006484: 4b66 ldr r3, [pc, #408] @ (8006620 <HAL_RCC_OscConfig+0x240>)
8006486: 681b ldr r3, [r3, #0]
8006488: 4a65 ldr r2, [pc, #404] @ (8006620 <HAL_RCC_OscConfig+0x240>)
800648a: f423 2380 bic.w r3, r3, #262144 @ 0x40000
800648e: 6013 str r3, [r2, #0]
/* Check the HSE State */
if ((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
8006490: 687b ldr r3, [r7, #4]
8006492: 685b ldr r3, [r3, #4]
8006494: 2b00 cmp r3, #0
8006496: d013 beq.n 80064c0 <HAL_RCC_OscConfig+0xe0>
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
8006498: f7fb f97e bl 8001798 <HAL_GetTick>
800649c: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
800649e: e008 b.n 80064b2 <HAL_RCC_OscConfig+0xd2>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
80064a0: f7fb f97a bl 8001798 <HAL_GetTick>
80064a4: 4602 mov r2, r0
80064a6: 693b ldr r3, [r7, #16]
80064a8: 1ad3 subs r3, r2, r3
80064aa: 2b64 cmp r3, #100 @ 0x64
80064ac: d901 bls.n 80064b2 <HAL_RCC_OscConfig+0xd2>
{
return HAL_TIMEOUT;
80064ae: 2303 movs r3, #3
80064b0: e213 b.n 80068da <HAL_RCC_OscConfig+0x4fa>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
80064b2: 4b5b ldr r3, [pc, #364] @ (8006620 <HAL_RCC_OscConfig+0x240>)
80064b4: 681b ldr r3, [r3, #0]
80064b6: f403 3300 and.w r3, r3, #131072 @ 0x20000
80064ba: 2b00 cmp r3, #0
80064bc: d0f0 beq.n 80064a0 <HAL_RCC_OscConfig+0xc0>
80064be: e014 b.n 80064ea <HAL_RCC_OscConfig+0x10a>
}
}
else
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
80064c0: f7fb f96a bl 8001798 <HAL_GetTick>
80064c4: 6138 str r0, [r7, #16]
/* Wait till HSE is bypassed or disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
80064c6: e008 b.n 80064da <HAL_RCC_OscConfig+0xfa>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
80064c8: f7fb f966 bl 8001798 <HAL_GetTick>
80064cc: 4602 mov r2, r0
80064ce: 693b ldr r3, [r7, #16]
80064d0: 1ad3 subs r3, r2, r3
80064d2: 2b64 cmp r3, #100 @ 0x64
80064d4: d901 bls.n 80064da <HAL_RCC_OscConfig+0xfa>
{
return HAL_TIMEOUT;
80064d6: 2303 movs r3, #3
80064d8: e1ff b.n 80068da <HAL_RCC_OscConfig+0x4fa>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
80064da: 4b51 ldr r3, [pc, #324] @ (8006620 <HAL_RCC_OscConfig+0x240>)
80064dc: 681b ldr r3, [r3, #0]
80064de: f403 3300 and.w r3, r3, #131072 @ 0x20000
80064e2: 2b00 cmp r3, #0
80064e4: d1f0 bne.n 80064c8 <HAL_RCC_OscConfig+0xe8>
80064e6: e000 b.n 80064ea <HAL_RCC_OscConfig+0x10a>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
80064e8: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
80064ea: 687b ldr r3, [r7, #4]
80064ec: 681b ldr r3, [r3, #0]
80064ee: f003 0302 and.w r3, r3, #2
80064f2: 2b00 cmp r3, #0
80064f4: d063 beq.n 80065be <HAL_RCC_OscConfig+0x1de>
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI)
|| \
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)) || \
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
#else
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI)
80064f6: 4b4a ldr r3, [pc, #296] @ (8006620 <HAL_RCC_OscConfig+0x240>)
80064f8: 689b ldr r3, [r3, #8]
80064fa: f003 030c and.w r3, r3, #12
80064fe: 2b00 cmp r3, #0
8006500: d00b beq.n 800651a <HAL_RCC_OscConfig+0x13a>
|| \
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
8006502: 4b47 ldr r3, [pc, #284] @ (8006620 <HAL_RCC_OscConfig+0x240>)
8006504: 689b ldr r3, [r3, #8]
8006506: f003 030c and.w r3, r3, #12
|| \
800650a: 2b08 cmp r3, #8
800650c: d11c bne.n 8006548 <HAL_RCC_OscConfig+0x168>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
800650e: 4b44 ldr r3, [pc, #272] @ (8006620 <HAL_RCC_OscConfig+0x240>)
8006510: 685b ldr r3, [r3, #4]
8006512: f403 0380 and.w r3, r3, #4194304 @ 0x400000
8006516: 2b00 cmp r3, #0
8006518: d116 bne.n 8006548 <HAL_RCC_OscConfig+0x168>
#endif /* STM32F446xx */
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
800651a: 4b41 ldr r3, [pc, #260] @ (8006620 <HAL_RCC_OscConfig+0x240>)
800651c: 681b ldr r3, [r3, #0]
800651e: f003 0302 and.w r3, r3, #2
8006522: 2b00 cmp r3, #0
8006524: d005 beq.n 8006532 <HAL_RCC_OscConfig+0x152>
8006526: 687b ldr r3, [r7, #4]
8006528: 68db ldr r3, [r3, #12]
800652a: 2b01 cmp r3, #1
800652c: d001 beq.n 8006532 <HAL_RCC_OscConfig+0x152>
{
return HAL_ERROR;
800652e: 2301 movs r3, #1
8006530: e1d3 b.n 80068da <HAL_RCC_OscConfig+0x4fa>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8006532: 4b3b ldr r3, [pc, #236] @ (8006620 <HAL_RCC_OscConfig+0x240>)
8006534: 681b ldr r3, [r3, #0]
8006536: f023 02f8 bic.w r2, r3, #248 @ 0xf8
800653a: 687b ldr r3, [r7, #4]
800653c: 691b ldr r3, [r3, #16]
800653e: 00db lsls r3, r3, #3
8006540: 4937 ldr r1, [pc, #220] @ (8006620 <HAL_RCC_OscConfig+0x240>)
8006542: 4313 orrs r3, r2
8006544: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8006546: e03a b.n 80065be <HAL_RCC_OscConfig+0x1de>
}
}
else
{
/* Check the HSI State */
if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF)
8006548: 687b ldr r3, [r7, #4]
800654a: 68db ldr r3, [r3, #12]
800654c: 2b00 cmp r3, #0
800654e: d020 beq.n 8006592 <HAL_RCC_OscConfig+0x1b2>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
8006550: 4b34 ldr r3, [pc, #208] @ (8006624 <HAL_RCC_OscConfig+0x244>)
8006552: 2201 movs r2, #1
8006554: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8006556: f7fb f91f bl 8001798 <HAL_GetTick>
800655a: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800655c: e008 b.n 8006570 <HAL_RCC_OscConfig+0x190>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
800655e: f7fb f91b bl 8001798 <HAL_GetTick>
8006562: 4602 mov r2, r0
8006564: 693b ldr r3, [r7, #16]
8006566: 1ad3 subs r3, r2, r3
8006568: 2b02 cmp r3, #2
800656a: d901 bls.n 8006570 <HAL_RCC_OscConfig+0x190>
{
return HAL_TIMEOUT;
800656c: 2303 movs r3, #3
800656e: e1b4 b.n 80068da <HAL_RCC_OscConfig+0x4fa>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8006570: 4b2b ldr r3, [pc, #172] @ (8006620 <HAL_RCC_OscConfig+0x240>)
8006572: 681b ldr r3, [r3, #0]
8006574: f003 0302 and.w r3, r3, #2
8006578: 2b00 cmp r3, #0
800657a: d0f0 beq.n 800655e <HAL_RCC_OscConfig+0x17e>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
800657c: 4b28 ldr r3, [pc, #160] @ (8006620 <HAL_RCC_OscConfig+0x240>)
800657e: 681b ldr r3, [r3, #0]
8006580: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8006584: 687b ldr r3, [r7, #4]
8006586: 691b ldr r3, [r3, #16]
8006588: 00db lsls r3, r3, #3
800658a: 4925 ldr r1, [pc, #148] @ (8006620 <HAL_RCC_OscConfig+0x240>)
800658c: 4313 orrs r3, r2
800658e: 600b str r3, [r1, #0]
8006590: e015 b.n 80065be <HAL_RCC_OscConfig+0x1de>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8006592: 4b24 ldr r3, [pc, #144] @ (8006624 <HAL_RCC_OscConfig+0x244>)
8006594: 2200 movs r2, #0
8006596: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8006598: f7fb f8fe bl 8001798 <HAL_GetTick>
800659c: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
800659e: e008 b.n 80065b2 <HAL_RCC_OscConfig+0x1d2>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
80065a0: f7fb f8fa bl 8001798 <HAL_GetTick>
80065a4: 4602 mov r2, r0
80065a6: 693b ldr r3, [r7, #16]
80065a8: 1ad3 subs r3, r2, r3
80065aa: 2b02 cmp r3, #2
80065ac: d901 bls.n 80065b2 <HAL_RCC_OscConfig+0x1d2>
{
return HAL_TIMEOUT;
80065ae: 2303 movs r3, #3
80065b0: e193 b.n 80068da <HAL_RCC_OscConfig+0x4fa>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
80065b2: 4b1b ldr r3, [pc, #108] @ (8006620 <HAL_RCC_OscConfig+0x240>)
80065b4: 681b ldr r3, [r3, #0]
80065b6: f003 0302 and.w r3, r3, #2
80065ba: 2b00 cmp r3, #0
80065bc: d1f0 bne.n 80065a0 <HAL_RCC_OscConfig+0x1c0>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
80065be: 687b ldr r3, [r7, #4]
80065c0: 681b ldr r3, [r3, #0]
80065c2: f003 0308 and.w r3, r3, #8
80065c6: 2b00 cmp r3, #0
80065c8: d036 beq.n 8006638 <HAL_RCC_OscConfig+0x258>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF)
80065ca: 687b ldr r3, [r7, #4]
80065cc: 695b ldr r3, [r3, #20]
80065ce: 2b00 cmp r3, #0
80065d0: d016 beq.n 8006600 <HAL_RCC_OscConfig+0x220>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
80065d2: 4b15 ldr r3, [pc, #84] @ (8006628 <HAL_RCC_OscConfig+0x248>)
80065d4: 2201 movs r2, #1
80065d6: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
80065d8: f7fb f8de bl 8001798 <HAL_GetTick>
80065dc: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80065de: e008 b.n 80065f2 <HAL_RCC_OscConfig+0x212>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
80065e0: f7fb f8da bl 8001798 <HAL_GetTick>
80065e4: 4602 mov r2, r0
80065e6: 693b ldr r3, [r7, #16]
80065e8: 1ad3 subs r3, r2, r3
80065ea: 2b02 cmp r3, #2
80065ec: d901 bls.n 80065f2 <HAL_RCC_OscConfig+0x212>
{
return HAL_TIMEOUT;
80065ee: 2303 movs r3, #3
80065f0: e173 b.n 80068da <HAL_RCC_OscConfig+0x4fa>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80065f2: 4b0b ldr r3, [pc, #44] @ (8006620 <HAL_RCC_OscConfig+0x240>)
80065f4: 6f5b ldr r3, [r3, #116] @ 0x74
80065f6: f003 0302 and.w r3, r3, #2
80065fa: 2b00 cmp r3, #0
80065fc: d0f0 beq.n 80065e0 <HAL_RCC_OscConfig+0x200>
80065fe: e01b b.n 8006638 <HAL_RCC_OscConfig+0x258>
}
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
8006600: 4b09 ldr r3, [pc, #36] @ (8006628 <HAL_RCC_OscConfig+0x248>)
8006602: 2200 movs r2, #0
8006604: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8006606: f7fb f8c7 bl 8001798 <HAL_GetTick>
800660a: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
800660c: e00e b.n 800662c <HAL_RCC_OscConfig+0x24c>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
800660e: f7fb f8c3 bl 8001798 <HAL_GetTick>
8006612: 4602 mov r2, r0
8006614: 693b ldr r3, [r7, #16]
8006616: 1ad3 subs r3, r2, r3
8006618: 2b02 cmp r3, #2
800661a: d907 bls.n 800662c <HAL_RCC_OscConfig+0x24c>
{
return HAL_TIMEOUT;
800661c: 2303 movs r3, #3
800661e: e15c b.n 80068da <HAL_RCC_OscConfig+0x4fa>
8006620: 40023800 .word 0x40023800
8006624: 42470000 .word 0x42470000
8006628: 42470e80 .word 0x42470e80
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
800662c: 4b8a ldr r3, [pc, #552] @ (8006858 <HAL_RCC_OscConfig+0x478>)
800662e: 6f5b ldr r3, [r3, #116] @ 0x74
8006630: f003 0302 and.w r3, r3, #2
8006634: 2b00 cmp r3, #0
8006636: d1ea bne.n 800660e <HAL_RCC_OscConfig+0x22e>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
8006638: 687b ldr r3, [r7, #4]
800663a: 681b ldr r3, [r3, #0]
800663c: f003 0304 and.w r3, r3, #4
8006640: 2b00 cmp r3, #0
8006642: f000 8097 beq.w 8006774 <HAL_RCC_OscConfig+0x394>
{
FlagStatus pwrclkchanged = RESET;
8006646: 2300 movs r3, #0
8006648: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
800664a: 4b83 ldr r3, [pc, #524] @ (8006858 <HAL_RCC_OscConfig+0x478>)
800664c: 6c1b ldr r3, [r3, #64] @ 0x40
800664e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8006652: 2b00 cmp r3, #0
8006654: d10f bne.n 8006676 <HAL_RCC_OscConfig+0x296>
{
__HAL_RCC_PWR_CLK_ENABLE();
8006656: 2300 movs r3, #0
8006658: 60bb str r3, [r7, #8]
800665a: 4b7f ldr r3, [pc, #508] @ (8006858 <HAL_RCC_OscConfig+0x478>)
800665c: 6c1b ldr r3, [r3, #64] @ 0x40
800665e: 4a7e ldr r2, [pc, #504] @ (8006858 <HAL_RCC_OscConfig+0x478>)
8006660: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8006664: 6413 str r3, [r2, #64] @ 0x40
8006666: 4b7c ldr r3, [pc, #496] @ (8006858 <HAL_RCC_OscConfig+0x478>)
8006668: 6c1b ldr r3, [r3, #64] @ 0x40
800666a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800666e: 60bb str r3, [r7, #8]
8006670: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8006672: 2301 movs r3, #1
8006674: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8006676: 4b79 ldr r3, [pc, #484] @ (800685c <HAL_RCC_OscConfig+0x47c>)
8006678: 681b ldr r3, [r3, #0]
800667a: f403 7380 and.w r3, r3, #256 @ 0x100
800667e: 2b00 cmp r3, #0
8006680: d118 bne.n 80066b4 <HAL_RCC_OscConfig+0x2d4>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8006682: 4b76 ldr r3, [pc, #472] @ (800685c <HAL_RCC_OscConfig+0x47c>)
8006684: 681b ldr r3, [r3, #0]
8006686: 4a75 ldr r2, [pc, #468] @ (800685c <HAL_RCC_OscConfig+0x47c>)
8006688: f443 7380 orr.w r3, r3, #256 @ 0x100
800668c: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
800668e: f7fb f883 bl 8001798 <HAL_GetTick>
8006692: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8006694: e008 b.n 80066a8 <HAL_RCC_OscConfig+0x2c8>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8006696: f7fb f87f bl 8001798 <HAL_GetTick>
800669a: 4602 mov r2, r0
800669c: 693b ldr r3, [r7, #16]
800669e: 1ad3 subs r3, r2, r3
80066a0: 2b02 cmp r3, #2
80066a2: d901 bls.n 80066a8 <HAL_RCC_OscConfig+0x2c8>
{
return HAL_TIMEOUT;
80066a4: 2303 movs r3, #3
80066a6: e118 b.n 80068da <HAL_RCC_OscConfig+0x4fa>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80066a8: 4b6c ldr r3, [pc, #432] @ (800685c <HAL_RCC_OscConfig+0x47c>)
80066aa: 681b ldr r3, [r3, #0]
80066ac: f403 7380 and.w r3, r3, #256 @ 0x100
80066b0: 2b00 cmp r3, #0
80066b2: d0f0 beq.n 8006696 <HAL_RCC_OscConfig+0x2b6>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
80066b4: 687b ldr r3, [r7, #4]
80066b6: 689b ldr r3, [r3, #8]
80066b8: 2b01 cmp r3, #1
80066ba: d106 bne.n 80066ca <HAL_RCC_OscConfig+0x2ea>
80066bc: 4b66 ldr r3, [pc, #408] @ (8006858 <HAL_RCC_OscConfig+0x478>)
80066be: 6f1b ldr r3, [r3, #112] @ 0x70
80066c0: 4a65 ldr r2, [pc, #404] @ (8006858 <HAL_RCC_OscConfig+0x478>)
80066c2: f043 0301 orr.w r3, r3, #1
80066c6: 6713 str r3, [r2, #112] @ 0x70
80066c8: e01c b.n 8006704 <HAL_RCC_OscConfig+0x324>
80066ca: 687b ldr r3, [r7, #4]
80066cc: 689b ldr r3, [r3, #8]
80066ce: 2b05 cmp r3, #5
80066d0: d10c bne.n 80066ec <HAL_RCC_OscConfig+0x30c>
80066d2: 4b61 ldr r3, [pc, #388] @ (8006858 <HAL_RCC_OscConfig+0x478>)
80066d4: 6f1b ldr r3, [r3, #112] @ 0x70
80066d6: 4a60 ldr r2, [pc, #384] @ (8006858 <HAL_RCC_OscConfig+0x478>)
80066d8: f043 0304 orr.w r3, r3, #4
80066dc: 6713 str r3, [r2, #112] @ 0x70
80066de: 4b5e ldr r3, [pc, #376] @ (8006858 <HAL_RCC_OscConfig+0x478>)
80066e0: 6f1b ldr r3, [r3, #112] @ 0x70
80066e2: 4a5d ldr r2, [pc, #372] @ (8006858 <HAL_RCC_OscConfig+0x478>)
80066e4: f043 0301 orr.w r3, r3, #1
80066e8: 6713 str r3, [r2, #112] @ 0x70
80066ea: e00b b.n 8006704 <HAL_RCC_OscConfig+0x324>
80066ec: 4b5a ldr r3, [pc, #360] @ (8006858 <HAL_RCC_OscConfig+0x478>)
80066ee: 6f1b ldr r3, [r3, #112] @ 0x70
80066f0: 4a59 ldr r2, [pc, #356] @ (8006858 <HAL_RCC_OscConfig+0x478>)
80066f2: f023 0301 bic.w r3, r3, #1
80066f6: 6713 str r3, [r2, #112] @ 0x70
80066f8: 4b57 ldr r3, [pc, #348] @ (8006858 <HAL_RCC_OscConfig+0x478>)
80066fa: 6f1b ldr r3, [r3, #112] @ 0x70
80066fc: 4a56 ldr r2, [pc, #344] @ (8006858 <HAL_RCC_OscConfig+0x478>)
80066fe: f023 0304 bic.w r3, r3, #4
8006702: 6713 str r3, [r2, #112] @ 0x70
/* Check the LSE State */
if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
8006704: 687b ldr r3, [r7, #4]
8006706: 689b ldr r3, [r3, #8]
8006708: 2b00 cmp r3, #0
800670a: d015 beq.n 8006738 <HAL_RCC_OscConfig+0x358>
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
800670c: f7fb f844 bl 8001798 <HAL_GetTick>
8006710: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8006712: e00a b.n 800672a <HAL_RCC_OscConfig+0x34a>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8006714: f7fb f840 bl 8001798 <HAL_GetTick>
8006718: 4602 mov r2, r0
800671a: 693b ldr r3, [r7, #16]
800671c: 1ad3 subs r3, r2, r3
800671e: f241 3288 movw r2, #5000 @ 0x1388
8006722: 4293 cmp r3, r2
8006724: d901 bls.n 800672a <HAL_RCC_OscConfig+0x34a>
{
return HAL_TIMEOUT;
8006726: 2303 movs r3, #3
8006728: e0d7 b.n 80068da <HAL_RCC_OscConfig+0x4fa>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
800672a: 4b4b ldr r3, [pc, #300] @ (8006858 <HAL_RCC_OscConfig+0x478>)
800672c: 6f1b ldr r3, [r3, #112] @ 0x70
800672e: f003 0302 and.w r3, r3, #2
8006732: 2b00 cmp r3, #0
8006734: d0ee beq.n 8006714 <HAL_RCC_OscConfig+0x334>
8006736: e014 b.n 8006762 <HAL_RCC_OscConfig+0x382>
}
}
else
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
8006738: f7fb f82e bl 8001798 <HAL_GetTick>
800673c: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
800673e: e00a b.n 8006756 <HAL_RCC_OscConfig+0x376>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8006740: f7fb f82a bl 8001798 <HAL_GetTick>
8006744: 4602 mov r2, r0
8006746: 693b ldr r3, [r7, #16]
8006748: 1ad3 subs r3, r2, r3
800674a: f241 3288 movw r2, #5000 @ 0x1388
800674e: 4293 cmp r3, r2
8006750: d901 bls.n 8006756 <HAL_RCC_OscConfig+0x376>
{
return HAL_TIMEOUT;
8006752: 2303 movs r3, #3
8006754: e0c1 b.n 80068da <HAL_RCC_OscConfig+0x4fa>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8006756: 4b40 ldr r3, [pc, #256] @ (8006858 <HAL_RCC_OscConfig+0x478>)
8006758: 6f1b ldr r3, [r3, #112] @ 0x70
800675a: f003 0302 and.w r3, r3, #2
800675e: 2b00 cmp r3, #0
8006760: d1ee bne.n 8006740 <HAL_RCC_OscConfig+0x360>
}
}
}
/* Restore clock configuration if changed */
if (pwrclkchanged == SET)
8006762: 7dfb ldrb r3, [r7, #23]
8006764: 2b01 cmp r3, #1
8006766: d105 bne.n 8006774 <HAL_RCC_OscConfig+0x394>
{
__HAL_RCC_PWR_CLK_DISABLE();
8006768: 4b3b ldr r3, [pc, #236] @ (8006858 <HAL_RCC_OscConfig+0x478>)
800676a: 6c1b ldr r3, [r3, #64] @ 0x40
800676c: 4a3a ldr r2, [pc, #232] @ (8006858 <HAL_RCC_OscConfig+0x478>)
800676e: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8006772: 6413 str r3, [r2, #64] @ 0x40
}
}
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
8006774: 687b ldr r3, [r7, #4]
8006776: 699b ldr r3, [r3, #24]
8006778: 2b00 cmp r3, #0
800677a: f000 80ad beq.w 80068d8 <HAL_RCC_OscConfig+0x4f8>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
800677e: 4b36 ldr r3, [pc, #216] @ (8006858 <HAL_RCC_OscConfig+0x478>)
8006780: 689b ldr r3, [r3, #8]
8006782: f003 030c and.w r3, r3, #12
8006786: 2b08 cmp r3, #8
8006788: d060 beq.n 800684c <HAL_RCC_OscConfig+0x46c>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
800678a: 687b ldr r3, [r7, #4]
800678c: 699b ldr r3, [r3, #24]
800678e: 2b02 cmp r3, #2
8006790: d145 bne.n 800681e <HAL_RCC_OscConfig+0x43e>
assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8006792: 4b33 ldr r3, [pc, #204] @ (8006860 <HAL_RCC_OscConfig+0x480>)
8006794: 2200 movs r2, #0
8006796: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8006798: f7fa fffe bl 8001798 <HAL_GetTick>
800679c: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800679e: e008 b.n 80067b2 <HAL_RCC_OscConfig+0x3d2>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
80067a0: f7fa fffa bl 8001798 <HAL_GetTick>
80067a4: 4602 mov r2, r0
80067a6: 693b ldr r3, [r7, #16]
80067a8: 1ad3 subs r3, r2, r3
80067aa: 2b02 cmp r3, #2
80067ac: d901 bls.n 80067b2 <HAL_RCC_OscConfig+0x3d2>
{
return HAL_TIMEOUT;
80067ae: 2303 movs r3, #3
80067b0: e093 b.n 80068da <HAL_RCC_OscConfig+0x4fa>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80067b2: 4b29 ldr r3, [pc, #164] @ (8006858 <HAL_RCC_OscConfig+0x478>)
80067b4: 681b ldr r3, [r3, #0]
80067b6: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80067ba: 2b00 cmp r3, #0
80067bc: d1f0 bne.n 80067a0 <HAL_RCC_OscConfig+0x3c0>
}
}
/* Configure the main PLL clock source, multiplication and division factors. */
WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \
80067be: 687b ldr r3, [r7, #4]
80067c0: 69da ldr r2, [r3, #28]
80067c2: 687b ldr r3, [r7, #4]
80067c4: 6a1b ldr r3, [r3, #32]
80067c6: 431a orrs r2, r3
80067c8: 687b ldr r3, [r7, #4]
80067ca: 6a5b ldr r3, [r3, #36] @ 0x24
80067cc: 019b lsls r3, r3, #6
80067ce: 431a orrs r2, r3
80067d0: 687b ldr r3, [r7, #4]
80067d2: 6a9b ldr r3, [r3, #40] @ 0x28
80067d4: 085b lsrs r3, r3, #1
80067d6: 3b01 subs r3, #1
80067d8: 041b lsls r3, r3, #16
80067da: 431a orrs r2, r3
80067dc: 687b ldr r3, [r7, #4]
80067de: 6adb ldr r3, [r3, #44] @ 0x2c
80067e0: 061b lsls r3, r3, #24
80067e2: 431a orrs r2, r3
80067e4: 687b ldr r3, [r7, #4]
80067e6: 6b1b ldr r3, [r3, #48] @ 0x30
80067e8: 071b lsls r3, r3, #28
80067ea: 491b ldr r1, [pc, #108] @ (8006858 <HAL_RCC_OscConfig+0x478>)
80067ec: 4313 orrs r3, r2
80067ee: 604b str r3, [r1, #4]
(RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \
(((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \
(RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos) | \
(RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos)));
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
80067f0: 4b1b ldr r3, [pc, #108] @ (8006860 <HAL_RCC_OscConfig+0x480>)
80067f2: 2201 movs r2, #1
80067f4: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
80067f6: f7fa ffcf bl 8001798 <HAL_GetTick>
80067fa: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
80067fc: e008 b.n 8006810 <HAL_RCC_OscConfig+0x430>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
80067fe: f7fa ffcb bl 8001798 <HAL_GetTick>
8006802: 4602 mov r2, r0
8006804: 693b ldr r3, [r7, #16]
8006806: 1ad3 subs r3, r2, r3
8006808: 2b02 cmp r3, #2
800680a: d901 bls.n 8006810 <HAL_RCC_OscConfig+0x430>
{
return HAL_TIMEOUT;
800680c: 2303 movs r3, #3
800680e: e064 b.n 80068da <HAL_RCC_OscConfig+0x4fa>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8006810: 4b11 ldr r3, [pc, #68] @ (8006858 <HAL_RCC_OscConfig+0x478>)
8006812: 681b ldr r3, [r3, #0]
8006814: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8006818: 2b00 cmp r3, #0
800681a: d0f0 beq.n 80067fe <HAL_RCC_OscConfig+0x41e>
800681c: e05c b.n 80068d8 <HAL_RCC_OscConfig+0x4f8>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
800681e: 4b10 ldr r3, [pc, #64] @ (8006860 <HAL_RCC_OscConfig+0x480>)
8006820: 2200 movs r2, #0
8006822: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8006824: f7fa ffb8 bl 8001798 <HAL_GetTick>
8006828: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800682a: e008 b.n 800683e <HAL_RCC_OscConfig+0x45e>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
800682c: f7fa ffb4 bl 8001798 <HAL_GetTick>
8006830: 4602 mov r2, r0
8006832: 693b ldr r3, [r7, #16]
8006834: 1ad3 subs r3, r2, r3
8006836: 2b02 cmp r3, #2
8006838: d901 bls.n 800683e <HAL_RCC_OscConfig+0x45e>
{
return HAL_TIMEOUT;
800683a: 2303 movs r3, #3
800683c: e04d b.n 80068da <HAL_RCC_OscConfig+0x4fa>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800683e: 4b06 ldr r3, [pc, #24] @ (8006858 <HAL_RCC_OscConfig+0x478>)
8006840: 681b ldr r3, [r3, #0]
8006842: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8006846: 2b00 cmp r3, #0
8006848: d1f0 bne.n 800682c <HAL_RCC_OscConfig+0x44c>
800684a: e045 b.n 80068d8 <HAL_RCC_OscConfig+0x4f8>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
800684c: 687b ldr r3, [r7, #4]
800684e: 699b ldr r3, [r3, #24]
8006850: 2b01 cmp r3, #1
8006852: d107 bne.n 8006864 <HAL_RCC_OscConfig+0x484>
{
return HAL_ERROR;
8006854: 2301 movs r3, #1
8006856: e040 b.n 80068da <HAL_RCC_OscConfig+0x4fa>
8006858: 40023800 .word 0x40023800
800685c: 40007000 .word 0x40007000
8006860: 42470060 .word 0x42470060
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->PLLCFGR;
8006864: 4b1f ldr r3, [pc, #124] @ (80068e4 <HAL_RCC_OscConfig+0x504>)
8006866: 685b ldr r3, [r3, #4]
8006868: 60fb str r3, [r7, #12]
#if defined (RCC_PLLCFGR_PLLR)
if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
800686a: 687b ldr r3, [r7, #4]
800686c: 699b ldr r3, [r3, #24]
800686e: 2b01 cmp r3, #1
8006870: d030 beq.n 80068d4 <HAL_RCC_OscConfig+0x4f4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8006872: 68fb ldr r3, [r7, #12]
8006874: f403 0280 and.w r2, r3, #4194304 @ 0x400000
8006878: 687b ldr r3, [r7, #4]
800687a: 69db ldr r3, [r3, #28]
if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
800687c: 429a cmp r2, r3
800687e: d129 bne.n 80068d4 <HAL_RCC_OscConfig+0x4f4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) ||
8006880: 68fb ldr r3, [r7, #12]
8006882: f003 023f and.w r2, r3, #63 @ 0x3f
8006886: 687b ldr r3, [r7, #4]
8006888: 6a1b ldr r3, [r3, #32]
(READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
800688a: 429a cmp r2, r3
800688c: d122 bne.n 80068d4 <HAL_RCC_OscConfig+0x4f4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
800688e: 68fa ldr r2, [r7, #12]
8006890: f647 73c0 movw r3, #32704 @ 0x7fc0
8006894: 4013 ands r3, r2
8006896: 687a ldr r2, [r7, #4]
8006898: 6a52 ldr r2, [r2, #36] @ 0x24
800689a: 0192 lsls r2, r2, #6
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) ||
800689c: 4293 cmp r3, r2
800689e: d119 bne.n 80068d4 <HAL_RCC_OscConfig+0x4f4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
80068a0: 68fb ldr r3, [r7, #12]
80068a2: f403 3240 and.w r2, r3, #196608 @ 0x30000
80068a6: 687b ldr r3, [r7, #4]
80068a8: 6a9b ldr r3, [r3, #40] @ 0x28
80068aa: 085b lsrs r3, r3, #1
80068ac: 3b01 subs r3, #1
80068ae: 041b lsls r3, r3, #16
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
80068b0: 429a cmp r2, r3
80068b2: d10f bne.n 80068d4 <HAL_RCC_OscConfig+0x4f4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) ||
80068b4: 68fb ldr r3, [r7, #12]
80068b6: f003 6270 and.w r2, r3, #251658240 @ 0xf000000
80068ba: 687b ldr r3, [r7, #4]
80068bc: 6adb ldr r3, [r3, #44] @ 0x2c
80068be: 061b lsls r3, r3, #24
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
80068c0: 429a cmp r2, r3
80068c2: d107 bne.n 80068d4 <HAL_RCC_OscConfig+0x4f4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos)))
80068c4: 68fb ldr r3, [r7, #12]
80068c6: f003 42e0 and.w r2, r3, #1879048192 @ 0x70000000
80068ca: 687b ldr r3, [r7, #4]
80068cc: 6b1b ldr r3, [r3, #48] @ 0x30
80068ce: 071b lsls r3, r3, #28
(READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) ||
80068d0: 429a cmp r2, r3
80068d2: d001 beq.n 80068d8 <HAL_RCC_OscConfig+0x4f8>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
(READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)))
#endif /* RCC_PLLCFGR_PLLR */
{
return HAL_ERROR;
80068d4: 2301 movs r3, #1
80068d6: e000 b.n 80068da <HAL_RCC_OscConfig+0x4fa>
}
}
}
}
return HAL_OK;
80068d8: 2300 movs r3, #0
}
80068da: 4618 mov r0, r3
80068dc: 3718 adds r7, #24
80068de: 46bd mov sp, r7
80068e0: bd80 pop {r7, pc}
80068e2: bf00 nop
80068e4: 40023800 .word 0x40023800
080068e8 <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
80068e8: b580 push {r7, lr}
80068ea: b082 sub sp, #8
80068ec: af00 add r7, sp, #0
80068ee: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
80068f0: 687b ldr r3, [r7, #4]
80068f2: 2b00 cmp r3, #0
80068f4: d101 bne.n 80068fa <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
80068f6: 2301 movs r3, #1
80068f8: e041 b.n 800697e <HAL_TIM_Base_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
80068fa: 687b ldr r3, [r7, #4]
80068fc: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8006900: b2db uxtb r3, r3
8006902: 2b00 cmp r3, #0
8006904: d106 bne.n 8006914 <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8006906: 687b ldr r3, [r7, #4]
8006908: 2200 movs r2, #0
800690a: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
800690e: 6878 ldr r0, [r7, #4]
8006910: f000 f839 bl 8006986 <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8006914: 687b ldr r3, [r7, #4]
8006916: 2202 movs r2, #2
8006918: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
800691c: 687b ldr r3, [r7, #4]
800691e: 681a ldr r2, [r3, #0]
8006920: 687b ldr r3, [r7, #4]
8006922: 3304 adds r3, #4
8006924: 4619 mov r1, r3
8006926: 4610 mov r0, r2
8006928: f000 f9c0 bl 8006cac <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
800692c: 687b ldr r3, [r7, #4]
800692e: 2201 movs r2, #1
8006930: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8006934: 687b ldr r3, [r7, #4]
8006936: 2201 movs r2, #1
8006938: f883 203e strb.w r2, [r3, #62] @ 0x3e
800693c: 687b ldr r3, [r7, #4]
800693e: 2201 movs r2, #1
8006940: f883 203f strb.w r2, [r3, #63] @ 0x3f
8006944: 687b ldr r3, [r7, #4]
8006946: 2201 movs r2, #1
8006948: f883 2040 strb.w r2, [r3, #64] @ 0x40
800694c: 687b ldr r3, [r7, #4]
800694e: 2201 movs r2, #1
8006950: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8006954: 687b ldr r3, [r7, #4]
8006956: 2201 movs r2, #1
8006958: f883 2042 strb.w r2, [r3, #66] @ 0x42
800695c: 687b ldr r3, [r7, #4]
800695e: 2201 movs r2, #1
8006960: f883 2043 strb.w r2, [r3, #67] @ 0x43
8006964: 687b ldr r3, [r7, #4]
8006966: 2201 movs r2, #1
8006968: f883 2044 strb.w r2, [r3, #68] @ 0x44
800696c: 687b ldr r3, [r7, #4]
800696e: 2201 movs r2, #1
8006970: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8006974: 687b ldr r3, [r7, #4]
8006976: 2201 movs r2, #1
8006978: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
800697c: 2300 movs r3, #0
}
800697e: 4618 mov r0, r3
8006980: 3708 adds r7, #8
8006982: 46bd mov sp, r7
8006984: bd80 pop {r7, pc}
08006986 <HAL_TIM_Base_MspInit>:
* @brief Initializes the TIM Base MSP.
* @param htim TIM Base handle
* @retval None
*/
__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
{
8006986: b480 push {r7}
8006988: b083 sub sp, #12
800698a: af00 add r7, sp, #0
800698c: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_Base_MspInit could be implemented in the user file
*/
}
800698e: bf00 nop
8006990: 370c adds r7, #12
8006992: 46bd mov sp, r7
8006994: f85d 7b04 ldr.w r7, [sp], #4
8006998: 4770 bx lr
...
0800699c <HAL_TIM_Base_Start_IT>:
* @brief Starts the TIM Base generation in interrupt mode.
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
{
800699c: b480 push {r7}
800699e: b085 sub sp, #20
80069a0: af00 add r7, sp, #0
80069a2: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_INSTANCE(htim->Instance));
/* Check the TIM state */
if (htim->State != HAL_TIM_STATE_READY)
80069a4: 687b ldr r3, [r7, #4]
80069a6: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
80069aa: b2db uxtb r3, r3
80069ac: 2b01 cmp r3, #1
80069ae: d001 beq.n 80069b4 <HAL_TIM_Base_Start_IT+0x18>
{
return HAL_ERROR;
80069b0: 2301 movs r3, #1
80069b2: e04e b.n 8006a52 <HAL_TIM_Base_Start_IT+0xb6>
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
80069b4: 687b ldr r3, [r7, #4]
80069b6: 2202 movs r2, #2
80069b8: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Enable the TIM Update interrupt */
__HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
80069bc: 687b ldr r3, [r7, #4]
80069be: 681b ldr r3, [r3, #0]
80069c0: 68da ldr r2, [r3, #12]
80069c2: 687b ldr r3, [r7, #4]
80069c4: 681b ldr r3, [r3, #0]
80069c6: f042 0201 orr.w r2, r2, #1
80069ca: 60da str r2, [r3, #12]
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
80069cc: 687b ldr r3, [r7, #4]
80069ce: 681b ldr r3, [r3, #0]
80069d0: 4a23 ldr r2, [pc, #140] @ (8006a60 <HAL_TIM_Base_Start_IT+0xc4>)
80069d2: 4293 cmp r3, r2
80069d4: d022 beq.n 8006a1c <HAL_TIM_Base_Start_IT+0x80>
80069d6: 687b ldr r3, [r7, #4]
80069d8: 681b ldr r3, [r3, #0]
80069da: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
80069de: d01d beq.n 8006a1c <HAL_TIM_Base_Start_IT+0x80>
80069e0: 687b ldr r3, [r7, #4]
80069e2: 681b ldr r3, [r3, #0]
80069e4: 4a1f ldr r2, [pc, #124] @ (8006a64 <HAL_TIM_Base_Start_IT+0xc8>)
80069e6: 4293 cmp r3, r2
80069e8: d018 beq.n 8006a1c <HAL_TIM_Base_Start_IT+0x80>
80069ea: 687b ldr r3, [r7, #4]
80069ec: 681b ldr r3, [r3, #0]
80069ee: 4a1e ldr r2, [pc, #120] @ (8006a68 <HAL_TIM_Base_Start_IT+0xcc>)
80069f0: 4293 cmp r3, r2
80069f2: d013 beq.n 8006a1c <HAL_TIM_Base_Start_IT+0x80>
80069f4: 687b ldr r3, [r7, #4]
80069f6: 681b ldr r3, [r3, #0]
80069f8: 4a1c ldr r2, [pc, #112] @ (8006a6c <HAL_TIM_Base_Start_IT+0xd0>)
80069fa: 4293 cmp r3, r2
80069fc: d00e beq.n 8006a1c <HAL_TIM_Base_Start_IT+0x80>
80069fe: 687b ldr r3, [r7, #4]
8006a00: 681b ldr r3, [r3, #0]
8006a02: 4a1b ldr r2, [pc, #108] @ (8006a70 <HAL_TIM_Base_Start_IT+0xd4>)
8006a04: 4293 cmp r3, r2
8006a06: d009 beq.n 8006a1c <HAL_TIM_Base_Start_IT+0x80>
8006a08: 687b ldr r3, [r7, #4]
8006a0a: 681b ldr r3, [r3, #0]
8006a0c: 4a19 ldr r2, [pc, #100] @ (8006a74 <HAL_TIM_Base_Start_IT+0xd8>)
8006a0e: 4293 cmp r3, r2
8006a10: d004 beq.n 8006a1c <HAL_TIM_Base_Start_IT+0x80>
8006a12: 687b ldr r3, [r7, #4]
8006a14: 681b ldr r3, [r3, #0]
8006a16: 4a18 ldr r2, [pc, #96] @ (8006a78 <HAL_TIM_Base_Start_IT+0xdc>)
8006a18: 4293 cmp r3, r2
8006a1a: d111 bne.n 8006a40 <HAL_TIM_Base_Start_IT+0xa4>
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
8006a1c: 687b ldr r3, [r7, #4]
8006a1e: 681b ldr r3, [r3, #0]
8006a20: 689b ldr r3, [r3, #8]
8006a22: f003 0307 and.w r3, r3, #7
8006a26: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8006a28: 68fb ldr r3, [r7, #12]
8006a2a: 2b06 cmp r3, #6
8006a2c: d010 beq.n 8006a50 <HAL_TIM_Base_Start_IT+0xb4>
{
__HAL_TIM_ENABLE(htim);
8006a2e: 687b ldr r3, [r7, #4]
8006a30: 681b ldr r3, [r3, #0]
8006a32: 681a ldr r2, [r3, #0]
8006a34: 687b ldr r3, [r7, #4]
8006a36: 681b ldr r3, [r3, #0]
8006a38: f042 0201 orr.w r2, r2, #1
8006a3c: 601a str r2, [r3, #0]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8006a3e: e007 b.n 8006a50 <HAL_TIM_Base_Start_IT+0xb4>
}
}
else
{
__HAL_TIM_ENABLE(htim);
8006a40: 687b ldr r3, [r7, #4]
8006a42: 681b ldr r3, [r3, #0]
8006a44: 681a ldr r2, [r3, #0]
8006a46: 687b ldr r3, [r7, #4]
8006a48: 681b ldr r3, [r3, #0]
8006a4a: f042 0201 orr.w r2, r2, #1
8006a4e: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
8006a50: 2300 movs r3, #0
}
8006a52: 4618 mov r0, r3
8006a54: 3714 adds r7, #20
8006a56: 46bd mov sp, r7
8006a58: f85d 7b04 ldr.w r7, [sp], #4
8006a5c: 4770 bx lr
8006a5e: bf00 nop
8006a60: 40010000 .word 0x40010000
8006a64: 40000400 .word 0x40000400
8006a68: 40000800 .word 0x40000800
8006a6c: 40000c00 .word 0x40000c00
8006a70: 40010400 .word 0x40010400
8006a74: 40014000 .word 0x40014000
8006a78: 40001800 .word 0x40001800
08006a7c <HAL_TIM_IRQHandler>:
* @brief This function handles TIM interrupts requests.
* @param htim TIM handle
* @retval None
*/
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
8006a7c: b580 push {r7, lr}
8006a7e: b084 sub sp, #16
8006a80: af00 add r7, sp, #0
8006a82: 6078 str r0, [r7, #4]
uint32_t itsource = htim->Instance->DIER;
8006a84: 687b ldr r3, [r7, #4]
8006a86: 681b ldr r3, [r3, #0]
8006a88: 68db ldr r3, [r3, #12]
8006a8a: 60fb str r3, [r7, #12]
uint32_t itflag = htim->Instance->SR;
8006a8c: 687b ldr r3, [r7, #4]
8006a8e: 681b ldr r3, [r3, #0]
8006a90: 691b ldr r3, [r3, #16]
8006a92: 60bb str r3, [r7, #8]
/* Capture compare 1 event */
if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1))
8006a94: 68bb ldr r3, [r7, #8]
8006a96: f003 0302 and.w r3, r3, #2
8006a9a: 2b00 cmp r3, #0
8006a9c: d020 beq.n 8006ae0 <HAL_TIM_IRQHandler+0x64>
{
if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1))
8006a9e: 68fb ldr r3, [r7, #12]
8006aa0: f003 0302 and.w r3, r3, #2
8006aa4: 2b00 cmp r3, #0
8006aa6: d01b beq.n 8006ae0 <HAL_TIM_IRQHandler+0x64>
{
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1);
8006aa8: 687b ldr r3, [r7, #4]
8006aaa: 681b ldr r3, [r3, #0]
8006aac: f06f 0202 mvn.w r2, #2
8006ab0: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
8006ab2: 687b ldr r3, [r7, #4]
8006ab4: 2201 movs r2, #1
8006ab6: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
8006ab8: 687b ldr r3, [r7, #4]
8006aba: 681b ldr r3, [r3, #0]
8006abc: 699b ldr r3, [r3, #24]
8006abe: f003 0303 and.w r3, r3, #3
8006ac2: 2b00 cmp r3, #0
8006ac4: d003 beq.n 8006ace <HAL_TIM_IRQHandler+0x52>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8006ac6: 6878 ldr r0, [r7, #4]
8006ac8: f000 f8d2 bl 8006c70 <HAL_TIM_IC_CaptureCallback>
8006acc: e005 b.n 8006ada <HAL_TIM_IRQHandler+0x5e>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8006ace: 6878 ldr r0, [r7, #4]
8006ad0: f000 f8c4 bl 8006c5c <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8006ad4: 6878 ldr r0, [r7, #4]
8006ad6: f000 f8d5 bl 8006c84 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8006ada: 687b ldr r3, [r7, #4]
8006adc: 2200 movs r2, #0
8006ade: 771a strb r2, [r3, #28]
}
}
}
/* Capture compare 2 event */
if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2))
8006ae0: 68bb ldr r3, [r7, #8]
8006ae2: f003 0304 and.w r3, r3, #4
8006ae6: 2b00 cmp r3, #0
8006ae8: d020 beq.n 8006b2c <HAL_TIM_IRQHandler+0xb0>
{
if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2))
8006aea: 68fb ldr r3, [r7, #12]
8006aec: f003 0304 and.w r3, r3, #4
8006af0: 2b00 cmp r3, #0
8006af2: d01b beq.n 8006b2c <HAL_TIM_IRQHandler+0xb0>
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2);
8006af4: 687b ldr r3, [r7, #4]
8006af6: 681b ldr r3, [r3, #0]
8006af8: f06f 0204 mvn.w r2, #4
8006afc: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
8006afe: 687b ldr r3, [r7, #4]
8006b00: 2202 movs r2, #2
8006b02: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
8006b04: 687b ldr r3, [r7, #4]
8006b06: 681b ldr r3, [r3, #0]
8006b08: 699b ldr r3, [r3, #24]
8006b0a: f403 7340 and.w r3, r3, #768 @ 0x300
8006b0e: 2b00 cmp r3, #0
8006b10: d003 beq.n 8006b1a <HAL_TIM_IRQHandler+0x9e>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8006b12: 6878 ldr r0, [r7, #4]
8006b14: f000 f8ac bl 8006c70 <HAL_TIM_IC_CaptureCallback>
8006b18: e005 b.n 8006b26 <HAL_TIM_IRQHandler+0xaa>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8006b1a: 6878 ldr r0, [r7, #4]
8006b1c: f000 f89e bl 8006c5c <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8006b20: 6878 ldr r0, [r7, #4]
8006b22: f000 f8af bl 8006c84 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8006b26: 687b ldr r3, [r7, #4]
8006b28: 2200 movs r2, #0
8006b2a: 771a strb r2, [r3, #28]
}
}
/* Capture compare 3 event */
if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3))
8006b2c: 68bb ldr r3, [r7, #8]
8006b2e: f003 0308 and.w r3, r3, #8
8006b32: 2b00 cmp r3, #0
8006b34: d020 beq.n 8006b78 <HAL_TIM_IRQHandler+0xfc>
{
if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3))
8006b36: 68fb ldr r3, [r7, #12]
8006b38: f003 0308 and.w r3, r3, #8
8006b3c: 2b00 cmp r3, #0
8006b3e: d01b beq.n 8006b78 <HAL_TIM_IRQHandler+0xfc>
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3);
8006b40: 687b ldr r3, [r7, #4]
8006b42: 681b ldr r3, [r3, #0]
8006b44: f06f 0208 mvn.w r2, #8
8006b48: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
8006b4a: 687b ldr r3, [r7, #4]
8006b4c: 2204 movs r2, #4
8006b4e: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
8006b50: 687b ldr r3, [r7, #4]
8006b52: 681b ldr r3, [r3, #0]
8006b54: 69db ldr r3, [r3, #28]
8006b56: f003 0303 and.w r3, r3, #3
8006b5a: 2b00 cmp r3, #0
8006b5c: d003 beq.n 8006b66 <HAL_TIM_IRQHandler+0xea>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8006b5e: 6878 ldr r0, [r7, #4]
8006b60: f000 f886 bl 8006c70 <HAL_TIM_IC_CaptureCallback>
8006b64: e005 b.n 8006b72 <HAL_TIM_IRQHandler+0xf6>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8006b66: 6878 ldr r0, [r7, #4]
8006b68: f000 f878 bl 8006c5c <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8006b6c: 6878 ldr r0, [r7, #4]
8006b6e: f000 f889 bl 8006c84 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8006b72: 687b ldr r3, [r7, #4]
8006b74: 2200 movs r2, #0
8006b76: 771a strb r2, [r3, #28]
}
}
/* Capture compare 4 event */
if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4))
8006b78: 68bb ldr r3, [r7, #8]
8006b7a: f003 0310 and.w r3, r3, #16
8006b7e: 2b00 cmp r3, #0
8006b80: d020 beq.n 8006bc4 <HAL_TIM_IRQHandler+0x148>
{
if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4))
8006b82: 68fb ldr r3, [r7, #12]
8006b84: f003 0310 and.w r3, r3, #16
8006b88: 2b00 cmp r3, #0
8006b8a: d01b beq.n 8006bc4 <HAL_TIM_IRQHandler+0x148>
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4);
8006b8c: 687b ldr r3, [r7, #4]
8006b8e: 681b ldr r3, [r3, #0]
8006b90: f06f 0210 mvn.w r2, #16
8006b94: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
8006b96: 687b ldr r3, [r7, #4]
8006b98: 2208 movs r2, #8
8006b9a: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
8006b9c: 687b ldr r3, [r7, #4]
8006b9e: 681b ldr r3, [r3, #0]
8006ba0: 69db ldr r3, [r3, #28]
8006ba2: f403 7340 and.w r3, r3, #768 @ 0x300
8006ba6: 2b00 cmp r3, #0
8006ba8: d003 beq.n 8006bb2 <HAL_TIM_IRQHandler+0x136>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8006baa: 6878 ldr r0, [r7, #4]
8006bac: f000 f860 bl 8006c70 <HAL_TIM_IC_CaptureCallback>
8006bb0: e005 b.n 8006bbe <HAL_TIM_IRQHandler+0x142>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8006bb2: 6878 ldr r0, [r7, #4]
8006bb4: f000 f852 bl 8006c5c <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8006bb8: 6878 ldr r0, [r7, #4]
8006bba: f000 f863 bl 8006c84 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8006bbe: 687b ldr r3, [r7, #4]
8006bc0: 2200 movs r2, #0
8006bc2: 771a strb r2, [r3, #28]
}
}
/* TIM Update event */
if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE))
8006bc4: 68bb ldr r3, [r7, #8]
8006bc6: f003 0301 and.w r3, r3, #1
8006bca: 2b00 cmp r3, #0
8006bcc: d00c beq.n 8006be8 <HAL_TIM_IRQHandler+0x16c>
{
if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE))
8006bce: 68fb ldr r3, [r7, #12]
8006bd0: f003 0301 and.w r3, r3, #1
8006bd4: 2b00 cmp r3, #0
8006bd6: d007 beq.n 8006be8 <HAL_TIM_IRQHandler+0x16c>
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE);
8006bd8: 687b ldr r3, [r7, #4]
8006bda: 681b ldr r3, [r3, #0]
8006bdc: f06f 0201 mvn.w r2, #1
8006be0: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->PeriodElapsedCallback(htim);
#else
HAL_TIM_PeriodElapsedCallback(htim);
8006be2: 6878 ldr r0, [r7, #4]
8006be4: f7fa fa28 bl 8001038 <HAL_TIM_PeriodElapsedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM Break input event */
if ((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK))
8006be8: 68bb ldr r3, [r7, #8]
8006bea: f003 0380 and.w r3, r3, #128 @ 0x80
8006bee: 2b00 cmp r3, #0
8006bf0: d00c beq.n 8006c0c <HAL_TIM_IRQHandler+0x190>
{
if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
8006bf2: 68fb ldr r3, [r7, #12]
8006bf4: f003 0380 and.w r3, r3, #128 @ 0x80
8006bf8: 2b00 cmp r3, #0
8006bfa: d007 beq.n 8006c0c <HAL_TIM_IRQHandler+0x190>
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK);
8006bfc: 687b ldr r3, [r7, #4]
8006bfe: 681b ldr r3, [r3, #0]
8006c00: f06f 0280 mvn.w r2, #128 @ 0x80
8006c04: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->BreakCallback(htim);
#else
HAL_TIMEx_BreakCallback(htim);
8006c06: 6878 ldr r0, [r7, #4]
8006c08: f000 f906 bl 8006e18 <HAL_TIMEx_BreakCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM Trigger detection event */
if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER))
8006c0c: 68bb ldr r3, [r7, #8]
8006c0e: f003 0340 and.w r3, r3, #64 @ 0x40
8006c12: 2b00 cmp r3, #0
8006c14: d00c beq.n 8006c30 <HAL_TIM_IRQHandler+0x1b4>
{
if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER))
8006c16: 68fb ldr r3, [r7, #12]
8006c18: f003 0340 and.w r3, r3, #64 @ 0x40
8006c1c: 2b00 cmp r3, #0
8006c1e: d007 beq.n 8006c30 <HAL_TIM_IRQHandler+0x1b4>
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER);
8006c20: 687b ldr r3, [r7, #4]
8006c22: 681b ldr r3, [r3, #0]
8006c24: f06f 0240 mvn.w r2, #64 @ 0x40
8006c28: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->TriggerCallback(htim);
#else
HAL_TIM_TriggerCallback(htim);
8006c2a: 6878 ldr r0, [r7, #4]
8006c2c: f000 f834 bl 8006c98 <HAL_TIM_TriggerCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM commutation event */
if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM))
8006c30: 68bb ldr r3, [r7, #8]
8006c32: f003 0320 and.w r3, r3, #32
8006c36: 2b00 cmp r3, #0
8006c38: d00c beq.n 8006c54 <HAL_TIM_IRQHandler+0x1d8>
{
if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM))
8006c3a: 68fb ldr r3, [r7, #12]
8006c3c: f003 0320 and.w r3, r3, #32
8006c40: 2b00 cmp r3, #0
8006c42: d007 beq.n 8006c54 <HAL_TIM_IRQHandler+0x1d8>
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM);
8006c44: 687b ldr r3, [r7, #4]
8006c46: 681b ldr r3, [r3, #0]
8006c48: f06f 0220 mvn.w r2, #32
8006c4c: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->CommutationCallback(htim);
#else
HAL_TIMEx_CommutCallback(htim);
8006c4e: 6878 ldr r0, [r7, #4]
8006c50: f000 f8d8 bl 8006e04 <HAL_TIMEx_CommutCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
}
8006c54: bf00 nop
8006c56: 3710 adds r7, #16
8006c58: 46bd mov sp, r7
8006c5a: bd80 pop {r7, pc}
08006c5c <HAL_TIM_OC_DelayElapsedCallback>:
* @brief Output Compare callback in non-blocking mode
* @param htim TIM OC handle
* @retval None
*/
__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
{
8006c5c: b480 push {r7}
8006c5e: b083 sub sp, #12
8006c60: af00 add r7, sp, #0
8006c62: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
*/
}
8006c64: bf00 nop
8006c66: 370c adds r7, #12
8006c68: 46bd mov sp, r7
8006c6a: f85d 7b04 ldr.w r7, [sp], #4
8006c6e: 4770 bx lr
08006c70 <HAL_TIM_IC_CaptureCallback>:
* @brief Input Capture callback in non-blocking mode
* @param htim TIM IC handle
* @retval None
*/
__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
{
8006c70: b480 push {r7}
8006c72: b083 sub sp, #12
8006c74: af00 add r7, sp, #0
8006c76: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_IC_CaptureCallback could be implemented in the user file
*/
}
8006c78: bf00 nop
8006c7a: 370c adds r7, #12
8006c7c: 46bd mov sp, r7
8006c7e: f85d 7b04 ldr.w r7, [sp], #4
8006c82: 4770 bx lr
08006c84 <HAL_TIM_PWM_PulseFinishedCallback>:
* @brief PWM Pulse finished callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
{
8006c84: b480 push {r7}
8006c86: b083 sub sp, #12
8006c88: af00 add r7, sp, #0
8006c8a: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
*/
}
8006c8c: bf00 nop
8006c8e: 370c adds r7, #12
8006c90: 46bd mov sp, r7
8006c92: f85d 7b04 ldr.w r7, [sp], #4
8006c96: 4770 bx lr
08006c98 <HAL_TIM_TriggerCallback>:
* @brief Hall Trigger detection callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
{
8006c98: b480 push {r7}
8006c9a: b083 sub sp, #12
8006c9c: af00 add r7, sp, #0
8006c9e: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_TriggerCallback could be implemented in the user file
*/
}
8006ca0: bf00 nop
8006ca2: 370c adds r7, #12
8006ca4: 46bd mov sp, r7
8006ca6: f85d 7b04 ldr.w r7, [sp], #4
8006caa: 4770 bx lr
08006cac <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
8006cac: b480 push {r7}
8006cae: b085 sub sp, #20
8006cb0: af00 add r7, sp, #0
8006cb2: 6078 str r0, [r7, #4]
8006cb4: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
8006cb6: 687b ldr r3, [r7, #4]
8006cb8: 681b ldr r3, [r3, #0]
8006cba: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
8006cbc: 687b ldr r3, [r7, #4]
8006cbe: 4a46 ldr r2, [pc, #280] @ (8006dd8 <TIM_Base_SetConfig+0x12c>)
8006cc0: 4293 cmp r3, r2
8006cc2: d013 beq.n 8006cec <TIM_Base_SetConfig+0x40>
8006cc4: 687b ldr r3, [r7, #4]
8006cc6: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8006cca: d00f beq.n 8006cec <TIM_Base_SetConfig+0x40>
8006ccc: 687b ldr r3, [r7, #4]
8006cce: 4a43 ldr r2, [pc, #268] @ (8006ddc <TIM_Base_SetConfig+0x130>)
8006cd0: 4293 cmp r3, r2
8006cd2: d00b beq.n 8006cec <TIM_Base_SetConfig+0x40>
8006cd4: 687b ldr r3, [r7, #4]
8006cd6: 4a42 ldr r2, [pc, #264] @ (8006de0 <TIM_Base_SetConfig+0x134>)
8006cd8: 4293 cmp r3, r2
8006cda: d007 beq.n 8006cec <TIM_Base_SetConfig+0x40>
8006cdc: 687b ldr r3, [r7, #4]
8006cde: 4a41 ldr r2, [pc, #260] @ (8006de4 <TIM_Base_SetConfig+0x138>)
8006ce0: 4293 cmp r3, r2
8006ce2: d003 beq.n 8006cec <TIM_Base_SetConfig+0x40>
8006ce4: 687b ldr r3, [r7, #4]
8006ce6: 4a40 ldr r2, [pc, #256] @ (8006de8 <TIM_Base_SetConfig+0x13c>)
8006ce8: 4293 cmp r3, r2
8006cea: d108 bne.n 8006cfe <TIM_Base_SetConfig+0x52>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
8006cec: 68fb ldr r3, [r7, #12]
8006cee: f023 0370 bic.w r3, r3, #112 @ 0x70
8006cf2: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
8006cf4: 683b ldr r3, [r7, #0]
8006cf6: 685b ldr r3, [r3, #4]
8006cf8: 68fa ldr r2, [r7, #12]
8006cfa: 4313 orrs r3, r2
8006cfc: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
8006cfe: 687b ldr r3, [r7, #4]
8006d00: 4a35 ldr r2, [pc, #212] @ (8006dd8 <TIM_Base_SetConfig+0x12c>)
8006d02: 4293 cmp r3, r2
8006d04: d02b beq.n 8006d5e <TIM_Base_SetConfig+0xb2>
8006d06: 687b ldr r3, [r7, #4]
8006d08: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8006d0c: d027 beq.n 8006d5e <TIM_Base_SetConfig+0xb2>
8006d0e: 687b ldr r3, [r7, #4]
8006d10: 4a32 ldr r2, [pc, #200] @ (8006ddc <TIM_Base_SetConfig+0x130>)
8006d12: 4293 cmp r3, r2
8006d14: d023 beq.n 8006d5e <TIM_Base_SetConfig+0xb2>
8006d16: 687b ldr r3, [r7, #4]
8006d18: 4a31 ldr r2, [pc, #196] @ (8006de0 <TIM_Base_SetConfig+0x134>)
8006d1a: 4293 cmp r3, r2
8006d1c: d01f beq.n 8006d5e <TIM_Base_SetConfig+0xb2>
8006d1e: 687b ldr r3, [r7, #4]
8006d20: 4a30 ldr r2, [pc, #192] @ (8006de4 <TIM_Base_SetConfig+0x138>)
8006d22: 4293 cmp r3, r2
8006d24: d01b beq.n 8006d5e <TIM_Base_SetConfig+0xb2>
8006d26: 687b ldr r3, [r7, #4]
8006d28: 4a2f ldr r2, [pc, #188] @ (8006de8 <TIM_Base_SetConfig+0x13c>)
8006d2a: 4293 cmp r3, r2
8006d2c: d017 beq.n 8006d5e <TIM_Base_SetConfig+0xb2>
8006d2e: 687b ldr r3, [r7, #4]
8006d30: 4a2e ldr r2, [pc, #184] @ (8006dec <TIM_Base_SetConfig+0x140>)
8006d32: 4293 cmp r3, r2
8006d34: d013 beq.n 8006d5e <TIM_Base_SetConfig+0xb2>
8006d36: 687b ldr r3, [r7, #4]
8006d38: 4a2d ldr r2, [pc, #180] @ (8006df0 <TIM_Base_SetConfig+0x144>)
8006d3a: 4293 cmp r3, r2
8006d3c: d00f beq.n 8006d5e <TIM_Base_SetConfig+0xb2>
8006d3e: 687b ldr r3, [r7, #4]
8006d40: 4a2c ldr r2, [pc, #176] @ (8006df4 <TIM_Base_SetConfig+0x148>)
8006d42: 4293 cmp r3, r2
8006d44: d00b beq.n 8006d5e <TIM_Base_SetConfig+0xb2>
8006d46: 687b ldr r3, [r7, #4]
8006d48: 4a2b ldr r2, [pc, #172] @ (8006df8 <TIM_Base_SetConfig+0x14c>)
8006d4a: 4293 cmp r3, r2
8006d4c: d007 beq.n 8006d5e <TIM_Base_SetConfig+0xb2>
8006d4e: 687b ldr r3, [r7, #4]
8006d50: 4a2a ldr r2, [pc, #168] @ (8006dfc <TIM_Base_SetConfig+0x150>)
8006d52: 4293 cmp r3, r2
8006d54: d003 beq.n 8006d5e <TIM_Base_SetConfig+0xb2>
8006d56: 687b ldr r3, [r7, #4]
8006d58: 4a29 ldr r2, [pc, #164] @ (8006e00 <TIM_Base_SetConfig+0x154>)
8006d5a: 4293 cmp r3, r2
8006d5c: d108 bne.n 8006d70 <TIM_Base_SetConfig+0xc4>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
8006d5e: 68fb ldr r3, [r7, #12]
8006d60: f423 7340 bic.w r3, r3, #768 @ 0x300
8006d64: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
8006d66: 683b ldr r3, [r7, #0]
8006d68: 68db ldr r3, [r3, #12]
8006d6a: 68fa ldr r2, [r7, #12]
8006d6c: 4313 orrs r3, r2
8006d6e: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
8006d70: 68fb ldr r3, [r7, #12]
8006d72: f023 0280 bic.w r2, r3, #128 @ 0x80
8006d76: 683b ldr r3, [r7, #0]
8006d78: 695b ldr r3, [r3, #20]
8006d7a: 4313 orrs r3, r2
8006d7c: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
8006d7e: 687b ldr r3, [r7, #4]
8006d80: 68fa ldr r2, [r7, #12]
8006d82: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
8006d84: 683b ldr r3, [r7, #0]
8006d86: 689a ldr r2, [r3, #8]
8006d88: 687b ldr r3, [r7, #4]
8006d8a: 62da str r2, [r3, #44] @ 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
8006d8c: 683b ldr r3, [r7, #0]
8006d8e: 681a ldr r2, [r3, #0]
8006d90: 687b ldr r3, [r7, #4]
8006d92: 629a str r2, [r3, #40] @ 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
8006d94: 687b ldr r3, [r7, #4]
8006d96: 4a10 ldr r2, [pc, #64] @ (8006dd8 <TIM_Base_SetConfig+0x12c>)
8006d98: 4293 cmp r3, r2
8006d9a: d003 beq.n 8006da4 <TIM_Base_SetConfig+0xf8>
8006d9c: 687b ldr r3, [r7, #4]
8006d9e: 4a12 ldr r2, [pc, #72] @ (8006de8 <TIM_Base_SetConfig+0x13c>)
8006da0: 4293 cmp r3, r2
8006da2: d103 bne.n 8006dac <TIM_Base_SetConfig+0x100>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
8006da4: 683b ldr r3, [r7, #0]
8006da6: 691a ldr r2, [r3, #16]
8006da8: 687b ldr r3, [r7, #4]
8006daa: 631a str r2, [r3, #48] @ 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
8006dac: 687b ldr r3, [r7, #4]
8006dae: 2201 movs r2, #1
8006db0: 615a str r2, [r3, #20]
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
8006db2: 687b ldr r3, [r7, #4]
8006db4: 691b ldr r3, [r3, #16]
8006db6: f003 0301 and.w r3, r3, #1
8006dba: 2b01 cmp r3, #1
8006dbc: d105 bne.n 8006dca <TIM_Base_SetConfig+0x11e>
{
/* Clear the update flag */
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
8006dbe: 687b ldr r3, [r7, #4]
8006dc0: 691b ldr r3, [r3, #16]
8006dc2: f023 0201 bic.w r2, r3, #1
8006dc6: 687b ldr r3, [r7, #4]
8006dc8: 611a str r2, [r3, #16]
}
}
8006dca: bf00 nop
8006dcc: 3714 adds r7, #20
8006dce: 46bd mov sp, r7
8006dd0: f85d 7b04 ldr.w r7, [sp], #4
8006dd4: 4770 bx lr
8006dd6: bf00 nop
8006dd8: 40010000 .word 0x40010000
8006ddc: 40000400 .word 0x40000400
8006de0: 40000800 .word 0x40000800
8006de4: 40000c00 .word 0x40000c00
8006de8: 40010400 .word 0x40010400
8006dec: 40014000 .word 0x40014000
8006df0: 40014400 .word 0x40014400
8006df4: 40014800 .word 0x40014800
8006df8: 40001800 .word 0x40001800
8006dfc: 40001c00 .word 0x40001c00
8006e00: 40002000 .word 0x40002000
08006e04 <HAL_TIMEx_CommutCallback>:
* @brief Commutation callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
{
8006e04: b480 push {r7}
8006e06: b083 sub sp, #12
8006e08: af00 add r7, sp, #0
8006e0a: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIMEx_CommutCallback could be implemented in the user file
*/
}
8006e0c: bf00 nop
8006e0e: 370c adds r7, #12
8006e10: 46bd mov sp, r7
8006e12: f85d 7b04 ldr.w r7, [sp], #4
8006e16: 4770 bx lr
08006e18 <HAL_TIMEx_BreakCallback>:
* @brief Break detection callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
8006e18: b480 push {r7}
8006e1a: b083 sub sp, #12
8006e1c: af00 add r7, sp, #0
8006e1e: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIMEx_BreakCallback could be implemented in the user file
*/
}
8006e20: bf00 nop
8006e22: 370c adds r7, #12
8006e24: 46bd mov sp, r7
8006e26: f85d 7b04 ldr.w r7, [sp], #4
8006e2a: 4770 bx lr
08006e2c <SDIO_Init>:
* @param SDIOx: Pointer to SDMMC register base
* @param Init: SDMMC initialization structure
* @retval HAL status
*/
HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init)
{
8006e2c: b084 sub sp, #16
8006e2e: b480 push {r7}
8006e30: b085 sub sp, #20
8006e32: af00 add r7, sp, #0
8006e34: 6078 str r0, [r7, #4]
8006e36: f107 001c add.w r0, r7, #28
8006e3a: e880 000e stmia.w r0, {r1, r2, r3}
uint32_t tmpreg = 0;
8006e3e: 2300 movs r3, #0
8006e40: 60fb str r3, [r7, #12]
assert_param(IS_SDIO_BUS_WIDE(Init.BusWide));
assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
assert_param(IS_SDIO_CLKDIV(Init.ClockDiv));
/* Set SDMMC configuration parameters */
tmpreg |= (Init.ClockEdge |\
8006e42: 69fa ldr r2, [r7, #28]
Init.ClockBypass |\
8006e44: 6a3b ldr r3, [r7, #32]
tmpreg |= (Init.ClockEdge |\
8006e46: 431a orrs r2, r3
Init.ClockPowerSave |\
8006e48: 6a7b ldr r3, [r7, #36] @ 0x24
Init.ClockBypass |\
8006e4a: 431a orrs r2, r3
Init.BusWide |\
8006e4c: 6abb ldr r3, [r7, #40] @ 0x28
Init.ClockPowerSave |\
8006e4e: 431a orrs r2, r3
Init.HardwareFlowControl |\
8006e50: 6afb ldr r3, [r7, #44] @ 0x2c
Init.BusWide |\
8006e52: 431a orrs r2, r3
Init.ClockDiv
8006e54: 6b3b ldr r3, [r7, #48] @ 0x30
Init.HardwareFlowControl |\
8006e56: 4313 orrs r3, r2
tmpreg |= (Init.ClockEdge |\
8006e58: 68fa ldr r2, [r7, #12]
8006e5a: 4313 orrs r3, r2
8006e5c: 60fb str r3, [r7, #12]
);
/* Write to SDMMC CLKCR */
MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
8006e5e: 687b ldr r3, [r7, #4]
8006e60: 685b ldr r3, [r3, #4]
8006e62: f423 43fd bic.w r3, r3, #32384 @ 0x7e80
8006e66: f023 037f bic.w r3, r3, #127 @ 0x7f
8006e6a: 68fa ldr r2, [r7, #12]
8006e6c: 431a orrs r2, r3
8006e6e: 687b ldr r3, [r7, #4]
8006e70: 605a str r2, [r3, #4]
return HAL_OK;
8006e72: 2300 movs r3, #0
}
8006e74: 4618 mov r0, r3
8006e76: 3714 adds r7, #20
8006e78: 46bd mov sp, r7
8006e7a: f85d 7b04 ldr.w r7, [sp], #4
8006e7e: b004 add sp, #16
8006e80: 4770 bx lr
08006e82 <SDIO_ReadFIFO>:
* @brief Read data (word) from Rx FIFO in blocking mode (polling)
* @param SDIOx: Pointer to SDMMC register base
* @retval HAL status
*/
uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx)
{
8006e82: b480 push {r7}
8006e84: b083 sub sp, #12
8006e86: af00 add r7, sp, #0
8006e88: 6078 str r0, [r7, #4]
/* Read data from Rx FIFO */
return (SDIOx->FIFO);
8006e8a: 687b ldr r3, [r7, #4]
8006e8c: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
}
8006e90: 4618 mov r0, r3
8006e92: 370c adds r7, #12
8006e94: 46bd mov sp, r7
8006e96: f85d 7b04 ldr.w r7, [sp], #4
8006e9a: 4770 bx lr
08006e9c <SDIO_WriteFIFO>:
* @param SDIOx: Pointer to SDMMC register base
* @param pWriteData: pointer to data to write
* @retval HAL status
*/
HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData)
{
8006e9c: b480 push {r7}
8006e9e: b083 sub sp, #12
8006ea0: af00 add r7, sp, #0
8006ea2: 6078 str r0, [r7, #4]
8006ea4: 6039 str r1, [r7, #0]
/* Write data to FIFO */
SDIOx->FIFO = *pWriteData;
8006ea6: 683b ldr r3, [r7, #0]
8006ea8: 681a ldr r2, [r3, #0]
8006eaa: 687b ldr r3, [r7, #4]
8006eac: f8c3 2080 str.w r2, [r3, #128] @ 0x80
return HAL_OK;
8006eb0: 2300 movs r3, #0
}
8006eb2: 4618 mov r0, r3
8006eb4: 370c adds r7, #12
8006eb6: 46bd mov sp, r7
8006eb8: f85d 7b04 ldr.w r7, [sp], #4
8006ebc: 4770 bx lr
08006ebe <SDIO_PowerState_ON>:
* @brief Set SDMMC Power state to ON.
* @param SDIOx: Pointer to SDMMC register base
* @retval HAL status
*/
HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx)
{
8006ebe: b480 push {r7}
8006ec0: b083 sub sp, #12
8006ec2: af00 add r7, sp, #0
8006ec4: 6078 str r0, [r7, #4]
/* Set power state to ON */
SDIOx->POWER = SDIO_POWER_PWRCTRL;
8006ec6: 687b ldr r3, [r7, #4]
8006ec8: 2203 movs r2, #3
8006eca: 601a str r2, [r3, #0]
return HAL_OK;
8006ecc: 2300 movs r3, #0
}
8006ece: 4618 mov r0, r3
8006ed0: 370c adds r7, #12
8006ed2: 46bd mov sp, r7
8006ed4: f85d 7b04 ldr.w r7, [sp], #4
8006ed8: 4770 bx lr
08006eda <SDIO_GetPowerState>:
* - 0x00: Power OFF
* - 0x02: Power UP
* - 0x03: Power ON
*/
uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx)
{
8006eda: b480 push {r7}
8006edc: b083 sub sp, #12
8006ede: af00 add r7, sp, #0
8006ee0: 6078 str r0, [r7, #4]
return (SDIOx->POWER & SDIO_POWER_PWRCTRL);
8006ee2: 687b ldr r3, [r7, #4]
8006ee4: 681b ldr r3, [r3, #0]
8006ee6: f003 0303 and.w r3, r3, #3
}
8006eea: 4618 mov r0, r3
8006eec: 370c adds r7, #12
8006eee: 46bd mov sp, r7
8006ef0: f85d 7b04 ldr.w r7, [sp], #4
8006ef4: 4770 bx lr
08006ef6 <SDIO_SendCommand>:
* @param Command: pointer to a SDIO_CmdInitTypeDef structure that contains
* the configuration information for the SDMMC command
* @retval HAL status
*/
HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *Command)
{
8006ef6: b480 push {r7}
8006ef8: b085 sub sp, #20
8006efa: af00 add r7, sp, #0
8006efc: 6078 str r0, [r7, #4]
8006efe: 6039 str r1, [r7, #0]
uint32_t tmpreg = 0;
8006f00: 2300 movs r3, #0
8006f02: 60fb str r3, [r7, #12]
assert_param(IS_SDIO_RESPONSE(Command->Response));
assert_param(IS_SDIO_WAIT(Command->WaitForInterrupt));
assert_param(IS_SDIO_CPSM(Command->CPSM));
/* Set the SDMMC Argument value */
SDIOx->ARG = Command->Argument;
8006f04: 683b ldr r3, [r7, #0]
8006f06: 681a ldr r2, [r3, #0]
8006f08: 687b ldr r3, [r7, #4]
8006f0a: 609a str r2, [r3, #8]
/* Set SDMMC command parameters */
tmpreg |= (uint32_t)(Command->CmdIndex |\
8006f0c: 683b ldr r3, [r7, #0]
8006f0e: 685a ldr r2, [r3, #4]
Command->Response |\
8006f10: 683b ldr r3, [r7, #0]
8006f12: 689b ldr r3, [r3, #8]
tmpreg |= (uint32_t)(Command->CmdIndex |\
8006f14: 431a orrs r2, r3
Command->WaitForInterrupt |\
8006f16: 683b ldr r3, [r7, #0]
8006f18: 68db ldr r3, [r3, #12]
Command->Response |\
8006f1a: 431a orrs r2, r3
Command->CPSM);
8006f1c: 683b ldr r3, [r7, #0]
8006f1e: 691b ldr r3, [r3, #16]
Command->WaitForInterrupt |\
8006f20: 4313 orrs r3, r2
tmpreg |= (uint32_t)(Command->CmdIndex |\
8006f22: 68fa ldr r2, [r7, #12]
8006f24: 4313 orrs r3, r2
8006f26: 60fb str r3, [r7, #12]
/* Write to SDMMC CMD register */
MODIFY_REG(SDIOx->CMD, CMD_CLEAR_MASK, tmpreg);
8006f28: 687b ldr r3, [r7, #4]
8006f2a: 68db ldr r3, [r3, #12]
8006f2c: f423 637f bic.w r3, r3, #4080 @ 0xff0
8006f30: f023 030f bic.w r3, r3, #15
8006f34: 68fa ldr r2, [r7, #12]
8006f36: 431a orrs r2, r3
8006f38: 687b ldr r3, [r7, #4]
8006f3a: 60da str r2, [r3, #12]
return HAL_OK;
8006f3c: 2300 movs r3, #0
}
8006f3e: 4618 mov r0, r3
8006f40: 3714 adds r7, #20
8006f42: 46bd mov sp, r7
8006f44: f85d 7b04 ldr.w r7, [sp], #4
8006f48: 4770 bx lr
08006f4a <SDIO_GetCommandResponse>:
* @brief Return the command index of last command for which response received
* @param SDIOx: Pointer to SDMMC register base
* @retval Command index of the last command response received
*/
uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx)
{
8006f4a: b480 push {r7}
8006f4c: b083 sub sp, #12
8006f4e: af00 add r7, sp, #0
8006f50: 6078 str r0, [r7, #4]
return (uint8_t)(SDIOx->RESPCMD);
8006f52: 687b ldr r3, [r7, #4]
8006f54: 691b ldr r3, [r3, #16]
8006f56: b2db uxtb r3, r3
}
8006f58: 4618 mov r0, r3
8006f5a: 370c adds r7, #12
8006f5c: 46bd mov sp, r7
8006f5e: f85d 7b04 ldr.w r7, [sp], #4
8006f62: 4770 bx lr
08006f64 <SDIO_GetResponse>:
* @arg SDIO_RESP3: Response Register 3
* @arg SDIO_RESP4: Response Register 4
* @retval The Corresponding response register value
*/
uint32_t SDIO_GetResponse(SDIO_TypeDef *SDIOx, uint32_t Response)
{
8006f64: b480 push {r7}
8006f66: b085 sub sp, #20
8006f68: af00 add r7, sp, #0
8006f6a: 6078 str r0, [r7, #4]
8006f6c: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_SDIO_RESP(Response));
/* Get the response */
tmp = (uint32_t)(&(SDIOx->RESP1)) + Response;
8006f6e: 687b ldr r3, [r7, #4]
8006f70: 3314 adds r3, #20
8006f72: 461a mov r2, r3
8006f74: 683b ldr r3, [r7, #0]
8006f76: 4413 add r3, r2
8006f78: 60fb str r3, [r7, #12]
return (*(__IO uint32_t *) tmp);
8006f7a: 68fb ldr r3, [r7, #12]
8006f7c: 681b ldr r3, [r3, #0]
}
8006f7e: 4618 mov r0, r3
8006f80: 3714 adds r7, #20
8006f82: 46bd mov sp, r7
8006f84: f85d 7b04 ldr.w r7, [sp], #4
8006f88: 4770 bx lr
08006f8a <SDIO_ConfigData>:
* @param Data : pointer to a SDIO_DataInitTypeDef structure
* that contains the configuration information for the SDMMC data.
* @retval HAL status
*/
HAL_StatusTypeDef SDIO_ConfigData(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* Data)
{
8006f8a: b480 push {r7}
8006f8c: b085 sub sp, #20
8006f8e: af00 add r7, sp, #0
8006f90: 6078 str r0, [r7, #4]
8006f92: 6039 str r1, [r7, #0]
uint32_t tmpreg = 0;
8006f94: 2300 movs r3, #0
8006f96: 60fb str r3, [r7, #12]
assert_param(IS_SDIO_TRANSFER_DIR(Data->TransferDir));
assert_param(IS_SDIO_TRANSFER_MODE(Data->TransferMode));
assert_param(IS_SDIO_DPSM(Data->DPSM));
/* Set the SDMMC Data TimeOut value */
SDIOx->DTIMER = Data->DataTimeOut;
8006f98: 683b ldr r3, [r7, #0]
8006f9a: 681a ldr r2, [r3, #0]
8006f9c: 687b ldr r3, [r7, #4]
8006f9e: 625a str r2, [r3, #36] @ 0x24
/* Set the SDMMC DataLength value */
SDIOx->DLEN = Data->DataLength;
8006fa0: 683b ldr r3, [r7, #0]
8006fa2: 685a ldr r2, [r3, #4]
8006fa4: 687b ldr r3, [r7, #4]
8006fa6: 629a str r2, [r3, #40] @ 0x28
/* Set the SDMMC data configuration parameters */
tmpreg |= (uint32_t)(Data->DataBlockSize |\
8006fa8: 683b ldr r3, [r7, #0]
8006faa: 689a ldr r2, [r3, #8]
Data->TransferDir |\
8006fac: 683b ldr r3, [r7, #0]
8006fae: 68db ldr r3, [r3, #12]
tmpreg |= (uint32_t)(Data->DataBlockSize |\
8006fb0: 431a orrs r2, r3
Data->TransferMode |\
8006fb2: 683b ldr r3, [r7, #0]
8006fb4: 691b ldr r3, [r3, #16]
Data->TransferDir |\
8006fb6: 431a orrs r2, r3
Data->DPSM);
8006fb8: 683b ldr r3, [r7, #0]
8006fba: 695b ldr r3, [r3, #20]
Data->TransferMode |\
8006fbc: 4313 orrs r3, r2
tmpreg |= (uint32_t)(Data->DataBlockSize |\
8006fbe: 68fa ldr r2, [r7, #12]
8006fc0: 4313 orrs r3, r2
8006fc2: 60fb str r3, [r7, #12]
/* Write to SDMMC DCTRL */
MODIFY_REG(SDIOx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
8006fc4: 687b ldr r3, [r7, #4]
8006fc6: 6adb ldr r3, [r3, #44] @ 0x2c
8006fc8: f023 02f7 bic.w r2, r3, #247 @ 0xf7
8006fcc: 68fb ldr r3, [r7, #12]
8006fce: 431a orrs r2, r3
8006fd0: 687b ldr r3, [r7, #4]
8006fd2: 62da str r2, [r3, #44] @ 0x2c
return HAL_OK;
8006fd4: 2300 movs r3, #0
}
8006fd6: 4618 mov r0, r3
8006fd8: 3714 adds r7, #20
8006fda: 46bd mov sp, r7
8006fdc: f85d 7b04 ldr.w r7, [sp], #4
8006fe0: 4770 bx lr
08006fe2 <SDMMC_CmdBlockLength>:
* @brief Send the Data Block Length command and check the response
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdBlockLength(SDIO_TypeDef *SDIOx, uint32_t BlockSize)
{
8006fe2: b580 push {r7, lr}
8006fe4: b088 sub sp, #32
8006fe6: af00 add r7, sp, #0
8006fe8: 6078 str r0, [r7, #4]
8006fea: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Set Block Size for Card */
sdmmc_cmdinit.Argument = (uint32_t)BlockSize;
8006fec: 683b ldr r3, [r7, #0]
8006fee: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCKLEN;
8006ff0: 2310 movs r3, #16
8006ff2: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8006ff4: 2340 movs r3, #64 @ 0x40
8006ff6: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8006ff8: 2300 movs r3, #0
8006ffa: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8006ffc: f44f 6380 mov.w r3, #1024 @ 0x400
8007000: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8007002: f107 0308 add.w r3, r7, #8
8007006: 4619 mov r1, r3
8007008: 6878 ldr r0, [r7, #4]
800700a: f7ff ff74 bl 8006ef6 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCKLEN, SDIO_CMDTIMEOUT);
800700e: f241 3288 movw r2, #5000 @ 0x1388
8007012: 2110 movs r1, #16
8007014: 6878 ldr r0, [r7, #4]
8007016: f000 f9d9 bl 80073cc <SDMMC_GetCmdResp1>
800701a: 61f8 str r0, [r7, #28]
return errorstate;
800701c: 69fb ldr r3, [r7, #28]
}
800701e: 4618 mov r0, r3
8007020: 3720 adds r7, #32
8007022: 46bd mov sp, r7
8007024: bd80 pop {r7, pc}
08007026 <SDMMC_CmdReadSingleBlock>:
* @brief Send the Read Single Block command and check the response
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
{
8007026: b580 push {r7, lr}
8007028: b088 sub sp, #32
800702a: af00 add r7, sp, #0
800702c: 6078 str r0, [r7, #4]
800702e: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Set Block Size for Card */
sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
8007030: 683b ldr r3, [r7, #0]
8007032: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_SINGLE_BLOCK;
8007034: 2311 movs r3, #17
8007036: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8007038: 2340 movs r3, #64 @ 0x40
800703a: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
800703c: 2300 movs r3, #0
800703e: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8007040: f44f 6380 mov.w r3, #1024 @ 0x400
8007044: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8007046: f107 0308 add.w r3, r7, #8
800704a: 4619 mov r1, r3
800704c: 6878 ldr r0, [r7, #4]
800704e: f7ff ff52 bl 8006ef6 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
8007052: f241 3288 movw r2, #5000 @ 0x1388
8007056: 2111 movs r1, #17
8007058: 6878 ldr r0, [r7, #4]
800705a: f000 f9b7 bl 80073cc <SDMMC_GetCmdResp1>
800705e: 61f8 str r0, [r7, #28]
return errorstate;
8007060: 69fb ldr r3, [r7, #28]
}
8007062: 4618 mov r0, r3
8007064: 3720 adds r7, #32
8007066: 46bd mov sp, r7
8007068: bd80 pop {r7, pc}
0800706a <SDMMC_CmdReadMultiBlock>:
* @brief Send the Read Multi Block command and check the response
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
{
800706a: b580 push {r7, lr}
800706c: b088 sub sp, #32
800706e: af00 add r7, sp, #0
8007070: 6078 str r0, [r7, #4]
8007072: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Set Block Size for Card */
sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
8007074: 683b ldr r3, [r7, #0]
8007076: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_MULT_BLOCK;
8007078: 2312 movs r3, #18
800707a: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
800707c: 2340 movs r3, #64 @ 0x40
800707e: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8007080: 2300 movs r3, #0
8007082: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8007084: f44f 6380 mov.w r3, #1024 @ 0x400
8007088: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
800708a: f107 0308 add.w r3, r7, #8
800708e: 4619 mov r1, r3
8007090: 6878 ldr r0, [r7, #4]
8007092: f7ff ff30 bl 8006ef6 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_MULT_BLOCK, SDIO_CMDTIMEOUT);
8007096: f241 3288 movw r2, #5000 @ 0x1388
800709a: 2112 movs r1, #18
800709c: 6878 ldr r0, [r7, #4]
800709e: f000 f995 bl 80073cc <SDMMC_GetCmdResp1>
80070a2: 61f8 str r0, [r7, #28]
return errorstate;
80070a4: 69fb ldr r3, [r7, #28]
}
80070a6: 4618 mov r0, r3
80070a8: 3720 adds r7, #32
80070aa: 46bd mov sp, r7
80070ac: bd80 pop {r7, pc}
080070ae <SDMMC_CmdWriteSingleBlock>:
* @brief Send the Write Single Block command and check the response
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
{
80070ae: b580 push {r7, lr}
80070b0: b088 sub sp, #32
80070b2: af00 add r7, sp, #0
80070b4: 6078 str r0, [r7, #4]
80070b6: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Set Block Size for Card */
sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
80070b8: 683b ldr r3, [r7, #0]
80070ba: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_SINGLE_BLOCK;
80070bc: 2318 movs r3, #24
80070be: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
80070c0: 2340 movs r3, #64 @ 0x40
80070c2: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
80070c4: 2300 movs r3, #0
80070c6: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
80070c8: f44f 6380 mov.w r3, #1024 @ 0x400
80070cc: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
80070ce: f107 0308 add.w r3, r7, #8
80070d2: 4619 mov r1, r3
80070d4: 6878 ldr r0, [r7, #4]
80070d6: f7ff ff0e bl 8006ef6 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
80070da: f241 3288 movw r2, #5000 @ 0x1388
80070de: 2118 movs r1, #24
80070e0: 6878 ldr r0, [r7, #4]
80070e2: f000 f973 bl 80073cc <SDMMC_GetCmdResp1>
80070e6: 61f8 str r0, [r7, #28]
return errorstate;
80070e8: 69fb ldr r3, [r7, #28]
}
80070ea: 4618 mov r0, r3
80070ec: 3720 adds r7, #32
80070ee: 46bd mov sp, r7
80070f0: bd80 pop {r7, pc}
080070f2 <SDMMC_CmdWriteMultiBlock>:
* @brief Send the Write Multi Block command and check the response
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
{
80070f2: b580 push {r7, lr}
80070f4: b088 sub sp, #32
80070f6: af00 add r7, sp, #0
80070f8: 6078 str r0, [r7, #4]
80070fa: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Set Block Size for Card */
sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
80070fc: 683b ldr r3, [r7, #0]
80070fe: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK;
8007100: 2319 movs r3, #25
8007102: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8007104: 2340 movs r3, #64 @ 0x40
8007106: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8007108: 2300 movs r3, #0
800710a: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
800710c: f44f 6380 mov.w r3, #1024 @ 0x400
8007110: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8007112: f107 0308 add.w r3, r7, #8
8007116: 4619 mov r1, r3
8007118: 6878 ldr r0, [r7, #4]
800711a: f7ff feec bl 8006ef6 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_MULT_BLOCK, SDIO_CMDTIMEOUT);
800711e: f241 3288 movw r2, #5000 @ 0x1388
8007122: 2119 movs r1, #25
8007124: 6878 ldr r0, [r7, #4]
8007126: f000 f951 bl 80073cc <SDMMC_GetCmdResp1>
800712a: 61f8 str r0, [r7, #28]
return errorstate;
800712c: 69fb ldr r3, [r7, #28]
}
800712e: 4618 mov r0, r3
8007130: 3720 adds r7, #32
8007132: 46bd mov sp, r7
8007134: bd80 pop {r7, pc}
...
08007138 <SDMMC_CmdStopTransfer>:
* @brief Send the Stop Transfer command and check the response.
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdStopTransfer(SDIO_TypeDef *SDIOx)
{
8007138: b580 push {r7, lr}
800713a: b088 sub sp, #32
800713c: af00 add r7, sp, #0
800713e: 6078 str r0, [r7, #4]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Send CMD12 STOP_TRANSMISSION */
sdmmc_cmdinit.Argument = 0U;
8007140: 2300 movs r3, #0
8007142: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_STOP_TRANSMISSION;
8007144: 230c movs r3, #12
8007146: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8007148: 2340 movs r3, #64 @ 0x40
800714a: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
800714c: 2300 movs r3, #0
800714e: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8007150: f44f 6380 mov.w r3, #1024 @ 0x400
8007154: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8007156: f107 0308 add.w r3, r7, #8
800715a: 4619 mov r1, r3
800715c: 6878 ldr r0, [r7, #4]
800715e: f7ff feca bl 8006ef6 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_STOP_TRANSMISSION, SDIO_STOPTRANSFERTIMEOUT);
8007162: 4a05 ldr r2, [pc, #20] @ (8007178 <SDMMC_CmdStopTransfer+0x40>)
8007164: 210c movs r1, #12
8007166: 6878 ldr r0, [r7, #4]
8007168: f000 f930 bl 80073cc <SDMMC_GetCmdResp1>
800716c: 61f8 str r0, [r7, #28]
return errorstate;
800716e: 69fb ldr r3, [r7, #28]
}
8007170: 4618 mov r0, r3
8007172: 3720 adds r7, #32
8007174: 46bd mov sp, r7
8007176: bd80 pop {r7, pc}
8007178: 05f5e100 .word 0x05f5e100
0800717c <SDMMC_CmdSelDesel>:
* @param SDIOx: Pointer to SDIO register base
* @param addr: Address of the card to be selected
* @retval HAL status
*/
uint32_t SDMMC_CmdSelDesel(SDIO_TypeDef *SDIOx, uint64_t Addr)
{
800717c: b580 push {r7, lr}
800717e: b08a sub sp, #40 @ 0x28
8007180: af00 add r7, sp, #0
8007182: 60f8 str r0, [r7, #12]
8007184: e9c7 2300 strd r2, r3, [r7]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Send CMD7 SDMMC_SEL_DESEL_CARD */
sdmmc_cmdinit.Argument = (uint32_t)Addr;
8007188: 683b ldr r3, [r7, #0]
800718a: 613b str r3, [r7, #16]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEL_DESEL_CARD;
800718c: 2307 movs r3, #7
800718e: 617b str r3, [r7, #20]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8007190: 2340 movs r3, #64 @ 0x40
8007192: 61bb str r3, [r7, #24]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8007194: 2300 movs r3, #0
8007196: 61fb str r3, [r7, #28]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8007198: f44f 6380 mov.w r3, #1024 @ 0x400
800719c: 623b str r3, [r7, #32]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
800719e: f107 0310 add.w r3, r7, #16
80071a2: 4619 mov r1, r3
80071a4: 68f8 ldr r0, [r7, #12]
80071a6: f7ff fea6 bl 8006ef6 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEL_DESEL_CARD, SDIO_CMDTIMEOUT);
80071aa: f241 3288 movw r2, #5000 @ 0x1388
80071ae: 2107 movs r1, #7
80071b0: 68f8 ldr r0, [r7, #12]
80071b2: f000 f90b bl 80073cc <SDMMC_GetCmdResp1>
80071b6: 6278 str r0, [r7, #36] @ 0x24
return errorstate;
80071b8: 6a7b ldr r3, [r7, #36] @ 0x24
}
80071ba: 4618 mov r0, r3
80071bc: 3728 adds r7, #40 @ 0x28
80071be: 46bd mov sp, r7
80071c0: bd80 pop {r7, pc}
080071c2 <SDMMC_CmdGoIdleState>:
* @brief Send the Go Idle State command and check the response.
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdGoIdleState(SDIO_TypeDef *SDIOx)
{
80071c2: b580 push {r7, lr}
80071c4: b088 sub sp, #32
80071c6: af00 add r7, sp, #0
80071c8: 6078 str r0, [r7, #4]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
sdmmc_cmdinit.Argument = 0U;
80071ca: 2300 movs r3, #0
80071cc: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_GO_IDLE_STATE;
80071ce: 2300 movs r3, #0
80071d0: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_NO;
80071d2: 2300 movs r3, #0
80071d4: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
80071d6: 2300 movs r3, #0
80071d8: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
80071da: f44f 6380 mov.w r3, #1024 @ 0x400
80071de: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
80071e0: f107 0308 add.w r3, r7, #8
80071e4: 4619 mov r1, r3
80071e6: 6878 ldr r0, [r7, #4]
80071e8: f7ff fe85 bl 8006ef6 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdError(SDIOx);
80071ec: 6878 ldr r0, [r7, #4]
80071ee: f000 fa61 bl 80076b4 <SDMMC_GetCmdError>
80071f2: 61f8 str r0, [r7, #28]
return errorstate;
80071f4: 69fb ldr r3, [r7, #28]
}
80071f6: 4618 mov r0, r3
80071f8: 3720 adds r7, #32
80071fa: 46bd mov sp, r7
80071fc: bd80 pop {r7, pc}
080071fe <SDMMC_CmdSendCID>:
* @brief Send the Send CID command and check the response.
* @param SDIOx: Pointer to SDIO register base
* @retval HAL status
*/
uint32_t SDMMC_CmdSendCID(SDIO_TypeDef *SDIOx)
{
80071fe: b580 push {r7, lr}
8007200: b088 sub sp, #32
8007202: af00 add r7, sp, #0
8007204: 6078 str r0, [r7, #4]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Send CMD2 ALL_SEND_CID */
sdmmc_cmdinit.Argument = 0U;
8007206: 2300 movs r3, #0
8007208: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ALL_SEND_CID;
800720a: 2302 movs r3, #2
800720c: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG;
800720e: 23c0 movs r3, #192 @ 0xc0
8007210: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8007212: 2300 movs r3, #0
8007214: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8007216: f44f 6380 mov.w r3, #1024 @ 0x400
800721a: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
800721c: f107 0308 add.w r3, r7, #8
8007220: 4619 mov r1, r3
8007222: 6878 ldr r0, [r7, #4]
8007224: f7ff fe67 bl 8006ef6 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp2(SDIOx);
8007228: 6878 ldr r0, [r7, #4]
800722a: f000 f9bd bl 80075a8 <SDMMC_GetCmdResp2>
800722e: 61f8 str r0, [r7, #28]
return errorstate;
8007230: 69fb ldr r3, [r7, #28]
}
8007232: 4618 mov r0, r3
8007234: 3720 adds r7, #32
8007236: 46bd mov sp, r7
8007238: bd80 pop {r7, pc}
0800723a <SDMMC_CmdSendCSD>:
* @param SDIOx: Pointer to SDIO register base
* @param Argument: Command Argument
* @retval HAL status
*/
uint32_t SDMMC_CmdSendCSD(SDIO_TypeDef *SDIOx, uint32_t Argument)
{
800723a: b580 push {r7, lr}
800723c: b088 sub sp, #32
800723e: af00 add r7, sp, #0
8007240: 6078 str r0, [r7, #4]
8007242: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Send CMD9 SEND_CSD */
sdmmc_cmdinit.Argument = Argument;
8007244: 683b ldr r3, [r7, #0]
8007246: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_CSD;
8007248: 2309 movs r3, #9
800724a: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG;
800724c: 23c0 movs r3, #192 @ 0xc0
800724e: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8007250: 2300 movs r3, #0
8007252: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8007254: f44f 6380 mov.w r3, #1024 @ 0x400
8007258: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
800725a: f107 0308 add.w r3, r7, #8
800725e: 4619 mov r1, r3
8007260: 6878 ldr r0, [r7, #4]
8007262: f7ff fe48 bl 8006ef6 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp2(SDIOx);
8007266: 6878 ldr r0, [r7, #4]
8007268: f000 f99e bl 80075a8 <SDMMC_GetCmdResp2>
800726c: 61f8 str r0, [r7, #28]
return errorstate;
800726e: 69fb ldr r3, [r7, #28]
}
8007270: 4618 mov r0, r3
8007272: 3720 adds r7, #32
8007274: 46bd mov sp, r7
8007276: bd80 pop {r7, pc}
08007278 <SDMMC_CmdSetRelAddMmc>:
* @param SDIOx Pointer to SDIO register base
* @param RCA Card RCA
* @retval HAL status
*/
uint32_t SDMMC_CmdSetRelAddMmc(SDIO_TypeDef *SDIOx, uint16_t RCA)
{
8007278: b580 push {r7, lr}
800727a: b088 sub sp, #32
800727c: af00 add r7, sp, #0
800727e: 6078 str r0, [r7, #4]
8007280: 460b mov r3, r1
8007282: 807b strh r3, [r7, #2]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Send CMD3 SD_CMD_SET_REL_ADDR */
sdmmc_cmdinit.Argument = ((uint32_t)RCA << 16U);
8007284: 887b ldrh r3, [r7, #2]
8007286: 041b lsls r3, r3, #16
8007288: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_REL_ADDR;
800728a: 2303 movs r3, #3
800728c: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
800728e: 2340 movs r3, #64 @ 0x40
8007290: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8007292: 2300 movs r3, #0
8007294: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
8007296: f44f 6380 mov.w r3, #1024 @ 0x400
800729a: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
800729c: f107 0308 add.w r3, r7, #8
80072a0: 4619 mov r1, r3
80072a2: 6878 ldr r0, [r7, #4]
80072a4: f7ff fe27 bl 8006ef6 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_REL_ADDR, SDIO_CMDTIMEOUT);
80072a8: f241 3288 movw r2, #5000 @ 0x1388
80072ac: 2103 movs r1, #3
80072ae: 6878 ldr r0, [r7, #4]
80072b0: f000 f88c bl 80073cc <SDMMC_GetCmdResp1>
80072b4: 61f8 str r0, [r7, #28]
return errorstate;
80072b6: 69fb ldr r3, [r7, #28]
}
80072b8: 4618 mov r0, r3
80072ba: 3720 adds r7, #32
80072bc: 46bd mov sp, r7
80072be: bd80 pop {r7, pc}
080072c0 <SDMMC_CmdSendStatus>:
* @param SDIOx: Pointer to SDIO register base
* @param Argument: Command Argument
* @retval HAL status
*/
uint32_t SDMMC_CmdSendStatus(SDIO_TypeDef *SDIOx, uint32_t Argument)
{
80072c0: b580 push {r7, lr}
80072c2: b088 sub sp, #32
80072c4: af00 add r7, sp, #0
80072c6: 6078 str r0, [r7, #4]
80072c8: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
sdmmc_cmdinit.Argument = Argument;
80072ca: 683b ldr r3, [r7, #0]
80072cc: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_STATUS;
80072ce: 230d movs r3, #13
80072d0: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
80072d2: 2340 movs r3, #64 @ 0x40
80072d4: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
80072d6: 2300 movs r3, #0
80072d8: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
80072da: f44f 6380 mov.w r3, #1024 @ 0x400
80072de: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
80072e0: f107 0308 add.w r3, r7, #8
80072e4: 4619 mov r1, r3
80072e6: 6878 ldr r0, [r7, #4]
80072e8: f7ff fe05 bl 8006ef6 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEND_STATUS, SDIO_CMDTIMEOUT);
80072ec: f241 3288 movw r2, #5000 @ 0x1388
80072f0: 210d movs r1, #13
80072f2: 6878 ldr r0, [r7, #4]
80072f4: f000 f86a bl 80073cc <SDMMC_GetCmdResp1>
80072f8: 61f8 str r0, [r7, #28]
return errorstate;
80072fa: 69fb ldr r3, [r7, #28]
}
80072fc: 4618 mov r0, r3
80072fe: 3720 adds r7, #32
8007300: 46bd mov sp, r7
8007302: bd80 pop {r7, pc}
08007304 <SDMMC_CmdOpCondition>:
* @param SDIOx: Pointer to SDIO register base
* @parame Argument: Argument used for the command
* @retval HAL status
*/
uint32_t SDMMC_CmdOpCondition(SDIO_TypeDef *SDIOx, uint32_t Argument)
{
8007304: b580 push {r7, lr}
8007306: b088 sub sp, #32
8007308: af00 add r7, sp, #0
800730a: 6078 str r0, [r7, #4]
800730c: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
sdmmc_cmdinit.Argument = Argument;
800730e: 683b ldr r3, [r7, #0]
8007310: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_OP_COND;
8007312: 2301 movs r3, #1
8007314: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8007316: 2340 movs r3, #64 @ 0x40
8007318: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
800731a: 2300 movs r3, #0
800731c: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
800731e: f44f 6380 mov.w r3, #1024 @ 0x400
8007322: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8007324: f107 0308 add.w r3, r7, #8
8007328: 4619 mov r1, r3
800732a: 6878 ldr r0, [r7, #4]
800732c: f7ff fde3 bl 8006ef6 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp3(SDIOx);
8007330: 6878 ldr r0, [r7, #4]
8007332: f000 f981 bl 8007638 <SDMMC_GetCmdResp3>
8007336: 61f8 str r0, [r7, #28]
return errorstate;
8007338: 69fb ldr r3, [r7, #28]
}
800733a: 4618 mov r0, r3
800733c: 3720 adds r7, #32
800733e: 46bd mov sp, r7
8007340: bd80 pop {r7, pc}
08007342 <SDMMC_CmdSwitch>:
* @param SDIOx: Pointer to SDIO register base
* @parame Argument: Argument used for the command
* @retval HAL status
*/
uint32_t SDMMC_CmdSwitch(SDIO_TypeDef *SDIOx, uint32_t Argument)
{
8007342: b580 push {r7, lr}
8007344: b088 sub sp, #32
8007346: af00 add r7, sp, #0
8007348: 6078 str r0, [r7, #4]
800734a: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Send CMD6 to activate SDR50 Mode and Power Limit 1.44W */
/* CMD Response: R1 */
sdmmc_cmdinit.Argument = Argument; /* SDMMC_SDR25_SWITCH_PATTERN */
800734c: 683b ldr r3, [r7, #0]
800734e: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SWITCH;
8007350: 2306 movs r3, #6
8007352: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8007354: 2340 movs r3, #64 @ 0x40
8007356: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
8007358: 2300 movs r3, #0
800735a: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
800735c: f44f 6380 mov.w r3, #1024 @ 0x400
8007360: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
8007362: f107 0308 add.w r3, r7, #8
8007366: 4619 mov r1, r3
8007368: 6878 ldr r0, [r7, #4]
800736a: f7ff fdc4 bl 8006ef6 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_HS_SWITCH, SDIO_CMDTIMEOUT);
800736e: f241 3288 movw r2, #5000 @ 0x1388
8007372: 2106 movs r1, #6
8007374: 6878 ldr r0, [r7, #4]
8007376: f000 f829 bl 80073cc <SDMMC_GetCmdResp1>
800737a: 61f8 str r0, [r7, #28]
return errorstate;
800737c: 69fb ldr r3, [r7, #28]
}
800737e: 4618 mov r0, r3
8007380: 3720 adds r7, #32
8007382: 46bd mov sp, r7
8007384: bd80 pop {r7, pc}
08007386 <SDMMC_CmdSendEXTCSD>:
* @param SDIOx Pointer to SDMMC register base
* @param Argument Command Argument
* @retval HAL status
*/
uint32_t SDMMC_CmdSendEXTCSD(SDIO_TypeDef *SDIOx, uint32_t Argument)
{
8007386: b580 push {r7, lr}
8007388: b088 sub sp, #32
800738a: af00 add r7, sp, #0
800738c: 6078 str r0, [r7, #4]
800738e: 6039 str r1, [r7, #0]
SDIO_CmdInitTypeDef sdmmc_cmdinit;
uint32_t errorstate;
/* Send CMD9 SEND_CSD */
sdmmc_cmdinit.Argument = Argument;
8007390: 683b ldr r3, [r7, #0]
8007392: 60bb str r3, [r7, #8]
sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD;
8007394: 2308 movs r3, #8
8007396: 60fb str r3, [r7, #12]
sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
8007398: 2340 movs r3, #64 @ 0x40
800739a: 613b str r3, [r7, #16]
sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
800739c: 2300 movs r3, #0
800739e: 617b str r3, [r7, #20]
sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
80073a0: f44f 6380 mov.w r3, #1024 @ 0x400
80073a4: 61bb str r3, [r7, #24]
(void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
80073a6: f107 0308 add.w r3, r7, #8
80073aa: 4619 mov r1, r3
80073ac: 6878 ldr r0, [r7, #4]
80073ae: f7ff fda2 bl 8006ef6 <SDIO_SendCommand>
/* Check for error conditions */
errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_HS_SEND_EXT_CSD,SDIO_CMDTIMEOUT);
80073b2: f241 3288 movw r2, #5000 @ 0x1388
80073b6: 2108 movs r1, #8
80073b8: 6878 ldr r0, [r7, #4]
80073ba: f000 f807 bl 80073cc <SDMMC_GetCmdResp1>
80073be: 61f8 str r0, [r7, #28]
return errorstate;
80073c0: 69fb ldr r3, [r7, #28]
}
80073c2: 4618 mov r0, r3
80073c4: 3720 adds r7, #32
80073c6: 46bd mov sp, r7
80073c8: bd80 pop {r7, pc}
...
080073cc <SDMMC_GetCmdResp1>:
* @param SDIOx Pointer to SDMMC register base
* @param SD_CMD: The sent command index
* @retval SD Card error state
*/
uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout)
{
80073cc: b580 push {r7, lr}
80073ce: b088 sub sp, #32
80073d0: af00 add r7, sp, #0
80073d2: 60f8 str r0, [r7, #12]
80073d4: 460b mov r3, r1
80073d6: 607a str r2, [r7, #4]
80073d8: 72fb strb r3, [r7, #11]
uint32_t response_r1;
uint32_t sta_reg;
/* 8 is the number of required instructions cycles for the below loop statement.
The Timeout is expressed in ms */
uint32_t count = Timeout * (SystemCoreClock / 8U /1000U);
80073da: 4b70 ldr r3, [pc, #448] @ (800759c <SDMMC_GetCmdResp1+0x1d0>)
80073dc: 681b ldr r3, [r3, #0]
80073de: 4a70 ldr r2, [pc, #448] @ (80075a0 <SDMMC_GetCmdResp1+0x1d4>)
80073e0: fba2 2303 umull r2, r3, r2, r3
80073e4: 0a5a lsrs r2, r3, #9
80073e6: 687b ldr r3, [r7, #4]
80073e8: fb02 f303 mul.w r3, r2, r3
80073ec: 61fb str r3, [r7, #28]
do
{
if (count-- == 0U)
80073ee: 69fb ldr r3, [r7, #28]
80073f0: 1e5a subs r2, r3, #1
80073f2: 61fa str r2, [r7, #28]
80073f4: 2b00 cmp r3, #0
80073f6: d102 bne.n 80073fe <SDMMC_GetCmdResp1+0x32>
{
return SDMMC_ERROR_TIMEOUT;
80073f8: f04f 4300 mov.w r3, #2147483648 @ 0x80000000
80073fc: e0c9 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
sta_reg = SDIOx->STA;
80073fe: 68fb ldr r3, [r7, #12]
8007400: 6b5b ldr r3, [r3, #52] @ 0x34
8007402: 61bb str r3, [r7, #24]
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
8007404: 69bb ldr r3, [r7, #24]
8007406: f003 0345 and.w r3, r3, #69 @ 0x45
800740a: 2b00 cmp r3, #0
800740c: d0ef beq.n 80073ee <SDMMC_GetCmdResp1+0x22>
((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
800740e: 69bb ldr r3, [r7, #24]
8007410: f403 6300 and.w r3, r3, #2048 @ 0x800
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
8007414: 2b00 cmp r3, #0
8007416: d1ea bne.n 80073ee <SDMMC_GetCmdResp1+0x22>
if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
8007418: 68fb ldr r3, [r7, #12]
800741a: 6b5b ldr r3, [r3, #52] @ 0x34
800741c: f003 0304 and.w r3, r3, #4
8007420: 2b00 cmp r3, #0
8007422: d004 beq.n 800742e <SDMMC_GetCmdResp1+0x62>
{
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
8007424: 68fb ldr r3, [r7, #12]
8007426: 2204 movs r2, #4
8007428: 639a str r2, [r3, #56] @ 0x38
return SDMMC_ERROR_CMD_RSP_TIMEOUT;
800742a: 2304 movs r3, #4
800742c: e0b1 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
800742e: 68fb ldr r3, [r7, #12]
8007430: 6b5b ldr r3, [r3, #52] @ 0x34
8007432: f003 0301 and.w r3, r3, #1
8007436: 2b00 cmp r3, #0
8007438: d004 beq.n 8007444 <SDMMC_GetCmdResp1+0x78>
{
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
800743a: 68fb ldr r3, [r7, #12]
800743c: 2201 movs r2, #1
800743e: 639a str r2, [r3, #56] @ 0x38
return SDMMC_ERROR_CMD_CRC_FAIL;
8007440: 2301 movs r3, #1
8007442: e0a6 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
{
/* Nothing to do */
}
/* Clear all the static flags */
__SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
8007444: 68fb ldr r3, [r7, #12]
8007446: 22c5 movs r2, #197 @ 0xc5
8007448: 639a str r2, [r3, #56] @ 0x38
/* Check response received is of desired command */
if(SDIO_GetCommandResponse(SDIOx) != SD_CMD)
800744a: 68f8 ldr r0, [r7, #12]
800744c: f7ff fd7d bl 8006f4a <SDIO_GetCommandResponse>
8007450: 4603 mov r3, r0
8007452: 461a mov r2, r3
8007454: 7afb ldrb r3, [r7, #11]
8007456: 4293 cmp r3, r2
8007458: d001 beq.n 800745e <SDMMC_GetCmdResp1+0x92>
{
return SDMMC_ERROR_CMD_CRC_FAIL;
800745a: 2301 movs r3, #1
800745c: e099 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
/* We have received response, retrieve it for analysis */
response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1);
800745e: 2100 movs r1, #0
8007460: 68f8 ldr r0, [r7, #12]
8007462: f7ff fd7f bl 8006f64 <SDIO_GetResponse>
8007466: 6178 str r0, [r7, #20]
if((response_r1 & SDMMC_OCR_ERRORBITS) == SDMMC_ALLZERO)
8007468: 697a ldr r2, [r7, #20]
800746a: 4b4e ldr r3, [pc, #312] @ (80075a4 <SDMMC_GetCmdResp1+0x1d8>)
800746c: 4013 ands r3, r2
800746e: 2b00 cmp r3, #0
8007470: d101 bne.n 8007476 <SDMMC_GetCmdResp1+0xaa>
{
return SDMMC_ERROR_NONE;
8007472: 2300 movs r3, #0
8007474: e08d b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_ADDR_OUT_OF_RANGE) == SDMMC_OCR_ADDR_OUT_OF_RANGE)
8007476: 697b ldr r3, [r7, #20]
8007478: 2b00 cmp r3, #0
800747a: da02 bge.n 8007482 <SDMMC_GetCmdResp1+0xb6>
{
return SDMMC_ERROR_ADDR_OUT_OF_RANGE;
800747c: f04f 7300 mov.w r3, #33554432 @ 0x2000000
8007480: e087 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_ADDR_MISALIGNED) == SDMMC_OCR_ADDR_MISALIGNED)
8007482: 697b ldr r3, [r7, #20]
8007484: f003 4380 and.w r3, r3, #1073741824 @ 0x40000000
8007488: 2b00 cmp r3, #0
800748a: d001 beq.n 8007490 <SDMMC_GetCmdResp1+0xc4>
{
return SDMMC_ERROR_ADDR_MISALIGNED;
800748c: 2340 movs r3, #64 @ 0x40
800748e: e080 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_BLOCK_LEN_ERR) == SDMMC_OCR_BLOCK_LEN_ERR)
8007490: 697b ldr r3, [r7, #20]
8007492: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
8007496: 2b00 cmp r3, #0
8007498: d001 beq.n 800749e <SDMMC_GetCmdResp1+0xd2>
{
return SDMMC_ERROR_BLOCK_LEN_ERR;
800749a: 2380 movs r3, #128 @ 0x80
800749c: e079 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_ERASE_SEQ_ERR) == SDMMC_OCR_ERASE_SEQ_ERR)
800749e: 697b ldr r3, [r7, #20]
80074a0: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80074a4: 2b00 cmp r3, #0
80074a6: d002 beq.n 80074ae <SDMMC_GetCmdResp1+0xe2>
{
return SDMMC_ERROR_ERASE_SEQ_ERR;
80074a8: f44f 7380 mov.w r3, #256 @ 0x100
80074ac: e071 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_BAD_ERASE_PARAM) == SDMMC_OCR_BAD_ERASE_PARAM)
80074ae: 697b ldr r3, [r7, #20]
80074b0: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
80074b4: 2b00 cmp r3, #0
80074b6: d002 beq.n 80074be <SDMMC_GetCmdResp1+0xf2>
{
return SDMMC_ERROR_BAD_ERASE_PARAM;
80074b8: f44f 7300 mov.w r3, #512 @ 0x200
80074bc: e069 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_WRITE_PROT_VIOLATION) == SDMMC_OCR_WRITE_PROT_VIOLATION)
80074be: 697b ldr r3, [r7, #20]
80074c0: f003 6380 and.w r3, r3, #67108864 @ 0x4000000
80074c4: 2b00 cmp r3, #0
80074c6: d002 beq.n 80074ce <SDMMC_GetCmdResp1+0x102>
{
return SDMMC_ERROR_WRITE_PROT_VIOLATION;
80074c8: f44f 6380 mov.w r3, #1024 @ 0x400
80074cc: e061 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_LOCK_UNLOCK_FAILED) == SDMMC_OCR_LOCK_UNLOCK_FAILED)
80074ce: 697b ldr r3, [r7, #20]
80074d0: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
80074d4: 2b00 cmp r3, #0
80074d6: d002 beq.n 80074de <SDMMC_GetCmdResp1+0x112>
{
return SDMMC_ERROR_LOCK_UNLOCK_FAILED;
80074d8: f44f 6300 mov.w r3, #2048 @ 0x800
80074dc: e059 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_COM_CRC_FAILED) == SDMMC_OCR_COM_CRC_FAILED)
80074de: 697b ldr r3, [r7, #20]
80074e0: f403 0300 and.w r3, r3, #8388608 @ 0x800000
80074e4: 2b00 cmp r3, #0
80074e6: d002 beq.n 80074ee <SDMMC_GetCmdResp1+0x122>
{
return SDMMC_ERROR_COM_CRC_FAILED;
80074e8: f44f 5380 mov.w r3, #4096 @ 0x1000
80074ec: e051 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_ILLEGAL_CMD) == SDMMC_OCR_ILLEGAL_CMD)
80074ee: 697b ldr r3, [r7, #20]
80074f0: f403 0380 and.w r3, r3, #4194304 @ 0x400000
80074f4: 2b00 cmp r3, #0
80074f6: d002 beq.n 80074fe <SDMMC_GetCmdResp1+0x132>
{
return SDMMC_ERROR_ILLEGAL_CMD;
80074f8: f44f 5300 mov.w r3, #8192 @ 0x2000
80074fc: e049 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_CARD_ECC_FAILED) == SDMMC_OCR_CARD_ECC_FAILED)
80074fe: 697b ldr r3, [r7, #20]
8007500: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8007504: 2b00 cmp r3, #0
8007506: d002 beq.n 800750e <SDMMC_GetCmdResp1+0x142>
{
return SDMMC_ERROR_CARD_ECC_FAILED;
8007508: f44f 4380 mov.w r3, #16384 @ 0x4000
800750c: e041 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_CC_ERROR) == SDMMC_OCR_CC_ERROR)
800750e: 697b ldr r3, [r7, #20]
8007510: f403 1380 and.w r3, r3, #1048576 @ 0x100000
8007514: 2b00 cmp r3, #0
8007516: d002 beq.n 800751e <SDMMC_GetCmdResp1+0x152>
{
return SDMMC_ERROR_CC_ERR;
8007518: f44f 4300 mov.w r3, #32768 @ 0x8000
800751c: e039 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_STREAM_READ_UNDERRUN) == SDMMC_OCR_STREAM_READ_UNDERRUN)
800751e: 697b ldr r3, [r7, #20]
8007520: f403 2380 and.w r3, r3, #262144 @ 0x40000
8007524: 2b00 cmp r3, #0
8007526: d002 beq.n 800752e <SDMMC_GetCmdResp1+0x162>
{
return SDMMC_ERROR_STREAM_READ_UNDERRUN;
8007528: f44f 3300 mov.w r3, #131072 @ 0x20000
800752c: e031 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_STREAM_WRITE_OVERRUN) == SDMMC_OCR_STREAM_WRITE_OVERRUN)
800752e: 697b ldr r3, [r7, #20]
8007530: f403 3300 and.w r3, r3, #131072 @ 0x20000
8007534: 2b00 cmp r3, #0
8007536: d002 beq.n 800753e <SDMMC_GetCmdResp1+0x172>
{
return SDMMC_ERROR_STREAM_WRITE_OVERRUN;
8007538: f44f 2380 mov.w r3, #262144 @ 0x40000
800753c: e029 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_CID_CSD_OVERWRITE) == SDMMC_OCR_CID_CSD_OVERWRITE)
800753e: 697b ldr r3, [r7, #20]
8007540: f403 3380 and.w r3, r3, #65536 @ 0x10000
8007544: 2b00 cmp r3, #0
8007546: d002 beq.n 800754e <SDMMC_GetCmdResp1+0x182>
{
return SDMMC_ERROR_CID_CSD_OVERWRITE;
8007548: f44f 2300 mov.w r3, #524288 @ 0x80000
800754c: e021 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_WP_ERASE_SKIP) == SDMMC_OCR_WP_ERASE_SKIP)
800754e: 697b ldr r3, [r7, #20]
8007550: f403 4300 and.w r3, r3, #32768 @ 0x8000
8007554: 2b00 cmp r3, #0
8007556: d002 beq.n 800755e <SDMMC_GetCmdResp1+0x192>
{
return SDMMC_ERROR_WP_ERASE_SKIP;
8007558: f44f 1380 mov.w r3, #1048576 @ 0x100000
800755c: e019 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_CARD_ECC_DISABLED) == SDMMC_OCR_CARD_ECC_DISABLED)
800755e: 697b ldr r3, [r7, #20]
8007560: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007564: 2b00 cmp r3, #0
8007566: d002 beq.n 800756e <SDMMC_GetCmdResp1+0x1a2>
{
return SDMMC_ERROR_CARD_ECC_DISABLED;
8007568: f44f 1300 mov.w r3, #2097152 @ 0x200000
800756c: e011 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_ERASE_RESET) == SDMMC_OCR_ERASE_RESET)
800756e: 697b ldr r3, [r7, #20]
8007570: f403 5300 and.w r3, r3, #8192 @ 0x2000
8007574: 2b00 cmp r3, #0
8007576: d002 beq.n 800757e <SDMMC_GetCmdResp1+0x1b2>
{
return SDMMC_ERROR_ERASE_RESET;
8007578: f44f 0380 mov.w r3, #4194304 @ 0x400000
800757c: e009 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else if((response_r1 & SDMMC_OCR_AKE_SEQ_ERROR) == SDMMC_OCR_AKE_SEQ_ERROR)
800757e: 697b ldr r3, [r7, #20]
8007580: f003 0308 and.w r3, r3, #8
8007584: 2b00 cmp r3, #0
8007586: d002 beq.n 800758e <SDMMC_GetCmdResp1+0x1c2>
{
return SDMMC_ERROR_AKE_SEQ_ERR;
8007588: f44f 0300 mov.w r3, #8388608 @ 0x800000
800758c: e001 b.n 8007592 <SDMMC_GetCmdResp1+0x1c6>
}
else
{
return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
800758e: f44f 3380 mov.w r3, #65536 @ 0x10000
}
}
8007592: 4618 mov r0, r3
8007594: 3720 adds r7, #32
8007596: 46bd mov sp, r7
8007598: bd80 pop {r7, pc}
800759a: bf00 nop
800759c: 20000000 .word 0x20000000
80075a0: 10624dd3 .word 0x10624dd3
80075a4: fdffe008 .word 0xfdffe008
080075a8 <SDMMC_GetCmdResp2>:
* @brief Checks for error conditions for R2 (CID or CSD) response.
* @param SDIOx Pointer to SDMMC register base
* @retval SD Card error state
*/
uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx)
{
80075a8: b480 push {r7}
80075aa: b085 sub sp, #20
80075ac: af00 add r7, sp, #0
80075ae: 6078 str r0, [r7, #4]
uint32_t sta_reg;
/* 8 is the number of required instructions cycles for the below loop statement.
The SDIO_CMDTIMEOUT is expressed in ms */
uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
80075b0: 4b1f ldr r3, [pc, #124] @ (8007630 <SDMMC_GetCmdResp2+0x88>)
80075b2: 681b ldr r3, [r3, #0]
80075b4: 4a1f ldr r2, [pc, #124] @ (8007634 <SDMMC_GetCmdResp2+0x8c>)
80075b6: fba2 2303 umull r2, r3, r2, r3
80075ba: 0a5b lsrs r3, r3, #9
80075bc: f241 3288 movw r2, #5000 @ 0x1388
80075c0: fb02 f303 mul.w r3, r2, r3
80075c4: 60fb str r3, [r7, #12]
do
{
if (count-- == 0U)
80075c6: 68fb ldr r3, [r7, #12]
80075c8: 1e5a subs r2, r3, #1
80075ca: 60fa str r2, [r7, #12]
80075cc: 2b00 cmp r3, #0
80075ce: d102 bne.n 80075d6 <SDMMC_GetCmdResp2+0x2e>
{
return SDMMC_ERROR_TIMEOUT;
80075d0: f04f 4300 mov.w r3, #2147483648 @ 0x80000000
80075d4: e026 b.n 8007624 <SDMMC_GetCmdResp2+0x7c>
}
sta_reg = SDIOx->STA;
80075d6: 687b ldr r3, [r7, #4]
80075d8: 6b5b ldr r3, [r3, #52] @ 0x34
80075da: 60bb str r3, [r7, #8]
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
80075dc: 68bb ldr r3, [r7, #8]
80075de: f003 0345 and.w r3, r3, #69 @ 0x45
80075e2: 2b00 cmp r3, #0
80075e4: d0ef beq.n 80075c6 <SDMMC_GetCmdResp2+0x1e>
((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
80075e6: 68bb ldr r3, [r7, #8]
80075e8: f403 6300 and.w r3, r3, #2048 @ 0x800
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
80075ec: 2b00 cmp r3, #0
80075ee: d1ea bne.n 80075c6 <SDMMC_GetCmdResp2+0x1e>
if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
80075f0: 687b ldr r3, [r7, #4]
80075f2: 6b5b ldr r3, [r3, #52] @ 0x34
80075f4: f003 0304 and.w r3, r3, #4
80075f8: 2b00 cmp r3, #0
80075fa: d004 beq.n 8007606 <SDMMC_GetCmdResp2+0x5e>
{
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
80075fc: 687b ldr r3, [r7, #4]
80075fe: 2204 movs r2, #4
8007600: 639a str r2, [r3, #56] @ 0x38
return SDMMC_ERROR_CMD_RSP_TIMEOUT;
8007602: 2304 movs r3, #4
8007604: e00e b.n 8007624 <SDMMC_GetCmdResp2+0x7c>
}
else if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
8007606: 687b ldr r3, [r7, #4]
8007608: 6b5b ldr r3, [r3, #52] @ 0x34
800760a: f003 0301 and.w r3, r3, #1
800760e: 2b00 cmp r3, #0
8007610: d004 beq.n 800761c <SDMMC_GetCmdResp2+0x74>
{
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
8007612: 687b ldr r3, [r7, #4]
8007614: 2201 movs r2, #1
8007616: 639a str r2, [r3, #56] @ 0x38
return SDMMC_ERROR_CMD_CRC_FAIL;
8007618: 2301 movs r3, #1
800761a: e003 b.n 8007624 <SDMMC_GetCmdResp2+0x7c>
}
else
{
/* No error flag set */
/* Clear all the static flags */
__SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
800761c: 687b ldr r3, [r7, #4]
800761e: 22c5 movs r2, #197 @ 0xc5
8007620: 639a str r2, [r3, #56] @ 0x38
}
return SDMMC_ERROR_NONE;
8007622: 2300 movs r3, #0
}
8007624: 4618 mov r0, r3
8007626: 3714 adds r7, #20
8007628: 46bd mov sp, r7
800762a: f85d 7b04 ldr.w r7, [sp], #4
800762e: 4770 bx lr
8007630: 20000000 .word 0x20000000
8007634: 10624dd3 .word 0x10624dd3
08007638 <SDMMC_GetCmdResp3>:
* @brief Checks for error conditions for R3 (OCR) response.
* @param SDIOx Pointer to SDMMC register base
* @retval SD Card error state
*/
uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx)
{
8007638: b480 push {r7}
800763a: b085 sub sp, #20
800763c: af00 add r7, sp, #0
800763e: 6078 str r0, [r7, #4]
uint32_t sta_reg;
/* 8 is the number of required instructions cycles for the below loop statement.
The SDIO_CMDTIMEOUT is expressed in ms */
uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
8007640: 4b1a ldr r3, [pc, #104] @ (80076ac <SDMMC_GetCmdResp3+0x74>)
8007642: 681b ldr r3, [r3, #0]
8007644: 4a1a ldr r2, [pc, #104] @ (80076b0 <SDMMC_GetCmdResp3+0x78>)
8007646: fba2 2303 umull r2, r3, r2, r3
800764a: 0a5b lsrs r3, r3, #9
800764c: f241 3288 movw r2, #5000 @ 0x1388
8007650: fb02 f303 mul.w r3, r2, r3
8007654: 60fb str r3, [r7, #12]
do
{
if (count-- == 0U)
8007656: 68fb ldr r3, [r7, #12]
8007658: 1e5a subs r2, r3, #1
800765a: 60fa str r2, [r7, #12]
800765c: 2b00 cmp r3, #0
800765e: d102 bne.n 8007666 <SDMMC_GetCmdResp3+0x2e>
{
return SDMMC_ERROR_TIMEOUT;
8007660: f04f 4300 mov.w r3, #2147483648 @ 0x80000000
8007664: e01b b.n 800769e <SDMMC_GetCmdResp3+0x66>
}
sta_reg = SDIOx->STA;
8007666: 687b ldr r3, [r7, #4]
8007668: 6b5b ldr r3, [r3, #52] @ 0x34
800766a: 60bb str r3, [r7, #8]
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
800766c: 68bb ldr r3, [r7, #8]
800766e: f003 0345 and.w r3, r3, #69 @ 0x45
8007672: 2b00 cmp r3, #0
8007674: d0ef beq.n 8007656 <SDMMC_GetCmdResp3+0x1e>
((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
8007676: 68bb ldr r3, [r7, #8]
8007678: f403 6300 and.w r3, r3, #2048 @ 0x800
}while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
800767c: 2b00 cmp r3, #0
800767e: d1ea bne.n 8007656 <SDMMC_GetCmdResp3+0x1e>
if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
8007680: 687b ldr r3, [r7, #4]
8007682: 6b5b ldr r3, [r3, #52] @ 0x34
8007684: f003 0304 and.w r3, r3, #4
8007688: 2b00 cmp r3, #0
800768a: d004 beq.n 8007696 <SDMMC_GetCmdResp3+0x5e>
{
__SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
800768c: 687b ldr r3, [r7, #4]
800768e: 2204 movs r2, #4
8007690: 639a str r2, [r3, #56] @ 0x38
return SDMMC_ERROR_CMD_RSP_TIMEOUT;
8007692: 2304 movs r3, #4
8007694: e003 b.n 800769e <SDMMC_GetCmdResp3+0x66>
}
else
{
/* Clear all the static flags */
__SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
8007696: 687b ldr r3, [r7, #4]
8007698: 22c5 movs r2, #197 @ 0xc5
800769a: 639a str r2, [r3, #56] @ 0x38
}
return SDMMC_ERROR_NONE;
800769c: 2300 movs r3, #0
}
800769e: 4618 mov r0, r3
80076a0: 3714 adds r7, #20
80076a2: 46bd mov sp, r7
80076a4: f85d 7b04 ldr.w r7, [sp], #4
80076a8: 4770 bx lr
80076aa: bf00 nop
80076ac: 20000000 .word 0x20000000
80076b0: 10624dd3 .word 0x10624dd3
080076b4 <SDMMC_GetCmdError>:
* @brief Checks for error conditions for CMD0.
* @param SDIOx Pointer to SDMMC register base
* @retval SD Card error state
*/
static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx)
{
80076b4: b480 push {r7}
80076b6: b085 sub sp, #20
80076b8: af00 add r7, sp, #0
80076ba: 6078 str r0, [r7, #4]
/* 8 is the number of required instructions cycles for the below loop statement.
The SDIO_CMDTIMEOUT is expressed in ms */
uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
80076bc: 4b11 ldr r3, [pc, #68] @ (8007704 <SDMMC_GetCmdError+0x50>)
80076be: 681b ldr r3, [r3, #0]
80076c0: 4a11 ldr r2, [pc, #68] @ (8007708 <SDMMC_GetCmdError+0x54>)
80076c2: fba2 2303 umull r2, r3, r2, r3
80076c6: 0a5b lsrs r3, r3, #9
80076c8: f241 3288 movw r2, #5000 @ 0x1388
80076cc: fb02 f303 mul.w r3, r2, r3
80076d0: 60fb str r3, [r7, #12]
do
{
if (count-- == 0U)
80076d2: 68fb ldr r3, [r7, #12]
80076d4: 1e5a subs r2, r3, #1
80076d6: 60fa str r2, [r7, #12]
80076d8: 2b00 cmp r3, #0
80076da: d102 bne.n 80076e2 <SDMMC_GetCmdError+0x2e>
{
return SDMMC_ERROR_TIMEOUT;
80076dc: f04f 4300 mov.w r3, #2147483648 @ 0x80000000
80076e0: e009 b.n 80076f6 <SDMMC_GetCmdError+0x42>
}
}while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDSENT));
80076e2: 687b ldr r3, [r7, #4]
80076e4: 6b5b ldr r3, [r3, #52] @ 0x34
80076e6: f003 0380 and.w r3, r3, #128 @ 0x80
80076ea: 2b00 cmp r3, #0
80076ec: d0f1 beq.n 80076d2 <SDMMC_GetCmdError+0x1e>
/* Clear all the static flags */
__SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
80076ee: 687b ldr r3, [r7, #4]
80076f0: 22c5 movs r2, #197 @ 0xc5
80076f2: 639a str r2, [r3, #56] @ 0x38
return SDMMC_ERROR_NONE;
80076f4: 2300 movs r3, #0
}
80076f6: 4618 mov r0, r3
80076f8: 3714 adds r7, #20
80076fa: 46bd mov sp, r7
80076fc: f85d 7b04 ldr.w r7, [sp], #4
8007700: 4770 bx lr
8007702: bf00 nop
8007704: 20000000 .word 0x20000000
8007708: 10624dd3 .word 0x10624dd3
0800770c <USB_CoreInit>:
* @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
{
800770c: b084 sub sp, #16
800770e: b580 push {r7, lr}
8007710: b084 sub sp, #16
8007712: af00 add r7, sp, #0
8007714: 6078 str r0, [r7, #4]
8007716: f107 001c add.w r0, r7, #28
800771a: e880 000e stmia.w r0, {r1, r2, r3}
HAL_StatusTypeDef ret;
if (cfg.phy_itface == USB_OTG_ULPI_PHY)
800771e: f897 3021 ldrb.w r3, [r7, #33] @ 0x21
8007722: 2b01 cmp r3, #1
8007724: d123 bne.n 800776e <USB_CoreInit+0x62>
{
USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
8007726: 687b ldr r3, [r7, #4]
8007728: 6b9b ldr r3, [r3, #56] @ 0x38
800772a: f423 3280 bic.w r2, r3, #65536 @ 0x10000
800772e: 687b ldr r3, [r7, #4]
8007730: 639a str r2, [r3, #56] @ 0x38
/* Init The ULPI Interface */
USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_TSDPS | USB_OTG_GUSBCFG_ULPIFSLS | USB_OTG_GUSBCFG_PHYSEL);
8007732: 687b ldr r3, [r7, #4]
8007734: 68db ldr r3, [r3, #12]
8007736: f423 0384 bic.w r3, r3, #4325376 @ 0x420000
800773a: f023 0340 bic.w r3, r3, #64 @ 0x40
800773e: 687a ldr r2, [r7, #4]
8007740: 60d3 str r3, [r2, #12]
/* Select vbus source */
USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_ULPIEVBUSD | USB_OTG_GUSBCFG_ULPIEVBUSI);
8007742: 687b ldr r3, [r7, #4]
8007744: 68db ldr r3, [r3, #12]
8007746: f423 1240 bic.w r2, r3, #3145728 @ 0x300000
800774a: 687b ldr r3, [r7, #4]
800774c: 60da str r2, [r3, #12]
if (cfg.use_external_vbus == 1U)
800774e: f897 3028 ldrb.w r3, [r7, #40] @ 0x28
8007752: 2b01 cmp r3, #1
8007754: d105 bne.n 8007762 <USB_CoreInit+0x56>
{
USBx->GUSBCFG |= USB_OTG_GUSBCFG_ULPIEVBUSD;
8007756: 687b ldr r3, [r7, #4]
8007758: 68db ldr r3, [r3, #12]
800775a: f443 1280 orr.w r2, r3, #1048576 @ 0x100000
800775e: 687b ldr r3, [r7, #4]
8007760: 60da str r2, [r3, #12]
}
/* Reset after a PHY select */
ret = USB_CoreReset(USBx);
8007762: 6878 ldr r0, [r7, #4]
8007764: f001 fb32 bl 8008dcc <USB_CoreReset>
8007768: 4603 mov r3, r0
800776a: 73fb strb r3, [r7, #15]
800776c: e01b b.n 80077a6 <USB_CoreInit+0x9a>
}
else /* FS interface (embedded Phy) */
{
/* Select FS Embedded PHY */
USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL;
800776e: 687b ldr r3, [r7, #4]
8007770: 68db ldr r3, [r3, #12]
8007772: f043 0240 orr.w r2, r3, #64 @ 0x40
8007776: 687b ldr r3, [r7, #4]
8007778: 60da str r2, [r3, #12]
/* Reset after a PHY select */
ret = USB_CoreReset(USBx);
800777a: 6878 ldr r0, [r7, #4]
800777c: f001 fb26 bl 8008dcc <USB_CoreReset>
8007780: 4603 mov r3, r0
8007782: 73fb strb r3, [r7, #15]
if (cfg.battery_charging_enable == 0U)
8007784: f897 3025 ldrb.w r3, [r7, #37] @ 0x25
8007788: 2b00 cmp r3, #0
800778a: d106 bne.n 800779a <USB_CoreInit+0x8e>
{
/* Activate the USB Transceiver */
USBx->GCCFG |= USB_OTG_GCCFG_PWRDWN;
800778c: 687b ldr r3, [r7, #4]
800778e: 6b9b ldr r3, [r3, #56] @ 0x38
8007790: f443 3280 orr.w r2, r3, #65536 @ 0x10000
8007794: 687b ldr r3, [r7, #4]
8007796: 639a str r2, [r3, #56] @ 0x38
8007798: e005 b.n 80077a6 <USB_CoreInit+0x9a>
}
else
{
/* Deactivate the USB Transceiver */
USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
800779a: 687b ldr r3, [r7, #4]
800779c: 6b9b ldr r3, [r3, #56] @ 0x38
800779e: f423 3280 bic.w r2, r3, #65536 @ 0x10000
80077a2: 687b ldr r3, [r7, #4]
80077a4: 639a str r2, [r3, #56] @ 0x38
}
}
if (cfg.dma_enable == 1U)
80077a6: 7fbb ldrb r3, [r7, #30]
80077a8: 2b01 cmp r3, #1
80077aa: d10b bne.n 80077c4 <USB_CoreInit+0xb8>
{
USBx->GAHBCFG |= USB_OTG_GAHBCFG_HBSTLEN_2;
80077ac: 687b ldr r3, [r7, #4]
80077ae: 689b ldr r3, [r3, #8]
80077b0: f043 0206 orr.w r2, r3, #6
80077b4: 687b ldr r3, [r7, #4]
80077b6: 609a str r2, [r3, #8]
USBx->GAHBCFG |= USB_OTG_GAHBCFG_DMAEN;
80077b8: 687b ldr r3, [r7, #4]
80077ba: 689b ldr r3, [r3, #8]
80077bc: f043 0220 orr.w r2, r3, #32
80077c0: 687b ldr r3, [r7, #4]
80077c2: 609a str r2, [r3, #8]
}
return ret;
80077c4: 7bfb ldrb r3, [r7, #15]
}
80077c6: 4618 mov r0, r3
80077c8: 3710 adds r7, #16
80077ca: 46bd mov sp, r7
80077cc: e8bd 4080 ldmia.w sp!, {r7, lr}
80077d0: b004 add sp, #16
80077d2: 4770 bx lr
080077d4 <USB_SetTurnaroundTime>:
* @param hclk: AHB clock frequency
* @retval USB turnaround time In PHY Clocks number
*/
HAL_StatusTypeDef USB_SetTurnaroundTime(USB_OTG_GlobalTypeDef *USBx,
uint32_t hclk, uint8_t speed)
{
80077d4: b480 push {r7}
80077d6: b087 sub sp, #28
80077d8: af00 add r7, sp, #0
80077da: 60f8 str r0, [r7, #12]
80077dc: 60b9 str r1, [r7, #8]
80077de: 4613 mov r3, r2
80077e0: 71fb strb r3, [r7, #7]
/* The USBTRD is configured according to the tables below, depending on AHB frequency
used by application. In the low AHB frequency range it is used to stretch enough the USB response
time to IN tokens, the USB turnaround time, so to compensate for the longer AHB read access
latency to the Data FIFO */
if (speed == USBD_FS_SPEED)
80077e2: 79fb ldrb r3, [r7, #7]
80077e4: 2b02 cmp r3, #2
80077e6: d165 bne.n 80078b4 <USB_SetTurnaroundTime+0xe0>
{
if ((hclk >= 14200000U) && (hclk < 15000000U))
80077e8: 68bb ldr r3, [r7, #8]
80077ea: 4a41 ldr r2, [pc, #260] @ (80078f0 <USB_SetTurnaroundTime+0x11c>)
80077ec: 4293 cmp r3, r2
80077ee: d906 bls.n 80077fe <USB_SetTurnaroundTime+0x2a>
80077f0: 68bb ldr r3, [r7, #8]
80077f2: 4a40 ldr r2, [pc, #256] @ (80078f4 <USB_SetTurnaroundTime+0x120>)
80077f4: 4293 cmp r3, r2
80077f6: d202 bcs.n 80077fe <USB_SetTurnaroundTime+0x2a>
{
/* hclk Clock Range between 14.2-15 MHz */
UsbTrd = 0xFU;
80077f8: 230f movs r3, #15
80077fa: 617b str r3, [r7, #20]
80077fc: e062 b.n 80078c4 <USB_SetTurnaroundTime+0xf0>
}
else if ((hclk >= 15000000U) && (hclk < 16000000U))
80077fe: 68bb ldr r3, [r7, #8]
8007800: 4a3c ldr r2, [pc, #240] @ (80078f4 <USB_SetTurnaroundTime+0x120>)
8007802: 4293 cmp r3, r2
8007804: d306 bcc.n 8007814 <USB_SetTurnaroundTime+0x40>
8007806: 68bb ldr r3, [r7, #8]
8007808: 4a3b ldr r2, [pc, #236] @ (80078f8 <USB_SetTurnaroundTime+0x124>)
800780a: 4293 cmp r3, r2
800780c: d202 bcs.n 8007814 <USB_SetTurnaroundTime+0x40>
{
/* hclk Clock Range between 15-16 MHz */
UsbTrd = 0xEU;
800780e: 230e movs r3, #14
8007810: 617b str r3, [r7, #20]
8007812: e057 b.n 80078c4 <USB_SetTurnaroundTime+0xf0>
}
else if ((hclk >= 16000000U) && (hclk < 17200000U))
8007814: 68bb ldr r3, [r7, #8]
8007816: 4a38 ldr r2, [pc, #224] @ (80078f8 <USB_SetTurnaroundTime+0x124>)
8007818: 4293 cmp r3, r2
800781a: d306 bcc.n 800782a <USB_SetTurnaroundTime+0x56>
800781c: 68bb ldr r3, [r7, #8]
800781e: 4a37 ldr r2, [pc, #220] @ (80078fc <USB_SetTurnaroundTime+0x128>)
8007820: 4293 cmp r3, r2
8007822: d202 bcs.n 800782a <USB_SetTurnaroundTime+0x56>
{
/* hclk Clock Range between 16-17.2 MHz */
UsbTrd = 0xDU;
8007824: 230d movs r3, #13
8007826: 617b str r3, [r7, #20]
8007828: e04c b.n 80078c4 <USB_SetTurnaroundTime+0xf0>
}
else if ((hclk >= 17200000U) && (hclk < 18500000U))
800782a: 68bb ldr r3, [r7, #8]
800782c: 4a33 ldr r2, [pc, #204] @ (80078fc <USB_SetTurnaroundTime+0x128>)
800782e: 4293 cmp r3, r2
8007830: d306 bcc.n 8007840 <USB_SetTurnaroundTime+0x6c>
8007832: 68bb ldr r3, [r7, #8]
8007834: 4a32 ldr r2, [pc, #200] @ (8007900 <USB_SetTurnaroundTime+0x12c>)
8007836: 4293 cmp r3, r2
8007838: d802 bhi.n 8007840 <USB_SetTurnaroundTime+0x6c>
{
/* hclk Clock Range between 17.2-18.5 MHz */
UsbTrd = 0xCU;
800783a: 230c movs r3, #12
800783c: 617b str r3, [r7, #20]
800783e: e041 b.n 80078c4 <USB_SetTurnaroundTime+0xf0>
}
else if ((hclk >= 18500000U) && (hclk < 20000000U))
8007840: 68bb ldr r3, [r7, #8]
8007842: 4a2f ldr r2, [pc, #188] @ (8007900 <USB_SetTurnaroundTime+0x12c>)
8007844: 4293 cmp r3, r2
8007846: d906 bls.n 8007856 <USB_SetTurnaroundTime+0x82>
8007848: 68bb ldr r3, [r7, #8]
800784a: 4a2e ldr r2, [pc, #184] @ (8007904 <USB_SetTurnaroundTime+0x130>)
800784c: 4293 cmp r3, r2
800784e: d802 bhi.n 8007856 <USB_SetTurnaroundTime+0x82>
{
/* hclk Clock Range between 18.5-20 MHz */
UsbTrd = 0xBU;
8007850: 230b movs r3, #11
8007852: 617b str r3, [r7, #20]
8007854: e036 b.n 80078c4 <USB_SetTurnaroundTime+0xf0>
}
else if ((hclk >= 20000000U) && (hclk < 21800000U))
8007856: 68bb ldr r3, [r7, #8]
8007858: 4a2a ldr r2, [pc, #168] @ (8007904 <USB_SetTurnaroundTime+0x130>)
800785a: 4293 cmp r3, r2
800785c: d906 bls.n 800786c <USB_SetTurnaroundTime+0x98>
800785e: 68bb ldr r3, [r7, #8]
8007860: 4a29 ldr r2, [pc, #164] @ (8007908 <USB_SetTurnaroundTime+0x134>)
8007862: 4293 cmp r3, r2
8007864: d802 bhi.n 800786c <USB_SetTurnaroundTime+0x98>
{
/* hclk Clock Range between 20-21.8 MHz */
UsbTrd = 0xAU;
8007866: 230a movs r3, #10
8007868: 617b str r3, [r7, #20]
800786a: e02b b.n 80078c4 <USB_SetTurnaroundTime+0xf0>
}
else if ((hclk >= 21800000U) && (hclk < 24000000U))
800786c: 68bb ldr r3, [r7, #8]
800786e: 4a26 ldr r2, [pc, #152] @ (8007908 <USB_SetTurnaroundTime+0x134>)
8007870: 4293 cmp r3, r2
8007872: d906 bls.n 8007882 <USB_SetTurnaroundTime+0xae>
8007874: 68bb ldr r3, [r7, #8]
8007876: 4a25 ldr r2, [pc, #148] @ (800790c <USB_SetTurnaroundTime+0x138>)
8007878: 4293 cmp r3, r2
800787a: d202 bcs.n 8007882 <USB_SetTurnaroundTime+0xae>
{
/* hclk Clock Range between 21.8-24 MHz */
UsbTrd = 0x9U;
800787c: 2309 movs r3, #9
800787e: 617b str r3, [r7, #20]
8007880: e020 b.n 80078c4 <USB_SetTurnaroundTime+0xf0>
}
else if ((hclk >= 24000000U) && (hclk < 27700000U))
8007882: 68bb ldr r3, [r7, #8]
8007884: 4a21 ldr r2, [pc, #132] @ (800790c <USB_SetTurnaroundTime+0x138>)
8007886: 4293 cmp r3, r2
8007888: d306 bcc.n 8007898 <USB_SetTurnaroundTime+0xc4>
800788a: 68bb ldr r3, [r7, #8]
800788c: 4a20 ldr r2, [pc, #128] @ (8007910 <USB_SetTurnaroundTime+0x13c>)
800788e: 4293 cmp r3, r2
8007890: d802 bhi.n 8007898 <USB_SetTurnaroundTime+0xc4>
{
/* hclk Clock Range between 24-27.7 MHz */
UsbTrd = 0x8U;
8007892: 2308 movs r3, #8
8007894: 617b str r3, [r7, #20]
8007896: e015 b.n 80078c4 <USB_SetTurnaroundTime+0xf0>
}
else if ((hclk >= 27700000U) && (hclk < 32000000U))
8007898: 68bb ldr r3, [r7, #8]
800789a: 4a1d ldr r2, [pc, #116] @ (8007910 <USB_SetTurnaroundTime+0x13c>)
800789c: 4293 cmp r3, r2
800789e: d906 bls.n 80078ae <USB_SetTurnaroundTime+0xda>
80078a0: 68bb ldr r3, [r7, #8]
80078a2: 4a1c ldr r2, [pc, #112] @ (8007914 <USB_SetTurnaroundTime+0x140>)
80078a4: 4293 cmp r3, r2
80078a6: d202 bcs.n 80078ae <USB_SetTurnaroundTime+0xda>
{
/* hclk Clock Range between 27.7-32 MHz */
UsbTrd = 0x7U;
80078a8: 2307 movs r3, #7
80078aa: 617b str r3, [r7, #20]
80078ac: e00a b.n 80078c4 <USB_SetTurnaroundTime+0xf0>
}
else /* if(hclk >= 32000000) */
{
/* hclk Clock Range between 32-200 MHz */
UsbTrd = 0x6U;
80078ae: 2306 movs r3, #6
80078b0: 617b str r3, [r7, #20]
80078b2: e007 b.n 80078c4 <USB_SetTurnaroundTime+0xf0>
}
}
else if (speed == USBD_HS_SPEED)
80078b4: 79fb ldrb r3, [r7, #7]
80078b6: 2b00 cmp r3, #0
80078b8: d102 bne.n 80078c0 <USB_SetTurnaroundTime+0xec>
{
UsbTrd = USBD_HS_TRDT_VALUE;
80078ba: 2309 movs r3, #9
80078bc: 617b str r3, [r7, #20]
80078be: e001 b.n 80078c4 <USB_SetTurnaroundTime+0xf0>
}
else
{
UsbTrd = USBD_DEFAULT_TRDT_VALUE;
80078c0: 2309 movs r3, #9
80078c2: 617b str r3, [r7, #20]
}
USBx->GUSBCFG &= ~USB_OTG_GUSBCFG_TRDT;
80078c4: 68fb ldr r3, [r7, #12]
80078c6: 68db ldr r3, [r3, #12]
80078c8: f423 5270 bic.w r2, r3, #15360 @ 0x3c00
80078cc: 68fb ldr r3, [r7, #12]
80078ce: 60da str r2, [r3, #12]
USBx->GUSBCFG |= (uint32_t)((UsbTrd << 10) & USB_OTG_GUSBCFG_TRDT);
80078d0: 68fb ldr r3, [r7, #12]
80078d2: 68da ldr r2, [r3, #12]
80078d4: 697b ldr r3, [r7, #20]
80078d6: 029b lsls r3, r3, #10
80078d8: f403 5370 and.w r3, r3, #15360 @ 0x3c00
80078dc: 431a orrs r2, r3
80078de: 68fb ldr r3, [r7, #12]
80078e0: 60da str r2, [r3, #12]
return HAL_OK;
80078e2: 2300 movs r3, #0
}
80078e4: 4618 mov r0, r3
80078e6: 371c adds r7, #28
80078e8: 46bd mov sp, r7
80078ea: f85d 7b04 ldr.w r7, [sp], #4
80078ee: 4770 bx lr
80078f0: 00d8acbf .word 0x00d8acbf
80078f4: 00e4e1c0 .word 0x00e4e1c0
80078f8: 00f42400 .word 0x00f42400
80078fc: 01067380 .word 0x01067380
8007900: 011a499f .word 0x011a499f
8007904: 01312cff .word 0x01312cff
8007908: 014ca43f .word 0x014ca43f
800790c: 016e3600 .word 0x016e3600
8007910: 01a6ab1f .word 0x01a6ab1f
8007914: 01e84800 .word 0x01e84800
08007918 <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
{
8007918: b480 push {r7}
800791a: b083 sub sp, #12
800791c: af00 add r7, sp, #0
800791e: 6078 str r0, [r7, #4]
USBx->GAHBCFG |= USB_OTG_GAHBCFG_GINT;
8007920: 687b ldr r3, [r7, #4]
8007922: 689b ldr r3, [r3, #8]
8007924: f043 0201 orr.w r2, r3, #1
8007928: 687b ldr r3, [r7, #4]
800792a: 609a str r2, [r3, #8]
return HAL_OK;
800792c: 2300 movs r3, #0
}
800792e: 4618 mov r0, r3
8007930: 370c adds r7, #12
8007932: 46bd mov sp, r7
8007934: f85d 7b04 ldr.w r7, [sp], #4
8007938: 4770 bx lr
0800793a <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
{
800793a: b480 push {r7}
800793c: b083 sub sp, #12
800793e: af00 add r7, sp, #0
8007940: 6078 str r0, [r7, #4]
USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
8007942: 687b ldr r3, [r7, #4]
8007944: 689b ldr r3, [r3, #8]
8007946: f023 0201 bic.w r2, r3, #1
800794a: 687b ldr r3, [r7, #4]
800794c: 609a str r2, [r3, #8]
return HAL_OK;
800794e: 2300 movs r3, #0
}
8007950: 4618 mov r0, r3
8007952: 370c adds r7, #12
8007954: 46bd mov sp, r7
8007956: f85d 7b04 ldr.w r7, [sp], #4
800795a: 4770 bx lr
0800795c <USB_SetCurrentMode>:
* @arg USB_DEVICE_MODE Peripheral mode
* @arg USB_HOST_MODE Host mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_OTG_ModeTypeDef mode)
{
800795c: b580 push {r7, lr}
800795e: b084 sub sp, #16
8007960: af00 add r7, sp, #0
8007962: 6078 str r0, [r7, #4]
8007964: 460b mov r3, r1
8007966: 70fb strb r3, [r7, #3]
uint32_t ms = 0U;
8007968: 2300 movs r3, #0
800796a: 60fb str r3, [r7, #12]
USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD);
800796c: 687b ldr r3, [r7, #4]
800796e: 68db ldr r3, [r3, #12]
8007970: f023 42c0 bic.w r2, r3, #1610612736 @ 0x60000000
8007974: 687b ldr r3, [r7, #4]
8007976: 60da str r2, [r3, #12]
if (mode == USB_HOST_MODE)
8007978: 78fb ldrb r3, [r7, #3]
800797a: 2b01 cmp r3, #1
800797c: d115 bne.n 80079aa <USB_SetCurrentMode+0x4e>
{
USBx->GUSBCFG |= USB_OTG_GUSBCFG_FHMOD;
800797e: 687b ldr r3, [r7, #4]
8007980: 68db ldr r3, [r3, #12]
8007982: f043 5200 orr.w r2, r3, #536870912 @ 0x20000000
8007986: 687b ldr r3, [r7, #4]
8007988: 60da str r2, [r3, #12]
do
{
HAL_Delay(10U);
800798a: 200a movs r0, #10
800798c: f7f9 ff10 bl 80017b0 <HAL_Delay>
ms += 10U;
8007990: 68fb ldr r3, [r7, #12]
8007992: 330a adds r3, #10
8007994: 60fb str r3, [r7, #12]
} while ((USB_GetMode(USBx) != (uint32_t)USB_HOST_MODE) && (ms < HAL_USB_CURRENT_MODE_MAX_DELAY_MS));
8007996: 6878 ldr r0, [r7, #4]
8007998: f001 f988 bl 8008cac <USB_GetMode>
800799c: 4603 mov r3, r0
800799e: 2b01 cmp r3, #1
80079a0: d01e beq.n 80079e0 <USB_SetCurrentMode+0x84>
80079a2: 68fb ldr r3, [r7, #12]
80079a4: 2bc7 cmp r3, #199 @ 0xc7
80079a6: d9f0 bls.n 800798a <USB_SetCurrentMode+0x2e>
80079a8: e01a b.n 80079e0 <USB_SetCurrentMode+0x84>
}
else if (mode == USB_DEVICE_MODE)
80079aa: 78fb ldrb r3, [r7, #3]
80079ac: 2b00 cmp r3, #0
80079ae: d115 bne.n 80079dc <USB_SetCurrentMode+0x80>
{
USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
80079b0: 687b ldr r3, [r7, #4]
80079b2: 68db ldr r3, [r3, #12]
80079b4: f043 4280 orr.w r2, r3, #1073741824 @ 0x40000000
80079b8: 687b ldr r3, [r7, #4]
80079ba: 60da str r2, [r3, #12]
do
{
HAL_Delay(10U);
80079bc: 200a movs r0, #10
80079be: f7f9 fef7 bl 80017b0 <HAL_Delay>
ms += 10U;
80079c2: 68fb ldr r3, [r7, #12]
80079c4: 330a adds r3, #10
80079c6: 60fb str r3, [r7, #12]
} while ((USB_GetMode(USBx) != (uint32_t)USB_DEVICE_MODE) && (ms < HAL_USB_CURRENT_MODE_MAX_DELAY_MS));
80079c8: 6878 ldr r0, [r7, #4]
80079ca: f001 f96f bl 8008cac <USB_GetMode>
80079ce: 4603 mov r3, r0
80079d0: 2b00 cmp r3, #0
80079d2: d005 beq.n 80079e0 <USB_SetCurrentMode+0x84>
80079d4: 68fb ldr r3, [r7, #12]
80079d6: 2bc7 cmp r3, #199 @ 0xc7
80079d8: d9f0 bls.n 80079bc <USB_SetCurrentMode+0x60>
80079da: e001 b.n 80079e0 <USB_SetCurrentMode+0x84>
}
else
{
return HAL_ERROR;
80079dc: 2301 movs r3, #1
80079de: e005 b.n 80079ec <USB_SetCurrentMode+0x90>
}
if (ms == HAL_USB_CURRENT_MODE_MAX_DELAY_MS)
80079e0: 68fb ldr r3, [r7, #12]
80079e2: 2bc8 cmp r3, #200 @ 0xc8
80079e4: d101 bne.n 80079ea <USB_SetCurrentMode+0x8e>
{
return HAL_ERROR;
80079e6: 2301 movs r3, #1
80079e8: e000 b.n 80079ec <USB_SetCurrentMode+0x90>
}
return HAL_OK;
80079ea: 2300 movs r3, #0
}
80079ec: 4618 mov r0, r3
80079ee: 3710 adds r7, #16
80079f0: 46bd mov sp, r7
80079f2: bd80 pop {r7, pc}
080079f4 <USB_DevInit>:
* @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
{
80079f4: b084 sub sp, #16
80079f6: b580 push {r7, lr}
80079f8: b086 sub sp, #24
80079fa: af00 add r7, sp, #0
80079fc: 6078 str r0, [r7, #4]
80079fe: f107 0024 add.w r0, r7, #36 @ 0x24
8007a02: e880 000e stmia.w r0, {r1, r2, r3}
HAL_StatusTypeDef ret = HAL_OK;
8007a06: 2300 movs r3, #0
8007a08: 75fb strb r3, [r7, #23]
uint32_t USBx_BASE = (uint32_t)USBx;
8007a0a: 687b ldr r3, [r7, #4]
8007a0c: 60fb str r3, [r7, #12]
uint32_t i;
for (i = 0U; i < 15U; i++)
8007a0e: 2300 movs r3, #0
8007a10: 613b str r3, [r7, #16]
8007a12: e009 b.n 8007a28 <USB_DevInit+0x34>
{
USBx->DIEPTXF[i] = 0U;
8007a14: 687a ldr r2, [r7, #4]
8007a16: 693b ldr r3, [r7, #16]
8007a18: 3340 adds r3, #64 @ 0x40
8007a1a: 009b lsls r3, r3, #2
8007a1c: 4413 add r3, r2
8007a1e: 2200 movs r2, #0
8007a20: 605a str r2, [r3, #4]
for (i = 0U; i < 15U; i++)
8007a22: 693b ldr r3, [r7, #16]
8007a24: 3301 adds r3, #1
8007a26: 613b str r3, [r7, #16]
8007a28: 693b ldr r3, [r7, #16]
8007a2a: 2b0e cmp r3, #14
8007a2c: d9f2 bls.n 8007a14 <USB_DevInit+0x20>
#if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) \
|| defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) \
|| defined(STM32F423xx)
/* VBUS Sensing setup */
if (cfg.vbus_sensing_enable == 0U)
8007a2e: f897 302e ldrb.w r3, [r7, #46] @ 0x2e
8007a32: 2b00 cmp r3, #0
8007a34: d11c bne.n 8007a70 <USB_DevInit+0x7c>
{
USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS;
8007a36: 68fb ldr r3, [r7, #12]
8007a38: f503 6300 add.w r3, r3, #2048 @ 0x800
8007a3c: 685b ldr r3, [r3, #4]
8007a3e: 68fa ldr r2, [r7, #12]
8007a40: f502 6200 add.w r2, r2, #2048 @ 0x800
8007a44: f043 0302 orr.w r3, r3, #2
8007a48: 6053 str r3, [r2, #4]
/* Deactivate VBUS Sensing B */
USBx->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
8007a4a: 687b ldr r3, [r7, #4]
8007a4c: 6b9b ldr r3, [r3, #56] @ 0x38
8007a4e: f423 1200 bic.w r2, r3, #2097152 @ 0x200000
8007a52: 687b ldr r3, [r7, #4]
8007a54: 639a str r2, [r3, #56] @ 0x38
/* B-peripheral session valid override enable */
USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
8007a56: 687b ldr r3, [r7, #4]
8007a58: 681b ldr r3, [r3, #0]
8007a5a: f043 0240 orr.w r2, r3, #64 @ 0x40
8007a5e: 687b ldr r3, [r7, #4]
8007a60: 601a str r2, [r3, #0]
USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
8007a62: 687b ldr r3, [r7, #4]
8007a64: 681b ldr r3, [r3, #0]
8007a66: f043 0280 orr.w r2, r3, #128 @ 0x80
8007a6a: 687b ldr r3, [r7, #4]
8007a6c: 601a str r2, [r3, #0]
8007a6e: e005 b.n 8007a7c <USB_DevInit+0x88>
}
else
{
/* Enable HW VBUS sensing */
USBx->GCCFG |= USB_OTG_GCCFG_VBDEN;
8007a70: 687b ldr r3, [r7, #4]
8007a72: 6b9b ldr r3, [r3, #56] @ 0x38
8007a74: f443 1200 orr.w r2, r3, #2097152 @ 0x200000
8007a78: 687b ldr r3, [r7, #4]
8007a7a: 639a str r2, [r3, #56] @ 0x38
#endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||
defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||
defined(STM32F423xx) */
/* Restart the Phy Clock */
USBx_PCGCCTL = 0U;
8007a7c: 68fb ldr r3, [r7, #12]
8007a7e: f503 6360 add.w r3, r3, #3584 @ 0xe00
8007a82: 461a mov r2, r3
8007a84: 2300 movs r3, #0
8007a86: 6013 str r3, [r2, #0]
if (cfg.phy_itface == USB_OTG_ULPI_PHY)
8007a88: f897 3029 ldrb.w r3, [r7, #41] @ 0x29
8007a8c: 2b01 cmp r3, #1
8007a8e: d10d bne.n 8007aac <USB_DevInit+0xb8>
{
if (cfg.speed == USBD_HS_SPEED)
8007a90: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
8007a94: 2b00 cmp r3, #0
8007a96: d104 bne.n 8007aa2 <USB_DevInit+0xae>
{
/* Set Core speed to High speed mode */
(void)USB_SetDevSpeed(USBx, USB_OTG_SPEED_HIGH);
8007a98: 2100 movs r1, #0
8007a9a: 6878 ldr r0, [r7, #4]
8007a9c: f000 f968 bl 8007d70 <USB_SetDevSpeed>
8007aa0: e008 b.n 8007ab4 <USB_DevInit+0xc0>
}
else
{
/* Set Core speed to Full speed mode */
(void)USB_SetDevSpeed(USBx, USB_OTG_SPEED_HIGH_IN_FULL);
8007aa2: 2101 movs r1, #1
8007aa4: 6878 ldr r0, [r7, #4]
8007aa6: f000 f963 bl 8007d70 <USB_SetDevSpeed>
8007aaa: e003 b.n 8007ab4 <USB_DevInit+0xc0>
}
}
else
{
/* Set Core speed to Full speed mode */
(void)USB_SetDevSpeed(USBx, USB_OTG_SPEED_FULL);
8007aac: 2103 movs r1, #3
8007aae: 6878 ldr r0, [r7, #4]
8007ab0: f000 f95e bl 8007d70 <USB_SetDevSpeed>
}
/* Flush the FIFOs */
if (USB_FlushTxFifo(USBx, 0x10U) != HAL_OK) /* all Tx FIFOs */
8007ab4: 2110 movs r1, #16
8007ab6: 6878 ldr r0, [r7, #4]
8007ab8: f000 f8fa bl 8007cb0 <USB_FlushTxFifo>
8007abc: 4603 mov r3, r0
8007abe: 2b00 cmp r3, #0
8007ac0: d001 beq.n 8007ac6 <USB_DevInit+0xd2>
{
ret = HAL_ERROR;
8007ac2: 2301 movs r3, #1
8007ac4: 75fb strb r3, [r7, #23]
}
if (USB_FlushRxFifo(USBx) != HAL_OK)
8007ac6: 6878 ldr r0, [r7, #4]
8007ac8: f000 f924 bl 8007d14 <USB_FlushRxFifo>
8007acc: 4603 mov r3, r0
8007ace: 2b00 cmp r3, #0
8007ad0: d001 beq.n 8007ad6 <USB_DevInit+0xe2>
{
ret = HAL_ERROR;
8007ad2: 2301 movs r3, #1
8007ad4: 75fb strb r3, [r7, #23]
}
/* Clear all pending Device Interrupts */
USBx_DEVICE->DIEPMSK = 0U;
8007ad6: 68fb ldr r3, [r7, #12]
8007ad8: f503 6300 add.w r3, r3, #2048 @ 0x800
8007adc: 461a mov r2, r3
8007ade: 2300 movs r3, #0
8007ae0: 6113 str r3, [r2, #16]
USBx_DEVICE->DOEPMSK = 0U;
8007ae2: 68fb ldr r3, [r7, #12]
8007ae4: f503 6300 add.w r3, r3, #2048 @ 0x800
8007ae8: 461a mov r2, r3
8007aea: 2300 movs r3, #0
8007aec: 6153 str r3, [r2, #20]
USBx_DEVICE->DAINTMSK = 0U;
8007aee: 68fb ldr r3, [r7, #12]
8007af0: f503 6300 add.w r3, r3, #2048 @ 0x800
8007af4: 461a mov r2, r3
8007af6: 2300 movs r3, #0
8007af8: 61d3 str r3, [r2, #28]
for (i = 0U; i < cfg.dev_endpoints; i++)
8007afa: 2300 movs r3, #0
8007afc: 613b str r3, [r7, #16]
8007afe: e043 b.n 8007b88 <USB_DevInit+0x194>
{
if ((USBx_INEP(i)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
8007b00: 693b ldr r3, [r7, #16]
8007b02: 015a lsls r2, r3, #5
8007b04: 68fb ldr r3, [r7, #12]
8007b06: 4413 add r3, r2
8007b08: f503 6310 add.w r3, r3, #2304 @ 0x900
8007b0c: 681b ldr r3, [r3, #0]
8007b0e: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8007b12: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
8007b16: d118 bne.n 8007b4a <USB_DevInit+0x156>
{
if (i == 0U)
8007b18: 693b ldr r3, [r7, #16]
8007b1a: 2b00 cmp r3, #0
8007b1c: d10a bne.n 8007b34 <USB_DevInit+0x140>
{
USBx_INEP(i)->DIEPCTL = USB_OTG_DIEPCTL_SNAK;
8007b1e: 693b ldr r3, [r7, #16]
8007b20: 015a lsls r2, r3, #5
8007b22: 68fb ldr r3, [r7, #12]
8007b24: 4413 add r3, r2
8007b26: f503 6310 add.w r3, r3, #2304 @ 0x900
8007b2a: 461a mov r2, r3
8007b2c: f04f 6300 mov.w r3, #134217728 @ 0x8000000
8007b30: 6013 str r3, [r2, #0]
8007b32: e013 b.n 8007b5c <USB_DevInit+0x168>
}
else
{
USBx_INEP(i)->DIEPCTL = USB_OTG_DIEPCTL_EPDIS | USB_OTG_DIEPCTL_SNAK;
8007b34: 693b ldr r3, [r7, #16]
8007b36: 015a lsls r2, r3, #5
8007b38: 68fb ldr r3, [r7, #12]
8007b3a: 4413 add r3, r2
8007b3c: f503 6310 add.w r3, r3, #2304 @ 0x900
8007b40: 461a mov r2, r3
8007b42: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
8007b46: 6013 str r3, [r2, #0]
8007b48: e008 b.n 8007b5c <USB_DevInit+0x168>
}
}
else
{
USBx_INEP(i)->DIEPCTL = 0U;
8007b4a: 693b ldr r3, [r7, #16]
8007b4c: 015a lsls r2, r3, #5
8007b4e: 68fb ldr r3, [r7, #12]
8007b50: 4413 add r3, r2
8007b52: f503 6310 add.w r3, r3, #2304 @ 0x900
8007b56: 461a mov r2, r3
8007b58: 2300 movs r3, #0
8007b5a: 6013 str r3, [r2, #0]
}
USBx_INEP(i)->DIEPTSIZ = 0U;
8007b5c: 693b ldr r3, [r7, #16]
8007b5e: 015a lsls r2, r3, #5
8007b60: 68fb ldr r3, [r7, #12]
8007b62: 4413 add r3, r2
8007b64: f503 6310 add.w r3, r3, #2304 @ 0x900
8007b68: 461a mov r2, r3
8007b6a: 2300 movs r3, #0
8007b6c: 6113 str r3, [r2, #16]
USBx_INEP(i)->DIEPINT = 0xFB7FU;
8007b6e: 693b ldr r3, [r7, #16]
8007b70: 015a lsls r2, r3, #5
8007b72: 68fb ldr r3, [r7, #12]
8007b74: 4413 add r3, r2
8007b76: f503 6310 add.w r3, r3, #2304 @ 0x900
8007b7a: 461a mov r2, r3
8007b7c: f64f 337f movw r3, #64383 @ 0xfb7f
8007b80: 6093 str r3, [r2, #8]
for (i = 0U; i < cfg.dev_endpoints; i++)
8007b82: 693b ldr r3, [r7, #16]
8007b84: 3301 adds r3, #1
8007b86: 613b str r3, [r7, #16]
8007b88: f897 3024 ldrb.w r3, [r7, #36] @ 0x24
8007b8c: 461a mov r2, r3
8007b8e: 693b ldr r3, [r7, #16]
8007b90: 4293 cmp r3, r2
8007b92: d3b5 bcc.n 8007b00 <USB_DevInit+0x10c>
}
for (i = 0U; i < cfg.dev_endpoints; i++)
8007b94: 2300 movs r3, #0
8007b96: 613b str r3, [r7, #16]
8007b98: e043 b.n 8007c22 <USB_DevInit+0x22e>
{
if ((USBx_OUTEP(i)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
8007b9a: 693b ldr r3, [r7, #16]
8007b9c: 015a lsls r2, r3, #5
8007b9e: 68fb ldr r3, [r7, #12]
8007ba0: 4413 add r3, r2
8007ba2: f503 6330 add.w r3, r3, #2816 @ 0xb00
8007ba6: 681b ldr r3, [r3, #0]
8007ba8: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8007bac: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
8007bb0: d118 bne.n 8007be4 <USB_DevInit+0x1f0>
{
if (i == 0U)
8007bb2: 693b ldr r3, [r7, #16]
8007bb4: 2b00 cmp r3, #0
8007bb6: d10a bne.n 8007bce <USB_DevInit+0x1da>
{
USBx_OUTEP(i)->DOEPCTL = USB_OTG_DOEPCTL_SNAK;
8007bb8: 693b ldr r3, [r7, #16]
8007bba: 015a lsls r2, r3, #5
8007bbc: 68fb ldr r3, [r7, #12]
8007bbe: 4413 add r3, r2
8007bc0: f503 6330 add.w r3, r3, #2816 @ 0xb00
8007bc4: 461a mov r2, r3
8007bc6: f04f 6300 mov.w r3, #134217728 @ 0x8000000
8007bca: 6013 str r3, [r2, #0]
8007bcc: e013 b.n 8007bf6 <USB_DevInit+0x202>
}
else
{
USBx_OUTEP(i)->DOEPCTL = USB_OTG_DOEPCTL_EPDIS | USB_OTG_DOEPCTL_SNAK;
8007bce: 693b ldr r3, [r7, #16]
8007bd0: 015a lsls r2, r3, #5
8007bd2: 68fb ldr r3, [r7, #12]
8007bd4: 4413 add r3, r2
8007bd6: f503 6330 add.w r3, r3, #2816 @ 0xb00
8007bda: 461a mov r2, r3
8007bdc: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
8007be0: 6013 str r3, [r2, #0]
8007be2: e008 b.n 8007bf6 <USB_DevInit+0x202>
}
}
else
{
USBx_OUTEP(i)->DOEPCTL = 0U;
8007be4: 693b ldr r3, [r7, #16]
8007be6: 015a lsls r2, r3, #5
8007be8: 68fb ldr r3, [r7, #12]
8007bea: 4413 add r3, r2
8007bec: f503 6330 add.w r3, r3, #2816 @ 0xb00
8007bf0: 461a mov r2, r3
8007bf2: 2300 movs r3, #0
8007bf4: 6013 str r3, [r2, #0]
}
USBx_OUTEP(i)->DOEPTSIZ = 0U;
8007bf6: 693b ldr r3, [r7, #16]
8007bf8: 015a lsls r2, r3, #5
8007bfa: 68fb ldr r3, [r7, #12]
8007bfc: 4413 add r3, r2
8007bfe: f503 6330 add.w r3, r3, #2816 @ 0xb00
8007c02: 461a mov r2, r3
8007c04: 2300 movs r3, #0
8007c06: 6113 str r3, [r2, #16]
USBx_OUTEP(i)->DOEPINT = 0xFB7FU;
8007c08: 693b ldr r3, [r7, #16]
8007c0a: 015a lsls r2, r3, #5
8007c0c: 68fb ldr r3, [r7, #12]
8007c0e: 4413 add r3, r2
8007c10: f503 6330 add.w r3, r3, #2816 @ 0xb00
8007c14: 461a mov r2, r3
8007c16: f64f 337f movw r3, #64383 @ 0xfb7f
8007c1a: 6093 str r3, [r2, #8]
for (i = 0U; i < cfg.dev_endpoints; i++)
8007c1c: 693b ldr r3, [r7, #16]
8007c1e: 3301 adds r3, #1
8007c20: 613b str r3, [r7, #16]
8007c22: f897 3024 ldrb.w r3, [r7, #36] @ 0x24
8007c26: 461a mov r2, r3
8007c28: 693b ldr r3, [r7, #16]
8007c2a: 4293 cmp r3, r2
8007c2c: d3b5 bcc.n 8007b9a <USB_DevInit+0x1a6>
}
USBx_DEVICE->DIEPMSK &= ~(USB_OTG_DIEPMSK_TXFURM);
8007c2e: 68fb ldr r3, [r7, #12]
8007c30: f503 6300 add.w r3, r3, #2048 @ 0x800
8007c34: 691b ldr r3, [r3, #16]
8007c36: 68fa ldr r2, [r7, #12]
8007c38: f502 6200 add.w r2, r2, #2048 @ 0x800
8007c3c: f423 7380 bic.w r3, r3, #256 @ 0x100
8007c40: 6113 str r3, [r2, #16]
/* Disable all interrupts. */
USBx->GINTMSK = 0U;
8007c42: 687b ldr r3, [r7, #4]
8007c44: 2200 movs r2, #0
8007c46: 619a str r2, [r3, #24]
/* Clear any pending interrupts */
USBx->GINTSTS = 0xBFFFFFFFU;
8007c48: 687b ldr r3, [r7, #4]
8007c4a: f06f 4280 mvn.w r2, #1073741824 @ 0x40000000
8007c4e: 615a str r2, [r3, #20]
/* Enable the common interrupts */
if (cfg.dma_enable == 0U)
8007c50: f897 3026 ldrb.w r3, [r7, #38] @ 0x26
8007c54: 2b00 cmp r3, #0
8007c56: d105 bne.n 8007c64 <USB_DevInit+0x270>
{
USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
8007c58: 687b ldr r3, [r7, #4]
8007c5a: 699b ldr r3, [r3, #24]
8007c5c: f043 0210 orr.w r2, r3, #16
8007c60: 687b ldr r3, [r7, #4]
8007c62: 619a str r2, [r3, #24]
}
/* Enable interrupts matching to the Device mode ONLY */
USBx->GINTMSK |= USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_USBRST |
8007c64: 687b ldr r3, [r7, #4]
8007c66: 699a ldr r2, [r3, #24]
8007c68: 4b10 ldr r3, [pc, #64] @ (8007cac <USB_DevInit+0x2b8>)
8007c6a: 4313 orrs r3, r2
8007c6c: 687a ldr r2, [r7, #4]
8007c6e: 6193 str r3, [r2, #24]
USB_OTG_GINTMSK_ENUMDNEM | USB_OTG_GINTMSK_IEPINT |
USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IISOIXFRM |
USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM;
if (cfg.Sof_enable != 0U)
8007c70: f897 302a ldrb.w r3, [r7, #42] @ 0x2a
8007c74: 2b00 cmp r3, #0
8007c76: d005 beq.n 8007c84 <USB_DevInit+0x290>
{
USBx->GINTMSK |= USB_OTG_GINTMSK_SOFM;
8007c78: 687b ldr r3, [r7, #4]
8007c7a: 699b ldr r3, [r3, #24]
8007c7c: f043 0208 orr.w r2, r3, #8
8007c80: 687b ldr r3, [r7, #4]
8007c82: 619a str r2, [r3, #24]
}
if (cfg.vbus_sensing_enable == 1U)
8007c84: f897 302e ldrb.w r3, [r7, #46] @ 0x2e
8007c88: 2b01 cmp r3, #1
8007c8a: d107 bne.n 8007c9c <USB_DevInit+0x2a8>
{
USBx->GINTMSK |= (USB_OTG_GINTMSK_SRQIM | USB_OTG_GINTMSK_OTGINT);
8007c8c: 687b ldr r3, [r7, #4]
8007c8e: 699b ldr r3, [r3, #24]
8007c90: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000
8007c94: f043 0304 orr.w r3, r3, #4
8007c98: 687a ldr r2, [r7, #4]
8007c9a: 6193 str r3, [r2, #24]
}
return ret;
8007c9c: 7dfb ldrb r3, [r7, #23]
}
8007c9e: 4618 mov r0, r3
8007ca0: 3718 adds r7, #24
8007ca2: 46bd mov sp, r7
8007ca4: e8bd 4080 ldmia.w sp!, {r7, lr}
8007ca8: b004 add sp, #16
8007caa: 4770 bx lr
8007cac: 803c3800 .word 0x803c3800
08007cb0 <USB_FlushTxFifo>:
* This parameter can be a value from 1 to 15
15 means Flush all Tx FIFOs
* @retval HAL status
*/
HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num)
{
8007cb0: b480 push {r7}
8007cb2: b085 sub sp, #20
8007cb4: af00 add r7, sp, #0
8007cb6: 6078 str r0, [r7, #4]
8007cb8: 6039 str r1, [r7, #0]
__IO uint32_t count = 0U;
8007cba: 2300 movs r3, #0
8007cbc: 60fb str r3, [r7, #12]
/* Wait for AHB master IDLE state. */
do
{
count++;
8007cbe: 68fb ldr r3, [r7, #12]
8007cc0: 3301 adds r3, #1
8007cc2: 60fb str r3, [r7, #12]
if (count > HAL_USB_TIMEOUT)
8007cc4: 68fb ldr r3, [r7, #12]
8007cc6: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000
8007cca: d901 bls.n 8007cd0 <USB_FlushTxFifo+0x20>
{
return HAL_TIMEOUT;
8007ccc: 2303 movs r3, #3
8007cce: e01b b.n 8007d08 <USB_FlushTxFifo+0x58>
}
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
8007cd0: 687b ldr r3, [r7, #4]
8007cd2: 691b ldr r3, [r3, #16]
8007cd4: 2b00 cmp r3, #0
8007cd6: daf2 bge.n 8007cbe <USB_FlushTxFifo+0xe>
/* Flush TX Fifo */
count = 0U;
8007cd8: 2300 movs r3, #0
8007cda: 60fb str r3, [r7, #12]
USBx->GRSTCTL = (USB_OTG_GRSTCTL_TXFFLSH | (num << 6));
8007cdc: 683b ldr r3, [r7, #0]
8007cde: 019b lsls r3, r3, #6
8007ce0: f043 0220 orr.w r2, r3, #32
8007ce4: 687b ldr r3, [r7, #4]
8007ce6: 611a str r2, [r3, #16]
do
{
count++;
8007ce8: 68fb ldr r3, [r7, #12]
8007cea: 3301 adds r3, #1
8007cec: 60fb str r3, [r7, #12]
if (count > HAL_USB_TIMEOUT)
8007cee: 68fb ldr r3, [r7, #12]
8007cf0: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000
8007cf4: d901 bls.n 8007cfa <USB_FlushTxFifo+0x4a>
{
return HAL_TIMEOUT;
8007cf6: 2303 movs r3, #3
8007cf8: e006 b.n 8007d08 <USB_FlushTxFifo+0x58>
}
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
8007cfa: 687b ldr r3, [r7, #4]
8007cfc: 691b ldr r3, [r3, #16]
8007cfe: f003 0320 and.w r3, r3, #32
8007d02: 2b20 cmp r3, #32
8007d04: d0f0 beq.n 8007ce8 <USB_FlushTxFifo+0x38>
return HAL_OK;
8007d06: 2300 movs r3, #0
}
8007d08: 4618 mov r0, r3
8007d0a: 3714 adds r7, #20
8007d0c: 46bd mov sp, r7
8007d0e: f85d 7b04 ldr.w r7, [sp], #4
8007d12: 4770 bx lr
08007d14 <USB_FlushRxFifo>:
* @brief USB_FlushRxFifo Flush Rx FIFO
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
{
8007d14: b480 push {r7}
8007d16: b085 sub sp, #20
8007d18: af00 add r7, sp, #0
8007d1a: 6078 str r0, [r7, #4]
__IO uint32_t count = 0U;
8007d1c: 2300 movs r3, #0
8007d1e: 60fb str r3, [r7, #12]
/* Wait for AHB master IDLE state. */
do
{
count++;
8007d20: 68fb ldr r3, [r7, #12]
8007d22: 3301 adds r3, #1
8007d24: 60fb str r3, [r7, #12]
if (count > HAL_USB_TIMEOUT)
8007d26: 68fb ldr r3, [r7, #12]
8007d28: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000
8007d2c: d901 bls.n 8007d32 <USB_FlushRxFifo+0x1e>
{
return HAL_TIMEOUT;
8007d2e: 2303 movs r3, #3
8007d30: e018 b.n 8007d64 <USB_FlushRxFifo+0x50>
}
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
8007d32: 687b ldr r3, [r7, #4]
8007d34: 691b ldr r3, [r3, #16]
8007d36: 2b00 cmp r3, #0
8007d38: daf2 bge.n 8007d20 <USB_FlushRxFifo+0xc>
/* Flush RX Fifo */
count = 0U;
8007d3a: 2300 movs r3, #0
8007d3c: 60fb str r3, [r7, #12]
USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
8007d3e: 687b ldr r3, [r7, #4]
8007d40: 2210 movs r2, #16
8007d42: 611a str r2, [r3, #16]
do
{
count++;
8007d44: 68fb ldr r3, [r7, #12]
8007d46: 3301 adds r3, #1
8007d48: 60fb str r3, [r7, #12]
if (count > HAL_USB_TIMEOUT)
8007d4a: 68fb ldr r3, [r7, #12]
8007d4c: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000
8007d50: d901 bls.n 8007d56 <USB_FlushRxFifo+0x42>
{
return HAL_TIMEOUT;
8007d52: 2303 movs r3, #3
8007d54: e006 b.n 8007d64 <USB_FlushRxFifo+0x50>
}
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
8007d56: 687b ldr r3, [r7, #4]
8007d58: 691b ldr r3, [r3, #16]
8007d5a: f003 0310 and.w r3, r3, #16
8007d5e: 2b10 cmp r3, #16
8007d60: d0f0 beq.n 8007d44 <USB_FlushRxFifo+0x30>
return HAL_OK;
8007d62: 2300 movs r3, #0
}
8007d64: 4618 mov r0, r3
8007d66: 3714 adds r7, #20
8007d68: 46bd mov sp, r7
8007d6a: f85d 7b04 ldr.w r7, [sp], #4
8007d6e: 4770 bx lr
08007d70 <USB_SetDevSpeed>:
* @arg USB_OTG_SPEED_HIGH_IN_FULL: High speed core in Full Speed mode
* @arg USB_OTG_SPEED_FULL: Full speed mode
* @retval Hal status
*/
HAL_StatusTypeDef USB_SetDevSpeed(const USB_OTG_GlobalTypeDef *USBx, uint8_t speed)
{
8007d70: b480 push {r7}
8007d72: b085 sub sp, #20
8007d74: af00 add r7, sp, #0
8007d76: 6078 str r0, [r7, #4]
8007d78: 460b mov r3, r1
8007d7a: 70fb strb r3, [r7, #3]
uint32_t USBx_BASE = (uint32_t)USBx;
8007d7c: 687b ldr r3, [r7, #4]
8007d7e: 60fb str r3, [r7, #12]
USBx_DEVICE->DCFG |= speed;
8007d80: 68fb ldr r3, [r7, #12]
8007d82: f503 6300 add.w r3, r3, #2048 @ 0x800
8007d86: 681a ldr r2, [r3, #0]
8007d88: 78fb ldrb r3, [r7, #3]
8007d8a: 68f9 ldr r1, [r7, #12]
8007d8c: f501 6100 add.w r1, r1, #2048 @ 0x800
8007d90: 4313 orrs r3, r2
8007d92: 600b str r3, [r1, #0]
return HAL_OK;
8007d94: 2300 movs r3, #0
}
8007d96: 4618 mov r0, r3
8007d98: 3714 adds r7, #20
8007d9a: 46bd mov sp, r7
8007d9c: f85d 7b04 ldr.w r7, [sp], #4
8007da0: 4770 bx lr
08007da2 <USB_GetDevSpeed>:
* This parameter can be one of these values:
* @arg USBD_HS_SPEED: High speed mode
* @arg USBD_FS_SPEED: Full speed mode
*/
uint8_t USB_GetDevSpeed(const USB_OTG_GlobalTypeDef *USBx)
{
8007da2: b480 push {r7}
8007da4: b087 sub sp, #28
8007da6: af00 add r7, sp, #0
8007da8: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
8007daa: 687b ldr r3, [r7, #4]
8007dac: 613b str r3, [r7, #16]
uint8_t speed;
uint32_t DevEnumSpeed = USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD;
8007dae: 693b ldr r3, [r7, #16]
8007db0: f503 6300 add.w r3, r3, #2048 @ 0x800
8007db4: 689b ldr r3, [r3, #8]
8007db6: f003 0306 and.w r3, r3, #6
8007dba: 60fb str r3, [r7, #12]
if (DevEnumSpeed == DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ)
8007dbc: 68fb ldr r3, [r7, #12]
8007dbe: 2b00 cmp r3, #0
8007dc0: d102 bne.n 8007dc8 <USB_GetDevSpeed+0x26>
{
speed = USBD_HS_SPEED;
8007dc2: 2300 movs r3, #0
8007dc4: 75fb strb r3, [r7, #23]
8007dc6: e00a b.n 8007dde <USB_GetDevSpeed+0x3c>
}
else if ((DevEnumSpeed == DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ) ||
8007dc8: 68fb ldr r3, [r7, #12]
8007dca: 2b02 cmp r3, #2
8007dcc: d002 beq.n 8007dd4 <USB_GetDevSpeed+0x32>
8007dce: 68fb ldr r3, [r7, #12]
8007dd0: 2b06 cmp r3, #6
8007dd2: d102 bne.n 8007dda <USB_GetDevSpeed+0x38>
(DevEnumSpeed == DSTS_ENUMSPD_FS_PHY_48MHZ))
{
speed = USBD_FS_SPEED;
8007dd4: 2302 movs r3, #2
8007dd6: 75fb strb r3, [r7, #23]
8007dd8: e001 b.n 8007dde <USB_GetDevSpeed+0x3c>
}
else
{
speed = 0xFU;
8007dda: 230f movs r3, #15
8007ddc: 75fb strb r3, [r7, #23]
}
return speed;
8007dde: 7dfb ldrb r3, [r7, #23]
}
8007de0: 4618 mov r0, r3
8007de2: 371c adds r7, #28
8007de4: 46bd mov sp, r7
8007de6: f85d 7b04 ldr.w r7, [sp], #4
8007dea: 4770 bx lr
08007dec <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
8007dec: b480 push {r7}
8007dee: b085 sub sp, #20
8007df0: af00 add r7, sp, #0
8007df2: 6078 str r0, [r7, #4]
8007df4: 6039 str r1, [r7, #0]
uint32_t USBx_BASE = (uint32_t)USBx;
8007df6: 687b ldr r3, [r7, #4]
8007df8: 60fb str r3, [r7, #12]
uint32_t epnum = (uint32_t)ep->num;
8007dfa: 683b ldr r3, [r7, #0]
8007dfc: 781b ldrb r3, [r3, #0]
8007dfe: 60bb str r3, [r7, #8]
if (ep->is_in == 1U)
8007e00: 683b ldr r3, [r7, #0]
8007e02: 785b ldrb r3, [r3, #1]
8007e04: 2b01 cmp r3, #1
8007e06: d13a bne.n 8007e7e <USB_ActivateEndpoint+0x92>
{
USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep->num & EP_ADDR_MSK));
8007e08: 68fb ldr r3, [r7, #12]
8007e0a: f503 6300 add.w r3, r3, #2048 @ 0x800
8007e0e: 69da ldr r2, [r3, #28]
8007e10: 683b ldr r3, [r7, #0]
8007e12: 781b ldrb r3, [r3, #0]
8007e14: f003 030f and.w r3, r3, #15
8007e18: 2101 movs r1, #1
8007e1a: fa01 f303 lsl.w r3, r1, r3
8007e1e: b29b uxth r3, r3
8007e20: 68f9 ldr r1, [r7, #12]
8007e22: f501 6100 add.w r1, r1, #2048 @ 0x800
8007e26: 4313 orrs r3, r2
8007e28: 61cb str r3, [r1, #28]
if ((USBx_INEP(epnum)->DIEPCTL & USB_OTG_DIEPCTL_USBAEP) == 0U)
8007e2a: 68bb ldr r3, [r7, #8]
8007e2c: 015a lsls r2, r3, #5
8007e2e: 68fb ldr r3, [r7, #12]
8007e30: 4413 add r3, r2
8007e32: f503 6310 add.w r3, r3, #2304 @ 0x900
8007e36: 681b ldr r3, [r3, #0]
8007e38: f403 4300 and.w r3, r3, #32768 @ 0x8000
8007e3c: 2b00 cmp r3, #0
8007e3e: d155 bne.n 8007eec <USB_ActivateEndpoint+0x100>
{
USBx_INEP(epnum)->DIEPCTL |= (ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ) |
8007e40: 68bb ldr r3, [r7, #8]
8007e42: 015a lsls r2, r3, #5
8007e44: 68fb ldr r3, [r7, #12]
8007e46: 4413 add r3, r2
8007e48: f503 6310 add.w r3, r3, #2304 @ 0x900
8007e4c: 681a ldr r2, [r3, #0]
8007e4e: 683b ldr r3, [r7, #0]
8007e50: 689b ldr r3, [r3, #8]
8007e52: f3c3 010a ubfx r1, r3, #0, #11
((uint32_t)ep->type << 18) | (epnum << 22) |
8007e56: 683b ldr r3, [r7, #0]
8007e58: 791b ldrb r3, [r3, #4]
8007e5a: 049b lsls r3, r3, #18
USBx_INEP(epnum)->DIEPCTL |= (ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ) |
8007e5c: 4319 orrs r1, r3
((uint32_t)ep->type << 18) | (epnum << 22) |
8007e5e: 68bb ldr r3, [r7, #8]
8007e60: 059b lsls r3, r3, #22
8007e62: 430b orrs r3, r1
USBx_INEP(epnum)->DIEPCTL |= (ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ) |
8007e64: 4313 orrs r3, r2
8007e66: 68ba ldr r2, [r7, #8]
8007e68: 0151 lsls r1, r2, #5
8007e6a: 68fa ldr r2, [r7, #12]
8007e6c: 440a add r2, r1
8007e6e: f502 6210 add.w r2, r2, #2304 @ 0x900
8007e72: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8007e76: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007e7a: 6013 str r3, [r2, #0]
8007e7c: e036 b.n 8007eec <USB_ActivateEndpoint+0x100>
USB_OTG_DIEPCTL_USBAEP;
}
}
else
{
USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep->num & EP_ADDR_MSK)) << 16);
8007e7e: 68fb ldr r3, [r7, #12]
8007e80: f503 6300 add.w r3, r3, #2048 @ 0x800
8007e84: 69da ldr r2, [r3, #28]
8007e86: 683b ldr r3, [r7, #0]
8007e88: 781b ldrb r3, [r3, #0]
8007e8a: f003 030f and.w r3, r3, #15
8007e8e: 2101 movs r1, #1
8007e90: fa01 f303 lsl.w r3, r1, r3
8007e94: 041b lsls r3, r3, #16
8007e96: 68f9 ldr r1, [r7, #12]
8007e98: f501 6100 add.w r1, r1, #2048 @ 0x800
8007e9c: 4313 orrs r3, r2
8007e9e: 61cb str r3, [r1, #28]
if (((USBx_OUTEP(epnum)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U)
8007ea0: 68bb ldr r3, [r7, #8]
8007ea2: 015a lsls r2, r3, #5
8007ea4: 68fb ldr r3, [r7, #12]
8007ea6: 4413 add r3, r2
8007ea8: f503 6330 add.w r3, r3, #2816 @ 0xb00
8007eac: 681b ldr r3, [r3, #0]
8007eae: f403 4300 and.w r3, r3, #32768 @ 0x8000
8007eb2: 2b00 cmp r3, #0
8007eb4: d11a bne.n 8007eec <USB_ActivateEndpoint+0x100>
{
USBx_OUTEP(epnum)->DOEPCTL |= (ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ) |
8007eb6: 68bb ldr r3, [r7, #8]
8007eb8: 015a lsls r2, r3, #5
8007eba: 68fb ldr r3, [r7, #12]
8007ebc: 4413 add r3, r2
8007ebe: f503 6330 add.w r3, r3, #2816 @ 0xb00
8007ec2: 681a ldr r2, [r3, #0]
8007ec4: 683b ldr r3, [r7, #0]
8007ec6: 689b ldr r3, [r3, #8]
8007ec8: f3c3 010a ubfx r1, r3, #0, #11
((uint32_t)ep->type << 18) |
8007ecc: 683b ldr r3, [r7, #0]
8007ece: 791b ldrb r3, [r3, #4]
8007ed0: 049b lsls r3, r3, #18
USBx_OUTEP(epnum)->DOEPCTL |= (ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ) |
8007ed2: 430b orrs r3, r1
8007ed4: 4313 orrs r3, r2
8007ed6: 68ba ldr r2, [r7, #8]
8007ed8: 0151 lsls r1, r2, #5
8007eda: 68fa ldr r2, [r7, #12]
8007edc: 440a add r2, r1
8007ede: f502 6230 add.w r2, r2, #2816 @ 0xb00
8007ee2: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8007ee6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007eea: 6013 str r3, [r2, #0]
USB_OTG_DIEPCTL_SD0PID_SEVNFRM |
USB_OTG_DOEPCTL_USBAEP;
}
}
return HAL_OK;
8007eec: 2300 movs r3, #0
}
8007eee: 4618 mov r0, r3
8007ef0: 3714 adds r7, #20
8007ef2: 46bd mov sp, r7
8007ef4: f85d 7b04 ldr.w r7, [sp], #4
8007ef8: 4770 bx lr
...
08007efc <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
8007efc: b480 push {r7}
8007efe: b085 sub sp, #20
8007f00: af00 add r7, sp, #0
8007f02: 6078 str r0, [r7, #4]
8007f04: 6039 str r1, [r7, #0]
uint32_t USBx_BASE = (uint32_t)USBx;
8007f06: 687b ldr r3, [r7, #4]
8007f08: 60fb str r3, [r7, #12]
uint32_t epnum = (uint32_t)ep->num;
8007f0a: 683b ldr r3, [r7, #0]
8007f0c: 781b ldrb r3, [r3, #0]
8007f0e: 60bb str r3, [r7, #8]
/* Read DEPCTLn register */
if (ep->is_in == 1U)
8007f10: 683b ldr r3, [r7, #0]
8007f12: 785b ldrb r3, [r3, #1]
8007f14: 2b01 cmp r3, #1
8007f16: d161 bne.n 8007fdc <USB_DeactivateEndpoint+0xe0>
{
if ((USBx_INEP(epnum)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
8007f18: 68bb ldr r3, [r7, #8]
8007f1a: 015a lsls r2, r3, #5
8007f1c: 68fb ldr r3, [r7, #12]
8007f1e: 4413 add r3, r2
8007f20: f503 6310 add.w r3, r3, #2304 @ 0x900
8007f24: 681b ldr r3, [r3, #0]
8007f26: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8007f2a: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
8007f2e: d11f bne.n 8007f70 <USB_DeactivateEndpoint+0x74>
{
USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK;
8007f30: 68bb ldr r3, [r7, #8]
8007f32: 015a lsls r2, r3, #5
8007f34: 68fb ldr r3, [r7, #12]
8007f36: 4413 add r3, r2
8007f38: f503 6310 add.w r3, r3, #2304 @ 0x900
8007f3c: 681b ldr r3, [r3, #0]
8007f3e: 68ba ldr r2, [r7, #8]
8007f40: 0151 lsls r1, r2, #5
8007f42: 68fa ldr r2, [r7, #12]
8007f44: 440a add r2, r1
8007f46: f502 6210 add.w r2, r2, #2304 @ 0x900
8007f4a: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000
8007f4e: 6013 str r3, [r2, #0]
USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_EPDIS;
8007f50: 68bb ldr r3, [r7, #8]
8007f52: 015a lsls r2, r3, #5
8007f54: 68fb ldr r3, [r7, #12]
8007f56: 4413 add r3, r2
8007f58: f503 6310 add.w r3, r3, #2304 @ 0x900
8007f5c: 681b ldr r3, [r3, #0]
8007f5e: 68ba ldr r2, [r7, #8]
8007f60: 0151 lsls r1, r2, #5
8007f62: 68fa ldr r2, [r7, #12]
8007f64: 440a add r2, r1
8007f66: f502 6210 add.w r2, r2, #2304 @ 0x900
8007f6a: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000
8007f6e: 6013 str r3, [r2, #0]
}
USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep->num & EP_ADDR_MSK)));
8007f70: 68fb ldr r3, [r7, #12]
8007f72: f503 6300 add.w r3, r3, #2048 @ 0x800
8007f76: 6bda ldr r2, [r3, #60] @ 0x3c
8007f78: 683b ldr r3, [r7, #0]
8007f7a: 781b ldrb r3, [r3, #0]
8007f7c: f003 030f and.w r3, r3, #15
8007f80: 2101 movs r1, #1
8007f82: fa01 f303 lsl.w r3, r1, r3
8007f86: b29b uxth r3, r3
8007f88: 43db mvns r3, r3
8007f8a: 68f9 ldr r1, [r7, #12]
8007f8c: f501 6100 add.w r1, r1, #2048 @ 0x800
8007f90: 4013 ands r3, r2
8007f92: 63cb str r3, [r1, #60] @ 0x3c
USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep->num & EP_ADDR_MSK)));
8007f94: 68fb ldr r3, [r7, #12]
8007f96: f503 6300 add.w r3, r3, #2048 @ 0x800
8007f9a: 69da ldr r2, [r3, #28]
8007f9c: 683b ldr r3, [r7, #0]
8007f9e: 781b ldrb r3, [r3, #0]
8007fa0: f003 030f and.w r3, r3, #15
8007fa4: 2101 movs r1, #1
8007fa6: fa01 f303 lsl.w r3, r1, r3
8007faa: b29b uxth r3, r3
8007fac: 43db mvns r3, r3
8007fae: 68f9 ldr r1, [r7, #12]
8007fb0: f501 6100 add.w r1, r1, #2048 @ 0x800
8007fb4: 4013 ands r3, r2
8007fb6: 61cb str r3, [r1, #28]
USBx_INEP(epnum)->DIEPCTL &= ~(USB_OTG_DIEPCTL_USBAEP |
8007fb8: 68bb ldr r3, [r7, #8]
8007fba: 015a lsls r2, r3, #5
8007fbc: 68fb ldr r3, [r7, #12]
8007fbe: 4413 add r3, r2
8007fc0: f503 6310 add.w r3, r3, #2304 @ 0x900
8007fc4: 681a ldr r2, [r3, #0]
8007fc6: 68bb ldr r3, [r7, #8]
8007fc8: 0159 lsls r1, r3, #5
8007fca: 68fb ldr r3, [r7, #12]
8007fcc: 440b add r3, r1
8007fce: f503 6310 add.w r3, r3, #2304 @ 0x900
8007fd2: 4619 mov r1, r3
8007fd4: 4b35 ldr r3, [pc, #212] @ (80080ac <USB_DeactivateEndpoint+0x1b0>)
8007fd6: 4013 ands r3, r2
8007fd8: 600b str r3, [r1, #0]
8007fda: e060 b.n 800809e <USB_DeactivateEndpoint+0x1a2>
USB_OTG_DIEPCTL_SD0PID_SEVNFRM |
USB_OTG_DIEPCTL_EPTYP);
}
else
{
if ((USBx_OUTEP(epnum)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
8007fdc: 68bb ldr r3, [r7, #8]
8007fde: 015a lsls r2, r3, #5
8007fe0: 68fb ldr r3, [r7, #12]
8007fe2: 4413 add r3, r2
8007fe4: f503 6330 add.w r3, r3, #2816 @ 0xb00
8007fe8: 681b ldr r3, [r3, #0]
8007fea: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8007fee: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
8007ff2: d11f bne.n 8008034 <USB_DeactivateEndpoint+0x138>
{
USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK;
8007ff4: 68bb ldr r3, [r7, #8]
8007ff6: 015a lsls r2, r3, #5
8007ff8: 68fb ldr r3, [r7, #12]
8007ffa: 4413 add r3, r2
8007ffc: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008000: 681b ldr r3, [r3, #0]
8008002: 68ba ldr r2, [r7, #8]
8008004: 0151 lsls r1, r2, #5
8008006: 68fa ldr r2, [r7, #12]
8008008: 440a add r2, r1
800800a: f502 6230 add.w r2, r2, #2816 @ 0xb00
800800e: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000
8008012: 6013 str r3, [r2, #0]
USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_EPDIS;
8008014: 68bb ldr r3, [r7, #8]
8008016: 015a lsls r2, r3, #5
8008018: 68fb ldr r3, [r7, #12]
800801a: 4413 add r3, r2
800801c: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008020: 681b ldr r3, [r3, #0]
8008022: 68ba ldr r2, [r7, #8]
8008024: 0151 lsls r1, r2, #5
8008026: 68fa ldr r2, [r7, #12]
8008028: 440a add r2, r1
800802a: f502 6230 add.w r2, r2, #2816 @ 0xb00
800802e: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000
8008032: 6013 str r3, [r2, #0]
}
USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep->num & EP_ADDR_MSK)) << 16));
8008034: 68fb ldr r3, [r7, #12]
8008036: f503 6300 add.w r3, r3, #2048 @ 0x800
800803a: 6bda ldr r2, [r3, #60] @ 0x3c
800803c: 683b ldr r3, [r7, #0]
800803e: 781b ldrb r3, [r3, #0]
8008040: f003 030f and.w r3, r3, #15
8008044: 2101 movs r1, #1
8008046: fa01 f303 lsl.w r3, r1, r3
800804a: 041b lsls r3, r3, #16
800804c: 43db mvns r3, r3
800804e: 68f9 ldr r1, [r7, #12]
8008050: f501 6100 add.w r1, r1, #2048 @ 0x800
8008054: 4013 ands r3, r2
8008056: 63cb str r3, [r1, #60] @ 0x3c
USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep->num & EP_ADDR_MSK)) << 16));
8008058: 68fb ldr r3, [r7, #12]
800805a: f503 6300 add.w r3, r3, #2048 @ 0x800
800805e: 69da ldr r2, [r3, #28]
8008060: 683b ldr r3, [r7, #0]
8008062: 781b ldrb r3, [r3, #0]
8008064: f003 030f and.w r3, r3, #15
8008068: 2101 movs r1, #1
800806a: fa01 f303 lsl.w r3, r1, r3
800806e: 041b lsls r3, r3, #16
8008070: 43db mvns r3, r3
8008072: 68f9 ldr r1, [r7, #12]
8008074: f501 6100 add.w r1, r1, #2048 @ 0x800
8008078: 4013 ands r3, r2
800807a: 61cb str r3, [r1, #28]
USBx_OUTEP(epnum)->DOEPCTL &= ~(USB_OTG_DOEPCTL_USBAEP |
800807c: 68bb ldr r3, [r7, #8]
800807e: 015a lsls r2, r3, #5
8008080: 68fb ldr r3, [r7, #12]
8008082: 4413 add r3, r2
8008084: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008088: 681a ldr r2, [r3, #0]
800808a: 68bb ldr r3, [r7, #8]
800808c: 0159 lsls r1, r3, #5
800808e: 68fb ldr r3, [r7, #12]
8008090: 440b add r3, r1
8008092: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008096: 4619 mov r1, r3
8008098: 4b05 ldr r3, [pc, #20] @ (80080b0 <USB_DeactivateEndpoint+0x1b4>)
800809a: 4013 ands r3, r2
800809c: 600b str r3, [r1, #0]
USB_OTG_DOEPCTL_MPSIZ |
USB_OTG_DOEPCTL_SD0PID_SEVNFRM |
USB_OTG_DOEPCTL_EPTYP);
}
return HAL_OK;
800809e: 2300 movs r3, #0
}
80080a0: 4618 mov r0, r3
80080a2: 3714 adds r7, #20
80080a4: 46bd mov sp, r7
80080a6: f85d 7b04 ldr.w r7, [sp], #4
80080aa: 4770 bx lr
80080ac: ec337800 .word 0xec337800
80080b0: eff37800 .word 0xeff37800
080080b4 <USB_EPStartXfer>:
* 0 : DMA feature not used
* 1 : DMA feature used
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep, uint8_t dma)
{
80080b4: b580 push {r7, lr}
80080b6: b08a sub sp, #40 @ 0x28
80080b8: af02 add r7, sp, #8
80080ba: 60f8 str r0, [r7, #12]
80080bc: 60b9 str r1, [r7, #8]
80080be: 4613 mov r3, r2
80080c0: 71fb strb r3, [r7, #7]
uint32_t USBx_BASE = (uint32_t)USBx;
80080c2: 68fb ldr r3, [r7, #12]
80080c4: 61fb str r3, [r7, #28]
uint32_t epnum = (uint32_t)ep->num;
80080c6: 68bb ldr r3, [r7, #8]
80080c8: 781b ldrb r3, [r3, #0]
80080ca: 61bb str r3, [r7, #24]
uint16_t pktcnt;
/* IN endpoint */
if (ep->is_in == 1U)
80080cc: 68bb ldr r3, [r7, #8]
80080ce: 785b ldrb r3, [r3, #1]
80080d0: 2b01 cmp r3, #1
80080d2: f040 817f bne.w 80083d4 <USB_EPStartXfer+0x320>
{
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
80080d6: 68bb ldr r3, [r7, #8]
80080d8: 691b ldr r3, [r3, #16]
80080da: 2b00 cmp r3, #0
80080dc: d132 bne.n 8008144 <USB_EPStartXfer+0x90>
{
USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
80080de: 69bb ldr r3, [r7, #24]
80080e0: 015a lsls r2, r3, #5
80080e2: 69fb ldr r3, [r7, #28]
80080e4: 4413 add r3, r2
80080e6: f503 6310 add.w r3, r3, #2304 @ 0x900
80080ea: 691b ldr r3, [r3, #16]
80080ec: 69ba ldr r2, [r7, #24]
80080ee: 0151 lsls r1, r2, #5
80080f0: 69fa ldr r2, [r7, #28]
80080f2: 440a add r2, r1
80080f4: f502 6210 add.w r2, r2, #2304 @ 0x900
80080f8: f023 53ff bic.w r3, r3, #534773760 @ 0x1fe00000
80080fc: f423 13c0 bic.w r3, r3, #1572864 @ 0x180000
8008100: 6113 str r3, [r2, #16]
USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1U << 19));
8008102: 69bb ldr r3, [r7, #24]
8008104: 015a lsls r2, r3, #5
8008106: 69fb ldr r3, [r7, #28]
8008108: 4413 add r3, r2
800810a: f503 6310 add.w r3, r3, #2304 @ 0x900
800810e: 691b ldr r3, [r3, #16]
8008110: 69ba ldr r2, [r7, #24]
8008112: 0151 lsls r1, r2, #5
8008114: 69fa ldr r2, [r7, #28]
8008116: 440a add r2, r1
8008118: f502 6210 add.w r2, r2, #2304 @ 0x900
800811c: f443 2300 orr.w r3, r3, #524288 @ 0x80000
8008120: 6113 str r3, [r2, #16]
USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
8008122: 69bb ldr r3, [r7, #24]
8008124: 015a lsls r2, r3, #5
8008126: 69fb ldr r3, [r7, #28]
8008128: 4413 add r3, r2
800812a: f503 6310 add.w r3, r3, #2304 @ 0x900
800812e: 691b ldr r3, [r3, #16]
8008130: 69ba ldr r2, [r7, #24]
8008132: 0151 lsls r1, r2, #5
8008134: 69fa ldr r2, [r7, #28]
8008136: 440a add r2, r1
8008138: f502 6210 add.w r2, r2, #2304 @ 0x900
800813c: 0cdb lsrs r3, r3, #19
800813e: 04db lsls r3, r3, #19
8008140: 6113 str r3, [r2, #16]
8008142: e097 b.n 8008274 <USB_EPStartXfer+0x1c0>
/* Program the transfer size and packet count
* as follows: xfersize = N * maxpacket +
* short_packet pktcnt = N + (short_packet
* exist ? 1 : 0)
*/
USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
8008144: 69bb ldr r3, [r7, #24]
8008146: 015a lsls r2, r3, #5
8008148: 69fb ldr r3, [r7, #28]
800814a: 4413 add r3, r2
800814c: f503 6310 add.w r3, r3, #2304 @ 0x900
8008150: 691b ldr r3, [r3, #16]
8008152: 69ba ldr r2, [r7, #24]
8008154: 0151 lsls r1, r2, #5
8008156: 69fa ldr r2, [r7, #28]
8008158: 440a add r2, r1
800815a: f502 6210 add.w r2, r2, #2304 @ 0x900
800815e: 0cdb lsrs r3, r3, #19
8008160: 04db lsls r3, r3, #19
8008162: 6113 str r3, [r2, #16]
USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
8008164: 69bb ldr r3, [r7, #24]
8008166: 015a lsls r2, r3, #5
8008168: 69fb ldr r3, [r7, #28]
800816a: 4413 add r3, r2
800816c: f503 6310 add.w r3, r3, #2304 @ 0x900
8008170: 691b ldr r3, [r3, #16]
8008172: 69ba ldr r2, [r7, #24]
8008174: 0151 lsls r1, r2, #5
8008176: 69fa ldr r2, [r7, #28]
8008178: 440a add r2, r1
800817a: f502 6210 add.w r2, r2, #2304 @ 0x900
800817e: f023 53ff bic.w r3, r3, #534773760 @ 0x1fe00000
8008182: f423 13c0 bic.w r3, r3, #1572864 @ 0x180000
8008186: 6113 str r3, [r2, #16]
if (epnum == 0U)
8008188: 69bb ldr r3, [r7, #24]
800818a: 2b00 cmp r3, #0
800818c: d11a bne.n 80081c4 <USB_EPStartXfer+0x110>
{
if (ep->xfer_len > ep->maxpacket)
800818e: 68bb ldr r3, [r7, #8]
8008190: 691a ldr r2, [r3, #16]
8008192: 68bb ldr r3, [r7, #8]
8008194: 689b ldr r3, [r3, #8]
8008196: 429a cmp r2, r3
8008198: d903 bls.n 80081a2 <USB_EPStartXfer+0xee>
{
ep->xfer_len = ep->maxpacket;
800819a: 68bb ldr r3, [r7, #8]
800819c: 689a ldr r2, [r3, #8]
800819e: 68bb ldr r3, [r7, #8]
80081a0: 611a str r2, [r3, #16]
}
USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1U << 19));
80081a2: 69bb ldr r3, [r7, #24]
80081a4: 015a lsls r2, r3, #5
80081a6: 69fb ldr r3, [r7, #28]
80081a8: 4413 add r3, r2
80081aa: f503 6310 add.w r3, r3, #2304 @ 0x900
80081ae: 691b ldr r3, [r3, #16]
80081b0: 69ba ldr r2, [r7, #24]
80081b2: 0151 lsls r1, r2, #5
80081b4: 69fa ldr r2, [r7, #28]
80081b6: 440a add r2, r1
80081b8: f502 6210 add.w r2, r2, #2304 @ 0x900
80081bc: f443 2300 orr.w r3, r3, #524288 @ 0x80000
80081c0: 6113 str r3, [r2, #16]
80081c2: e044 b.n 800824e <USB_EPStartXfer+0x19a>
}
else
{
pktcnt = (uint16_t)((ep->xfer_len + ep->maxpacket - 1U) / ep->maxpacket);
80081c4: 68bb ldr r3, [r7, #8]
80081c6: 691a ldr r2, [r3, #16]
80081c8: 68bb ldr r3, [r7, #8]
80081ca: 689b ldr r3, [r3, #8]
80081cc: 4413 add r3, r2
80081ce: 1e5a subs r2, r3, #1
80081d0: 68bb ldr r3, [r7, #8]
80081d2: 689b ldr r3, [r3, #8]
80081d4: fbb2 f3f3 udiv r3, r2, r3
80081d8: 82fb strh r3, [r7, #22]
USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (pktcnt << 19));
80081da: 69bb ldr r3, [r7, #24]
80081dc: 015a lsls r2, r3, #5
80081de: 69fb ldr r3, [r7, #28]
80081e0: 4413 add r3, r2
80081e2: f503 6310 add.w r3, r3, #2304 @ 0x900
80081e6: 691a ldr r2, [r3, #16]
80081e8: 8afb ldrh r3, [r7, #22]
80081ea: 04d9 lsls r1, r3, #19
80081ec: 4ba4 ldr r3, [pc, #656] @ (8008480 <USB_EPStartXfer+0x3cc>)
80081ee: 400b ands r3, r1
80081f0: 69b9 ldr r1, [r7, #24]
80081f2: 0148 lsls r0, r1, #5
80081f4: 69f9 ldr r1, [r7, #28]
80081f6: 4401 add r1, r0
80081f8: f501 6110 add.w r1, r1, #2304 @ 0x900
80081fc: 4313 orrs r3, r2
80081fe: 610b str r3, [r1, #16]
if (ep->type == EP_TYPE_ISOC)
8008200: 68bb ldr r3, [r7, #8]
8008202: 791b ldrb r3, [r3, #4]
8008204: 2b01 cmp r3, #1
8008206: d122 bne.n 800824e <USB_EPStartXfer+0x19a>
{
USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT);
8008208: 69bb ldr r3, [r7, #24]
800820a: 015a lsls r2, r3, #5
800820c: 69fb ldr r3, [r7, #28]
800820e: 4413 add r3, r2
8008210: f503 6310 add.w r3, r3, #2304 @ 0x900
8008214: 691b ldr r3, [r3, #16]
8008216: 69ba ldr r2, [r7, #24]
8008218: 0151 lsls r1, r2, #5
800821a: 69fa ldr r2, [r7, #28]
800821c: 440a add r2, r1
800821e: f502 6210 add.w r2, r2, #2304 @ 0x900
8008222: f023 43c0 bic.w r3, r3, #1610612736 @ 0x60000000
8008226: 6113 str r3, [r2, #16]
USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_MULCNT & (pktcnt << 29));
8008228: 69bb ldr r3, [r7, #24]
800822a: 015a lsls r2, r3, #5
800822c: 69fb ldr r3, [r7, #28]
800822e: 4413 add r3, r2
8008230: f503 6310 add.w r3, r3, #2304 @ 0x900
8008234: 691a ldr r2, [r3, #16]
8008236: 8afb ldrh r3, [r7, #22]
8008238: 075b lsls r3, r3, #29
800823a: f003 43c0 and.w r3, r3, #1610612736 @ 0x60000000
800823e: 69b9 ldr r1, [r7, #24]
8008240: 0148 lsls r0, r1, #5
8008242: 69f9 ldr r1, [r7, #28]
8008244: 4401 add r1, r0
8008246: f501 6110 add.w r1, r1, #2304 @ 0x900
800824a: 4313 orrs r3, r2
800824c: 610b str r3, [r1, #16]
}
}
USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
800824e: 69bb ldr r3, [r7, #24]
8008250: 015a lsls r2, r3, #5
8008252: 69fb ldr r3, [r7, #28]
8008254: 4413 add r3, r2
8008256: f503 6310 add.w r3, r3, #2304 @ 0x900
800825a: 691a ldr r2, [r3, #16]
800825c: 68bb ldr r3, [r7, #8]
800825e: 691b ldr r3, [r3, #16]
8008260: f3c3 0312 ubfx r3, r3, #0, #19
8008264: 69b9 ldr r1, [r7, #24]
8008266: 0148 lsls r0, r1, #5
8008268: 69f9 ldr r1, [r7, #28]
800826a: 4401 add r1, r0
800826c: f501 6110 add.w r1, r1, #2304 @ 0x900
8008270: 4313 orrs r3, r2
8008272: 610b str r3, [r1, #16]
}
if (dma == 1U)
8008274: 79fb ldrb r3, [r7, #7]
8008276: 2b01 cmp r3, #1
8008278: d14b bne.n 8008312 <USB_EPStartXfer+0x25e>
{
if ((uint32_t)ep->dma_addr != 0U)
800827a: 68bb ldr r3, [r7, #8]
800827c: 69db ldr r3, [r3, #28]
800827e: 2b00 cmp r3, #0
8008280: d009 beq.n 8008296 <USB_EPStartXfer+0x1e2>
{
USBx_INEP(epnum)->DIEPDMA = (uint32_t)(ep->dma_addr);
8008282: 69bb ldr r3, [r7, #24]
8008284: 015a lsls r2, r3, #5
8008286: 69fb ldr r3, [r7, #28]
8008288: 4413 add r3, r2
800828a: f503 6310 add.w r3, r3, #2304 @ 0x900
800828e: 461a mov r2, r3
8008290: 68bb ldr r3, [r7, #8]
8008292: 69db ldr r3, [r3, #28]
8008294: 6153 str r3, [r2, #20]
}
if (ep->type == EP_TYPE_ISOC)
8008296: 68bb ldr r3, [r7, #8]
8008298: 791b ldrb r3, [r3, #4]
800829a: 2b01 cmp r3, #1
800829c: d128 bne.n 80082f0 <USB_EPStartXfer+0x23c>
{
if ((USBx_DEVICE->DSTS & (1U << 8)) == 0U)
800829e: 69fb ldr r3, [r7, #28]
80082a0: f503 6300 add.w r3, r3, #2048 @ 0x800
80082a4: 689b ldr r3, [r3, #8]
80082a6: f403 7380 and.w r3, r3, #256 @ 0x100
80082aa: 2b00 cmp r3, #0
80082ac: d110 bne.n 80082d0 <USB_EPStartXfer+0x21c>
{
USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SODDFRM;
80082ae: 69bb ldr r3, [r7, #24]
80082b0: 015a lsls r2, r3, #5
80082b2: 69fb ldr r3, [r7, #28]
80082b4: 4413 add r3, r2
80082b6: f503 6310 add.w r3, r3, #2304 @ 0x900
80082ba: 681b ldr r3, [r3, #0]
80082bc: 69ba ldr r2, [r7, #24]
80082be: 0151 lsls r1, r2, #5
80082c0: 69fa ldr r2, [r7, #28]
80082c2: 440a add r2, r1
80082c4: f502 6210 add.w r2, r2, #2304 @ 0x900
80082c8: f043 5300 orr.w r3, r3, #536870912 @ 0x20000000
80082cc: 6013 str r3, [r2, #0]
80082ce: e00f b.n 80082f0 <USB_EPStartXfer+0x23c>
}
else
{
USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM;
80082d0: 69bb ldr r3, [r7, #24]
80082d2: 015a lsls r2, r3, #5
80082d4: 69fb ldr r3, [r7, #28]
80082d6: 4413 add r3, r2
80082d8: f503 6310 add.w r3, r3, #2304 @ 0x900
80082dc: 681b ldr r3, [r3, #0]
80082de: 69ba ldr r2, [r7, #24]
80082e0: 0151 lsls r1, r2, #5
80082e2: 69fa ldr r2, [r7, #28]
80082e4: 440a add r2, r1
80082e6: f502 6210 add.w r2, r2, #2304 @ 0x900
80082ea: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80082ee: 6013 str r3, [r2, #0]
}
}
/* EP enable, IN data in FIFO */
USBx_INEP(epnum)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
80082f0: 69bb ldr r3, [r7, #24]
80082f2: 015a lsls r2, r3, #5
80082f4: 69fb ldr r3, [r7, #28]
80082f6: 4413 add r3, r2
80082f8: f503 6310 add.w r3, r3, #2304 @ 0x900
80082fc: 681b ldr r3, [r3, #0]
80082fe: 69ba ldr r2, [r7, #24]
8008300: 0151 lsls r1, r2, #5
8008302: 69fa ldr r2, [r7, #28]
8008304: 440a add r2, r1
8008306: f502 6210 add.w r2, r2, #2304 @ 0x900
800830a: f043 4304 orr.w r3, r3, #2214592512 @ 0x84000000
800830e: 6013 str r3, [r2, #0]
8008310: e166 b.n 80085e0 <USB_EPStartXfer+0x52c>
}
else
{
/* EP enable, IN data in FIFO */
USBx_INEP(epnum)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
8008312: 69bb ldr r3, [r7, #24]
8008314: 015a lsls r2, r3, #5
8008316: 69fb ldr r3, [r7, #28]
8008318: 4413 add r3, r2
800831a: f503 6310 add.w r3, r3, #2304 @ 0x900
800831e: 681b ldr r3, [r3, #0]
8008320: 69ba ldr r2, [r7, #24]
8008322: 0151 lsls r1, r2, #5
8008324: 69fa ldr r2, [r7, #28]
8008326: 440a add r2, r1
8008328: f502 6210 add.w r2, r2, #2304 @ 0x900
800832c: f043 4304 orr.w r3, r3, #2214592512 @ 0x84000000
8008330: 6013 str r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8008332: 68bb ldr r3, [r7, #8]
8008334: 791b ldrb r3, [r3, #4]
8008336: 2b01 cmp r3, #1
8008338: d015 beq.n 8008366 <USB_EPStartXfer+0x2b2>
{
/* Enable the Tx FIFO Empty Interrupt for this EP */
if (ep->xfer_len > 0U)
800833a: 68bb ldr r3, [r7, #8]
800833c: 691b ldr r3, [r3, #16]
800833e: 2b00 cmp r3, #0
8008340: f000 814e beq.w 80085e0 <USB_EPStartXfer+0x52c>
{
USBx_DEVICE->DIEPEMPMSK |= 1UL << (ep->num & EP_ADDR_MSK);
8008344: 69fb ldr r3, [r7, #28]
8008346: f503 6300 add.w r3, r3, #2048 @ 0x800
800834a: 6b5a ldr r2, [r3, #52] @ 0x34
800834c: 68bb ldr r3, [r7, #8]
800834e: 781b ldrb r3, [r3, #0]
8008350: f003 030f and.w r3, r3, #15
8008354: 2101 movs r1, #1
8008356: fa01 f303 lsl.w r3, r1, r3
800835a: 69f9 ldr r1, [r7, #28]
800835c: f501 6100 add.w r1, r1, #2048 @ 0x800
8008360: 4313 orrs r3, r2
8008362: 634b str r3, [r1, #52] @ 0x34
8008364: e13c b.n 80085e0 <USB_EPStartXfer+0x52c>
}
}
else
{
if ((USBx_DEVICE->DSTS & (1U << 8)) == 0U)
8008366: 69fb ldr r3, [r7, #28]
8008368: f503 6300 add.w r3, r3, #2048 @ 0x800
800836c: 689b ldr r3, [r3, #8]
800836e: f403 7380 and.w r3, r3, #256 @ 0x100
8008372: 2b00 cmp r3, #0
8008374: d110 bne.n 8008398 <USB_EPStartXfer+0x2e4>
{
USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SODDFRM;
8008376: 69bb ldr r3, [r7, #24]
8008378: 015a lsls r2, r3, #5
800837a: 69fb ldr r3, [r7, #28]
800837c: 4413 add r3, r2
800837e: f503 6310 add.w r3, r3, #2304 @ 0x900
8008382: 681b ldr r3, [r3, #0]
8008384: 69ba ldr r2, [r7, #24]
8008386: 0151 lsls r1, r2, #5
8008388: 69fa ldr r2, [r7, #28]
800838a: 440a add r2, r1
800838c: f502 6210 add.w r2, r2, #2304 @ 0x900
8008390: f043 5300 orr.w r3, r3, #536870912 @ 0x20000000
8008394: 6013 str r3, [r2, #0]
8008396: e00f b.n 80083b8 <USB_EPStartXfer+0x304>
}
else
{
USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM;
8008398: 69bb ldr r3, [r7, #24]
800839a: 015a lsls r2, r3, #5
800839c: 69fb ldr r3, [r7, #28]
800839e: 4413 add r3, r2
80083a0: f503 6310 add.w r3, r3, #2304 @ 0x900
80083a4: 681b ldr r3, [r3, #0]
80083a6: 69ba ldr r2, [r7, #24]
80083a8: 0151 lsls r1, r2, #5
80083aa: 69fa ldr r2, [r7, #28]
80083ac: 440a add r2, r1
80083ae: f502 6210 add.w r2, r2, #2304 @ 0x900
80083b2: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80083b6: 6013 str r3, [r2, #0]
}
(void)USB_WritePacket(USBx, ep->xfer_buff, ep->num, (uint16_t)ep->xfer_len, dma);
80083b8: 68bb ldr r3, [r7, #8]
80083ba: 68d9 ldr r1, [r3, #12]
80083bc: 68bb ldr r3, [r7, #8]
80083be: 781a ldrb r2, [r3, #0]
80083c0: 68bb ldr r3, [r7, #8]
80083c2: 691b ldr r3, [r3, #16]
80083c4: b298 uxth r0, r3
80083c6: 79fb ldrb r3, [r7, #7]
80083c8: 9300 str r3, [sp, #0]
80083ca: 4603 mov r3, r0
80083cc: 68f8 ldr r0, [r7, #12]
80083ce: f000 f9b9 bl 8008744 <USB_WritePacket>
80083d2: e105 b.n 80085e0 <USB_EPStartXfer+0x52c>
{
/* Program the transfer size and packet count as follows:
* pktcnt = N
* xfersize = N * maxpacket
*/
USBx_OUTEP(epnum)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
80083d4: 69bb ldr r3, [r7, #24]
80083d6: 015a lsls r2, r3, #5
80083d8: 69fb ldr r3, [r7, #28]
80083da: 4413 add r3, r2
80083dc: f503 6330 add.w r3, r3, #2816 @ 0xb00
80083e0: 691b ldr r3, [r3, #16]
80083e2: 69ba ldr r2, [r7, #24]
80083e4: 0151 lsls r1, r2, #5
80083e6: 69fa ldr r2, [r7, #28]
80083e8: 440a add r2, r1
80083ea: f502 6230 add.w r2, r2, #2816 @ 0xb00
80083ee: 0cdb lsrs r3, r3, #19
80083f0: 04db lsls r3, r3, #19
80083f2: 6113 str r3, [r2, #16]
USBx_OUTEP(epnum)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
80083f4: 69bb ldr r3, [r7, #24]
80083f6: 015a lsls r2, r3, #5
80083f8: 69fb ldr r3, [r7, #28]
80083fa: 4413 add r3, r2
80083fc: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008400: 691b ldr r3, [r3, #16]
8008402: 69ba ldr r2, [r7, #24]
8008404: 0151 lsls r1, r2, #5
8008406: 69fa ldr r2, [r7, #28]
8008408: 440a add r2, r1
800840a: f502 6230 add.w r2, r2, #2816 @ 0xb00
800840e: f023 53ff bic.w r3, r3, #534773760 @ 0x1fe00000
8008412: f423 13c0 bic.w r3, r3, #1572864 @ 0x180000
8008416: 6113 str r3, [r2, #16]
if (epnum == 0U)
8008418: 69bb ldr r3, [r7, #24]
800841a: 2b00 cmp r3, #0
800841c: d132 bne.n 8008484 <USB_EPStartXfer+0x3d0>
{
if (ep->xfer_len > 0U)
800841e: 68bb ldr r3, [r7, #8]
8008420: 691b ldr r3, [r3, #16]
8008422: 2b00 cmp r3, #0
8008424: d003 beq.n 800842e <USB_EPStartXfer+0x37a>
{
ep->xfer_len = ep->maxpacket;
8008426: 68bb ldr r3, [r7, #8]
8008428: 689a ldr r2, [r3, #8]
800842a: 68bb ldr r3, [r7, #8]
800842c: 611a str r2, [r3, #16]
}
/* Store transfer size, for EP0 this is equal to endpoint max packet size */
ep->xfer_size = ep->maxpacket;
800842e: 68bb ldr r3, [r7, #8]
8008430: 689a ldr r2, [r3, #8]
8008432: 68bb ldr r3, [r7, #8]
8008434: 621a str r2, [r3, #32]
USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->xfer_size);
8008436: 69bb ldr r3, [r7, #24]
8008438: 015a lsls r2, r3, #5
800843a: 69fb ldr r3, [r7, #28]
800843c: 4413 add r3, r2
800843e: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008442: 691a ldr r2, [r3, #16]
8008444: 68bb ldr r3, [r7, #8]
8008446: 6a1b ldr r3, [r3, #32]
8008448: f3c3 0312 ubfx r3, r3, #0, #19
800844c: 69b9 ldr r1, [r7, #24]
800844e: 0148 lsls r0, r1, #5
8008450: 69f9 ldr r1, [r7, #28]
8008452: 4401 add r1, r0
8008454: f501 6130 add.w r1, r1, #2816 @ 0xb00
8008458: 4313 orrs r3, r2
800845a: 610b str r3, [r1, #16]
USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19));
800845c: 69bb ldr r3, [r7, #24]
800845e: 015a lsls r2, r3, #5
8008460: 69fb ldr r3, [r7, #28]
8008462: 4413 add r3, r2
8008464: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008468: 691b ldr r3, [r3, #16]
800846a: 69ba ldr r2, [r7, #24]
800846c: 0151 lsls r1, r2, #5
800846e: 69fa ldr r2, [r7, #28]
8008470: 440a add r2, r1
8008472: f502 6230 add.w r2, r2, #2816 @ 0xb00
8008476: f443 2300 orr.w r3, r3, #524288 @ 0x80000
800847a: 6113 str r3, [r2, #16]
800847c: e062 b.n 8008544 <USB_EPStartXfer+0x490>
800847e: bf00 nop
8008480: 1ff80000 .word 0x1ff80000
}
else
{
if (ep->xfer_len == 0U)
8008484: 68bb ldr r3, [r7, #8]
8008486: 691b ldr r3, [r3, #16]
8008488: 2b00 cmp r3, #0
800848a: d123 bne.n 80084d4 <USB_EPStartXfer+0x420>
{
USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->maxpacket);
800848c: 69bb ldr r3, [r7, #24]
800848e: 015a lsls r2, r3, #5
8008490: 69fb ldr r3, [r7, #28]
8008492: 4413 add r3, r2
8008494: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008498: 691a ldr r2, [r3, #16]
800849a: 68bb ldr r3, [r7, #8]
800849c: 689b ldr r3, [r3, #8]
800849e: f3c3 0312 ubfx r3, r3, #0, #19
80084a2: 69b9 ldr r1, [r7, #24]
80084a4: 0148 lsls r0, r1, #5
80084a6: 69f9 ldr r1, [r7, #28]
80084a8: 4401 add r1, r0
80084aa: f501 6130 add.w r1, r1, #2816 @ 0xb00
80084ae: 4313 orrs r3, r2
80084b0: 610b str r3, [r1, #16]
USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19));
80084b2: 69bb ldr r3, [r7, #24]
80084b4: 015a lsls r2, r3, #5
80084b6: 69fb ldr r3, [r7, #28]
80084b8: 4413 add r3, r2
80084ba: f503 6330 add.w r3, r3, #2816 @ 0xb00
80084be: 691b ldr r3, [r3, #16]
80084c0: 69ba ldr r2, [r7, #24]
80084c2: 0151 lsls r1, r2, #5
80084c4: 69fa ldr r2, [r7, #28]
80084c6: 440a add r2, r1
80084c8: f502 6230 add.w r2, r2, #2816 @ 0xb00
80084cc: f443 2300 orr.w r3, r3, #524288 @ 0x80000
80084d0: 6113 str r3, [r2, #16]
80084d2: e037 b.n 8008544 <USB_EPStartXfer+0x490>
}
else
{
pktcnt = (uint16_t)((ep->xfer_len + ep->maxpacket - 1U) / ep->maxpacket);
80084d4: 68bb ldr r3, [r7, #8]
80084d6: 691a ldr r2, [r3, #16]
80084d8: 68bb ldr r3, [r7, #8]
80084da: 689b ldr r3, [r3, #8]
80084dc: 4413 add r3, r2
80084de: 1e5a subs r2, r3, #1
80084e0: 68bb ldr r3, [r7, #8]
80084e2: 689b ldr r3, [r3, #8]
80084e4: fbb2 f3f3 udiv r3, r2, r3
80084e8: 82fb strh r3, [r7, #22]
ep->xfer_size = ep->maxpacket * pktcnt;
80084ea: 68bb ldr r3, [r7, #8]
80084ec: 689b ldr r3, [r3, #8]
80084ee: 8afa ldrh r2, [r7, #22]
80084f0: fb03 f202 mul.w r2, r3, r2
80084f4: 68bb ldr r3, [r7, #8]
80084f6: 621a str r2, [r3, #32]
USBx_OUTEP(epnum)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_PKTCNT & ((uint32_t)pktcnt << 19);
80084f8: 69bb ldr r3, [r7, #24]
80084fa: 015a lsls r2, r3, #5
80084fc: 69fb ldr r3, [r7, #28]
80084fe: 4413 add r3, r2
8008500: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008504: 691a ldr r2, [r3, #16]
8008506: 8afb ldrh r3, [r7, #22]
8008508: 04d9 lsls r1, r3, #19
800850a: 4b38 ldr r3, [pc, #224] @ (80085ec <USB_EPStartXfer+0x538>)
800850c: 400b ands r3, r1
800850e: 69b9 ldr r1, [r7, #24]
8008510: 0148 lsls r0, r1, #5
8008512: 69f9 ldr r1, [r7, #28]
8008514: 4401 add r1, r0
8008516: f501 6130 add.w r1, r1, #2816 @ 0xb00
800851a: 4313 orrs r3, r2
800851c: 610b str r3, [r1, #16]
USBx_OUTEP(epnum)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_XFRSIZ & ep->xfer_size;
800851e: 69bb ldr r3, [r7, #24]
8008520: 015a lsls r2, r3, #5
8008522: 69fb ldr r3, [r7, #28]
8008524: 4413 add r3, r2
8008526: f503 6330 add.w r3, r3, #2816 @ 0xb00
800852a: 691a ldr r2, [r3, #16]
800852c: 68bb ldr r3, [r7, #8]
800852e: 6a1b ldr r3, [r3, #32]
8008530: f3c3 0312 ubfx r3, r3, #0, #19
8008534: 69b9 ldr r1, [r7, #24]
8008536: 0148 lsls r0, r1, #5
8008538: 69f9 ldr r1, [r7, #28]
800853a: 4401 add r1, r0
800853c: f501 6130 add.w r1, r1, #2816 @ 0xb00
8008540: 4313 orrs r3, r2
8008542: 610b str r3, [r1, #16]
}
}
if (dma == 1U)
8008544: 79fb ldrb r3, [r7, #7]
8008546: 2b01 cmp r3, #1
8008548: d10d bne.n 8008566 <USB_EPStartXfer+0x4b2>
{
if ((uint32_t)ep->xfer_buff != 0U)
800854a: 68bb ldr r3, [r7, #8]
800854c: 68db ldr r3, [r3, #12]
800854e: 2b00 cmp r3, #0
8008550: d009 beq.n 8008566 <USB_EPStartXfer+0x4b2>
{
USBx_OUTEP(epnum)->DOEPDMA = (uint32_t)(ep->xfer_buff);
8008552: 68bb ldr r3, [r7, #8]
8008554: 68d9 ldr r1, [r3, #12]
8008556: 69bb ldr r3, [r7, #24]
8008558: 015a lsls r2, r3, #5
800855a: 69fb ldr r3, [r7, #28]
800855c: 4413 add r3, r2
800855e: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008562: 460a mov r2, r1
8008564: 615a str r2, [r3, #20]
}
}
if (ep->type == EP_TYPE_ISOC)
8008566: 68bb ldr r3, [r7, #8]
8008568: 791b ldrb r3, [r3, #4]
800856a: 2b01 cmp r3, #1
800856c: d128 bne.n 80085c0 <USB_EPStartXfer+0x50c>
{
if ((USBx_DEVICE->DSTS & (1U << 8)) == 0U)
800856e: 69fb ldr r3, [r7, #28]
8008570: f503 6300 add.w r3, r3, #2048 @ 0x800
8008574: 689b ldr r3, [r3, #8]
8008576: f403 7380 and.w r3, r3, #256 @ 0x100
800857a: 2b00 cmp r3, #0
800857c: d110 bne.n 80085a0 <USB_EPStartXfer+0x4ec>
{
USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SODDFRM;
800857e: 69bb ldr r3, [r7, #24]
8008580: 015a lsls r2, r3, #5
8008582: 69fb ldr r3, [r7, #28]
8008584: 4413 add r3, r2
8008586: f503 6330 add.w r3, r3, #2816 @ 0xb00
800858a: 681b ldr r3, [r3, #0]
800858c: 69ba ldr r2, [r7, #24]
800858e: 0151 lsls r1, r2, #5
8008590: 69fa ldr r2, [r7, #28]
8008592: 440a add r2, r1
8008594: f502 6230 add.w r2, r2, #2816 @ 0xb00
8008598: f043 5300 orr.w r3, r3, #536870912 @ 0x20000000
800859c: 6013 str r3, [r2, #0]
800859e: e00f b.n 80085c0 <USB_EPStartXfer+0x50c>
}
else
{
USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM;
80085a0: 69bb ldr r3, [r7, #24]
80085a2: 015a lsls r2, r3, #5
80085a4: 69fb ldr r3, [r7, #28]
80085a6: 4413 add r3, r2
80085a8: f503 6330 add.w r3, r3, #2816 @ 0xb00
80085ac: 681b ldr r3, [r3, #0]
80085ae: 69ba ldr r2, [r7, #24]
80085b0: 0151 lsls r1, r2, #5
80085b2: 69fa ldr r2, [r7, #28]
80085b4: 440a add r2, r1
80085b6: f502 6230 add.w r2, r2, #2816 @ 0xb00
80085ba: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80085be: 6013 str r3, [r2, #0]
}
}
/* EP enable */
USBx_OUTEP(epnum)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA);
80085c0: 69bb ldr r3, [r7, #24]
80085c2: 015a lsls r2, r3, #5
80085c4: 69fb ldr r3, [r7, #28]
80085c6: 4413 add r3, r2
80085c8: f503 6330 add.w r3, r3, #2816 @ 0xb00
80085cc: 681b ldr r3, [r3, #0]
80085ce: 69ba ldr r2, [r7, #24]
80085d0: 0151 lsls r1, r2, #5
80085d2: 69fa ldr r2, [r7, #28]
80085d4: 440a add r2, r1
80085d6: f502 6230 add.w r2, r2, #2816 @ 0xb00
80085da: f043 4304 orr.w r3, r3, #2214592512 @ 0x84000000
80085de: 6013 str r3, [r2, #0]
}
return HAL_OK;
80085e0: 2300 movs r3, #0
}
80085e2: 4618 mov r0, r3
80085e4: 3720 adds r7, #32
80085e6: 46bd mov sp, r7
80085e8: bd80 pop {r7, pc}
80085ea: bf00 nop
80085ec: 1ff80000 .word 0x1ff80000
080085f0 <USB_EPStopXfer>:
* @param USBx usb device instance
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStopXfer(const USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
{
80085f0: b480 push {r7}
80085f2: b087 sub sp, #28
80085f4: af00 add r7, sp, #0
80085f6: 6078 str r0, [r7, #4]
80085f8: 6039 str r1, [r7, #0]
__IO uint32_t count = 0U;
80085fa: 2300 movs r3, #0
80085fc: 60fb str r3, [r7, #12]
HAL_StatusTypeDef ret = HAL_OK;
80085fe: 2300 movs r3, #0
8008600: 75fb strb r3, [r7, #23]
uint32_t USBx_BASE = (uint32_t)USBx;
8008602: 687b ldr r3, [r7, #4]
8008604: 613b str r3, [r7, #16]
/* IN endpoint */
if (ep->is_in == 1U)
8008606: 683b ldr r3, [r7, #0]
8008608: 785b ldrb r3, [r3, #1]
800860a: 2b01 cmp r3, #1
800860c: d14a bne.n 80086a4 <USB_EPStopXfer+0xb4>
{
/* EP enable, IN data in FIFO */
if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
800860e: 683b ldr r3, [r7, #0]
8008610: 781b ldrb r3, [r3, #0]
8008612: 015a lsls r2, r3, #5
8008614: 693b ldr r3, [r7, #16]
8008616: 4413 add r3, r2
8008618: f503 6310 add.w r3, r3, #2304 @ 0x900
800861c: 681b ldr r3, [r3, #0]
800861e: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8008622: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
8008626: f040 8086 bne.w 8008736 <USB_EPStopXfer+0x146>
{
USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_SNAK);
800862a: 683b ldr r3, [r7, #0]
800862c: 781b ldrb r3, [r3, #0]
800862e: 015a lsls r2, r3, #5
8008630: 693b ldr r3, [r7, #16]
8008632: 4413 add r3, r2
8008634: f503 6310 add.w r3, r3, #2304 @ 0x900
8008638: 681b ldr r3, [r3, #0]
800863a: 683a ldr r2, [r7, #0]
800863c: 7812 ldrb r2, [r2, #0]
800863e: 0151 lsls r1, r2, #5
8008640: 693a ldr r2, [r7, #16]
8008642: 440a add r2, r1
8008644: f502 6210 add.w r2, r2, #2304 @ 0x900
8008648: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000
800864c: 6013 str r3, [r2, #0]
USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_EPDIS);
800864e: 683b ldr r3, [r7, #0]
8008650: 781b ldrb r3, [r3, #0]
8008652: 015a lsls r2, r3, #5
8008654: 693b ldr r3, [r7, #16]
8008656: 4413 add r3, r2
8008658: f503 6310 add.w r3, r3, #2304 @ 0x900
800865c: 681b ldr r3, [r3, #0]
800865e: 683a ldr r2, [r7, #0]
8008660: 7812 ldrb r2, [r2, #0]
8008662: 0151 lsls r1, r2, #5
8008664: 693a ldr r2, [r7, #16]
8008666: 440a add r2, r1
8008668: f502 6210 add.w r2, r2, #2304 @ 0x900
800866c: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000
8008670: 6013 str r3, [r2, #0]
do
{
count++;
8008672: 68fb ldr r3, [r7, #12]
8008674: 3301 adds r3, #1
8008676: 60fb str r3, [r7, #12]
if (count > 10000U)
8008678: 68fb ldr r3, [r7, #12]
800867a: f242 7210 movw r2, #10000 @ 0x2710
800867e: 4293 cmp r3, r2
8008680: d902 bls.n 8008688 <USB_EPStopXfer+0x98>
{
ret = HAL_ERROR;
8008682: 2301 movs r3, #1
8008684: 75fb strb r3, [r7, #23]
break;
8008686: e056 b.n 8008736 <USB_EPStopXfer+0x146>
}
} while (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA);
8008688: 683b ldr r3, [r7, #0]
800868a: 781b ldrb r3, [r3, #0]
800868c: 015a lsls r2, r3, #5
800868e: 693b ldr r3, [r7, #16]
8008690: 4413 add r3, r2
8008692: f503 6310 add.w r3, r3, #2304 @ 0x900
8008696: 681b ldr r3, [r3, #0]
8008698: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
800869c: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
80086a0: d0e7 beq.n 8008672 <USB_EPStopXfer+0x82>
80086a2: e048 b.n 8008736 <USB_EPStopXfer+0x146>
}
}
else /* OUT endpoint */
{
if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
80086a4: 683b ldr r3, [r7, #0]
80086a6: 781b ldrb r3, [r3, #0]
80086a8: 015a lsls r2, r3, #5
80086aa: 693b ldr r3, [r7, #16]
80086ac: 4413 add r3, r2
80086ae: f503 6330 add.w r3, r3, #2816 @ 0xb00
80086b2: 681b ldr r3, [r3, #0]
80086b4: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
80086b8: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
80086bc: d13b bne.n 8008736 <USB_EPStopXfer+0x146>
{
USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_SNAK);
80086be: 683b ldr r3, [r7, #0]
80086c0: 781b ldrb r3, [r3, #0]
80086c2: 015a lsls r2, r3, #5
80086c4: 693b ldr r3, [r7, #16]
80086c6: 4413 add r3, r2
80086c8: f503 6330 add.w r3, r3, #2816 @ 0xb00
80086cc: 681b ldr r3, [r3, #0]
80086ce: 683a ldr r2, [r7, #0]
80086d0: 7812 ldrb r2, [r2, #0]
80086d2: 0151 lsls r1, r2, #5
80086d4: 693a ldr r2, [r7, #16]
80086d6: 440a add r2, r1
80086d8: f502 6230 add.w r2, r2, #2816 @ 0xb00
80086dc: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000
80086e0: 6013 str r3, [r2, #0]
USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_EPDIS);
80086e2: 683b ldr r3, [r7, #0]
80086e4: 781b ldrb r3, [r3, #0]
80086e6: 015a lsls r2, r3, #5
80086e8: 693b ldr r3, [r7, #16]
80086ea: 4413 add r3, r2
80086ec: f503 6330 add.w r3, r3, #2816 @ 0xb00
80086f0: 681b ldr r3, [r3, #0]
80086f2: 683a ldr r2, [r7, #0]
80086f4: 7812 ldrb r2, [r2, #0]
80086f6: 0151 lsls r1, r2, #5
80086f8: 693a ldr r2, [r7, #16]
80086fa: 440a add r2, r1
80086fc: f502 6230 add.w r2, r2, #2816 @ 0xb00
8008700: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000
8008704: 6013 str r3, [r2, #0]
do
{
count++;
8008706: 68fb ldr r3, [r7, #12]
8008708: 3301 adds r3, #1
800870a: 60fb str r3, [r7, #12]
if (count > 10000U)
800870c: 68fb ldr r3, [r7, #12]
800870e: f242 7210 movw r2, #10000 @ 0x2710
8008712: 4293 cmp r3, r2
8008714: d902 bls.n 800871c <USB_EPStopXfer+0x12c>
{
ret = HAL_ERROR;
8008716: 2301 movs r3, #1
8008718: 75fb strb r3, [r7, #23]
break;
800871a: e00c b.n 8008736 <USB_EPStopXfer+0x146>
}
} while (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA);
800871c: 683b ldr r3, [r7, #0]
800871e: 781b ldrb r3, [r3, #0]
8008720: 015a lsls r2, r3, #5
8008722: 693b ldr r3, [r7, #16]
8008724: 4413 add r3, r2
8008726: f503 6330 add.w r3, r3, #2816 @ 0xb00
800872a: 681b ldr r3, [r3, #0]
800872c: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8008730: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
8008734: d0e7 beq.n 8008706 <USB_EPStopXfer+0x116>
}
}
return ret;
8008736: 7dfb ldrb r3, [r7, #23]
}
8008738: 4618 mov r0, r3
800873a: 371c adds r7, #28
800873c: 46bd mov sp, r7
800873e: f85d 7b04 ldr.w r7, [sp], #4
8008742: 4770 bx lr
08008744 <USB_WritePacket>:
* 1 : DMA feature used
* @retval HAL status
*/
HAL_StatusTypeDef USB_WritePacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
uint8_t ch_ep_num, uint16_t len, uint8_t dma)
{
8008744: b480 push {r7}
8008746: b089 sub sp, #36 @ 0x24
8008748: af00 add r7, sp, #0
800874a: 60f8 str r0, [r7, #12]
800874c: 60b9 str r1, [r7, #8]
800874e: 4611 mov r1, r2
8008750: 461a mov r2, r3
8008752: 460b mov r3, r1
8008754: 71fb strb r3, [r7, #7]
8008756: 4613 mov r3, r2
8008758: 80bb strh r3, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
800875a: 68fb ldr r3, [r7, #12]
800875c: 617b str r3, [r7, #20]
uint8_t *pSrc = src;
800875e: 68bb ldr r3, [r7, #8]
8008760: 61fb str r3, [r7, #28]
uint32_t count32b;
uint32_t i;
if (dma == 0U)
8008762: f897 3028 ldrb.w r3, [r7, #40] @ 0x28
8008766: 2b00 cmp r3, #0
8008768: d123 bne.n 80087b2 <USB_WritePacket+0x6e>
{
count32b = ((uint32_t)len + 3U) / 4U;
800876a: 88bb ldrh r3, [r7, #4]
800876c: 3303 adds r3, #3
800876e: 089b lsrs r3, r3, #2
8008770: 613b str r3, [r7, #16]
for (i = 0U; i < count32b; i++)
8008772: 2300 movs r3, #0
8008774: 61bb str r3, [r7, #24]
8008776: e018 b.n 80087aa <USB_WritePacket+0x66>
{
USBx_DFIFO((uint32_t)ch_ep_num) = __UNALIGNED_UINT32_READ(pSrc);
8008778: 79fb ldrb r3, [r7, #7]
800877a: 031a lsls r2, r3, #12
800877c: 697b ldr r3, [r7, #20]
800877e: 4413 add r3, r2
8008780: f503 5380 add.w r3, r3, #4096 @ 0x1000
8008784: 461a mov r2, r3
8008786: 69fb ldr r3, [r7, #28]
8008788: 681b ldr r3, [r3, #0]
800878a: 6013 str r3, [r2, #0]
pSrc++;
800878c: 69fb ldr r3, [r7, #28]
800878e: 3301 adds r3, #1
8008790: 61fb str r3, [r7, #28]
pSrc++;
8008792: 69fb ldr r3, [r7, #28]
8008794: 3301 adds r3, #1
8008796: 61fb str r3, [r7, #28]
pSrc++;
8008798: 69fb ldr r3, [r7, #28]
800879a: 3301 adds r3, #1
800879c: 61fb str r3, [r7, #28]
pSrc++;
800879e: 69fb ldr r3, [r7, #28]
80087a0: 3301 adds r3, #1
80087a2: 61fb str r3, [r7, #28]
for (i = 0U; i < count32b; i++)
80087a4: 69bb ldr r3, [r7, #24]
80087a6: 3301 adds r3, #1
80087a8: 61bb str r3, [r7, #24]
80087aa: 69ba ldr r2, [r7, #24]
80087ac: 693b ldr r3, [r7, #16]
80087ae: 429a cmp r2, r3
80087b0: d3e2 bcc.n 8008778 <USB_WritePacket+0x34>
}
}
return HAL_OK;
80087b2: 2300 movs r3, #0
}
80087b4: 4618 mov r0, r3
80087b6: 3724 adds r7, #36 @ 0x24
80087b8: 46bd mov sp, r7
80087ba: f85d 7b04 ldr.w r7, [sp], #4
80087be: 4770 bx lr
080087c0 <USB_ReadPacket>:
* @param dest source pointer
* @param len Number of bytes to read
* @retval pointer to destination buffer
*/
void *USB_ReadPacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len)
{
80087c0: b480 push {r7}
80087c2: b08b sub sp, #44 @ 0x2c
80087c4: af00 add r7, sp, #0
80087c6: 60f8 str r0, [r7, #12]
80087c8: 60b9 str r1, [r7, #8]
80087ca: 4613 mov r3, r2
80087cc: 80fb strh r3, [r7, #6]
uint32_t USBx_BASE = (uint32_t)USBx;
80087ce: 68fb ldr r3, [r7, #12]
80087d0: 61bb str r3, [r7, #24]
uint8_t *pDest = dest;
80087d2: 68bb ldr r3, [r7, #8]
80087d4: 627b str r3, [r7, #36] @ 0x24
uint32_t pData;
uint32_t i;
uint32_t count32b = (uint32_t)len >> 2U;
80087d6: 88fb ldrh r3, [r7, #6]
80087d8: 089b lsrs r3, r3, #2
80087da: b29b uxth r3, r3
80087dc: 617b str r3, [r7, #20]
uint16_t remaining_bytes = len % 4U;
80087de: 88fb ldrh r3, [r7, #6]
80087e0: f003 0303 and.w r3, r3, #3
80087e4: 83fb strh r3, [r7, #30]
for (i = 0U; i < count32b; i++)
80087e6: 2300 movs r3, #0
80087e8: 623b str r3, [r7, #32]
80087ea: e014 b.n 8008816 <USB_ReadPacket+0x56>
{
__UNALIGNED_UINT32_WRITE(pDest, USBx_DFIFO(0U));
80087ec: 69bb ldr r3, [r7, #24]
80087ee: f503 5380 add.w r3, r3, #4096 @ 0x1000
80087f2: 681a ldr r2, [r3, #0]
80087f4: 6a7b ldr r3, [r7, #36] @ 0x24
80087f6: 601a str r2, [r3, #0]
pDest++;
80087f8: 6a7b ldr r3, [r7, #36] @ 0x24
80087fa: 3301 adds r3, #1
80087fc: 627b str r3, [r7, #36] @ 0x24
pDest++;
80087fe: 6a7b ldr r3, [r7, #36] @ 0x24
8008800: 3301 adds r3, #1
8008802: 627b str r3, [r7, #36] @ 0x24
pDest++;
8008804: 6a7b ldr r3, [r7, #36] @ 0x24
8008806: 3301 adds r3, #1
8008808: 627b str r3, [r7, #36] @ 0x24
pDest++;
800880a: 6a7b ldr r3, [r7, #36] @ 0x24
800880c: 3301 adds r3, #1
800880e: 627b str r3, [r7, #36] @ 0x24
for (i = 0U; i < count32b; i++)
8008810: 6a3b ldr r3, [r7, #32]
8008812: 3301 adds r3, #1
8008814: 623b str r3, [r7, #32]
8008816: 6a3a ldr r2, [r7, #32]
8008818: 697b ldr r3, [r7, #20]
800881a: 429a cmp r2, r3
800881c: d3e6 bcc.n 80087ec <USB_ReadPacket+0x2c>
}
/* When Number of data is not word aligned, read the remaining byte */
if (remaining_bytes != 0U)
800881e: 8bfb ldrh r3, [r7, #30]
8008820: 2b00 cmp r3, #0
8008822: d01e beq.n 8008862 <USB_ReadPacket+0xa2>
{
i = 0U;
8008824: 2300 movs r3, #0
8008826: 623b str r3, [r7, #32]
__UNALIGNED_UINT32_WRITE(&pData, USBx_DFIFO(0U));
8008828: 69bb ldr r3, [r7, #24]
800882a: f503 5380 add.w r3, r3, #4096 @ 0x1000
800882e: 461a mov r2, r3
8008830: f107 0310 add.w r3, r7, #16
8008834: 6812 ldr r2, [r2, #0]
8008836: 601a str r2, [r3, #0]
do
{
*(uint8_t *)pDest = (uint8_t)(pData >> (8U * (uint8_t)(i)));
8008838: 693a ldr r2, [r7, #16]
800883a: 6a3b ldr r3, [r7, #32]
800883c: b2db uxtb r3, r3
800883e: 00db lsls r3, r3, #3
8008840: fa22 f303 lsr.w r3, r2, r3
8008844: b2da uxtb r2, r3
8008846: 6a7b ldr r3, [r7, #36] @ 0x24
8008848: 701a strb r2, [r3, #0]
i++;
800884a: 6a3b ldr r3, [r7, #32]
800884c: 3301 adds r3, #1
800884e: 623b str r3, [r7, #32]
pDest++;
8008850: 6a7b ldr r3, [r7, #36] @ 0x24
8008852: 3301 adds r3, #1
8008854: 627b str r3, [r7, #36] @ 0x24
remaining_bytes--;
8008856: 8bfb ldrh r3, [r7, #30]
8008858: 3b01 subs r3, #1
800885a: 83fb strh r3, [r7, #30]
} while (remaining_bytes != 0U);
800885c: 8bfb ldrh r3, [r7, #30]
800885e: 2b00 cmp r3, #0
8008860: d1ea bne.n 8008838 <USB_ReadPacket+0x78>
}
return ((void *)pDest);
8008862: 6a7b ldr r3, [r7, #36] @ 0x24
}
8008864: 4618 mov r0, r3
8008866: 372c adds r7, #44 @ 0x2c
8008868: 46bd mov sp, r7
800886a: f85d 7b04 ldr.w r7, [sp], #4
800886e: 4770 bx lr
08008870 <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
8008870: b480 push {r7}
8008872: b085 sub sp, #20
8008874: af00 add r7, sp, #0
8008876: 6078 str r0, [r7, #4]
8008878: 6039 str r1, [r7, #0]
uint32_t USBx_BASE = (uint32_t)USBx;
800887a: 687b ldr r3, [r7, #4]
800887c: 60fb str r3, [r7, #12]
uint32_t epnum = (uint32_t)ep->num;
800887e: 683b ldr r3, [r7, #0]
8008880: 781b ldrb r3, [r3, #0]
8008882: 60bb str r3, [r7, #8]
if (ep->is_in == 1U)
8008884: 683b ldr r3, [r7, #0]
8008886: 785b ldrb r3, [r3, #1]
8008888: 2b01 cmp r3, #1
800888a: d12c bne.n 80088e6 <USB_EPSetStall+0x76>
{
if (((USBx_INEP(epnum)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == 0U) && (epnum != 0U))
800888c: 68bb ldr r3, [r7, #8]
800888e: 015a lsls r2, r3, #5
8008890: 68fb ldr r3, [r7, #12]
8008892: 4413 add r3, r2
8008894: f503 6310 add.w r3, r3, #2304 @ 0x900
8008898: 681b ldr r3, [r3, #0]
800889a: 2b00 cmp r3, #0
800889c: db12 blt.n 80088c4 <USB_EPSetStall+0x54>
800889e: 68bb ldr r3, [r7, #8]
80088a0: 2b00 cmp r3, #0
80088a2: d00f beq.n 80088c4 <USB_EPSetStall+0x54>
{
USBx_INEP(epnum)->DIEPCTL &= ~(USB_OTG_DIEPCTL_EPDIS);
80088a4: 68bb ldr r3, [r7, #8]
80088a6: 015a lsls r2, r3, #5
80088a8: 68fb ldr r3, [r7, #12]
80088aa: 4413 add r3, r2
80088ac: f503 6310 add.w r3, r3, #2304 @ 0x900
80088b0: 681b ldr r3, [r3, #0]
80088b2: 68ba ldr r2, [r7, #8]
80088b4: 0151 lsls r1, r2, #5
80088b6: 68fa ldr r2, [r7, #12]
80088b8: 440a add r2, r1
80088ba: f502 6210 add.w r2, r2, #2304 @ 0x900
80088be: f023 4380 bic.w r3, r3, #1073741824 @ 0x40000000
80088c2: 6013 str r3, [r2, #0]
}
USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_STALL;
80088c4: 68bb ldr r3, [r7, #8]
80088c6: 015a lsls r2, r3, #5
80088c8: 68fb ldr r3, [r7, #12]
80088ca: 4413 add r3, r2
80088cc: f503 6310 add.w r3, r3, #2304 @ 0x900
80088d0: 681b ldr r3, [r3, #0]
80088d2: 68ba ldr r2, [r7, #8]
80088d4: 0151 lsls r1, r2, #5
80088d6: 68fa ldr r2, [r7, #12]
80088d8: 440a add r2, r1
80088da: f502 6210 add.w r2, r2, #2304 @ 0x900
80088de: f443 1300 orr.w r3, r3, #2097152 @ 0x200000
80088e2: 6013 str r3, [r2, #0]
80088e4: e02b b.n 800893e <USB_EPSetStall+0xce>
}
else
{
if (((USBx_OUTEP(epnum)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == 0U) && (epnum != 0U))
80088e6: 68bb ldr r3, [r7, #8]
80088e8: 015a lsls r2, r3, #5
80088ea: 68fb ldr r3, [r7, #12]
80088ec: 4413 add r3, r2
80088ee: f503 6330 add.w r3, r3, #2816 @ 0xb00
80088f2: 681b ldr r3, [r3, #0]
80088f4: 2b00 cmp r3, #0
80088f6: db12 blt.n 800891e <USB_EPSetStall+0xae>
80088f8: 68bb ldr r3, [r7, #8]
80088fa: 2b00 cmp r3, #0
80088fc: d00f beq.n 800891e <USB_EPSetStall+0xae>
{
USBx_OUTEP(epnum)->DOEPCTL &= ~(USB_OTG_DOEPCTL_EPDIS);
80088fe: 68bb ldr r3, [r7, #8]
8008900: 015a lsls r2, r3, #5
8008902: 68fb ldr r3, [r7, #12]
8008904: 4413 add r3, r2
8008906: f503 6330 add.w r3, r3, #2816 @ 0xb00
800890a: 681b ldr r3, [r3, #0]
800890c: 68ba ldr r2, [r7, #8]
800890e: 0151 lsls r1, r2, #5
8008910: 68fa ldr r2, [r7, #12]
8008912: 440a add r2, r1
8008914: f502 6230 add.w r2, r2, #2816 @ 0xb00
8008918: f023 4380 bic.w r3, r3, #1073741824 @ 0x40000000
800891c: 6013 str r3, [r2, #0]
}
USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_STALL;
800891e: 68bb ldr r3, [r7, #8]
8008920: 015a lsls r2, r3, #5
8008922: 68fb ldr r3, [r7, #12]
8008924: 4413 add r3, r2
8008926: f503 6330 add.w r3, r3, #2816 @ 0xb00
800892a: 681b ldr r3, [r3, #0]
800892c: 68ba ldr r2, [r7, #8]
800892e: 0151 lsls r1, r2, #5
8008930: 68fa ldr r2, [r7, #12]
8008932: 440a add r2, r1
8008934: f502 6230 add.w r2, r2, #2816 @ 0xb00
8008938: f443 1300 orr.w r3, r3, #2097152 @ 0x200000
800893c: 6013 str r3, [r2, #0]
}
return HAL_OK;
800893e: 2300 movs r3, #0
}
8008940: 4618 mov r0, r3
8008942: 3714 adds r7, #20
8008944: 46bd mov sp, r7
8008946: f85d 7b04 ldr.w r7, [sp], #4
800894a: 4770 bx lr
0800894c <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
800894c: b480 push {r7}
800894e: b085 sub sp, #20
8008950: af00 add r7, sp, #0
8008952: 6078 str r0, [r7, #4]
8008954: 6039 str r1, [r7, #0]
uint32_t USBx_BASE = (uint32_t)USBx;
8008956: 687b ldr r3, [r7, #4]
8008958: 60fb str r3, [r7, #12]
uint32_t epnum = (uint32_t)ep->num;
800895a: 683b ldr r3, [r7, #0]
800895c: 781b ldrb r3, [r3, #0]
800895e: 60bb str r3, [r7, #8]
if (ep->is_in == 1U)
8008960: 683b ldr r3, [r7, #0]
8008962: 785b ldrb r3, [r3, #1]
8008964: 2b01 cmp r3, #1
8008966: d128 bne.n 80089ba <USB_EPClearStall+0x6e>
{
USBx_INEP(epnum)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
8008968: 68bb ldr r3, [r7, #8]
800896a: 015a lsls r2, r3, #5
800896c: 68fb ldr r3, [r7, #12]
800896e: 4413 add r3, r2
8008970: f503 6310 add.w r3, r3, #2304 @ 0x900
8008974: 681b ldr r3, [r3, #0]
8008976: 68ba ldr r2, [r7, #8]
8008978: 0151 lsls r1, r2, #5
800897a: 68fa ldr r2, [r7, #12]
800897c: 440a add r2, r1
800897e: f502 6210 add.w r2, r2, #2304 @ 0x900
8008982: f423 1300 bic.w r3, r3, #2097152 @ 0x200000
8008986: 6013 str r3, [r2, #0]
if ((ep->type == EP_TYPE_INTR) || (ep->type == EP_TYPE_BULK))
8008988: 683b ldr r3, [r7, #0]
800898a: 791b ldrb r3, [r3, #4]
800898c: 2b03 cmp r3, #3
800898e: d003 beq.n 8008998 <USB_EPClearStall+0x4c>
8008990: 683b ldr r3, [r7, #0]
8008992: 791b ldrb r3, [r3, #4]
8008994: 2b02 cmp r3, #2
8008996: d138 bne.n 8008a0a <USB_EPClearStall+0xbe>
{
USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; /* DATA0 */
8008998: 68bb ldr r3, [r7, #8]
800899a: 015a lsls r2, r3, #5
800899c: 68fb ldr r3, [r7, #12]
800899e: 4413 add r3, r2
80089a0: f503 6310 add.w r3, r3, #2304 @ 0x900
80089a4: 681b ldr r3, [r3, #0]
80089a6: 68ba ldr r2, [r7, #8]
80089a8: 0151 lsls r1, r2, #5
80089aa: 68fa ldr r2, [r7, #12]
80089ac: 440a add r2, r1
80089ae: f502 6210 add.w r2, r2, #2304 @ 0x900
80089b2: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80089b6: 6013 str r3, [r2, #0]
80089b8: e027 b.n 8008a0a <USB_EPClearStall+0xbe>
}
}
else
{
USBx_OUTEP(epnum)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL;
80089ba: 68bb ldr r3, [r7, #8]
80089bc: 015a lsls r2, r3, #5
80089be: 68fb ldr r3, [r7, #12]
80089c0: 4413 add r3, r2
80089c2: f503 6330 add.w r3, r3, #2816 @ 0xb00
80089c6: 681b ldr r3, [r3, #0]
80089c8: 68ba ldr r2, [r7, #8]
80089ca: 0151 lsls r1, r2, #5
80089cc: 68fa ldr r2, [r7, #12]
80089ce: 440a add r2, r1
80089d0: f502 6230 add.w r2, r2, #2816 @ 0xb00
80089d4: f423 1300 bic.w r3, r3, #2097152 @ 0x200000
80089d8: 6013 str r3, [r2, #0]
if ((ep->type == EP_TYPE_INTR) || (ep->type == EP_TYPE_BULK))
80089da: 683b ldr r3, [r7, #0]
80089dc: 791b ldrb r3, [r3, #4]
80089de: 2b03 cmp r3, #3
80089e0: d003 beq.n 80089ea <USB_EPClearStall+0x9e>
80089e2: 683b ldr r3, [r7, #0]
80089e4: 791b ldrb r3, [r3, #4]
80089e6: 2b02 cmp r3, #2
80089e8: d10f bne.n 8008a0a <USB_EPClearStall+0xbe>
{
USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; /* DATA0 */
80089ea: 68bb ldr r3, [r7, #8]
80089ec: 015a lsls r2, r3, #5
80089ee: 68fb ldr r3, [r7, #12]
80089f0: 4413 add r3, r2
80089f2: f503 6330 add.w r3, r3, #2816 @ 0xb00
80089f6: 681b ldr r3, [r3, #0]
80089f8: 68ba ldr r2, [r7, #8]
80089fa: 0151 lsls r1, r2, #5
80089fc: 68fa ldr r2, [r7, #12]
80089fe: 440a add r2, r1
8008a00: f502 6230 add.w r2, r2, #2816 @ 0xb00
8008a04: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8008a08: 6013 str r3, [r2, #0]
}
}
return HAL_OK;
8008a0a: 2300 movs r3, #0
}
8008a0c: 4618 mov r0, r3
8008a0e: 3714 adds r7, #20
8008a10: 46bd mov sp, r7
8008a12: f85d 7b04 ldr.w r7, [sp], #4
8008a16: 4770 bx lr
08008a18 <USB_StopDevice>:
* @brief USB_StopDevice : Stop the usb device mode
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx)
{
8008a18: b580 push {r7, lr}
8008a1a: b086 sub sp, #24
8008a1c: af00 add r7, sp, #0
8008a1e: 6078 str r0, [r7, #4]
HAL_StatusTypeDef ret;
uint32_t USBx_BASE = (uint32_t)USBx;
8008a20: 687b ldr r3, [r7, #4]
8008a22: 613b str r3, [r7, #16]
uint32_t i;
/* Clear Pending interrupt */
for (i = 0U; i < 15U; i++)
8008a24: 2300 movs r3, #0
8008a26: 617b str r3, [r7, #20]
8008a28: e016 b.n 8008a58 <USB_StopDevice+0x40>
{
USBx_INEP(i)->DIEPINT = 0xFB7FU;
8008a2a: 697b ldr r3, [r7, #20]
8008a2c: 015a lsls r2, r3, #5
8008a2e: 693b ldr r3, [r7, #16]
8008a30: 4413 add r3, r2
8008a32: f503 6310 add.w r3, r3, #2304 @ 0x900
8008a36: 461a mov r2, r3
8008a38: f64f 337f movw r3, #64383 @ 0xfb7f
8008a3c: 6093 str r3, [r2, #8]
USBx_OUTEP(i)->DOEPINT = 0xFB7FU;
8008a3e: 697b ldr r3, [r7, #20]
8008a40: 015a lsls r2, r3, #5
8008a42: 693b ldr r3, [r7, #16]
8008a44: 4413 add r3, r2
8008a46: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008a4a: 461a mov r2, r3
8008a4c: f64f 337f movw r3, #64383 @ 0xfb7f
8008a50: 6093 str r3, [r2, #8]
for (i = 0U; i < 15U; i++)
8008a52: 697b ldr r3, [r7, #20]
8008a54: 3301 adds r3, #1
8008a56: 617b str r3, [r7, #20]
8008a58: 697b ldr r3, [r7, #20]
8008a5a: 2b0e cmp r3, #14
8008a5c: d9e5 bls.n 8008a2a <USB_StopDevice+0x12>
}
/* Clear interrupt masks */
USBx_DEVICE->DIEPMSK = 0U;
8008a5e: 693b ldr r3, [r7, #16]
8008a60: f503 6300 add.w r3, r3, #2048 @ 0x800
8008a64: 461a mov r2, r3
8008a66: 2300 movs r3, #0
8008a68: 6113 str r3, [r2, #16]
USBx_DEVICE->DOEPMSK = 0U;
8008a6a: 693b ldr r3, [r7, #16]
8008a6c: f503 6300 add.w r3, r3, #2048 @ 0x800
8008a70: 461a mov r2, r3
8008a72: 2300 movs r3, #0
8008a74: 6153 str r3, [r2, #20]
USBx_DEVICE->DAINTMSK = 0U;
8008a76: 693b ldr r3, [r7, #16]
8008a78: f503 6300 add.w r3, r3, #2048 @ 0x800
8008a7c: 461a mov r2, r3
8008a7e: 2300 movs r3, #0
8008a80: 61d3 str r3, [r2, #28]
/* Flush the FIFO */
ret = USB_FlushRxFifo(USBx);
8008a82: 6878 ldr r0, [r7, #4]
8008a84: f7ff f946 bl 8007d14 <USB_FlushRxFifo>
8008a88: 4603 mov r3, r0
8008a8a: 73fb strb r3, [r7, #15]
if (ret != HAL_OK)
8008a8c: 7bfb ldrb r3, [r7, #15]
8008a8e: 2b00 cmp r3, #0
8008a90: d001 beq.n 8008a96 <USB_StopDevice+0x7e>
{
return ret;
8008a92: 7bfb ldrb r3, [r7, #15]
8008a94: e00b b.n 8008aae <USB_StopDevice+0x96>
}
ret = USB_FlushTxFifo(USBx, 0x10U);
8008a96: 2110 movs r1, #16
8008a98: 6878 ldr r0, [r7, #4]
8008a9a: f7ff f909 bl 8007cb0 <USB_FlushTxFifo>
8008a9e: 4603 mov r3, r0
8008aa0: 73fb strb r3, [r7, #15]
if (ret != HAL_OK)
8008aa2: 7bfb ldrb r3, [r7, #15]
8008aa4: 2b00 cmp r3, #0
8008aa6: d001 beq.n 8008aac <USB_StopDevice+0x94>
{
return ret;
8008aa8: 7bfb ldrb r3, [r7, #15]
8008aaa: e000 b.n 8008aae <USB_StopDevice+0x96>
}
return ret;
8008aac: 7bfb ldrb r3, [r7, #15]
}
8008aae: 4618 mov r0, r3
8008ab0: 3718 adds r7, #24
8008ab2: 46bd mov sp, r7
8008ab4: bd80 pop {r7, pc}
08008ab6 <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(const USB_OTG_GlobalTypeDef *USBx, uint8_t address)
{
8008ab6: b480 push {r7}
8008ab8: b085 sub sp, #20
8008aba: af00 add r7, sp, #0
8008abc: 6078 str r0, [r7, #4]
8008abe: 460b mov r3, r1
8008ac0: 70fb strb r3, [r7, #3]
uint32_t USBx_BASE = (uint32_t)USBx;
8008ac2: 687b ldr r3, [r7, #4]
8008ac4: 60fb str r3, [r7, #12]
USBx_DEVICE->DCFG &= ~(USB_OTG_DCFG_DAD);
8008ac6: 68fb ldr r3, [r7, #12]
8008ac8: f503 6300 add.w r3, r3, #2048 @ 0x800
8008acc: 681b ldr r3, [r3, #0]
8008ace: 68fa ldr r2, [r7, #12]
8008ad0: f502 6200 add.w r2, r2, #2048 @ 0x800
8008ad4: f423 63fe bic.w r3, r3, #2032 @ 0x7f0
8008ad8: 6013 str r3, [r2, #0]
USBx_DEVICE->DCFG |= ((uint32_t)address << 4) & USB_OTG_DCFG_DAD;
8008ada: 68fb ldr r3, [r7, #12]
8008adc: f503 6300 add.w r3, r3, #2048 @ 0x800
8008ae0: 681a ldr r2, [r3, #0]
8008ae2: 78fb ldrb r3, [r7, #3]
8008ae4: 011b lsls r3, r3, #4
8008ae6: f403 63fe and.w r3, r3, #2032 @ 0x7f0
8008aea: 68f9 ldr r1, [r7, #12]
8008aec: f501 6100 add.w r1, r1, #2048 @ 0x800
8008af0: 4313 orrs r3, r2
8008af2: 600b str r3, [r1, #0]
return HAL_OK;
8008af4: 2300 movs r3, #0
}
8008af6: 4618 mov r0, r3
8008af8: 3714 adds r7, #20
8008afa: 46bd mov sp, r7
8008afc: f85d 7b04 ldr.w r7, [sp], #4
8008b00: 4770 bx lr
08008b02 <USB_DevConnect>:
* @brief USB_DevConnect : Connect the USB device by enabling Rpu
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(const USB_OTG_GlobalTypeDef *USBx)
{
8008b02: b480 push {r7}
8008b04: b085 sub sp, #20
8008b06: af00 add r7, sp, #0
8008b08: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
8008b0a: 687b ldr r3, [r7, #4]
8008b0c: 60fb str r3, [r7, #12]
/* In case phy is stopped, ensure to ungate and restore the phy CLK */
USBx_PCGCCTL &= ~(USB_OTG_PCGCCTL_STOPCLK | USB_OTG_PCGCCTL_GATECLK);
8008b0e: 68fb ldr r3, [r7, #12]
8008b10: f503 6360 add.w r3, r3, #3584 @ 0xe00
8008b14: 681b ldr r3, [r3, #0]
8008b16: 68fa ldr r2, [r7, #12]
8008b18: f502 6260 add.w r2, r2, #3584 @ 0xe00
8008b1c: f023 0303 bic.w r3, r3, #3
8008b20: 6013 str r3, [r2, #0]
USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_SDIS;
8008b22: 68fb ldr r3, [r7, #12]
8008b24: f503 6300 add.w r3, r3, #2048 @ 0x800
8008b28: 685b ldr r3, [r3, #4]
8008b2a: 68fa ldr r2, [r7, #12]
8008b2c: f502 6200 add.w r2, r2, #2048 @ 0x800
8008b30: f023 0302 bic.w r3, r3, #2
8008b34: 6053 str r3, [r2, #4]
return HAL_OK;
8008b36: 2300 movs r3, #0
}
8008b38: 4618 mov r0, r3
8008b3a: 3714 adds r7, #20
8008b3c: 46bd mov sp, r7
8008b3e: f85d 7b04 ldr.w r7, [sp], #4
8008b42: 4770 bx lr
08008b44 <USB_DevDisconnect>:
* @brief USB_DevDisconnect : Disconnect the USB device by disabling Rpu
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(const USB_OTG_GlobalTypeDef *USBx)
{
8008b44: b480 push {r7}
8008b46: b085 sub sp, #20
8008b48: af00 add r7, sp, #0
8008b4a: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
8008b4c: 687b ldr r3, [r7, #4]
8008b4e: 60fb str r3, [r7, #12]
/* In case phy is stopped, ensure to ungate and restore the phy CLK */
USBx_PCGCCTL &= ~(USB_OTG_PCGCCTL_STOPCLK | USB_OTG_PCGCCTL_GATECLK);
8008b50: 68fb ldr r3, [r7, #12]
8008b52: f503 6360 add.w r3, r3, #3584 @ 0xe00
8008b56: 681b ldr r3, [r3, #0]
8008b58: 68fa ldr r2, [r7, #12]
8008b5a: f502 6260 add.w r2, r2, #3584 @ 0xe00
8008b5e: f023 0303 bic.w r3, r3, #3
8008b62: 6013 str r3, [r2, #0]
USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS;
8008b64: 68fb ldr r3, [r7, #12]
8008b66: f503 6300 add.w r3, r3, #2048 @ 0x800
8008b6a: 685b ldr r3, [r3, #4]
8008b6c: 68fa ldr r2, [r7, #12]
8008b6e: f502 6200 add.w r2, r2, #2048 @ 0x800
8008b72: f043 0302 orr.w r3, r3, #2
8008b76: 6053 str r3, [r2, #4]
return HAL_OK;
8008b78: 2300 movs r3, #0
}
8008b7a: 4618 mov r0, r3
8008b7c: 3714 adds r7, #20
8008b7e: 46bd mov sp, r7
8008b80: f85d 7b04 ldr.w r7, [sp], #4
8008b84: 4770 bx lr
08008b86 <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts: return the global USB interrupt status
* @param USBx Selected device
* @retval USB Global Interrupt status
*/
uint32_t USB_ReadInterrupts(USB_OTG_GlobalTypeDef const *USBx)
{
8008b86: b480 push {r7}
8008b88: b085 sub sp, #20
8008b8a: af00 add r7, sp, #0
8008b8c: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->GINTSTS;
8008b8e: 687b ldr r3, [r7, #4]
8008b90: 695b ldr r3, [r3, #20]
8008b92: 60fb str r3, [r7, #12]
tmpreg &= USBx->GINTMSK;
8008b94: 687b ldr r3, [r7, #4]
8008b96: 699b ldr r3, [r3, #24]
8008b98: 68fa ldr r2, [r7, #12]
8008b9a: 4013 ands r3, r2
8008b9c: 60fb str r3, [r7, #12]
return tmpreg;
8008b9e: 68fb ldr r3, [r7, #12]
}
8008ba0: 4618 mov r0, r3
8008ba2: 3714 adds r7, #20
8008ba4: 46bd mov sp, r7
8008ba6: f85d 7b04 ldr.w r7, [sp], #4
8008baa: 4770 bx lr
08008bac <USB_ReadDevAllOutEpInterrupt>:
* @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
* @param USBx Selected device
* @retval USB Device OUT EP interrupt status
*/
uint32_t USB_ReadDevAllOutEpInterrupt(const USB_OTG_GlobalTypeDef *USBx)
{
8008bac: b480 push {r7}
8008bae: b085 sub sp, #20
8008bb0: af00 add r7, sp, #0
8008bb2: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
8008bb4: 687b ldr r3, [r7, #4]
8008bb6: 60fb str r3, [r7, #12]
uint32_t tmpreg;
tmpreg = USBx_DEVICE->DAINT;
8008bb8: 68fb ldr r3, [r7, #12]
8008bba: f503 6300 add.w r3, r3, #2048 @ 0x800
8008bbe: 699b ldr r3, [r3, #24]
8008bc0: 60bb str r3, [r7, #8]
tmpreg &= USBx_DEVICE->DAINTMSK;
8008bc2: 68fb ldr r3, [r7, #12]
8008bc4: f503 6300 add.w r3, r3, #2048 @ 0x800
8008bc8: 69db ldr r3, [r3, #28]
8008bca: 68ba ldr r2, [r7, #8]
8008bcc: 4013 ands r3, r2
8008bce: 60bb str r3, [r7, #8]
return ((tmpreg & 0xffff0000U) >> 16);
8008bd0: 68bb ldr r3, [r7, #8]
8008bd2: 0c1b lsrs r3, r3, #16
}
8008bd4: 4618 mov r0, r3
8008bd6: 3714 adds r7, #20
8008bd8: 46bd mov sp, r7
8008bda: f85d 7b04 ldr.w r7, [sp], #4
8008bde: 4770 bx lr
08008be0 <USB_ReadDevAllInEpInterrupt>:
* @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
* @param USBx Selected device
* @retval USB Device IN EP interrupt status
*/
uint32_t USB_ReadDevAllInEpInterrupt(const USB_OTG_GlobalTypeDef *USBx)
{
8008be0: b480 push {r7}
8008be2: b085 sub sp, #20
8008be4: af00 add r7, sp, #0
8008be6: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
8008be8: 687b ldr r3, [r7, #4]
8008bea: 60fb str r3, [r7, #12]
uint32_t tmpreg;
tmpreg = USBx_DEVICE->DAINT;
8008bec: 68fb ldr r3, [r7, #12]
8008bee: f503 6300 add.w r3, r3, #2048 @ 0x800
8008bf2: 699b ldr r3, [r3, #24]
8008bf4: 60bb str r3, [r7, #8]
tmpreg &= USBx_DEVICE->DAINTMSK;
8008bf6: 68fb ldr r3, [r7, #12]
8008bf8: f503 6300 add.w r3, r3, #2048 @ 0x800
8008bfc: 69db ldr r3, [r3, #28]
8008bfe: 68ba ldr r2, [r7, #8]
8008c00: 4013 ands r3, r2
8008c02: 60bb str r3, [r7, #8]
return ((tmpreg & 0xFFFFU));
8008c04: 68bb ldr r3, [r7, #8]
8008c06: b29b uxth r3, r3
}
8008c08: 4618 mov r0, r3
8008c0a: 3714 adds r7, #20
8008c0c: 46bd mov sp, r7
8008c0e: f85d 7b04 ldr.w r7, [sp], #4
8008c12: 4770 bx lr
08008c14 <USB_ReadDevOutEPInterrupt>:
* @param epnum endpoint number
* This parameter can be a value from 0 to 15
* @retval Device OUT EP Interrupt register
*/
uint32_t USB_ReadDevOutEPInterrupt(const USB_OTG_GlobalTypeDef *USBx, uint8_t epnum)
{
8008c14: b480 push {r7}
8008c16: b085 sub sp, #20
8008c18: af00 add r7, sp, #0
8008c1a: 6078 str r0, [r7, #4]
8008c1c: 460b mov r3, r1
8008c1e: 70fb strb r3, [r7, #3]
uint32_t USBx_BASE = (uint32_t)USBx;
8008c20: 687b ldr r3, [r7, #4]
8008c22: 60fb str r3, [r7, #12]
uint32_t tmpreg;
tmpreg = USBx_OUTEP((uint32_t)epnum)->DOEPINT;
8008c24: 78fb ldrb r3, [r7, #3]
8008c26: 015a lsls r2, r3, #5
8008c28: 68fb ldr r3, [r7, #12]
8008c2a: 4413 add r3, r2
8008c2c: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008c30: 689b ldr r3, [r3, #8]
8008c32: 60bb str r3, [r7, #8]
tmpreg &= USBx_DEVICE->DOEPMSK;
8008c34: 68fb ldr r3, [r7, #12]
8008c36: f503 6300 add.w r3, r3, #2048 @ 0x800
8008c3a: 695b ldr r3, [r3, #20]
8008c3c: 68ba ldr r2, [r7, #8]
8008c3e: 4013 ands r3, r2
8008c40: 60bb str r3, [r7, #8]
return tmpreg;
8008c42: 68bb ldr r3, [r7, #8]
}
8008c44: 4618 mov r0, r3
8008c46: 3714 adds r7, #20
8008c48: 46bd mov sp, r7
8008c4a: f85d 7b04 ldr.w r7, [sp], #4
8008c4e: 4770 bx lr
08008c50 <USB_ReadDevInEPInterrupt>:
* @param epnum endpoint number
* This parameter can be a value from 0 to 15
* @retval Device IN EP Interrupt register
*/
uint32_t USB_ReadDevInEPInterrupt(const USB_OTG_GlobalTypeDef *USBx, uint8_t epnum)
{
8008c50: b480 push {r7}
8008c52: b087 sub sp, #28
8008c54: af00 add r7, sp, #0
8008c56: 6078 str r0, [r7, #4]
8008c58: 460b mov r3, r1
8008c5a: 70fb strb r3, [r7, #3]
uint32_t USBx_BASE = (uint32_t)USBx;
8008c5c: 687b ldr r3, [r7, #4]
8008c5e: 617b str r3, [r7, #20]
uint32_t tmpreg;
uint32_t msk;
uint32_t emp;
msk = USBx_DEVICE->DIEPMSK;
8008c60: 697b ldr r3, [r7, #20]
8008c62: f503 6300 add.w r3, r3, #2048 @ 0x800
8008c66: 691b ldr r3, [r3, #16]
8008c68: 613b str r3, [r7, #16]
emp = USBx_DEVICE->DIEPEMPMSK;
8008c6a: 697b ldr r3, [r7, #20]
8008c6c: f503 6300 add.w r3, r3, #2048 @ 0x800
8008c70: 6b5b ldr r3, [r3, #52] @ 0x34
8008c72: 60fb str r3, [r7, #12]
msk |= ((emp >> (epnum & EP_ADDR_MSK)) & 0x1U) << 7;
8008c74: 78fb ldrb r3, [r7, #3]
8008c76: f003 030f and.w r3, r3, #15
8008c7a: 68fa ldr r2, [r7, #12]
8008c7c: fa22 f303 lsr.w r3, r2, r3
8008c80: 01db lsls r3, r3, #7
8008c82: b2db uxtb r3, r3
8008c84: 693a ldr r2, [r7, #16]
8008c86: 4313 orrs r3, r2
8008c88: 613b str r3, [r7, #16]
tmpreg = USBx_INEP((uint32_t)epnum)->DIEPINT & msk;
8008c8a: 78fb ldrb r3, [r7, #3]
8008c8c: 015a lsls r2, r3, #5
8008c8e: 697b ldr r3, [r7, #20]
8008c90: 4413 add r3, r2
8008c92: f503 6310 add.w r3, r3, #2304 @ 0x900
8008c96: 689b ldr r3, [r3, #8]
8008c98: 693a ldr r2, [r7, #16]
8008c9a: 4013 ands r3, r2
8008c9c: 60bb str r3, [r7, #8]
return tmpreg;
8008c9e: 68bb ldr r3, [r7, #8]
}
8008ca0: 4618 mov r0, r3
8008ca2: 371c adds r7, #28
8008ca4: 46bd mov sp, r7
8008ca6: f85d 7b04 ldr.w r7, [sp], #4
8008caa: 4770 bx lr
08008cac <USB_GetMode>:
* This parameter can be one of these values:
* 0 : Host
* 1 : Device
*/
uint32_t USB_GetMode(const USB_OTG_GlobalTypeDef *USBx)
{
8008cac: b480 push {r7}
8008cae: b083 sub sp, #12
8008cb0: af00 add r7, sp, #0
8008cb2: 6078 str r0, [r7, #4]
return ((USBx->GINTSTS) & 0x1U);
8008cb4: 687b ldr r3, [r7, #4]
8008cb6: 695b ldr r3, [r3, #20]
8008cb8: f003 0301 and.w r3, r3, #1
}
8008cbc: 4618 mov r0, r3
8008cbe: 370c adds r7, #12
8008cc0: 46bd mov sp, r7
8008cc2: f85d 7b04 ldr.w r7, [sp], #4
8008cc6: 4770 bx lr
08008cc8 <USB_ActivateSetup>:
* @brief Activate EP0 for Setup transactions
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateSetup(const USB_OTG_GlobalTypeDef *USBx)
{
8008cc8: b480 push {r7}
8008cca: b085 sub sp, #20
8008ccc: af00 add r7, sp, #0
8008cce: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
8008cd0: 687b ldr r3, [r7, #4]
8008cd2: 60fb str r3, [r7, #12]
/* Set the MPS of the IN EP0 to 64 bytes */
USBx_INEP(0U)->DIEPCTL &= ~USB_OTG_DIEPCTL_MPSIZ;
8008cd4: 68fb ldr r3, [r7, #12]
8008cd6: f503 6310 add.w r3, r3, #2304 @ 0x900
8008cda: 681b ldr r3, [r3, #0]
8008cdc: 68fa ldr r2, [r7, #12]
8008cde: f502 6210 add.w r2, r2, #2304 @ 0x900
8008ce2: f423 63ff bic.w r3, r3, #2040 @ 0x7f8
8008ce6: f023 0307 bic.w r3, r3, #7
8008cea: 6013 str r3, [r2, #0]
USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGINAK;
8008cec: 68fb ldr r3, [r7, #12]
8008cee: f503 6300 add.w r3, r3, #2048 @ 0x800
8008cf2: 685b ldr r3, [r3, #4]
8008cf4: 68fa ldr r2, [r7, #12]
8008cf6: f502 6200 add.w r2, r2, #2048 @ 0x800
8008cfa: f443 7380 orr.w r3, r3, #256 @ 0x100
8008cfe: 6053 str r3, [r2, #4]
return HAL_OK;
8008d00: 2300 movs r3, #0
}
8008d02: 4618 mov r0, r3
8008d04: 3714 adds r7, #20
8008d06: 46bd mov sp, r7
8008d08: f85d 7b04 ldr.w r7, [sp], #4
8008d0c: 4770 bx lr
...
08008d10 <USB_EP0_OutStart>:
* 1 : DMA feature used
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(const USB_OTG_GlobalTypeDef *USBx, uint8_t dma, const uint8_t *psetup)
{
8008d10: b480 push {r7}
8008d12: b087 sub sp, #28
8008d14: af00 add r7, sp, #0
8008d16: 60f8 str r0, [r7, #12]
8008d18: 460b mov r3, r1
8008d1a: 607a str r2, [r7, #4]
8008d1c: 72fb strb r3, [r7, #11]
uint32_t USBx_BASE = (uint32_t)USBx;
8008d1e: 68fb ldr r3, [r7, #12]
8008d20: 617b str r3, [r7, #20]
uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U);
8008d22: 68fb ldr r3, [r7, #12]
8008d24: 333c adds r3, #60 @ 0x3c
8008d26: 3304 adds r3, #4
8008d28: 681b ldr r3, [r3, #0]
8008d2a: 613b str r3, [r7, #16]
if (gSNPSiD > USB_OTG_CORE_ID_300A)
8008d2c: 693b ldr r3, [r7, #16]
8008d2e: 4a26 ldr r2, [pc, #152] @ (8008dc8 <USB_EP0_OutStart+0xb8>)
8008d30: 4293 cmp r3, r2
8008d32: d90a bls.n 8008d4a <USB_EP0_OutStart+0x3a>
{
if ((USBx_OUTEP(0U)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
8008d34: 697b ldr r3, [r7, #20]
8008d36: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008d3a: 681b ldr r3, [r3, #0]
8008d3c: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8008d40: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
8008d44: d101 bne.n 8008d4a <USB_EP0_OutStart+0x3a>
{
return HAL_OK;
8008d46: 2300 movs r3, #0
8008d48: e037 b.n 8008dba <USB_EP0_OutStart+0xaa>
}
}
USBx_OUTEP(0U)->DOEPTSIZ = 0U;
8008d4a: 697b ldr r3, [r7, #20]
8008d4c: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008d50: 461a mov r2, r3
8008d52: 2300 movs r3, #0
8008d54: 6113 str r3, [r2, #16]
USBx_OUTEP(0U)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19));
8008d56: 697b ldr r3, [r7, #20]
8008d58: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008d5c: 691b ldr r3, [r3, #16]
8008d5e: 697a ldr r2, [r7, #20]
8008d60: f502 6230 add.w r2, r2, #2816 @ 0xb00
8008d64: f443 2300 orr.w r3, r3, #524288 @ 0x80000
8008d68: 6113 str r3, [r2, #16]
USBx_OUTEP(0U)->DOEPTSIZ |= (3U * 8U);
8008d6a: 697b ldr r3, [r7, #20]
8008d6c: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008d70: 691b ldr r3, [r3, #16]
8008d72: 697a ldr r2, [r7, #20]
8008d74: f502 6230 add.w r2, r2, #2816 @ 0xb00
8008d78: f043 0318 orr.w r3, r3, #24
8008d7c: 6113 str r3, [r2, #16]
USBx_OUTEP(0U)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_STUPCNT;
8008d7e: 697b ldr r3, [r7, #20]
8008d80: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008d84: 691b ldr r3, [r3, #16]
8008d86: 697a ldr r2, [r7, #20]
8008d88: f502 6230 add.w r2, r2, #2816 @ 0xb00
8008d8c: f043 43c0 orr.w r3, r3, #1610612736 @ 0x60000000
8008d90: 6113 str r3, [r2, #16]
if (dma == 1U)
8008d92: 7afb ldrb r3, [r7, #11]
8008d94: 2b01 cmp r3, #1
8008d96: d10f bne.n 8008db8 <USB_EP0_OutStart+0xa8>
{
USBx_OUTEP(0U)->DOEPDMA = (uint32_t)psetup;
8008d98: 697b ldr r3, [r7, #20]
8008d9a: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008d9e: 461a mov r2, r3
8008da0: 687b ldr r3, [r7, #4]
8008da2: 6153 str r3, [r2, #20]
/* EP enable */
USBx_OUTEP(0U)->DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_USBAEP;
8008da4: 697b ldr r3, [r7, #20]
8008da6: f503 6330 add.w r3, r3, #2816 @ 0xb00
8008daa: 681b ldr r3, [r3, #0]
8008dac: 697a ldr r2, [r7, #20]
8008dae: f502 6230 add.w r2, r2, #2816 @ 0xb00
8008db2: f043 2380 orr.w r3, r3, #2147516416 @ 0x80008000
8008db6: 6013 str r3, [r2, #0]
}
return HAL_OK;
8008db8: 2300 movs r3, #0
}
8008dba: 4618 mov r0, r3
8008dbc: 371c adds r7, #28
8008dbe: 46bd mov sp, r7
8008dc0: f85d 7b04 ldr.w r7, [sp], #4
8008dc4: 4770 bx lr
8008dc6: bf00 nop
8008dc8: 4f54300a .word 0x4f54300a
08008dcc <USB_CoreReset>:
* @brief Reset the USB Core (needed after USB clock settings change)
* @param USBx Selected device
* @retval HAL status
*/
static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
{
8008dcc: b480 push {r7}
8008dce: b085 sub sp, #20
8008dd0: af00 add r7, sp, #0
8008dd2: 6078 str r0, [r7, #4]
__IO uint32_t count = 0U;
8008dd4: 2300 movs r3, #0
8008dd6: 60fb str r3, [r7, #12]
/* Wait for AHB master IDLE state. */
do
{
count++;
8008dd8: 68fb ldr r3, [r7, #12]
8008dda: 3301 adds r3, #1
8008ddc: 60fb str r3, [r7, #12]
if (count > HAL_USB_TIMEOUT)
8008dde: 68fb ldr r3, [r7, #12]
8008de0: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000
8008de4: d901 bls.n 8008dea <USB_CoreReset+0x1e>
{
return HAL_TIMEOUT;
8008de6: 2303 movs r3, #3
8008de8: e01b b.n 8008e22 <USB_CoreReset+0x56>
}
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
8008dea: 687b ldr r3, [r7, #4]
8008dec: 691b ldr r3, [r3, #16]
8008dee: 2b00 cmp r3, #0
8008df0: daf2 bge.n 8008dd8 <USB_CoreReset+0xc>
/* Core Soft Reset */
count = 0U;
8008df2: 2300 movs r3, #0
8008df4: 60fb str r3, [r7, #12]
USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST;
8008df6: 687b ldr r3, [r7, #4]
8008df8: 691b ldr r3, [r3, #16]
8008dfa: f043 0201 orr.w r2, r3, #1
8008dfe: 687b ldr r3, [r7, #4]
8008e00: 611a str r2, [r3, #16]
do
{
count++;
8008e02: 68fb ldr r3, [r7, #12]
8008e04: 3301 adds r3, #1
8008e06: 60fb str r3, [r7, #12]
if (count > HAL_USB_TIMEOUT)
8008e08: 68fb ldr r3, [r7, #12]
8008e0a: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000
8008e0e: d901 bls.n 8008e14 <USB_CoreReset+0x48>
{
return HAL_TIMEOUT;
8008e10: 2303 movs r3, #3
8008e12: e006 b.n 8008e22 <USB_CoreReset+0x56>
}
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
8008e14: 687b ldr r3, [r7, #4]
8008e16: 691b ldr r3, [r3, #16]
8008e18: f003 0301 and.w r3, r3, #1
8008e1c: 2b01 cmp r3, #1
8008e1e: d0f0 beq.n 8008e02 <USB_CoreReset+0x36>
return HAL_OK;
8008e20: 2300 movs r3, #0
}
8008e22: 4618 mov r0, r3
8008e24: 3714 adds r7, #20
8008e26: 46bd mov sp, r7
8008e28: f85d 7b04 ldr.w r7, [sp], #4
8008e2c: 4770 bx lr
...
08008e30 <FMounteMMC>:
return fr;
}
FRESULT FMounteMMC()
{
8008e30: b580 push {r7, lr}
8008e32: b084 sub sp, #16
8008e34: af02 add r7, sp, #8
MX_FATFS_Init();
8008e36: f000 f827 bl 8008e88 <MX_FATFS_Init>
FRESULT fr = f_mount(&USERFatFS, USERPath, 1);
8008e3a: 2201 movs r2, #1
8008e3c: 490f ldr r1, [pc, #60] @ (8008e7c <FMounteMMC+0x4c>)
8008e3e: 4810 ldr r0, [pc, #64] @ (8008e80 <FMounteMMC+0x50>)
8008e40: f005 faf0 bl 800e424 <f_mount>
8008e44: 4603 mov r3, r0
8008e46: 71fb strb r3, [r7, #7]
if(fr == FR_NO_FILESYSTEM)
8008e48: 79fb ldrb r3, [r7, #7]
8008e4a: 2b0d cmp r3, #13
8008e4c: d111 bne.n 8008e72 <FMounteMMC+0x42>
{
// CreateFileSystem();
fr = f_mkfs((TCHAR*)USERPath, FS_FAT32, 0,work, _MIN_SS);
8008e4e: f44f 7300 mov.w r3, #512 @ 0x200
8008e52: 9300 str r3, [sp, #0]
8008e54: 4b0b ldr r3, [pc, #44] @ (8008e84 <FMounteMMC+0x54>)
8008e56: 2200 movs r2, #0
8008e58: 2103 movs r1, #3
8008e5a: 4808 ldr r0, [pc, #32] @ (8008e7c <FMounteMMC+0x4c>)
8008e5c: f006 f9b6 bl 800f1cc <f_mkfs>
8008e60: 4603 mov r3, r0
8008e62: 71fb strb r3, [r7, #7]
fr = f_mount(&USERFatFS, USERPath, 1);
8008e64: 2201 movs r2, #1
8008e66: 4905 ldr r1, [pc, #20] @ (8008e7c <FMounteMMC+0x4c>)
8008e68: 4805 ldr r0, [pc, #20] @ (8008e80 <FMounteMMC+0x50>)
8008e6a: f005 fadb bl 800e424 <f_mount>
8008e6e: 4603 mov r3, r0
8008e70: 71fb strb r3, [r7, #7]
}
return fr;
8008e72: 79fb ldrb r3, [r7, #7]
}
8008e74: 4618 mov r0, r3
8008e76: 3708 adds r7, #8
8008e78: 46bd mov sp, r7
8008e7a: bd80 pop {r7, pc}
8008e7c: 2000fab8 .word 0x2000fab8
8008e80: 2000fabc .word 0x2000fabc
8008e84: 2000ff20 .word 0x2000ff20
08008e88 <MX_FATFS_Init>:
/* USER CODE END Variables */
void MX_FATFS_Init(void)
{
8008e88: b580 push {r7, lr}
8008e8a: af00 add r7, sp, #0
/*## FatFS: Link the USER driver ###########################*/
retUSER = FATFS_LinkDriver(&USER_Driver, USERPath);
8008e8c: 4904 ldr r1, [pc, #16] @ (8008ea0 <MX_FATFS_Init+0x18>)
8008e8e: 4805 ldr r0, [pc, #20] @ (8008ea4 <MX_FATFS_Init+0x1c>)
8008e90: f006 fe36 bl 800fb00 <FATFS_LinkDriver>
8008e94: 4603 mov r3, r0
8008e96: 461a mov r2, r3
8008e98: 4b03 ldr r3, [pc, #12] @ (8008ea8 <MX_FATFS_Init+0x20>)
8008e9a: 701a strb r2, [r3, #0]
/* USER CODE BEGIN Init */
/* additional user code for init */
/* USER CODE END Init */
}
8008e9c: bf00 nop
8008e9e: bd80 pop {r7, pc}
8008ea0: 2000fab8 .word 0x2000fab8
8008ea4: 2000000c .word 0x2000000c
8008ea8: 2000fab4 .word 0x2000fab4
08008eac <get_fattime>:
* @brief Gets Time from RTC
* @param None
* @retval Time in DWORD
*/
DWORD get_fattime(void)
{
8008eac: b480 push {r7}
8008eae: af00 add r7, sp, #0
/* USER CODE BEGIN get_fattime */
return 0;
8008eb0: 2300 movs r3, #0
/* USER CODE END get_fattime */
}
8008eb2: 4618 mov r0, r3
8008eb4: 46bd mov sp, r7
8008eb6: f85d 7b04 ldr.w r7, [sp], #4
8008eba: 4770 bx lr
08008ebc <USER_initialize>:
* @retval DSTATUS: Operation status
*/
DSTATUS USER_initialize (
BYTE pdrv /* Physical drive nmuber to identify the drive */
)
{
8008ebc: b580 push {r7, lr}
8008ebe: b082 sub sp, #8
8008ec0: af00 add r7, sp, #0
8008ec2: 4603 mov r3, r0
8008ec4: 71fb strb r3, [r7, #7]
/* USER CODE BEGIN INIT */
Stat = STA_NOINIT;
8008ec6: 4b0c ldr r3, [pc, #48] @ (8008ef8 <USER_initialize+0x3c>)
8008ec8: 2201 movs r2, #1
8008eca: 701a strb r2, [r3, #0]
if(HAL_MMC_Init(&hmmc) == HAL_OK)
8008ecc: 480b ldr r0, [pc, #44] @ (8008efc <USER_initialize+0x40>)
8008ece: f7fa f850 bl 8002f72 <HAL_MMC_Init>
8008ed2: 4603 mov r3, r0
8008ed4: 2b00 cmp r3, #0
8008ed6: d107 bne.n 8008ee8 <USER_initialize+0x2c>
{
Stat &= ~STA_NOINIT;
8008ed8: 4b07 ldr r3, [pc, #28] @ (8008ef8 <USER_initialize+0x3c>)
8008eda: 781b ldrb r3, [r3, #0]
8008edc: b2db uxtb r3, r3
8008ede: f023 0301 bic.w r3, r3, #1
8008ee2: b2da uxtb r2, r3
8008ee4: 4b04 ldr r3, [pc, #16] @ (8008ef8 <USER_initialize+0x3c>)
8008ee6: 701a strb r2, [r3, #0]
}
return Stat;
8008ee8: 4b03 ldr r3, [pc, #12] @ (8008ef8 <USER_initialize+0x3c>)
8008eea: 781b ldrb r3, [r3, #0]
8008eec: b2db uxtb r3, r3
/* USER CODE END INIT */
}
8008eee: 4618 mov r0, r3
8008ef0: 3708 adds r7, #8
8008ef2: 46bd mov sp, r7
8008ef4: bd80 pop {r7, pc}
8008ef6: bf00 nop
8008ef8: 20000009 .word 0x20000009
8008efc: 2000f794 .word 0x2000f794
08008f00 <USER_status>:
* @retval DSTATUS: Operation status
*/
DSTATUS USER_status (
BYTE pdrv /* Physical drive number to identify the drive */
)
{
8008f00: b580 push {r7, lr}
8008f02: b082 sub sp, #8
8008f04: af00 add r7, sp, #0
8008f06: 4603 mov r3, r0
8008f08: 71fb strb r3, [r7, #7]
/* USER CODE BEGIN STATUS */
Stat = STA_NOINIT;
8008f0a: 4b0c ldr r3, [pc, #48] @ (8008f3c <USER_status+0x3c>)
8008f0c: 2201 movs r2, #1
8008f0e: 701a strb r2, [r3, #0]
if(HAL_MMC_GetCardState(&hmmc) == HAL_MMC_CARD_TRANSFER)
8008f10: 480b ldr r0, [pc, #44] @ (8008f40 <USER_status+0x40>)
8008f12: f7fa ff91 bl 8003e38 <HAL_MMC_GetCardState>
8008f16: 4603 mov r3, r0
8008f18: 2b04 cmp r3, #4
8008f1a: d107 bne.n 8008f2c <USER_status+0x2c>
{
Stat &= ~STA_NOINIT;
8008f1c: 4b07 ldr r3, [pc, #28] @ (8008f3c <USER_status+0x3c>)
8008f1e: 781b ldrb r3, [r3, #0]
8008f20: b2db uxtb r3, r3
8008f22: f023 0301 bic.w r3, r3, #1
8008f26: b2da uxtb r2, r3
8008f28: 4b04 ldr r3, [pc, #16] @ (8008f3c <USER_status+0x3c>)
8008f2a: 701a strb r2, [r3, #0]
}
return Stat;
8008f2c: 4b03 ldr r3, [pc, #12] @ (8008f3c <USER_status+0x3c>)
8008f2e: 781b ldrb r3, [r3, #0]
8008f30: b2db uxtb r3, r3
/* USER CODE END STATUS */
}
8008f32: 4618 mov r0, r3
8008f34: 3708 adds r7, #8
8008f36: 46bd mov sp, r7
8008f38: bd80 pop {r7, pc}
8008f3a: bf00 nop
8008f3c: 20000009 .word 0x20000009
8008f40: 2000f794 .word 0x2000f794
08008f44 <USER_read>:
BYTE pdrv, /* Physical drive nmuber to identify the drive */
BYTE *buff, /* Data buffer to store read data */
DWORD sector, /* Sector address in LBA */
UINT count /* Number of sectors to read */
)
{
8008f44: b580 push {r7, lr}
8008f46: b088 sub sp, #32
8008f48: af02 add r7, sp, #8
8008f4a: 60b9 str r1, [r7, #8]
8008f4c: 607a str r2, [r7, #4]
8008f4e: 603b str r3, [r7, #0]
8008f50: 4603 mov r3, r0
8008f52: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN READ */
DRESULT res = RES_ERROR;
8008f54: 2301 movs r3, #1
8008f56: 75fb strb r3, [r7, #23]
uint32_t timeout = 100000;
8008f58: 4b13 ldr r3, [pc, #76] @ (8008fa8 <USER_read+0x64>)
8008f5a: 613b str r3, [r7, #16]
__ASM volatile ("cpsid i" : : : "memory");
8008f5c: b672 cpsid i
}
8008f5e: bf00 nop
__disable_irq();
if(HAL_MMC_ReadBlocks(&hmmc, (uint8_t*)buff, (uint32_t)sector, count, HAL_MAX_DELAY) == HAL_OK)
8008f60: f04f 33ff mov.w r3, #4294967295
8008f64: 9300 str r3, [sp, #0]
8008f66: 683b ldr r3, [r7, #0]
8008f68: 687a ldr r2, [r7, #4]
8008f6a: 68b9 ldr r1, [r7, #8]
8008f6c: 480f ldr r0, [pc, #60] @ (8008fac <USER_read+0x68>)
8008f6e: f7fa f8c9 bl 8003104 <HAL_MMC_ReadBlocks>
8008f72: 4603 mov r3, r0
8008f74: 2b00 cmp r3, #0
8008f76: d10f bne.n 8008f98 <USER_read+0x54>
{
while(HAL_MMC_GetCardState(&hmmc) != HAL_MMC_CARD_TRANSFER)
8008f78: e006 b.n 8008f88 <USER_read+0x44>
{
if (timeout-- == 0)
8008f7a: 693b ldr r3, [r7, #16]
8008f7c: 1e5a subs r2, r3, #1
8008f7e: 613a str r2, [r7, #16]
8008f80: 2b00 cmp r3, #0
8008f82: d101 bne.n 8008f88 <USER_read+0x44>
{
return RES_ERROR;
8008f84: 2301 movs r3, #1
8008f86: e00a b.n 8008f9e <USER_read+0x5a>
while(HAL_MMC_GetCardState(&hmmc) != HAL_MMC_CARD_TRANSFER)
8008f88: 4808 ldr r0, [pc, #32] @ (8008fac <USER_read+0x68>)
8008f8a: f7fa ff55 bl 8003e38 <HAL_MMC_GetCardState>
8008f8e: 4603 mov r3, r0
8008f90: 2b04 cmp r3, #4
8008f92: d1f2 bne.n 8008f7a <USER_read+0x36>
}
}
res = RES_OK;
8008f94: 2300 movs r3, #0
8008f96: 75fb strb r3, [r7, #23]
__ASM volatile ("cpsie i" : : : "memory");
8008f98: b662 cpsie i
}
8008f9a: bf00 nop
}
__enable_irq();
return res;
8008f9c: 7dfb ldrb r3, [r7, #23]
/* USER CODE END READ */
}
8008f9e: 4618 mov r0, r3
8008fa0: 3718 adds r7, #24
8008fa2: 46bd mov sp, r7
8008fa4: bd80 pop {r7, pc}
8008fa6: bf00 nop
8008fa8: 000186a0 .word 0x000186a0
8008fac: 2000f794 .word 0x2000f794
08008fb0 <USER_write>:
BYTE pdrv, /* Physical drive nmuber to identify the drive */
const BYTE *buff, /* Data to be written */
DWORD sector, /* Sector address in LBA */
UINT count /* Number of sectors to write */
)
{
8008fb0: b580 push {r7, lr}
8008fb2: b088 sub sp, #32
8008fb4: af02 add r7, sp, #8
8008fb6: 60b9 str r1, [r7, #8]
8008fb8: 607a str r2, [r7, #4]
8008fba: 603b str r3, [r7, #0]
8008fbc: 4603 mov r3, r0
8008fbe: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN WRITE */
/* USER CODE HERE */
DRESULT res = RES_ERROR;
8008fc0: 2301 movs r3, #1
8008fc2: 75fb strb r3, [r7, #23]
uint32_t timeout = 100000;
8008fc4: 4b13 ldr r3, [pc, #76] @ (8009014 <USER_write+0x64>)
8008fc6: 613b str r3, [r7, #16]
__ASM volatile ("cpsid i" : : : "memory");
8008fc8: b672 cpsid i
}
8008fca: bf00 nop
__disable_irq();
if(HAL_MMC_WriteBlocks(&hmmc, (uint8_t*)buff, (uint32_t)sector, count, HAL_MAX_DELAY) == HAL_OK)
8008fcc: f04f 33ff mov.w r3, #4294967295
8008fd0: 9300 str r3, [sp, #0]
8008fd2: 683b ldr r3, [r7, #0]
8008fd4: 687a ldr r2, [r7, #4]
8008fd6: 68b9 ldr r1, [r7, #8]
8008fd8: 480f ldr r0, [pc, #60] @ (8009018 <USER_write+0x68>)
8008fda: f7fa fa55 bl 8003488 <HAL_MMC_WriteBlocks>
8008fde: 4603 mov r3, r0
8008fe0: 2b00 cmp r3, #0
8008fe2: d10f bne.n 8009004 <USER_write+0x54>
{
while(HAL_MMC_GetCardState(&hmmc) != HAL_MMC_CARD_TRANSFER)
8008fe4: e006 b.n 8008ff4 <USER_write+0x44>
{
if (timeout-- == 0)
8008fe6: 693b ldr r3, [r7, #16]
8008fe8: 1e5a subs r2, r3, #1
8008fea: 613a str r2, [r7, #16]
8008fec: 2b00 cmp r3, #0
8008fee: d101 bne.n 8008ff4 <USER_write+0x44>
{
return RES_ERROR;
8008ff0: 2301 movs r3, #1
8008ff2: e00a b.n 800900a <USER_write+0x5a>
while(HAL_MMC_GetCardState(&hmmc) != HAL_MMC_CARD_TRANSFER)
8008ff4: 4808 ldr r0, [pc, #32] @ (8009018 <USER_write+0x68>)
8008ff6: f7fa ff1f bl 8003e38 <HAL_MMC_GetCardState>
8008ffa: 4603 mov r3, r0
8008ffc: 2b04 cmp r3, #4
8008ffe: d1f2 bne.n 8008fe6 <USER_write+0x36>
}
}
res = RES_OK;
8009000: 2300 movs r3, #0
8009002: 75fb strb r3, [r7, #23]
__ASM volatile ("cpsie i" : : : "memory");
8009004: b662 cpsie i
}
8009006: bf00 nop
}
__enable_irq();
return res;
8009008: 7dfb ldrb r3, [r7, #23]
/* USER CODE END WRITE */
}
800900a: 4618 mov r0, r3
800900c: 3718 adds r7, #24
800900e: 46bd mov sp, r7
8009010: bd80 pop {r7, pc}
8009012: bf00 nop
8009014: 000186a0 .word 0x000186a0
8009018: 2000f794 .word 0x2000f794
0800901c <USER_ioctl>:
DRESULT USER_ioctl (
BYTE pdrv, /* Physical drive nmuber (0..) */
BYTE cmd, /* Control code */
void *buff /* Buffer to send/receive control data */
)
{
800901c: b580 push {r7, lr}
800901e: b08a sub sp, #40 @ 0x28
8009020: af00 add r7, sp, #0
8009022: 4603 mov r3, r0
8009024: 603a str r2, [r7, #0]
8009026: 71fb strb r3, [r7, #7]
8009028: 460b mov r3, r1
800902a: 71bb strb r3, [r7, #6]
/* USER CODE BEGIN IOCTL */
DRESULT res = RES_ERROR;
800902c: 2301 movs r3, #1
800902e: f887 3027 strb.w r3, [r7, #39] @ 0x27
HAL_MMC_CardInfoTypeDef CardInfo;
if (Stat & STA_NOINIT) return RES_NOTRDY;
8009032: 4b24 ldr r3, [pc, #144] @ (80090c4 <USER_ioctl+0xa8>)
8009034: 781b ldrb r3, [r3, #0]
8009036: b2db uxtb r3, r3
8009038: f003 0301 and.w r3, r3, #1
800903c: 2b00 cmp r3, #0
800903e: d001 beq.n 8009044 <USER_ioctl+0x28>
8009040: 2303 movs r3, #3
8009042: e03b b.n 80090bc <USER_ioctl+0xa0>
switch (cmd)
8009044: 79bb ldrb r3, [r7, #6]
8009046: 2b03 cmp r3, #3
8009048: d833 bhi.n 80090b2 <USER_ioctl+0x96>
800904a: a201 add r2, pc, #4 @ (adr r2, 8009050 <USER_ioctl+0x34>)
800904c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8009050: 08009061 .word 0x08009061
8009054: 08009069 .word 0x08009069
8009058: 08009083 .word 0x08009083
800905c: 0800909f .word 0x0800909f
{
/* Make sure that no pending write process */
case CTRL_SYNC :
res = RES_OK;
8009060: 2300 movs r3, #0
8009062: f887 3027 strb.w r3, [r7, #39] @ 0x27
break;
8009066: e027 b.n 80090b8 <USER_ioctl+0x9c>
/* Get number of sectors on the disk (DWORD) */
case GET_SECTOR_COUNT :
HAL_MMC_GetCardInfo(&hmmc, &CardInfo);
8009068: f107 0308 add.w r3, r7, #8
800906c: 4619 mov r1, r3
800906e: 4816 ldr r0, [pc, #88] @ (80090c8 <USER_ioctl+0xac>)
8009070: f7fa fd1e bl 8003ab0 <HAL_MMC_GetCardInfo>
*(DWORD*)buff = CardInfo.LogBlockNbr;
8009074: 69fa ldr r2, [r7, #28]
8009076: 683b ldr r3, [r7, #0]
8009078: 601a str r2, [r3, #0]
res = RES_OK;
800907a: 2300 movs r3, #0
800907c: f887 3027 strb.w r3, [r7, #39] @ 0x27
break;
8009080: e01a b.n 80090b8 <USER_ioctl+0x9c>
/* Get R/W sector size (WORD) */
case GET_SECTOR_SIZE :
HAL_MMC_GetCardInfo(&hmmc, &CardInfo);
8009082: f107 0308 add.w r3, r7, #8
8009086: 4619 mov r1, r3
8009088: 480f ldr r0, [pc, #60] @ (80090c8 <USER_ioctl+0xac>)
800908a: f7fa fd11 bl 8003ab0 <HAL_MMC_GetCardInfo>
*(WORD*)buff = CardInfo.LogBlockSize;
800908e: 6a3b ldr r3, [r7, #32]
8009090: b29a uxth r2, r3
8009092: 683b ldr r3, [r7, #0]
8009094: 801a strh r2, [r3, #0]
res = RES_OK;
8009096: 2300 movs r3, #0
8009098: f887 3027 strb.w r3, [r7, #39] @ 0x27
break;
800909c: e00c b.n 80090b8 <USER_ioctl+0x9c>
/* Get erase block size in unit of sector (DWORD) */
case GET_BLOCK_SIZE :
HAL_MMC_GetCardInfo(&hmmc, &CardInfo);
800909e: f107 0308 add.w r3, r7, #8
80090a2: 4619 mov r1, r3
80090a4: 4808 ldr r0, [pc, #32] @ (80090c8 <USER_ioctl+0xac>)
80090a6: f7fa fd03 bl 8003ab0 <HAL_MMC_GetCardInfo>
*(DWORD*)buff = CardInfo.LogBlockSize;
80090aa: 6a3a ldr r2, [r7, #32]
80090ac: 683b ldr r3, [r7, #0]
80090ae: 601a str r2, [r3, #0]
break;
80090b0: e002 b.n 80090b8 <USER_ioctl+0x9c>
default:
res = RES_PARERR;
80090b2: 2304 movs r3, #4
80090b4: f887 3027 strb.w r3, [r7, #39] @ 0x27
}
return res;
80090b8: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
/* USER CODE END IOCTL */
}
80090bc: 4618 mov r0, r3
80090be: 3728 adds r7, #40 @ 0x28
80090c0: 46bd mov sp, r7
80090c2: bd80 pop {r7, pc}
80090c4: 20000009 .word 0x20000009
80090c8: 2000f794 .word 0x2000f794
080090cc <USBD_MSC_Init>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status
*/
uint8_t USBD_MSC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
80090cc: b580 push {r7, lr}
80090ce: b084 sub sp, #16
80090d0: af00 add r7, sp, #0
80090d2: 6078 str r0, [r7, #4]
80090d4: 460b mov r3, r1
80090d6: 70fb strb r3, [r7, #3]
UNUSED(cfgidx);
USBD_MSC_BOT_HandleTypeDef *hmsc;
hmsc = (USBD_MSC_BOT_HandleTypeDef *)USBD_malloc(sizeof(USBD_MSC_BOT_HandleTypeDef));
80090d8: f242 0074 movw r0, #8308 @ 0x2074
80090dc: f009 ff14 bl 8012f08 <USBD_static_malloc>
80090e0: 60f8 str r0, [r7, #12]
if (hmsc == NULL)
80090e2: 68fb ldr r3, [r7, #12]
80090e4: 2b00 cmp r3, #0
80090e6: d109 bne.n 80090fc <USBD_MSC_Init+0x30>
{
pdev->pClassDataCmsit[pdev->classId] = NULL;
80090e8: 687b ldr r3, [r7, #4]
80090ea: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
80090ee: 687b ldr r3, [r7, #4]
80090f0: 32b0 adds r2, #176 @ 0xb0
80090f2: 2100 movs r1, #0
80090f4: f843 1022 str.w r1, [r3, r2, lsl #2]
return (uint8_t)USBD_EMEM;
80090f8: 2302 movs r3, #2
80090fa: e06e b.n 80091da <USBD_MSC_Init+0x10e>
}
pdev->pClassDataCmsit[pdev->classId] = (void *)hmsc;
80090fc: 687b ldr r3, [r7, #4]
80090fe: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8009102: 687b ldr r3, [r7, #4]
8009104: 32b0 adds r2, #176 @ 0xb0
8009106: 68f9 ldr r1, [r7, #12]
8009108: f843 1022 str.w r1, [r3, r2, lsl #2]
pdev->pClassData = pdev->pClassDataCmsit[pdev->classId];
800910c: 687b ldr r3, [r7, #4]
800910e: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8009112: 687b ldr r3, [r7, #4]
8009114: 32b0 adds r2, #176 @ 0xb0
8009116: f853 2022 ldr.w r2, [r3, r2, lsl #2]
800911a: 687b ldr r3, [r7, #4]
800911c: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
/* Get the Endpoints addresses allocated for this class instance */
MSCInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
MSCOutEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_OUT, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
#endif /* USE_USBD_COMPOSITE */
if (pdev->dev_speed == USBD_SPEED_HIGH)
8009120: 687b ldr r3, [r7, #4]
8009122: 7c1b ldrb r3, [r3, #16]
8009124: 2b00 cmp r3, #0
8009126: d12b bne.n 8009180 <USBD_MSC_Init+0xb4>
{
/* Open EP OUT */
(void)USBD_LL_OpenEP(pdev, MSCOutEpAdd, USBD_EP_TYPE_BULK, MSC_MAX_HS_PACKET);
8009128: 4b2e ldr r3, [pc, #184] @ (80091e4 <USBD_MSC_Init+0x118>)
800912a: 7819 ldrb r1, [r3, #0]
800912c: f44f 7300 mov.w r3, #512 @ 0x200
8009130: 2202 movs r2, #2
8009132: 6878 ldr r0, [r7, #4]
8009134: f009 fda5 bl 8012c82 <USBD_LL_OpenEP>
pdev->ep_out[MSCOutEpAdd & 0xFU].is_used = 1U;
8009138: 4b2a ldr r3, [pc, #168] @ (80091e4 <USBD_MSC_Init+0x118>)
800913a: 781b ldrb r3, [r3, #0]
800913c: f003 020f and.w r2, r3, #15
8009140: 6879 ldr r1, [r7, #4]
8009142: 4613 mov r3, r2
8009144: 009b lsls r3, r3, #2
8009146: 4413 add r3, r2
8009148: 009b lsls r3, r3, #2
800914a: 440b add r3, r1
800914c: f503 73b2 add.w r3, r3, #356 @ 0x164
8009150: 2201 movs r2, #1
8009152: 801a strh r2, [r3, #0]
/* Open EP IN */
(void)USBD_LL_OpenEP(pdev, MSCInEpAdd, USBD_EP_TYPE_BULK, MSC_MAX_HS_PACKET);
8009154: 4b24 ldr r3, [pc, #144] @ (80091e8 <USBD_MSC_Init+0x11c>)
8009156: 7819 ldrb r1, [r3, #0]
8009158: f44f 7300 mov.w r3, #512 @ 0x200
800915c: 2202 movs r2, #2
800915e: 6878 ldr r0, [r7, #4]
8009160: f009 fd8f bl 8012c82 <USBD_LL_OpenEP>
pdev->ep_in[MSCInEpAdd & 0xFU].is_used = 1U;
8009164: 4b20 ldr r3, [pc, #128] @ (80091e8 <USBD_MSC_Init+0x11c>)
8009166: 781b ldrb r3, [r3, #0]
8009168: f003 020f and.w r2, r3, #15
800916c: 6879 ldr r1, [r7, #4]
800916e: 4613 mov r3, r2
8009170: 009b lsls r3, r3, #2
8009172: 4413 add r3, r2
8009174: 009b lsls r3, r3, #2
8009176: 440b add r3, r1
8009178: 3324 adds r3, #36 @ 0x24
800917a: 2201 movs r2, #1
800917c: 801a strh r2, [r3, #0]
800917e: e028 b.n 80091d2 <USBD_MSC_Init+0x106>
}
else
{
/* Open EP OUT */
(void)USBD_LL_OpenEP(pdev, MSCOutEpAdd, USBD_EP_TYPE_BULK, MSC_MAX_FS_PACKET);
8009180: 4b18 ldr r3, [pc, #96] @ (80091e4 <USBD_MSC_Init+0x118>)
8009182: 7819 ldrb r1, [r3, #0]
8009184: 2340 movs r3, #64 @ 0x40
8009186: 2202 movs r2, #2
8009188: 6878 ldr r0, [r7, #4]
800918a: f009 fd7a bl 8012c82 <USBD_LL_OpenEP>
pdev->ep_out[MSCOutEpAdd & 0xFU].is_used = 1U;
800918e: 4b15 ldr r3, [pc, #84] @ (80091e4 <USBD_MSC_Init+0x118>)
8009190: 781b ldrb r3, [r3, #0]
8009192: f003 020f and.w r2, r3, #15
8009196: 6879 ldr r1, [r7, #4]
8009198: 4613 mov r3, r2
800919a: 009b lsls r3, r3, #2
800919c: 4413 add r3, r2
800919e: 009b lsls r3, r3, #2
80091a0: 440b add r3, r1
80091a2: f503 73b2 add.w r3, r3, #356 @ 0x164
80091a6: 2201 movs r2, #1
80091a8: 801a strh r2, [r3, #0]
/* Open EP IN */
(void)USBD_LL_OpenEP(pdev, MSCInEpAdd, USBD_EP_TYPE_BULK, MSC_MAX_FS_PACKET);
80091aa: 4b0f ldr r3, [pc, #60] @ (80091e8 <USBD_MSC_Init+0x11c>)
80091ac: 7819 ldrb r1, [r3, #0]
80091ae: 2340 movs r3, #64 @ 0x40
80091b0: 2202 movs r2, #2
80091b2: 6878 ldr r0, [r7, #4]
80091b4: f009 fd65 bl 8012c82 <USBD_LL_OpenEP>
pdev->ep_in[MSCInEpAdd & 0xFU].is_used = 1U;
80091b8: 4b0b ldr r3, [pc, #44] @ (80091e8 <USBD_MSC_Init+0x11c>)
80091ba: 781b ldrb r3, [r3, #0]
80091bc: f003 020f and.w r2, r3, #15
80091c0: 6879 ldr r1, [r7, #4]
80091c2: 4613 mov r3, r2
80091c4: 009b lsls r3, r3, #2
80091c6: 4413 add r3, r2
80091c8: 009b lsls r3, r3, #2
80091ca: 440b add r3, r1
80091cc: 3324 adds r3, #36 @ 0x24
80091ce: 2201 movs r2, #1
80091d0: 801a strh r2, [r3, #0]
}
/* Init the BOT layer */
MSC_BOT_Init(pdev);
80091d2: 6878 ldr r0, [r7, #4]
80091d4: f000 fa2c bl 8009630 <MSC_BOT_Init>
return (uint8_t)USBD_OK;
80091d8: 2300 movs r3, #0
}
80091da: 4618 mov r0, r3
80091dc: 3710 adds r7, #16
80091de: 46bd mov sp, r7
80091e0: bd80 pop {r7, pc}
80091e2: bf00 nop
80091e4: 20000083 .word 0x20000083
80091e8: 20000082 .word 0x20000082
080091ec <USBD_MSC_DeInit>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status
*/
uint8_t USBD_MSC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
80091ec: b580 push {r7, lr}
80091ee: b082 sub sp, #8
80091f0: af00 add r7, sp, #0
80091f2: 6078 str r0, [r7, #4]
80091f4: 460b mov r3, r1
80091f6: 70fb strb r3, [r7, #3]
MSCInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
MSCOutEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_OUT, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
#endif /* USE_USBD_COMPOSITE */
/* Close MSC EPs */
(void)USBD_LL_CloseEP(pdev, MSCOutEpAdd);
80091f8: 4b26 ldr r3, [pc, #152] @ (8009294 <USBD_MSC_DeInit+0xa8>)
80091fa: 781b ldrb r3, [r3, #0]
80091fc: 4619 mov r1, r3
80091fe: 6878 ldr r0, [r7, #4]
8009200: f009 fd65 bl 8012cce <USBD_LL_CloseEP>
pdev->ep_out[MSCOutEpAdd & 0xFU].is_used = 0U;
8009204: 4b23 ldr r3, [pc, #140] @ (8009294 <USBD_MSC_DeInit+0xa8>)
8009206: 781b ldrb r3, [r3, #0]
8009208: f003 020f and.w r2, r3, #15
800920c: 6879 ldr r1, [r7, #4]
800920e: 4613 mov r3, r2
8009210: 009b lsls r3, r3, #2
8009212: 4413 add r3, r2
8009214: 009b lsls r3, r3, #2
8009216: 440b add r3, r1
8009218: f503 73b2 add.w r3, r3, #356 @ 0x164
800921c: 2200 movs r2, #0
800921e: 801a strh r2, [r3, #0]
/* Close EP IN */
(void)USBD_LL_CloseEP(pdev, MSCInEpAdd);
8009220: 4b1d ldr r3, [pc, #116] @ (8009298 <USBD_MSC_DeInit+0xac>)
8009222: 781b ldrb r3, [r3, #0]
8009224: 4619 mov r1, r3
8009226: 6878 ldr r0, [r7, #4]
8009228: f009 fd51 bl 8012cce <USBD_LL_CloseEP>
pdev->ep_in[MSCInEpAdd & 0xFU].is_used = 0U;
800922c: 4b1a ldr r3, [pc, #104] @ (8009298 <USBD_MSC_DeInit+0xac>)
800922e: 781b ldrb r3, [r3, #0]
8009230: f003 020f and.w r2, r3, #15
8009234: 6879 ldr r1, [r7, #4]
8009236: 4613 mov r3, r2
8009238: 009b lsls r3, r3, #2
800923a: 4413 add r3, r2
800923c: 009b lsls r3, r3, #2
800923e: 440b add r3, r1
8009240: 3324 adds r3, #36 @ 0x24
8009242: 2200 movs r2, #0
8009244: 801a strh r2, [r3, #0]
/* Free MSC Class Resources */
if (pdev->pClassDataCmsit[pdev->classId] != NULL)
8009246: 687b ldr r3, [r7, #4]
8009248: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800924c: 687b ldr r3, [r7, #4]
800924e: 32b0 adds r2, #176 @ 0xb0
8009250: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009254: 2b00 cmp r3, #0
8009256: d018 beq.n 800928a <USBD_MSC_DeInit+0x9e>
{
/* De-Init the BOT layer */
MSC_BOT_DeInit(pdev);
8009258: 6878 ldr r0, [r7, #4]
800925a: f000 fa6f bl 800973c <MSC_BOT_DeInit>
(void)USBD_free(pdev->pClassDataCmsit[pdev->classId]);
800925e: 687b ldr r3, [r7, #4]
8009260: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8009264: 687b ldr r3, [r7, #4]
8009266: 32b0 adds r2, #176 @ 0xb0
8009268: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800926c: 4618 mov r0, r3
800926e: f009 fe59 bl 8012f24 <USBD_static_free>
pdev->pClassDataCmsit[pdev->classId] = NULL;
8009272: 687b ldr r3, [r7, #4]
8009274: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8009278: 687b ldr r3, [r7, #4]
800927a: 32b0 adds r2, #176 @ 0xb0
800927c: 2100 movs r1, #0
800927e: f843 1022 str.w r1, [r3, r2, lsl #2]
pdev->pClassData = NULL;
8009282: 687b ldr r3, [r7, #4]
8009284: 2200 movs r2, #0
8009286: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
}
return (uint8_t)USBD_OK;
800928a: 2300 movs r3, #0
}
800928c: 4618 mov r0, r3
800928e: 3708 adds r7, #8
8009290: 46bd mov sp, r7
8009292: bd80 pop {r7, pc}
8009294: 20000083 .word 0x20000083
8009298: 20000082 .word 0x20000082
0800929c <USBD_MSC_Setup>:
* @param pdev: device instance
* @param req: USB request
* @retval status
*/
uint8_t USBD_MSC_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800929c: b580 push {r7, lr}
800929e: b086 sub sp, #24
80092a0: af00 add r7, sp, #0
80092a2: 6078 str r0, [r7, #4]
80092a4: 6039 str r1, [r7, #0]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
80092a6: 687b ldr r3, [r7, #4]
80092a8: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
80092ac: 687b ldr r3, [r7, #4]
80092ae: 32b0 adds r2, #176 @ 0xb0
80092b0: f853 3022 ldr.w r3, [r3, r2, lsl #2]
80092b4: 613b str r3, [r7, #16]
USBD_StatusTypeDef ret = USBD_OK;
80092b6: 2300 movs r3, #0
80092b8: 75fb strb r3, [r7, #23]
uint16_t status_info = 0U;
80092ba: 2300 movs r3, #0
80092bc: 81fb strh r3, [r7, #14]
/* Get the Endpoints addresses allocated for this class instance */
MSCInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
MSCOutEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_OUT, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
#endif /* USE_USBD_COMPOSITE */
if (hmsc == NULL)
80092be: 693b ldr r3, [r7, #16]
80092c0: 2b00 cmp r3, #0
80092c2: d101 bne.n 80092c8 <USBD_MSC_Setup+0x2c>
{
return (uint8_t)USBD_FAIL;
80092c4: 2303 movs r3, #3
80092c6: e0e1 b.n 800948c <USBD_MSC_Setup+0x1f0>
}
switch (req->bmRequest & USB_REQ_TYPE_MASK)
80092c8: 683b ldr r3, [r7, #0]
80092ca: 781b ldrb r3, [r3, #0]
80092cc: f003 0360 and.w r3, r3, #96 @ 0x60
80092d0: 2b00 cmp r3, #0
80092d2: d053 beq.n 800937c <USBD_MSC_Setup+0xe0>
80092d4: 2b20 cmp r3, #32
80092d6: f040 80d1 bne.w 800947c <USBD_MSC_Setup+0x1e0>
{
/* Class request */
case USB_REQ_TYPE_CLASS:
switch (req->bRequest)
80092da: 683b ldr r3, [r7, #0]
80092dc: 785b ldrb r3, [r3, #1]
80092de: 2bfe cmp r3, #254 @ 0xfe
80092e0: d002 beq.n 80092e8 <USBD_MSC_Setup+0x4c>
80092e2: 2bff cmp r3, #255 @ 0xff
80092e4: d02a beq.n 800933c <USBD_MSC_Setup+0xa0>
80092e6: e041 b.n 800936c <USBD_MSC_Setup+0xd0>
{
case BOT_GET_MAX_LUN:
if ((req->wValue == 0U) && (req->wLength == 1U) &&
80092e8: 683b ldr r3, [r7, #0]
80092ea: 885b ldrh r3, [r3, #2]
80092ec: 2b00 cmp r3, #0
80092ee: d11e bne.n 800932e <USBD_MSC_Setup+0x92>
80092f0: 683b ldr r3, [r7, #0]
80092f2: 88db ldrh r3, [r3, #6]
80092f4: 2b01 cmp r3, #1
80092f6: d11a bne.n 800932e <USBD_MSC_Setup+0x92>
((req->bmRequest & 0x80U) == 0x80U))
80092f8: 683b ldr r3, [r7, #0]
80092fa: 781b ldrb r3, [r3, #0]
80092fc: b25b sxtb r3, r3
if ((req->wValue == 0U) && (req->wLength == 1U) &&
80092fe: 2b00 cmp r3, #0
8009300: da15 bge.n 800932e <USBD_MSC_Setup+0x92>
{
hmsc->max_lun = (uint32_t)((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->GetMaxLun();
8009302: 687b ldr r3, [r7, #4]
8009304: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8009308: 687a ldr r2, [r7, #4]
800930a: 33b0 adds r3, #176 @ 0xb0
800930c: 009b lsls r3, r3, #2
800930e: 4413 add r3, r2
8009310: 685b ldr r3, [r3, #4]
8009312: 699b ldr r3, [r3, #24]
8009314: 4798 blx r3
8009316: 4603 mov r3, r0
8009318: 461a mov r2, r3
800931a: 693b ldr r3, [r7, #16]
800931c: 601a str r2, [r3, #0]
(void)USBD_CtlSendData(pdev, (uint8_t *)&hmsc->max_lun, 1U);
800931e: 693b ldr r3, [r7, #16]
8009320: 2201 movs r2, #1
8009322: 4619 mov r1, r3
8009324: 6878 ldr r0, [r7, #4]
8009326: f003 fa61 bl 800c7ec <USBD_CtlSendData>
800932a: bf00 nop
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800932c: e025 b.n 800937a <USBD_MSC_Setup+0xde>
USBD_CtlError(pdev, req);
800932e: 6839 ldr r1, [r7, #0]
8009330: 6878 ldr r0, [r7, #4]
8009332: f003 f9de bl 800c6f2 <USBD_CtlError>
ret = USBD_FAIL;
8009336: 2303 movs r3, #3
8009338: 75fb strb r3, [r7, #23]
break;
800933a: e01e b.n 800937a <USBD_MSC_Setup+0xde>
case BOT_RESET :
if ((req->wValue == 0U) && (req->wLength == 0U) &&
800933c: 683b ldr r3, [r7, #0]
800933e: 885b ldrh r3, [r3, #2]
8009340: 2b00 cmp r3, #0
8009342: d10c bne.n 800935e <USBD_MSC_Setup+0xc2>
8009344: 683b ldr r3, [r7, #0]
8009346: 88db ldrh r3, [r3, #6]
8009348: 2b00 cmp r3, #0
800934a: d108 bne.n 800935e <USBD_MSC_Setup+0xc2>
((req->bmRequest & 0x80U) != 0x80U))
800934c: 683b ldr r3, [r7, #0]
800934e: 781b ldrb r3, [r3, #0]
8009350: b25b sxtb r3, r3
if ((req->wValue == 0U) && (req->wLength == 0U) &&
8009352: 2b00 cmp r3, #0
8009354: db03 blt.n 800935e <USBD_MSC_Setup+0xc2>
{
MSC_BOT_Reset(pdev);
8009356: 6878 ldr r0, [r7, #4]
8009358: f000 f9bc bl 80096d4 <MSC_BOT_Reset>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800935c: e00d b.n 800937a <USBD_MSC_Setup+0xde>
USBD_CtlError(pdev, req);
800935e: 6839 ldr r1, [r7, #0]
8009360: 6878 ldr r0, [r7, #4]
8009362: f003 f9c6 bl 800c6f2 <USBD_CtlError>
ret = USBD_FAIL;
8009366: 2303 movs r3, #3
8009368: 75fb strb r3, [r7, #23]
break;
800936a: e006 b.n 800937a <USBD_MSC_Setup+0xde>
default:
USBD_CtlError(pdev, req);
800936c: 6839 ldr r1, [r7, #0]
800936e: 6878 ldr r0, [r7, #4]
8009370: f003 f9bf bl 800c6f2 <USBD_CtlError>
ret = USBD_FAIL;
8009374: 2303 movs r3, #3
8009376: 75fb strb r3, [r7, #23]
break;
8009378: bf00 nop
}
break;
800937a: e086 b.n 800948a <USBD_MSC_Setup+0x1ee>
/* Interface & Endpoint request */
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800937c: 683b ldr r3, [r7, #0]
800937e: 785b ldrb r3, [r3, #1]
8009380: 2b0b cmp r3, #11
8009382: d872 bhi.n 800946a <USBD_MSC_Setup+0x1ce>
8009384: a201 add r2, pc, #4 @ (adr r2, 800938c <USBD_MSC_Setup+0xf0>)
8009386: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800938a: bf00 nop
800938c: 080093bd .word 0x080093bd
8009390: 08009439 .word 0x08009439
8009394: 0800946b .word 0x0800946b
8009398: 0800946b .word 0x0800946b
800939c: 0800946b .word 0x0800946b
80093a0: 0800946b .word 0x0800946b
80093a4: 0800946b .word 0x0800946b
80093a8: 0800946b .word 0x0800946b
80093ac: 0800946b .word 0x0800946b
80093b0: 0800946b .word 0x0800946b
80093b4: 080093e7 .word 0x080093e7
80093b8: 08009411 .word 0x08009411
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80093bc: 687b ldr r3, [r7, #4]
80093be: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80093c2: b2db uxtb r3, r3
80093c4: 2b03 cmp r3, #3
80093c6: d107 bne.n 80093d8 <USBD_MSC_Setup+0x13c>
{
(void)USBD_CtlSendData(pdev, (uint8_t *)&status_info, 2U);
80093c8: f107 030e add.w r3, r7, #14
80093cc: 2202 movs r2, #2
80093ce: 4619 mov r1, r3
80093d0: 6878 ldr r0, [r7, #4]
80093d2: f003 fa0b bl 800c7ec <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
80093d6: e050 b.n 800947a <USBD_MSC_Setup+0x1de>
USBD_CtlError(pdev, req);
80093d8: 6839 ldr r1, [r7, #0]
80093da: 6878 ldr r0, [r7, #4]
80093dc: f003 f989 bl 800c6f2 <USBD_CtlError>
ret = USBD_FAIL;
80093e0: 2303 movs r3, #3
80093e2: 75fb strb r3, [r7, #23]
break;
80093e4: e049 b.n 800947a <USBD_MSC_Setup+0x1de>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80093e6: 687b ldr r3, [r7, #4]
80093e8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80093ec: b2db uxtb r3, r3
80093ee: 2b03 cmp r3, #3
80093f0: d107 bne.n 8009402 <USBD_MSC_Setup+0x166>
{
(void)USBD_CtlSendData(pdev, (uint8_t *)&hmsc->interface, 1U);
80093f2: 693b ldr r3, [r7, #16]
80093f4: 3304 adds r3, #4
80093f6: 2201 movs r2, #1
80093f8: 4619 mov r1, r3
80093fa: 6878 ldr r0, [r7, #4]
80093fc: f003 f9f6 bl 800c7ec <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
8009400: e03b b.n 800947a <USBD_MSC_Setup+0x1de>
USBD_CtlError(pdev, req);
8009402: 6839 ldr r1, [r7, #0]
8009404: 6878 ldr r0, [r7, #4]
8009406: f003 f974 bl 800c6f2 <USBD_CtlError>
ret = USBD_FAIL;
800940a: 2303 movs r3, #3
800940c: 75fb strb r3, [r7, #23]
break;
800940e: e034 b.n 800947a <USBD_MSC_Setup+0x1de>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8009410: 687b ldr r3, [r7, #4]
8009412: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8009416: b2db uxtb r3, r3
8009418: 2b03 cmp r3, #3
800941a: d106 bne.n 800942a <USBD_MSC_Setup+0x18e>
{
hmsc->interface = (uint8_t)(req->wValue);
800941c: 683b ldr r3, [r7, #0]
800941e: 885b ldrh r3, [r3, #2]
8009420: b2db uxtb r3, r3
8009422: 461a mov r2, r3
8009424: 693b ldr r3, [r7, #16]
8009426: 605a str r2, [r3, #4]
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
8009428: e027 b.n 800947a <USBD_MSC_Setup+0x1de>
USBD_CtlError(pdev, req);
800942a: 6839 ldr r1, [r7, #0]
800942c: 6878 ldr r0, [r7, #4]
800942e: f003 f960 bl 800c6f2 <USBD_CtlError>
ret = USBD_FAIL;
8009432: 2303 movs r3, #3
8009434: 75fb strb r3, [r7, #23]
break;
8009436: e020 b.n 800947a <USBD_MSC_Setup+0x1de>
case USB_REQ_CLEAR_FEATURE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8009438: 687b ldr r3, [r7, #4]
800943a: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800943e: b2db uxtb r3, r3
8009440: 2b03 cmp r3, #3
8009442: d119 bne.n 8009478 <USBD_MSC_Setup+0x1dc>
{
if (req->wValue == USB_FEATURE_EP_HALT)
8009444: 683b ldr r3, [r7, #0]
8009446: 885b ldrh r3, [r3, #2]
8009448: 2b00 cmp r3, #0
800944a: d115 bne.n 8009478 <USBD_MSC_Setup+0x1dc>
{
/* Flush the FIFO */
(void)USBD_LL_FlushEP(pdev, (uint8_t)req->wIndex);
800944c: 683b ldr r3, [r7, #0]
800944e: 889b ldrh r3, [r3, #4]
8009450: b2db uxtb r3, r3
8009452: 4619 mov r1, r3
8009454: 6878 ldr r0, [r7, #4]
8009456: f009 fc59 bl 8012d0c <USBD_LL_FlushEP>
/* Handle BOT error */
MSC_BOT_CplClrFeature(pdev, (uint8_t)req->wIndex);
800945a: 683b ldr r3, [r7, #0]
800945c: 889b ldrh r3, [r3, #4]
800945e: b2db uxtb r3, r3
8009460: 4619 mov r1, r3
8009462: 6878 ldr r0, [r7, #4]
8009464: f000 fb54 bl 8009b10 <MSC_BOT_CplClrFeature>
}
}
break;
8009468: e006 b.n 8009478 <USBD_MSC_Setup+0x1dc>
default:
USBD_CtlError(pdev, req);
800946a: 6839 ldr r1, [r7, #0]
800946c: 6878 ldr r0, [r7, #4]
800946e: f003 f940 bl 800c6f2 <USBD_CtlError>
ret = USBD_FAIL;
8009472: 2303 movs r3, #3
8009474: 75fb strb r3, [r7, #23]
break;
8009476: e000 b.n 800947a <USBD_MSC_Setup+0x1de>
break;
8009478: bf00 nop
}
break;
800947a: e006 b.n 800948a <USBD_MSC_Setup+0x1ee>
default:
USBD_CtlError(pdev, req);
800947c: 6839 ldr r1, [r7, #0]
800947e: 6878 ldr r0, [r7, #4]
8009480: f003 f937 bl 800c6f2 <USBD_CtlError>
ret = USBD_FAIL;
8009484: 2303 movs r3, #3
8009486: 75fb strb r3, [r7, #23]
break;
8009488: bf00 nop
}
return (uint8_t)ret;
800948a: 7dfb ldrb r3, [r7, #23]
}
800948c: 4618 mov r0, r3
800948e: 3718 adds r7, #24
8009490: 46bd mov sp, r7
8009492: bd80 pop {r7, pc}
08009494 <USBD_MSC_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint index
* @retval status
*/
uint8_t USBD_MSC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
8009494: b580 push {r7, lr}
8009496: b082 sub sp, #8
8009498: af00 add r7, sp, #0
800949a: 6078 str r0, [r7, #4]
800949c: 460b mov r3, r1
800949e: 70fb strb r3, [r7, #3]
MSC_BOT_DataIn(pdev, epnum);
80094a0: 78fb ldrb r3, [r7, #3]
80094a2: 4619 mov r1, r3
80094a4: 6878 ldr r0, [r7, #4]
80094a6: f000 f961 bl 800976c <MSC_BOT_DataIn>
return (uint8_t)USBD_OK;
80094aa: 2300 movs r3, #0
}
80094ac: 4618 mov r0, r3
80094ae: 3708 adds r7, #8
80094b0: 46bd mov sp, r7
80094b2: bd80 pop {r7, pc}
080094b4 <USBD_MSC_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint index
* @retval status
*/
uint8_t USBD_MSC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
80094b4: b580 push {r7, lr}
80094b6: b082 sub sp, #8
80094b8: af00 add r7, sp, #0
80094ba: 6078 str r0, [r7, #4]
80094bc: 460b mov r3, r1
80094be: 70fb strb r3, [r7, #3]
MSC_BOT_DataOut(pdev, epnum);
80094c0: 78fb ldrb r3, [r7, #3]
80094c2: 4619 mov r1, r3
80094c4: 6878 ldr r0, [r7, #4]
80094c6: f000 f98d bl 80097e4 <MSC_BOT_DataOut>
return (uint8_t)USBD_OK;
80094ca: 2300 movs r3, #0
}
80094cc: 4618 mov r0, r3
80094ce: 3708 adds r7, #8
80094d0: 46bd mov sp, r7
80094d2: bd80 pop {r7, pc}
080094d4 <USBD_MSC_GetHSCfgDesc>:
* return configuration descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_MSC_GetHSCfgDesc(uint16_t *length)
{
80094d4: b580 push {r7, lr}
80094d6: b084 sub sp, #16
80094d8: af00 add r7, sp, #0
80094da: 6078 str r0, [r7, #4]
USBD_EpDescTypeDef *pEpInDesc = USBD_GetEpDesc(USBD_MSC_CfgDesc, MSC_EPIN_ADDR);
80094dc: 2181 movs r1, #129 @ 0x81
80094de: 4812 ldr r0, [pc, #72] @ (8009528 <USBD_MSC_GetHSCfgDesc+0x54>)
80094e0: f002 fad1 bl 800ba86 <USBD_GetEpDesc>
80094e4: 60f8 str r0, [r7, #12]
USBD_EpDescTypeDef *pEpOutDesc = USBD_GetEpDesc(USBD_MSC_CfgDesc, MSC_EPOUT_ADDR);
80094e6: 2101 movs r1, #1
80094e8: 480f ldr r0, [pc, #60] @ (8009528 <USBD_MSC_GetHSCfgDesc+0x54>)
80094ea: f002 facc bl 800ba86 <USBD_GetEpDesc>
80094ee: 60b8 str r0, [r7, #8]
if (pEpInDesc != NULL)
80094f0: 68fb ldr r3, [r7, #12]
80094f2: 2b00 cmp r3, #0
80094f4: d006 beq.n 8009504 <USBD_MSC_GetHSCfgDesc+0x30>
{
pEpInDesc->wMaxPacketSize = MSC_MAX_HS_PACKET;
80094f6: 68fb ldr r3, [r7, #12]
80094f8: 2200 movs r2, #0
80094fa: 711a strb r2, [r3, #4]
80094fc: 2200 movs r2, #0
80094fe: f042 0202 orr.w r2, r2, #2
8009502: 715a strb r2, [r3, #5]
}
if (pEpOutDesc != NULL)
8009504: 68bb ldr r3, [r7, #8]
8009506: 2b00 cmp r3, #0
8009508: d006 beq.n 8009518 <USBD_MSC_GetHSCfgDesc+0x44>
{
pEpOutDesc->wMaxPacketSize = MSC_MAX_HS_PACKET;
800950a: 68bb ldr r3, [r7, #8]
800950c: 2200 movs r2, #0
800950e: 711a strb r2, [r3, #4]
8009510: 2200 movs r2, #0
8009512: f042 0202 orr.w r2, r2, #2
8009516: 715a strb r2, [r3, #5]
}
*length = (uint16_t)sizeof(USBD_MSC_CfgDesc);
8009518: 687b ldr r3, [r7, #4]
800951a: 2220 movs r2, #32
800951c: 801a strh r2, [r3, #0]
return USBD_MSC_CfgDesc;
800951e: 4b02 ldr r3, [pc, #8] @ (8009528 <USBD_MSC_GetHSCfgDesc+0x54>)
}
8009520: 4618 mov r0, r3
8009522: 3710 adds r7, #16
8009524: 46bd mov sp, r7
8009526: bd80 pop {r7, pc}
8009528: 20000058 .word 0x20000058
0800952c <USBD_MSC_GetFSCfgDesc>:
* return configuration descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_MSC_GetFSCfgDesc(uint16_t *length)
{
800952c: b580 push {r7, lr}
800952e: b084 sub sp, #16
8009530: af00 add r7, sp, #0
8009532: 6078 str r0, [r7, #4]
USBD_EpDescTypeDef *pEpInDesc = USBD_GetEpDesc(USBD_MSC_CfgDesc, MSC_EPIN_ADDR);
8009534: 2181 movs r1, #129 @ 0x81
8009536: 4812 ldr r0, [pc, #72] @ (8009580 <USBD_MSC_GetFSCfgDesc+0x54>)
8009538: f002 faa5 bl 800ba86 <USBD_GetEpDesc>
800953c: 60f8 str r0, [r7, #12]
USBD_EpDescTypeDef *pEpOutDesc = USBD_GetEpDesc(USBD_MSC_CfgDesc, MSC_EPOUT_ADDR);
800953e: 2101 movs r1, #1
8009540: 480f ldr r0, [pc, #60] @ (8009580 <USBD_MSC_GetFSCfgDesc+0x54>)
8009542: f002 faa0 bl 800ba86 <USBD_GetEpDesc>
8009546: 60b8 str r0, [r7, #8]
if (pEpInDesc != NULL)
8009548: 68fb ldr r3, [r7, #12]
800954a: 2b00 cmp r3, #0
800954c: d006 beq.n 800955c <USBD_MSC_GetFSCfgDesc+0x30>
{
pEpInDesc->wMaxPacketSize = MSC_MAX_FS_PACKET;
800954e: 68fb ldr r3, [r7, #12]
8009550: 2200 movs r2, #0
8009552: f042 0240 orr.w r2, r2, #64 @ 0x40
8009556: 711a strb r2, [r3, #4]
8009558: 2200 movs r2, #0
800955a: 715a strb r2, [r3, #5]
}
if (pEpOutDesc != NULL)
800955c: 68bb ldr r3, [r7, #8]
800955e: 2b00 cmp r3, #0
8009560: d006 beq.n 8009570 <USBD_MSC_GetFSCfgDesc+0x44>
{
pEpOutDesc->wMaxPacketSize = MSC_MAX_FS_PACKET;
8009562: 68bb ldr r3, [r7, #8]
8009564: 2200 movs r2, #0
8009566: f042 0240 orr.w r2, r2, #64 @ 0x40
800956a: 711a strb r2, [r3, #4]
800956c: 2200 movs r2, #0
800956e: 715a strb r2, [r3, #5]
}
*length = (uint16_t)sizeof(USBD_MSC_CfgDesc);
8009570: 687b ldr r3, [r7, #4]
8009572: 2220 movs r2, #32
8009574: 801a strh r2, [r3, #0]
return USBD_MSC_CfgDesc;
8009576: 4b02 ldr r3, [pc, #8] @ (8009580 <USBD_MSC_GetFSCfgDesc+0x54>)
}
8009578: 4618 mov r0, r3
800957a: 3710 adds r7, #16
800957c: 46bd mov sp, r7
800957e: bd80 pop {r7, pc}
8009580: 20000058 .word 0x20000058
08009584 <USBD_MSC_GetOtherSpeedCfgDesc>:
* return other speed configuration descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_MSC_GetOtherSpeedCfgDesc(uint16_t *length)
{
8009584: b580 push {r7, lr}
8009586: b084 sub sp, #16
8009588: af00 add r7, sp, #0
800958a: 6078 str r0, [r7, #4]
USBD_EpDescTypeDef *pEpInDesc = USBD_GetEpDesc(USBD_MSC_CfgDesc, MSC_EPIN_ADDR);
800958c: 2181 movs r1, #129 @ 0x81
800958e: 4812 ldr r0, [pc, #72] @ (80095d8 <USBD_MSC_GetOtherSpeedCfgDesc+0x54>)
8009590: f002 fa79 bl 800ba86 <USBD_GetEpDesc>
8009594: 60f8 str r0, [r7, #12]
USBD_EpDescTypeDef *pEpOutDesc = USBD_GetEpDesc(USBD_MSC_CfgDesc, MSC_EPOUT_ADDR);
8009596: 2101 movs r1, #1
8009598: 480f ldr r0, [pc, #60] @ (80095d8 <USBD_MSC_GetOtherSpeedCfgDesc+0x54>)
800959a: f002 fa74 bl 800ba86 <USBD_GetEpDesc>
800959e: 60b8 str r0, [r7, #8]
if (pEpInDesc != NULL)
80095a0: 68fb ldr r3, [r7, #12]
80095a2: 2b00 cmp r3, #0
80095a4: d006 beq.n 80095b4 <USBD_MSC_GetOtherSpeedCfgDesc+0x30>
{
pEpInDesc->wMaxPacketSize = MSC_MAX_FS_PACKET;
80095a6: 68fb ldr r3, [r7, #12]
80095a8: 2200 movs r2, #0
80095aa: f042 0240 orr.w r2, r2, #64 @ 0x40
80095ae: 711a strb r2, [r3, #4]
80095b0: 2200 movs r2, #0
80095b2: 715a strb r2, [r3, #5]
}
if (pEpOutDesc != NULL)
80095b4: 68bb ldr r3, [r7, #8]
80095b6: 2b00 cmp r3, #0
80095b8: d006 beq.n 80095c8 <USBD_MSC_GetOtherSpeedCfgDesc+0x44>
{
pEpOutDesc->wMaxPacketSize = MSC_MAX_FS_PACKET;
80095ba: 68bb ldr r3, [r7, #8]
80095bc: 2200 movs r2, #0
80095be: f042 0240 orr.w r2, r2, #64 @ 0x40
80095c2: 711a strb r2, [r3, #4]
80095c4: 2200 movs r2, #0
80095c6: 715a strb r2, [r3, #5]
}
*length = (uint16_t)sizeof(USBD_MSC_CfgDesc);
80095c8: 687b ldr r3, [r7, #4]
80095ca: 2220 movs r2, #32
80095cc: 801a strh r2, [r3, #0]
return USBD_MSC_CfgDesc;
80095ce: 4b02 ldr r3, [pc, #8] @ (80095d8 <USBD_MSC_GetOtherSpeedCfgDesc+0x54>)
}
80095d0: 4618 mov r0, r3
80095d2: 3710 adds r7, #16
80095d4: 46bd mov sp, r7
80095d6: bd80 pop {r7, pc}
80095d8: 20000058 .word 0x20000058
080095dc <USBD_MSC_GetDeviceQualifierDescriptor>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_MSC_GetDeviceQualifierDescriptor(uint16_t *length)
{
80095dc: b480 push {r7}
80095de: b083 sub sp, #12
80095e0: af00 add r7, sp, #0
80095e2: 6078 str r0, [r7, #4]
*length = (uint16_t)sizeof(USBD_MSC_DeviceQualifierDesc);
80095e4: 687b ldr r3, [r7, #4]
80095e6: 220a movs r2, #10
80095e8: 801a strh r2, [r3, #0]
return USBD_MSC_DeviceQualifierDesc;
80095ea: 4b03 ldr r3, [pc, #12] @ (80095f8 <USBD_MSC_GetDeviceQualifierDescriptor+0x1c>)
}
80095ec: 4618 mov r0, r3
80095ee: 370c adds r7, #12
80095f0: 46bd mov sp, r7
80095f2: f85d 7b04 ldr.w r7, [sp], #4
80095f6: 4770 bx lr
80095f8: 20000078 .word 0x20000078
080095fc <USBD_MSC_RegisterStorage>:
* @brief USBD_MSC_RegisterStorage
* @param fops: storage callback
* @retval status
*/
uint8_t USBD_MSC_RegisterStorage(USBD_HandleTypeDef *pdev, USBD_StorageTypeDef *fops)
{
80095fc: b480 push {r7}
80095fe: b083 sub sp, #12
8009600: af00 add r7, sp, #0
8009602: 6078 str r0, [r7, #4]
8009604: 6039 str r1, [r7, #0]
if (fops == NULL)
8009606: 683b ldr r3, [r7, #0]
8009608: 2b00 cmp r3, #0
800960a: d101 bne.n 8009610 <USBD_MSC_RegisterStorage+0x14>
{
return (uint8_t)USBD_FAIL;
800960c: 2303 movs r3, #3
800960e: e009 b.n 8009624 <USBD_MSC_RegisterStorage+0x28>
}
pdev->pUserData[pdev->classId] = fops;
8009610: 687b ldr r3, [r7, #4]
8009612: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8009616: 687a ldr r2, [r7, #4]
8009618: 33b0 adds r3, #176 @ 0xb0
800961a: 009b lsls r3, r3, #2
800961c: 4413 add r3, r2
800961e: 683a ldr r2, [r7, #0]
8009620: 605a str r2, [r3, #4]
return (uint8_t)USBD_OK;
8009622: 2300 movs r3, #0
}
8009624: 4618 mov r0, r3
8009626: 370c adds r7, #12
8009628: 46bd mov sp, r7
800962a: f85d 7b04 ldr.w r7, [sp], #4
800962e: 4770 bx lr
08009630 <MSC_BOT_Init>:
* Initialize the BOT Process
* @param pdev: device instance
* @retval None
*/
void MSC_BOT_Init(USBD_HandleTypeDef *pdev)
{
8009630: b580 push {r7, lr}
8009632: b084 sub sp, #16
8009634: af00 add r7, sp, #0
8009636: 6078 str r0, [r7, #4]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
8009638: 687b ldr r3, [r7, #4]
800963a: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800963e: 687b ldr r3, [r7, #4]
8009640: 32b0 adds r2, #176 @ 0xb0
8009642: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009646: 60fb str r3, [r7, #12]
/* Get the Endpoints addresses allocated for this class instance */
MSCInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
MSCOutEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_OUT, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
#endif /* USE_USBD_COMPOSITE */
if (hmsc == NULL)
8009648: 68fb ldr r3, [r7, #12]
800964a: 2b00 cmp r3, #0
800964c: d039 beq.n 80096c2 <MSC_BOT_Init+0x92>
{
return;
}
hmsc->bot_state = USBD_BOT_IDLE;
800964e: 68fb ldr r3, [r7, #12]
8009650: 2200 movs r2, #0
8009652: 721a strb r2, [r3, #8]
hmsc->bot_status = USBD_BOT_STATUS_NORMAL;
8009654: 68fb ldr r3, [r7, #12]
8009656: 2200 movs r2, #0
8009658: 725a strb r2, [r3, #9]
hmsc->scsi_sense_tail = 0U;
800965a: 68fb ldr r3, [r7, #12]
800965c: f503 5300 add.w r3, r3, #8192 @ 0x2000
8009660: 2200 movs r2, #0
8009662: f883 2061 strb.w r2, [r3, #97] @ 0x61
hmsc->scsi_sense_head = 0U;
8009666: 68fb ldr r3, [r7, #12]
8009668: f503 5300 add.w r3, r3, #8192 @ 0x2000
800966c: 2200 movs r2, #0
800966e: f883 2060 strb.w r2, [r3, #96] @ 0x60
hmsc->scsi_medium_state = SCSI_MEDIUM_UNLOCKED;
8009672: 68fb ldr r3, [r7, #12]
8009674: f503 5300 add.w r3, r3, #8192 @ 0x2000
8009678: 2200 movs r2, #0
800967a: f883 2062 strb.w r2, [r3, #98] @ 0x62
((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->Init(0U);
800967e: 687b ldr r3, [r7, #4]
8009680: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8009684: 687a ldr r2, [r7, #4]
8009686: 33b0 adds r3, #176 @ 0xb0
8009688: 009b lsls r3, r3, #2
800968a: 4413 add r3, r2
800968c: 685b ldr r3, [r3, #4]
800968e: 681b ldr r3, [r3, #0]
8009690: 2000 movs r0, #0
8009692: 4798 blx r3
(void)USBD_LL_FlushEP(pdev, MSCOutEpAdd);
8009694: 4b0d ldr r3, [pc, #52] @ (80096cc <MSC_BOT_Init+0x9c>)
8009696: 781b ldrb r3, [r3, #0]
8009698: 4619 mov r1, r3
800969a: 6878 ldr r0, [r7, #4]
800969c: f009 fb36 bl 8012d0c <USBD_LL_FlushEP>
(void)USBD_LL_FlushEP(pdev, MSCInEpAdd);
80096a0: 4b0b ldr r3, [pc, #44] @ (80096d0 <MSC_BOT_Init+0xa0>)
80096a2: 781b ldrb r3, [r3, #0]
80096a4: 4619 mov r1, r3
80096a6: 6878 ldr r0, [r7, #4]
80096a8: f009 fb30 bl 8012d0c <USBD_LL_FlushEP>
/* Prepare EP to Receive First BOT Cmd */
(void)USBD_LL_PrepareReceive(pdev, MSCOutEpAdd, (uint8_t *)&hmsc->cbw,
80096ac: 4b07 ldr r3, [pc, #28] @ (80096cc <MSC_BOT_Init+0x9c>)
80096ae: 7819 ldrb r1, [r3, #0]
80096b0: 68fb ldr r3, [r7, #12]
80096b2: f503 5200 add.w r2, r3, #8192 @ 0x2000
80096b6: 3210 adds r2, #16
80096b8: 231f movs r3, #31
80096ba: 6878 ldr r0, [r7, #4]
80096bc: f009 fbef bl 8012e9e <USBD_LL_PrepareReceive>
80096c0: e000 b.n 80096c4 <MSC_BOT_Init+0x94>
return;
80096c2: bf00 nop
USBD_BOT_CBW_LENGTH);
}
80096c4: 3710 adds r7, #16
80096c6: 46bd mov sp, r7
80096c8: bd80 pop {r7, pc}
80096ca: bf00 nop
80096cc: 20000083 .word 0x20000083
80096d0: 20000082 .word 0x20000082
080096d4 <MSC_BOT_Reset>:
* Reset the BOT Machine
* @param pdev: device instance
* @retval None
*/
void MSC_BOT_Reset(USBD_HandleTypeDef *pdev)
{
80096d4: b580 push {r7, lr}
80096d6: b084 sub sp, #16
80096d8: af00 add r7, sp, #0
80096da: 6078 str r0, [r7, #4]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
80096dc: 687b ldr r3, [r7, #4]
80096de: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
80096e2: 687b ldr r3, [r7, #4]
80096e4: 32b0 adds r2, #176 @ 0xb0
80096e6: f853 3022 ldr.w r3, [r3, r2, lsl #2]
80096ea: 60fb str r3, [r7, #12]
/* Get the Endpoints addresses allocated for this class instance */
MSCInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
MSCOutEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_OUT, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
#endif /* USE_USBD_COMPOSITE */
if (hmsc == NULL)
80096ec: 68fb ldr r3, [r7, #12]
80096ee: 2b00 cmp r3, #0
80096f0: d01c beq.n 800972c <MSC_BOT_Reset+0x58>
{
return;
}
hmsc->bot_state = USBD_BOT_IDLE;
80096f2: 68fb ldr r3, [r7, #12]
80096f4: 2200 movs r2, #0
80096f6: 721a strb r2, [r3, #8]
hmsc->bot_status = USBD_BOT_STATUS_RECOVERY;
80096f8: 68fb ldr r3, [r7, #12]
80096fa: 2201 movs r2, #1
80096fc: 725a strb r2, [r3, #9]
(void)USBD_LL_ClearStallEP(pdev, MSCInEpAdd);
80096fe: 4b0d ldr r3, [pc, #52] @ (8009734 <MSC_BOT_Reset+0x60>)
8009700: 781b ldrb r3, [r3, #0]
8009702: 4619 mov r1, r3
8009704: 6878 ldr r0, [r7, #4]
8009706: f009 fb3f bl 8012d88 <USBD_LL_ClearStallEP>
(void)USBD_LL_ClearStallEP(pdev, MSCOutEpAdd);
800970a: 4b0b ldr r3, [pc, #44] @ (8009738 <MSC_BOT_Reset+0x64>)
800970c: 781b ldrb r3, [r3, #0]
800970e: 4619 mov r1, r3
8009710: 6878 ldr r0, [r7, #4]
8009712: f009 fb39 bl 8012d88 <USBD_LL_ClearStallEP>
/* Prepare EP to Receive First BOT Cmd */
(void)USBD_LL_PrepareReceive(pdev, MSCOutEpAdd, (uint8_t *)&hmsc->cbw,
8009716: 4b08 ldr r3, [pc, #32] @ (8009738 <MSC_BOT_Reset+0x64>)
8009718: 7819 ldrb r1, [r3, #0]
800971a: 68fb ldr r3, [r7, #12]
800971c: f503 5200 add.w r2, r3, #8192 @ 0x2000
8009720: 3210 adds r2, #16
8009722: 231f movs r3, #31
8009724: 6878 ldr r0, [r7, #4]
8009726: f009 fbba bl 8012e9e <USBD_LL_PrepareReceive>
800972a: e000 b.n 800972e <MSC_BOT_Reset+0x5a>
return;
800972c: bf00 nop
USBD_BOT_CBW_LENGTH);
}
800972e: 3710 adds r7, #16
8009730: 46bd mov sp, r7
8009732: bd80 pop {r7, pc}
8009734: 20000082 .word 0x20000082
8009738: 20000083 .word 0x20000083
0800973c <MSC_BOT_DeInit>:
* DeInitialize the BOT Machine
* @param pdev: device instance
* @retval None
*/
void MSC_BOT_DeInit(USBD_HandleTypeDef *pdev)
{
800973c: b480 push {r7}
800973e: b085 sub sp, #20
8009740: af00 add r7, sp, #0
8009742: 6078 str r0, [r7, #4]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
8009744: 687b ldr r3, [r7, #4]
8009746: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800974a: 687b ldr r3, [r7, #4]
800974c: 32b0 adds r2, #176 @ 0xb0
800974e: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009752: 60fb str r3, [r7, #12]
if (hmsc != NULL)
8009754: 68fb ldr r3, [r7, #12]
8009756: 2b00 cmp r3, #0
8009758: d002 beq.n 8009760 <MSC_BOT_DeInit+0x24>
{
hmsc->bot_state = USBD_BOT_IDLE;
800975a: 68fb ldr r3, [r7, #12]
800975c: 2200 movs r2, #0
800975e: 721a strb r2, [r3, #8]
}
}
8009760: bf00 nop
8009762: 3714 adds r7, #20
8009764: 46bd mov sp, r7
8009766: f85d 7b04 ldr.w r7, [sp], #4
800976a: 4770 bx lr
0800976c <MSC_BOT_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint index
* @retval None
*/
void MSC_BOT_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800976c: b580 push {r7, lr}
800976e: b084 sub sp, #16
8009770: af00 add r7, sp, #0
8009772: 6078 str r0, [r7, #4]
8009774: 460b mov r3, r1
8009776: 70fb strb r3, [r7, #3]
UNUSED(epnum);
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
8009778: 687b ldr r3, [r7, #4]
800977a: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800977e: 687b ldr r3, [r7, #4]
8009780: 32b0 adds r2, #176 @ 0xb0
8009782: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009786: 60fb str r3, [r7, #12]
if (hmsc == NULL)
8009788: 68fb ldr r3, [r7, #12]
800978a: 2b00 cmp r3, #0
800978c: d022 beq.n 80097d4 <MSC_BOT_DataIn+0x68>
{
return;
}
switch (hmsc->bot_state)
800978e: 68fb ldr r3, [r7, #12]
8009790: 7a1b ldrb r3, [r3, #8]
8009792: 2b02 cmp r3, #2
8009794: d005 beq.n 80097a2 <MSC_BOT_DataIn+0x36>
8009796: 2b02 cmp r3, #2
8009798: db1e blt.n 80097d8 <MSC_BOT_DataIn+0x6c>
800979a: 3b03 subs r3, #3
800979c: 2b01 cmp r3, #1
800979e: d81b bhi.n 80097d8 <MSC_BOT_DataIn+0x6c>
80097a0: e013 b.n 80097ca <MSC_BOT_DataIn+0x5e>
{
case USBD_BOT_DATA_IN:
if (SCSI_ProcessCmd(pdev, hmsc->cbw.bLUN, &hmsc->cbw.CB[0]) < 0)
80097a2: 68fb ldr r3, [r7, #12]
80097a4: f503 5300 add.w r3, r3, #8192 @ 0x2000
80097a8: 7f59 ldrb r1, [r3, #29]
80097aa: 68fb ldr r3, [r7, #12]
80097ac: f503 5300 add.w r3, r3, #8192 @ 0x2000
80097b0: 331f adds r3, #31
80097b2: 461a mov r2, r3
80097b4: 6878 ldr r0, [r7, #4]
80097b6: f000 f9e5 bl 8009b84 <SCSI_ProcessCmd>
80097ba: 4603 mov r3, r0
80097bc: 2b00 cmp r3, #0
80097be: da0d bge.n 80097dc <MSC_BOT_DataIn+0x70>
{
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_FAILED);
80097c0: 2101 movs r1, #1
80097c2: 6878 ldr r0, [r7, #4]
80097c4: f000 f920 bl 8009a08 <MSC_BOT_SendCSW>
}
break;
80097c8: e008 b.n 80097dc <MSC_BOT_DataIn+0x70>
case USBD_BOT_SEND_DATA:
case USBD_BOT_LAST_DATA_IN:
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_PASSED);
80097ca: 2100 movs r1, #0
80097cc: 6878 ldr r0, [r7, #4]
80097ce: f000 f91b bl 8009a08 <MSC_BOT_SendCSW>
break;
80097d2: e004 b.n 80097de <MSC_BOT_DataIn+0x72>
return;
80097d4: bf00 nop
80097d6: e002 b.n 80097de <MSC_BOT_DataIn+0x72>
default:
break;
80097d8: bf00 nop
80097da: e000 b.n 80097de <MSC_BOT_DataIn+0x72>
break;
80097dc: bf00 nop
}
}
80097de: 3710 adds r7, #16
80097e0: 46bd mov sp, r7
80097e2: bd80 pop {r7, pc}
080097e4 <MSC_BOT_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint index
* @retval None
*/
void MSC_BOT_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
80097e4: b580 push {r7, lr}
80097e6: b084 sub sp, #16
80097e8: af00 add r7, sp, #0
80097ea: 6078 str r0, [r7, #4]
80097ec: 460b mov r3, r1
80097ee: 70fb strb r3, [r7, #3]
UNUSED(epnum);
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
80097f0: 687b ldr r3, [r7, #4]
80097f2: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
80097f6: 687b ldr r3, [r7, #4]
80097f8: 32b0 adds r2, #176 @ 0xb0
80097fa: f853 3022 ldr.w r3, [r3, r2, lsl #2]
80097fe: 60fb str r3, [r7, #12]
if (hmsc == NULL)
8009800: 68fb ldr r3, [r7, #12]
8009802: 2b00 cmp r3, #0
8009804: d01e beq.n 8009844 <MSC_BOT_DataOut+0x60>
{
return;
}
switch (hmsc->bot_state)
8009806: 68fb ldr r3, [r7, #12]
8009808: 7a1b ldrb r3, [r3, #8]
800980a: 2b00 cmp r3, #0
800980c: d002 beq.n 8009814 <MSC_BOT_DataOut+0x30>
800980e: 2b01 cmp r3, #1
8009810: d004 beq.n 800981c <MSC_BOT_DataOut+0x38>
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_FAILED);
}
break;
default:
break;
8009812: e01a b.n 800984a <MSC_BOT_DataOut+0x66>
MSC_BOT_CBW_Decode(pdev);
8009814: 6878 ldr r0, [r7, #4]
8009816: f000 f81b bl 8009850 <MSC_BOT_CBW_Decode>
break;
800981a: e016 b.n 800984a <MSC_BOT_DataOut+0x66>
if (SCSI_ProcessCmd(pdev, hmsc->cbw.bLUN, &hmsc->cbw.CB[0]) < 0)
800981c: 68fb ldr r3, [r7, #12]
800981e: f503 5300 add.w r3, r3, #8192 @ 0x2000
8009822: 7f59 ldrb r1, [r3, #29]
8009824: 68fb ldr r3, [r7, #12]
8009826: f503 5300 add.w r3, r3, #8192 @ 0x2000
800982a: 331f adds r3, #31
800982c: 461a mov r2, r3
800982e: 6878 ldr r0, [r7, #4]
8009830: f000 f9a8 bl 8009b84 <SCSI_ProcessCmd>
8009834: 4603 mov r3, r0
8009836: 2b00 cmp r3, #0
8009838: da06 bge.n 8009848 <MSC_BOT_DataOut+0x64>
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_FAILED);
800983a: 2101 movs r1, #1
800983c: 6878 ldr r0, [r7, #4]
800983e: f000 f8e3 bl 8009a08 <MSC_BOT_SendCSW>
break;
8009842: e001 b.n 8009848 <MSC_BOT_DataOut+0x64>
return;
8009844: bf00 nop
8009846: e000 b.n 800984a <MSC_BOT_DataOut+0x66>
break;
8009848: bf00 nop
}
}
800984a: 3710 adds r7, #16
800984c: 46bd mov sp, r7
800984e: bd80 pop {r7, pc}
08009850 <MSC_BOT_CBW_Decode>:
* Decode the CBW command and set the BOT state machine accordingly
* @param pdev: device instance
* @retval None
*/
static void MSC_BOT_CBW_Decode(USBD_HandleTypeDef *pdev)
{
8009850: b580 push {r7, lr}
8009852: b084 sub sp, #16
8009854: af00 add r7, sp, #0
8009856: 6078 str r0, [r7, #4]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
8009858: 687b ldr r3, [r7, #4]
800985a: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800985e: 687b ldr r3, [r7, #4]
8009860: 32b0 adds r2, #176 @ 0xb0
8009862: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009866: 60fb str r3, [r7, #12]
/* Get the Endpoints addresses allocated for this class instance */
MSCInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
MSCOutEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_OUT, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
#endif /* USE_USBD_COMPOSITE */
if (hmsc == NULL)
8009868: 68fb ldr r3, [r7, #12]
800986a: 2b00 cmp r3, #0
800986c: f000 8085 beq.w 800997a <MSC_BOT_CBW_Decode+0x12a>
{
return;
}
hmsc->csw.dTag = hmsc->cbw.dTag;
8009870: 68fb ldr r3, [r7, #12]
8009872: f503 5300 add.w r3, r3, #8192 @ 0x2000
8009876: 695b ldr r3, [r3, #20]
8009878: 68fa ldr r2, [r7, #12]
800987a: f502 5200 add.w r2, r2, #8192 @ 0x2000
800987e: 6353 str r3, [r2, #52] @ 0x34
hmsc->csw.dDataResidue = hmsc->cbw.dDataLength;
8009880: 68fb ldr r3, [r7, #12]
8009882: f503 5300 add.w r3, r3, #8192 @ 0x2000
8009886: 699b ldr r3, [r3, #24]
8009888: 68fa ldr r2, [r7, #12]
800988a: f502 5200 add.w r2, r2, #8192 @ 0x2000
800988e: 6393 str r3, [r2, #56] @ 0x38
if ((USBD_LL_GetRxDataSize(pdev, MSCOutEpAdd) != USBD_BOT_CBW_LENGTH) ||
8009890: 4b3d ldr r3, [pc, #244] @ (8009988 <MSC_BOT_CBW_Decode+0x138>)
8009892: 781b ldrb r3, [r3, #0]
8009894: 4619 mov r1, r3
8009896: 6878 ldr r0, [r7, #4]
8009898: f009 fb22 bl 8012ee0 <USBD_LL_GetRxDataSize>
800989c: 4603 mov r3, r0
800989e: 2b1f cmp r3, #31
80098a0: d118 bne.n 80098d4 <MSC_BOT_CBW_Decode+0x84>
(hmsc->cbw.dSignature != USBD_BOT_CBW_SIGNATURE) ||
80098a2: 68fb ldr r3, [r7, #12]
80098a4: f503 5300 add.w r3, r3, #8192 @ 0x2000
80098a8: 691b ldr r3, [r3, #16]
if ((USBD_LL_GetRxDataSize(pdev, MSCOutEpAdd) != USBD_BOT_CBW_LENGTH) ||
80098aa: 4a38 ldr r2, [pc, #224] @ (800998c <MSC_BOT_CBW_Decode+0x13c>)
80098ac: 4293 cmp r3, r2
80098ae: d111 bne.n 80098d4 <MSC_BOT_CBW_Decode+0x84>
(hmsc->cbw.bLUN > 1U) || (hmsc->cbw.bCBLength < 1U) ||
80098b0: 68fb ldr r3, [r7, #12]
80098b2: f503 5300 add.w r3, r3, #8192 @ 0x2000
80098b6: 7f5b ldrb r3, [r3, #29]
(hmsc->cbw.dSignature != USBD_BOT_CBW_SIGNATURE) ||
80098b8: 2b01 cmp r3, #1
80098ba: d80b bhi.n 80098d4 <MSC_BOT_CBW_Decode+0x84>
(hmsc->cbw.bLUN > 1U) || (hmsc->cbw.bCBLength < 1U) ||
80098bc: 68fb ldr r3, [r7, #12]
80098be: f503 5300 add.w r3, r3, #8192 @ 0x2000
80098c2: 7f9b ldrb r3, [r3, #30]
80098c4: 2b00 cmp r3, #0
80098c6: d005 beq.n 80098d4 <MSC_BOT_CBW_Decode+0x84>
(hmsc->cbw.bCBLength > 16U))
80098c8: 68fb ldr r3, [r7, #12]
80098ca: f503 5300 add.w r3, r3, #8192 @ 0x2000
80098ce: 7f9b ldrb r3, [r3, #30]
(hmsc->cbw.bLUN > 1U) || (hmsc->cbw.bCBLength < 1U) ||
80098d0: 2b10 cmp r3, #16
80098d2: d90f bls.n 80098f4 <MSC_BOT_CBW_Decode+0xa4>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
80098d4: 68fb ldr r3, [r7, #12]
80098d6: f503 5300 add.w r3, r3, #8192 @ 0x2000
80098da: 7f59 ldrb r1, [r3, #29]
80098dc: 2320 movs r3, #32
80098de: 2205 movs r2, #5
80098e0: 6878 ldr r0, [r7, #4]
80098e2: f000 fea7 bl 800a634 <SCSI_SenseCode>
hmsc->bot_status = USBD_BOT_STATUS_ERROR;
80098e6: 68fb ldr r3, [r7, #12]
80098e8: 2202 movs r2, #2
80098ea: 725a strb r2, [r3, #9]
MSC_BOT_Abort(pdev);
80098ec: 6878 ldr r0, [r7, #4]
80098ee: f000 f8cb bl 8009a88 <MSC_BOT_Abort>
80098f2: e045 b.n 8009980 <MSC_BOT_CBW_Decode+0x130>
}
else
{
if (SCSI_ProcessCmd(pdev, hmsc->cbw.bLUN, &hmsc->cbw.CB[0]) < 0)
80098f4: 68fb ldr r3, [r7, #12]
80098f6: f503 5300 add.w r3, r3, #8192 @ 0x2000
80098fa: 7f59 ldrb r1, [r3, #29]
80098fc: 68fb ldr r3, [r7, #12]
80098fe: f503 5300 add.w r3, r3, #8192 @ 0x2000
8009902: 331f adds r3, #31
8009904: 461a mov r2, r3
8009906: 6878 ldr r0, [r7, #4]
8009908: f000 f93c bl 8009b84 <SCSI_ProcessCmd>
800990c: 4603 mov r3, r0
800990e: 2b00 cmp r3, #0
8009910: da0c bge.n 800992c <MSC_BOT_CBW_Decode+0xdc>
{
if (hmsc->bot_state == USBD_BOT_NO_DATA)
8009912: 68fb ldr r3, [r7, #12]
8009914: 7a1b ldrb r3, [r3, #8]
8009916: 2b05 cmp r3, #5
8009918: d104 bne.n 8009924 <MSC_BOT_CBW_Decode+0xd4>
{
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_FAILED);
800991a: 2101 movs r1, #1
800991c: 6878 ldr r0, [r7, #4]
800991e: f000 f873 bl 8009a08 <MSC_BOT_SendCSW>
8009922: e02d b.n 8009980 <MSC_BOT_CBW_Decode+0x130>
}
else
{
MSC_BOT_Abort(pdev);
8009924: 6878 ldr r0, [r7, #4]
8009926: f000 f8af bl 8009a88 <MSC_BOT_Abort>
800992a: e029 b.n 8009980 <MSC_BOT_CBW_Decode+0x130>
}
}
/* Burst xfer handled internally */
else if ((hmsc->bot_state != USBD_BOT_DATA_IN) &&
800992c: 68fb ldr r3, [r7, #12]
800992e: 7a1b ldrb r3, [r3, #8]
8009930: 2b02 cmp r3, #2
8009932: d024 beq.n 800997e <MSC_BOT_CBW_Decode+0x12e>
(hmsc->bot_state != USBD_BOT_DATA_OUT) &&
8009934: 68fb ldr r3, [r7, #12]
8009936: 7a1b ldrb r3, [r3, #8]
else if ((hmsc->bot_state != USBD_BOT_DATA_IN) &&
8009938: 2b01 cmp r3, #1
800993a: d020 beq.n 800997e <MSC_BOT_CBW_Decode+0x12e>
(hmsc->bot_state != USBD_BOT_LAST_DATA_IN))
800993c: 68fb ldr r3, [r7, #12]
800993e: 7a1b ldrb r3, [r3, #8]
(hmsc->bot_state != USBD_BOT_DATA_OUT) &&
8009940: 2b03 cmp r3, #3
8009942: d01c beq.n 800997e <MSC_BOT_CBW_Decode+0x12e>
{
if (hmsc->bot_data_length > 0U)
8009944: 68fb ldr r3, [r7, #12]
8009946: 68db ldr r3, [r3, #12]
8009948: 2b00 cmp r3, #0
800994a: d009 beq.n 8009960 <MSC_BOT_CBW_Decode+0x110>
{
MSC_BOT_SendData(pdev, hmsc->bot_data, hmsc->bot_data_length);
800994c: 68fb ldr r3, [r7, #12]
800994e: f103 0110 add.w r1, r3, #16
8009952: 68fb ldr r3, [r7, #12]
8009954: 68db ldr r3, [r3, #12]
8009956: 461a mov r2, r3
8009958: 6878 ldr r0, [r7, #4]
800995a: f000 f819 bl 8009990 <MSC_BOT_SendData>
if (hmsc->bot_data_length > 0U)
800995e: e00f b.n 8009980 <MSC_BOT_CBW_Decode+0x130>
}
else if (hmsc->bot_data_length == 0U)
8009960: 68fb ldr r3, [r7, #12]
8009962: 68db ldr r3, [r3, #12]
8009964: 2b00 cmp r3, #0
8009966: d104 bne.n 8009972 <MSC_BOT_CBW_Decode+0x122>
{
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_PASSED);
8009968: 2100 movs r1, #0
800996a: 6878 ldr r0, [r7, #4]
800996c: f000 f84c bl 8009a08 <MSC_BOT_SendCSW>
if (hmsc->bot_data_length > 0U)
8009970: e006 b.n 8009980 <MSC_BOT_CBW_Decode+0x130>
}
else
{
MSC_BOT_Abort(pdev);
8009972: 6878 ldr r0, [r7, #4]
8009974: f000 f888 bl 8009a88 <MSC_BOT_Abort>
if (hmsc->bot_data_length > 0U)
8009978: e002 b.n 8009980 <MSC_BOT_CBW_Decode+0x130>
return;
800997a: bf00 nop
800997c: e000 b.n 8009980 <MSC_BOT_CBW_Decode+0x130>
}
}
else
{
return;
800997e: bf00 nop
}
}
}
8009980: 3710 adds r7, #16
8009982: 46bd mov sp, r7
8009984: bd80 pop {r7, pc}
8009986: bf00 nop
8009988: 20000083 .word 0x20000083
800998c: 43425355 .word 0x43425355
08009990 <MSC_BOT_SendData>:
* @param buf: pointer to data buffer
* @param len: Data Length
* @retval None
*/
static void MSC_BOT_SendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint32_t len)
{
8009990: b580 push {r7, lr}
8009992: b086 sub sp, #24
8009994: af00 add r7, sp, #0
8009996: 60f8 str r0, [r7, #12]
8009998: 60b9 str r1, [r7, #8]
800999a: 607a str r2, [r7, #4]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800999c: 68fb ldr r3, [r7, #12]
800999e: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
80099a2: 68fb ldr r3, [r7, #12]
80099a4: 32b0 adds r2, #176 @ 0xb0
80099a6: f853 3022 ldr.w r3, [r3, r2, lsl #2]
80099aa: 617b str r3, [r7, #20]
/* Get the Endpoints addresses allocated for this class instance */
MSCInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
MSCOutEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_OUT, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
#endif /* USE_USBD_COMPOSITE */
if (hmsc == NULL)
80099ac: 697b ldr r3, [r7, #20]
80099ae: 2b00 cmp r3, #0
80099b0: d023 beq.n 80099fa <MSC_BOT_SendData+0x6a>
{
return;
}
length = MIN(hmsc->cbw.dDataLength, len);
80099b2: 697b ldr r3, [r7, #20]
80099b4: f503 5300 add.w r3, r3, #8192 @ 0x2000
80099b8: 699b ldr r3, [r3, #24]
80099ba: 687a ldr r2, [r7, #4]
80099bc: 4293 cmp r3, r2
80099be: bf28 it cs
80099c0: 4613 movcs r3, r2
80099c2: 613b str r3, [r7, #16]
hmsc->csw.dDataResidue -= len;
80099c4: 697b ldr r3, [r7, #20]
80099c6: f503 5300 add.w r3, r3, #8192 @ 0x2000
80099ca: 6b9a ldr r2, [r3, #56] @ 0x38
80099cc: 687b ldr r3, [r7, #4]
80099ce: 1ad3 subs r3, r2, r3
80099d0: 697a ldr r2, [r7, #20]
80099d2: f502 5200 add.w r2, r2, #8192 @ 0x2000
80099d6: 6393 str r3, [r2, #56] @ 0x38
hmsc->csw.bStatus = USBD_CSW_CMD_PASSED;
80099d8: 697b ldr r3, [r7, #20]
80099da: f503 5300 add.w r3, r3, #8192 @ 0x2000
80099de: 2200 movs r2, #0
80099e0: f883 203c strb.w r2, [r3, #60] @ 0x3c
hmsc->bot_state = USBD_BOT_SEND_DATA;
80099e4: 697b ldr r3, [r7, #20]
80099e6: 2204 movs r2, #4
80099e8: 721a strb r2, [r3, #8]
(void)USBD_LL_Transmit(pdev, MSCInEpAdd, pbuf, length);
80099ea: 4b06 ldr r3, [pc, #24] @ (8009a04 <MSC_BOT_SendData+0x74>)
80099ec: 7819 ldrb r1, [r3, #0]
80099ee: 693b ldr r3, [r7, #16]
80099f0: 68ba ldr r2, [r7, #8]
80099f2: 68f8 ldr r0, [r7, #12]
80099f4: f009 fa32 bl 8012e5c <USBD_LL_Transmit>
80099f8: e000 b.n 80099fc <MSC_BOT_SendData+0x6c>
return;
80099fa: bf00 nop
}
80099fc: 3718 adds r7, #24
80099fe: 46bd mov sp, r7
8009a00: bd80 pop {r7, pc}
8009a02: bf00 nop
8009a04: 20000082 .word 0x20000082
08009a08 <MSC_BOT_SendCSW>:
* @param pdev: device instance
* @param status : CSW status
* @retval None
*/
void MSC_BOT_SendCSW(USBD_HandleTypeDef *pdev, uint8_t CSW_Status)
{
8009a08: b580 push {r7, lr}
8009a0a: b084 sub sp, #16
8009a0c: af00 add r7, sp, #0
8009a0e: 6078 str r0, [r7, #4]
8009a10: 460b mov r3, r1
8009a12: 70fb strb r3, [r7, #3]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
8009a14: 687b ldr r3, [r7, #4]
8009a16: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8009a1a: 687b ldr r3, [r7, #4]
8009a1c: 32b0 adds r2, #176 @ 0xb0
8009a1e: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009a22: 60fb str r3, [r7, #12]
/* Get the Endpoints addresses allocated for this class instance */
MSCInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
MSCOutEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_OUT, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
#endif /* USE_USBD_COMPOSITE */
if (hmsc == NULL)
8009a24: 68fb ldr r3, [r7, #12]
8009a26: 2b00 cmp r3, #0
8009a28: d024 beq.n 8009a74 <MSC_BOT_SendCSW+0x6c>
{
return;
}
hmsc->csw.dSignature = USBD_BOT_CSW_SIGNATURE;
8009a2a: 68fb ldr r3, [r7, #12]
8009a2c: f503 5300 add.w r3, r3, #8192 @ 0x2000
8009a30: 461a mov r2, r3
8009a32: 4b12 ldr r3, [pc, #72] @ (8009a7c <MSC_BOT_SendCSW+0x74>)
8009a34: 6313 str r3, [r2, #48] @ 0x30
hmsc->csw.bStatus = CSW_Status;
8009a36: 68fb ldr r3, [r7, #12]
8009a38: f503 5300 add.w r3, r3, #8192 @ 0x2000
8009a3c: 461a mov r2, r3
8009a3e: 78fb ldrb r3, [r7, #3]
8009a40: f882 303c strb.w r3, [r2, #60] @ 0x3c
hmsc->bot_state = USBD_BOT_IDLE;
8009a44: 68fb ldr r3, [r7, #12]
8009a46: 2200 movs r2, #0
8009a48: 721a strb r2, [r3, #8]
(void)USBD_LL_Transmit(pdev, MSCInEpAdd, (uint8_t *)&hmsc->csw,
8009a4a: 4b0d ldr r3, [pc, #52] @ (8009a80 <MSC_BOT_SendCSW+0x78>)
8009a4c: 7819 ldrb r1, [r3, #0]
8009a4e: 68fb ldr r3, [r7, #12]
8009a50: f503 5200 add.w r2, r3, #8192 @ 0x2000
8009a54: 3230 adds r2, #48 @ 0x30
8009a56: 230d movs r3, #13
8009a58: 6878 ldr r0, [r7, #4]
8009a5a: f009 f9ff bl 8012e5c <USBD_LL_Transmit>
USBD_BOT_CSW_LENGTH);
/* Prepare EP to Receive next Cmd */
(void)USBD_LL_PrepareReceive(pdev, MSCOutEpAdd, (uint8_t *)&hmsc->cbw,
8009a5e: 4b09 ldr r3, [pc, #36] @ (8009a84 <MSC_BOT_SendCSW+0x7c>)
8009a60: 7819 ldrb r1, [r3, #0]
8009a62: 68fb ldr r3, [r7, #12]
8009a64: f503 5200 add.w r2, r3, #8192 @ 0x2000
8009a68: 3210 adds r2, #16
8009a6a: 231f movs r3, #31
8009a6c: 6878 ldr r0, [r7, #4]
8009a6e: f009 fa16 bl 8012e9e <USBD_LL_PrepareReceive>
8009a72: e000 b.n 8009a76 <MSC_BOT_SendCSW+0x6e>
return;
8009a74: bf00 nop
USBD_BOT_CBW_LENGTH);
}
8009a76: 3710 adds r7, #16
8009a78: 46bd mov sp, r7
8009a7a: bd80 pop {r7, pc}
8009a7c: 53425355 .word 0x53425355
8009a80: 20000082 .word 0x20000082
8009a84: 20000083 .word 0x20000083
08009a88 <MSC_BOT_Abort>:
* @param pdev: device instance
* @retval status
*/
static void MSC_BOT_Abort(USBD_HandleTypeDef *pdev)
{
8009a88: b580 push {r7, lr}
8009a8a: b084 sub sp, #16
8009a8c: af00 add r7, sp, #0
8009a8e: 6078 str r0, [r7, #4]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
8009a90: 687b ldr r3, [r7, #4]
8009a92: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8009a96: 687b ldr r3, [r7, #4]
8009a98: 32b0 adds r2, #176 @ 0xb0
8009a9a: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009a9e: 60fb str r3, [r7, #12]
/* Get the Endpoints addresses allocated for this class instance */
MSCInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
MSCOutEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_OUT, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
#endif /* USE_USBD_COMPOSITE */
if (hmsc == NULL)
8009aa0: 68fb ldr r3, [r7, #12]
8009aa2: 2b00 cmp r3, #0
8009aa4: d02c beq.n 8009b00 <MSC_BOT_Abort+0x78>
{
return;
}
if ((hmsc->cbw.bmFlags == 0U) &&
8009aa6: 68fb ldr r3, [r7, #12]
8009aa8: f503 5300 add.w r3, r3, #8192 @ 0x2000
8009aac: 7f1b ldrb r3, [r3, #28]
8009aae: 2b00 cmp r3, #0
8009ab0: d10f bne.n 8009ad2 <MSC_BOT_Abort+0x4a>
(hmsc->cbw.dDataLength != 0U) &&
8009ab2: 68fb ldr r3, [r7, #12]
8009ab4: f503 5300 add.w r3, r3, #8192 @ 0x2000
8009ab8: 699b ldr r3, [r3, #24]
if ((hmsc->cbw.bmFlags == 0U) &&
8009aba: 2b00 cmp r3, #0
8009abc: d009 beq.n 8009ad2 <MSC_BOT_Abort+0x4a>
(hmsc->bot_status == USBD_BOT_STATUS_NORMAL))
8009abe: 68fb ldr r3, [r7, #12]
8009ac0: 7a5b ldrb r3, [r3, #9]
(hmsc->cbw.dDataLength != 0U) &&
8009ac2: 2b00 cmp r3, #0
8009ac4: d105 bne.n 8009ad2 <MSC_BOT_Abort+0x4a>
{
(void)USBD_LL_StallEP(pdev, MSCOutEpAdd);
8009ac6: 4b10 ldr r3, [pc, #64] @ (8009b08 <MSC_BOT_Abort+0x80>)
8009ac8: 781b ldrb r3, [r3, #0]
8009aca: 4619 mov r1, r3
8009acc: 6878 ldr r0, [r7, #4]
8009ace: f009 f93c bl 8012d4a <USBD_LL_StallEP>
}
(void)USBD_LL_StallEP(pdev, MSCInEpAdd);
8009ad2: 4b0e ldr r3, [pc, #56] @ (8009b0c <MSC_BOT_Abort+0x84>)
8009ad4: 781b ldrb r3, [r3, #0]
8009ad6: 4619 mov r1, r3
8009ad8: 6878 ldr r0, [r7, #4]
8009ada: f009 f936 bl 8012d4a <USBD_LL_StallEP>
if (hmsc->bot_status == USBD_BOT_STATUS_ERROR)
8009ade: 68fb ldr r3, [r7, #12]
8009ae0: 7a5b ldrb r3, [r3, #9]
8009ae2: 2b02 cmp r3, #2
8009ae4: d10d bne.n 8009b02 <MSC_BOT_Abort+0x7a>
{
(void)USBD_LL_StallEP(pdev, MSCInEpAdd);
8009ae6: 4b09 ldr r3, [pc, #36] @ (8009b0c <MSC_BOT_Abort+0x84>)
8009ae8: 781b ldrb r3, [r3, #0]
8009aea: 4619 mov r1, r3
8009aec: 6878 ldr r0, [r7, #4]
8009aee: f009 f92c bl 8012d4a <USBD_LL_StallEP>
(void)USBD_LL_StallEP(pdev, MSCOutEpAdd);
8009af2: 4b05 ldr r3, [pc, #20] @ (8009b08 <MSC_BOT_Abort+0x80>)
8009af4: 781b ldrb r3, [r3, #0]
8009af6: 4619 mov r1, r3
8009af8: 6878 ldr r0, [r7, #4]
8009afa: f009 f926 bl 8012d4a <USBD_LL_StallEP>
8009afe: e000 b.n 8009b02 <MSC_BOT_Abort+0x7a>
return;
8009b00: bf00 nop
}
}
8009b02: 3710 adds r7, #16
8009b04: 46bd mov sp, r7
8009b06: bd80 pop {r7, pc}
8009b08: 20000083 .word 0x20000083
8009b0c: 20000082 .word 0x20000082
08009b10 <MSC_BOT_CplClrFeature>:
* @param epnum: endpoint index
* @retval None
*/
void MSC_BOT_CplClrFeature(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
8009b10: b580 push {r7, lr}
8009b12: b084 sub sp, #16
8009b14: af00 add r7, sp, #0
8009b16: 6078 str r0, [r7, #4]
8009b18: 460b mov r3, r1
8009b1a: 70fb strb r3, [r7, #3]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
8009b1c: 687b ldr r3, [r7, #4]
8009b1e: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8009b22: 687b ldr r3, [r7, #4]
8009b24: 32b0 adds r2, #176 @ 0xb0
8009b26: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009b2a: 60fb str r3, [r7, #12]
/* Get the Endpoints addresses allocated for this class instance */
MSCInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
MSCOutEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_OUT, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
#endif /* USE_USBD_COMPOSITE */
if (hmsc == NULL)
8009b2c: 68fb ldr r3, [r7, #12]
8009b2e: 2b00 cmp r3, #0
8009b30: d01d beq.n 8009b6e <MSC_BOT_CplClrFeature+0x5e>
{
return;
}
if (hmsc->bot_status == USBD_BOT_STATUS_ERROR) /* Bad CBW Signature */
8009b32: 68fb ldr r3, [r7, #12]
8009b34: 7a5b ldrb r3, [r3, #9]
8009b36: 2b02 cmp r3, #2
8009b38: d10c bne.n 8009b54 <MSC_BOT_CplClrFeature+0x44>
{
(void)USBD_LL_StallEP(pdev, MSCInEpAdd);
8009b3a: 4b10 ldr r3, [pc, #64] @ (8009b7c <MSC_BOT_CplClrFeature+0x6c>)
8009b3c: 781b ldrb r3, [r3, #0]
8009b3e: 4619 mov r1, r3
8009b40: 6878 ldr r0, [r7, #4]
8009b42: f009 f902 bl 8012d4a <USBD_LL_StallEP>
(void)USBD_LL_StallEP(pdev, MSCOutEpAdd);
8009b46: 4b0e ldr r3, [pc, #56] @ (8009b80 <MSC_BOT_CplClrFeature+0x70>)
8009b48: 781b ldrb r3, [r3, #0]
8009b4a: 4619 mov r1, r3
8009b4c: 6878 ldr r0, [r7, #4]
8009b4e: f009 f8fc bl 8012d4a <USBD_LL_StallEP>
8009b52: e00f b.n 8009b74 <MSC_BOT_CplClrFeature+0x64>
}
else if (((epnum & 0x80U) == 0x80U) && (hmsc->bot_status != USBD_BOT_STATUS_RECOVERY))
8009b54: f997 3003 ldrsb.w r3, [r7, #3]
8009b58: 2b00 cmp r3, #0
8009b5a: da0a bge.n 8009b72 <MSC_BOT_CplClrFeature+0x62>
8009b5c: 68fb ldr r3, [r7, #12]
8009b5e: 7a5b ldrb r3, [r3, #9]
8009b60: 2b01 cmp r3, #1
8009b62: d006 beq.n 8009b72 <MSC_BOT_CplClrFeature+0x62>
{
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_FAILED);
8009b64: 2101 movs r1, #1
8009b66: 6878 ldr r0, [r7, #4]
8009b68: f7ff ff4e bl 8009a08 <MSC_BOT_SendCSW>
8009b6c: e002 b.n 8009b74 <MSC_BOT_CplClrFeature+0x64>
return;
8009b6e: bf00 nop
8009b70: e000 b.n 8009b74 <MSC_BOT_CplClrFeature+0x64>
}
else
{
return;
8009b72: bf00 nop
}
}
8009b74: 3710 adds r7, #16
8009b76: 46bd mov sp, r7
8009b78: bd80 pop {r7, pc}
8009b7a: bf00 nop
8009b7c: 20000082 .word 0x20000082
8009b80: 20000083 .word 0x20000083
08009b84 <SCSI_ProcessCmd>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
int8_t SCSI_ProcessCmd(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *cmd)
{
8009b84: b580 push {r7, lr}
8009b86: b086 sub sp, #24
8009b88: af00 add r7, sp, #0
8009b8a: 60f8 str r0, [r7, #12]
8009b8c: 460b mov r3, r1
8009b8e: 607a str r2, [r7, #4]
8009b90: 72fb strb r3, [r7, #11]
int8_t ret;
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
8009b92: 68fb ldr r3, [r7, #12]
8009b94: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8009b98: 68fb ldr r3, [r7, #12]
8009b9a: 32b0 adds r2, #176 @ 0xb0
8009b9c: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009ba0: 613b str r3, [r7, #16]
if (hmsc == NULL)
8009ba2: 693b ldr r3, [r7, #16]
8009ba4: 2b00 cmp r3, #0
8009ba6: d102 bne.n 8009bae <SCSI_ProcessCmd+0x2a>
{
return -1;
8009ba8: f04f 33ff mov.w r3, #4294967295
8009bac: e168 b.n 8009e80 <SCSI_ProcessCmd+0x2fc>
}
switch (cmd[0])
8009bae: 687b ldr r3, [r7, #4]
8009bb0: 781b ldrb r3, [r3, #0]
8009bb2: 2baa cmp r3, #170 @ 0xaa
8009bb4: f000 8144 beq.w 8009e40 <SCSI_ProcessCmd+0x2bc>
8009bb8: 2baa cmp r3, #170 @ 0xaa
8009bba: f300 8153 bgt.w 8009e64 <SCSI_ProcessCmd+0x2e0>
8009bbe: 2ba8 cmp r3, #168 @ 0xa8
8009bc0: f000 812c beq.w 8009e1c <SCSI_ProcessCmd+0x298>
8009bc4: 2ba8 cmp r3, #168 @ 0xa8
8009bc6: f300 814d bgt.w 8009e64 <SCSI_ProcessCmd+0x2e0>
8009bca: 2b5a cmp r3, #90 @ 0x5a
8009bcc: f300 80c0 bgt.w 8009d50 <SCSI_ProcessCmd+0x1cc>
8009bd0: 2b00 cmp r3, #0
8009bd2: f2c0 8147 blt.w 8009e64 <SCSI_ProcessCmd+0x2e0>
8009bd6: 2b5a cmp r3, #90 @ 0x5a
8009bd8: f200 8144 bhi.w 8009e64 <SCSI_ProcessCmd+0x2e0>
8009bdc: a201 add r2, pc, #4 @ (adr r2, 8009be4 <SCSI_ProcessCmd+0x60>)
8009bde: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8009be2: bf00 nop
8009be4: 08009d57 .word 0x08009d57
8009be8: 08009e65 .word 0x08009e65
8009bec: 08009e65 .word 0x08009e65
8009bf0: 08009d69 .word 0x08009d69
8009bf4: 08009e65 .word 0x08009e65
8009bf8: 08009e65 .word 0x08009e65
8009bfc: 08009e65 .word 0x08009e65
8009c00: 08009e65 .word 0x08009e65
8009c04: 08009e65 .word 0x08009e65
8009c08: 08009e65 .word 0x08009e65
8009c0c: 08009e65 .word 0x08009e65
8009c10: 08009e65 .word 0x08009e65
8009c14: 08009e65 .word 0x08009e65
8009c18: 08009e65 .word 0x08009e65
8009c1c: 08009e65 .word 0x08009e65
8009c20: 08009e65 .word 0x08009e65
8009c24: 08009e65 .word 0x08009e65
8009c28: 08009e65 .word 0x08009e65
8009c2c: 08009d7b .word 0x08009d7b
8009c30: 08009e65 .word 0x08009e65
8009c34: 08009e65 .word 0x08009e65
8009c38: 08009e65 .word 0x08009e65
8009c3c: 08009e65 .word 0x08009e65
8009c40: 08009e65 .word 0x08009e65
8009c44: 08009e65 .word 0x08009e65
8009c48: 08009e65 .word 0x08009e65
8009c4c: 08009db1 .word 0x08009db1
8009c50: 08009d8d .word 0x08009d8d
8009c54: 08009e65 .word 0x08009e65
8009c58: 08009e65 .word 0x08009e65
8009c5c: 08009d9f .word 0x08009d9f
8009c60: 08009e65 .word 0x08009e65
8009c64: 08009e65 .word 0x08009e65
8009c68: 08009e65 .word 0x08009e65
8009c6c: 08009e65 .word 0x08009e65
8009c70: 08009dd5 .word 0x08009dd5
8009c74: 08009e65 .word 0x08009e65
8009c78: 08009de7 .word 0x08009de7
8009c7c: 08009e65 .word 0x08009e65
8009c80: 08009e65 .word 0x08009e65
8009c84: 08009e0b .word 0x08009e0b
8009c88: 08009e65 .word 0x08009e65
8009c8c: 08009e2f .word 0x08009e2f
8009c90: 08009e65 .word 0x08009e65
8009c94: 08009e65 .word 0x08009e65
8009c98: 08009e65 .word 0x08009e65
8009c9c: 08009e65 .word 0x08009e65
8009ca0: 08009e53 .word 0x08009e53
8009ca4: 08009e65 .word 0x08009e65
8009ca8: 08009e65 .word 0x08009e65
8009cac: 08009e65 .word 0x08009e65
8009cb0: 08009e65 .word 0x08009e65
8009cb4: 08009e65 .word 0x08009e65
8009cb8: 08009e65 .word 0x08009e65
8009cbc: 08009e65 .word 0x08009e65
8009cc0: 08009e65 .word 0x08009e65
8009cc4: 08009e65 .word 0x08009e65
8009cc8: 08009e65 .word 0x08009e65
8009ccc: 08009e65 .word 0x08009e65
8009cd0: 08009e65 .word 0x08009e65
8009cd4: 08009e65 .word 0x08009e65
8009cd8: 08009e65 .word 0x08009e65
8009cdc: 08009e65 .word 0x08009e65
8009ce0: 08009e65 .word 0x08009e65
8009ce4: 08009e65 .word 0x08009e65
8009ce8: 08009e65 .word 0x08009e65
8009cec: 08009e65 .word 0x08009e65
8009cf0: 08009e65 .word 0x08009e65
8009cf4: 08009e65 .word 0x08009e65
8009cf8: 08009e65 .word 0x08009e65
8009cfc: 08009e65 .word 0x08009e65
8009d00: 08009e65 .word 0x08009e65
8009d04: 08009e65 .word 0x08009e65
8009d08: 08009e65 .word 0x08009e65
8009d0c: 08009e65 .word 0x08009e65
8009d10: 08009e65 .word 0x08009e65
8009d14: 08009e65 .word 0x08009e65
8009d18: 08009e65 .word 0x08009e65
8009d1c: 08009e65 .word 0x08009e65
8009d20: 08009e65 .word 0x08009e65
8009d24: 08009e65 .word 0x08009e65
8009d28: 08009e65 .word 0x08009e65
8009d2c: 08009e65 .word 0x08009e65
8009d30: 08009e65 .word 0x08009e65
8009d34: 08009e65 .word 0x08009e65
8009d38: 08009e65 .word 0x08009e65
8009d3c: 08009e65 .word 0x08009e65
8009d40: 08009e65 .word 0x08009e65
8009d44: 08009e65 .word 0x08009e65
8009d48: 08009e65 .word 0x08009e65
8009d4c: 08009dc3 .word 0x08009dc3
8009d50: 2b9e cmp r3, #158 @ 0x9e
8009d52: d051 beq.n 8009df8 <SCSI_ProcessCmd+0x274>
8009d54: e086 b.n 8009e64 <SCSI_ProcessCmd+0x2e0>
{
case SCSI_TEST_UNIT_READY:
ret = SCSI_TestUnitReady(pdev, lun, cmd);
8009d56: 7afb ldrb r3, [r7, #11]
8009d58: 687a ldr r2, [r7, #4]
8009d5a: 4619 mov r1, r3
8009d5c: 68f8 ldr r0, [r7, #12]
8009d5e: f000 f893 bl 8009e88 <SCSI_TestUnitReady>
8009d62: 4603 mov r3, r0
8009d64: 75fb strb r3, [r7, #23]
break;
8009d66: e089 b.n 8009e7c <SCSI_ProcessCmd+0x2f8>
case SCSI_REQUEST_SENSE:
ret = SCSI_RequestSense(pdev, lun, cmd);
8009d68: 7afb ldrb r3, [r7, #11]
8009d6a: 687a ldr r2, [r7, #4]
8009d6c: 4619 mov r1, r3
8009d6e: 68f8 ldr r0, [r7, #12]
8009d70: f000 fbc6 bl 800a500 <SCSI_RequestSense>
8009d74: 4603 mov r3, r0
8009d76: 75fb strb r3, [r7, #23]
break;
8009d78: e080 b.n 8009e7c <SCSI_ProcessCmd+0x2f8>
case SCSI_INQUIRY:
ret = SCSI_Inquiry(pdev, lun, cmd);
8009d7a: 7afb ldrb r3, [r7, #11]
8009d7c: 687a ldr r2, [r7, #4]
8009d7e: 4619 mov r1, r3
8009d80: 68f8 ldr r0, [r7, #12]
8009d82: f000 f8df bl 8009f44 <SCSI_Inquiry>
8009d86: 4603 mov r3, r0
8009d88: 75fb strb r3, [r7, #23]
break;
8009d8a: e077 b.n 8009e7c <SCSI_ProcessCmd+0x2f8>
case SCSI_START_STOP_UNIT:
ret = SCSI_StartStopUnit(pdev, lun, cmd);
8009d8c: 7afb ldrb r3, [r7, #11]
8009d8e: 687a ldr r2, [r7, #4]
8009d90: 4619 mov r1, r3
8009d92: 68f8 ldr r0, [r7, #12]
8009d94: f000 fcaa bl 800a6ec <SCSI_StartStopUnit>
8009d98: 4603 mov r3, r0
8009d9a: 75fb strb r3, [r7, #23]
break;
8009d9c: e06e b.n 8009e7c <SCSI_ProcessCmd+0x2f8>
case SCSI_ALLOW_MEDIUM_REMOVAL:
ret = SCSI_AllowPreventRemovable(pdev, lun, cmd);
8009d9e: 7afb ldrb r3, [r7, #11]
8009da0: 687a ldr r2, [r7, #4]
8009da2: 4619 mov r1, r3
8009da4: 68f8 ldr r0, [r7, #12]
8009da6: f000 fcfe bl 800a7a6 <SCSI_AllowPreventRemovable>
8009daa: 4603 mov r3, r0
8009dac: 75fb strb r3, [r7, #23]
break;
8009dae: e065 b.n 8009e7c <SCSI_ProcessCmd+0x2f8>
case SCSI_MODE_SENSE6:
ret = SCSI_ModeSense6(pdev, lun, cmd);
8009db0: 7afb ldrb r3, [r7, #11]
8009db2: 687a ldr r2, [r7, #4]
8009db4: 4619 mov r1, r3
8009db6: 68f8 ldr r0, [r7, #12]
8009db8: f000 fb16 bl 800a3e8 <SCSI_ModeSense6>
8009dbc: 4603 mov r3, r0
8009dbe: 75fb strb r3, [r7, #23]
break;
8009dc0: e05c b.n 8009e7c <SCSI_ProcessCmd+0x2f8>
case SCSI_MODE_SENSE10:
ret = SCSI_ModeSense10(pdev, lun, cmd);
8009dc2: 7afb ldrb r3, [r7, #11]
8009dc4: 687a ldr r2, [r7, #4]
8009dc6: 4619 mov r1, r3
8009dc8: 68f8 ldr r0, [r7, #12]
8009dca: f000 fb53 bl 800a474 <SCSI_ModeSense10>
8009dce: 4603 mov r3, r0
8009dd0: 75fb strb r3, [r7, #23]
break;
8009dd2: e053 b.n 8009e7c <SCSI_ProcessCmd+0x2f8>
case SCSI_READ_FORMAT_CAPACITIES:
ret = SCSI_ReadFormatCapacity(pdev, lun, cmd);
8009dd4: 7afb ldrb r3, [r7, #11]
8009dd6: 687a ldr r2, [r7, #4]
8009dd8: 4619 mov r1, r3
8009dda: 68f8 ldr r0, [r7, #12]
8009ddc: f000 fa86 bl 800a2ec <SCSI_ReadFormatCapacity>
8009de0: 4603 mov r3, r0
8009de2: 75fb strb r3, [r7, #23]
break;
8009de4: e04a b.n 8009e7c <SCSI_ProcessCmd+0x2f8>
case SCSI_READ_CAPACITY10:
ret = SCSI_ReadCapacity10(pdev, lun, cmd);
8009de6: 7afb ldrb r3, [r7, #11]
8009de8: 687a ldr r2, [r7, #4]
8009dea: 4619 mov r1, r3
8009dec: 68f8 ldr r0, [r7, #12]
8009dee: f000 f929 bl 800a044 <SCSI_ReadCapacity10>
8009df2: 4603 mov r3, r0
8009df4: 75fb strb r3, [r7, #23]
break;
8009df6: e041 b.n 8009e7c <SCSI_ProcessCmd+0x2f8>
case SCSI_READ_CAPACITY16:
ret = SCSI_ReadCapacity16(pdev, lun, cmd);
8009df8: 7afb ldrb r3, [r7, #11]
8009dfa: 687a ldr r2, [r7, #4]
8009dfc: 4619 mov r1, r3
8009dfe: 68f8 ldr r0, [r7, #12]
8009e00: f000 f9af bl 800a162 <SCSI_ReadCapacity16>
8009e04: 4603 mov r3, r0
8009e06: 75fb strb r3, [r7, #23]
break;
8009e08: e038 b.n 8009e7c <SCSI_ProcessCmd+0x2f8>
case SCSI_READ10:
ret = SCSI_Read10(pdev, lun, cmd);
8009e0a: 7afb ldrb r3, [r7, #11]
8009e0c: 687a ldr r2, [r7, #4]
8009e0e: 4619 mov r1, r3
8009e10: 68f8 ldr r0, [r7, #12]
8009e12: f000 fcf9 bl 800a808 <SCSI_Read10>
8009e16: 4603 mov r3, r0
8009e18: 75fb strb r3, [r7, #23]
break;
8009e1a: e02f b.n 8009e7c <SCSI_ProcessCmd+0x2f8>
case SCSI_READ12:
ret = SCSI_Read12(pdev, lun, cmd);
8009e1c: 7afb ldrb r3, [r7, #11]
8009e1e: 687a ldr r2, [r7, #4]
8009e20: 4619 mov r1, r3
8009e22: 68f8 ldr r0, [r7, #12]
8009e24: f000 fda7 bl 800a976 <SCSI_Read12>
8009e28: 4603 mov r3, r0
8009e2a: 75fb strb r3, [r7, #23]
break;
8009e2c: e026 b.n 8009e7c <SCSI_ProcessCmd+0x2f8>
case SCSI_WRITE10:
ret = SCSI_Write10(pdev, lun, cmd);
8009e2e: 7afb ldrb r3, [r7, #11]
8009e30: 687a ldr r2, [r7, #4]
8009e32: 4619 mov r1, r3
8009e34: 68f8 ldr r0, [r7, #12]
8009e36: f000 fe5f bl 800aaf8 <SCSI_Write10>
8009e3a: 4603 mov r3, r0
8009e3c: 75fb strb r3, [r7, #23]
break;
8009e3e: e01d b.n 8009e7c <SCSI_ProcessCmd+0x2f8>
case SCSI_WRITE12:
ret = SCSI_Write12(pdev, lun, cmd);
8009e40: 7afb ldrb r3, [r7, #11]
8009e42: 687a ldr r2, [r7, #4]
8009e44: 4619 mov r1, r3
8009e46: 68f8 ldr r0, [r7, #12]
8009e48: f000 ff3a bl 800acc0 <SCSI_Write12>
8009e4c: 4603 mov r3, r0
8009e4e: 75fb strb r3, [r7, #23]
break;
8009e50: e014 b.n 8009e7c <SCSI_ProcessCmd+0x2f8>
case SCSI_VERIFY10:
ret = SCSI_Verify10(pdev, lun, cmd);
8009e52: 7afb ldrb r3, [r7, #11]
8009e54: 687a ldr r2, [r7, #4]
8009e56: 4619 mov r1, r3
8009e58: 68f8 ldr r0, [r7, #12]
8009e5a: f001 f825 bl 800aea8 <SCSI_Verify10>
8009e5e: 4603 mov r3, r0
8009e60: 75fb strb r3, [r7, #23]
break;
8009e62: e00b b.n 8009e7c <SCSI_ProcessCmd+0x2f8>
default:
SCSI_SenseCode(pdev, lun, ILLEGAL_REQUEST, INVALID_CDB);
8009e64: 7af9 ldrb r1, [r7, #11]
8009e66: 2320 movs r3, #32
8009e68: 2205 movs r2, #5
8009e6a: 68f8 ldr r0, [r7, #12]
8009e6c: f000 fbe2 bl 800a634 <SCSI_SenseCode>
hmsc->bot_status = USBD_BOT_STATUS_ERROR;
8009e70: 693b ldr r3, [r7, #16]
8009e72: 2202 movs r2, #2
8009e74: 725a strb r2, [r3, #9]
ret = -1;
8009e76: 23ff movs r3, #255 @ 0xff
8009e78: 75fb strb r3, [r7, #23]
break;
8009e7a: bf00 nop
}
return ret;
8009e7c: f997 3017 ldrsb.w r3, [r7, #23]
}
8009e80: 4618 mov r0, r3
8009e82: 3718 adds r7, #24
8009e84: 46bd mov sp, r7
8009e86: bd80 pop {r7, pc}
08009e88 <SCSI_TestUnitReady>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_TestUnitReady(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
8009e88: b580 push {r7, lr}
8009e8a: b086 sub sp, #24
8009e8c: af00 add r7, sp, #0
8009e8e: 60f8 str r0, [r7, #12]
8009e90: 460b mov r3, r1
8009e92: 607a str r2, [r7, #4]
8009e94: 72fb strb r3, [r7, #11]
UNUSED(params);
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
8009e96: 68fb ldr r3, [r7, #12]
8009e98: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8009e9c: 68fb ldr r3, [r7, #12]
8009e9e: 32b0 adds r2, #176 @ 0xb0
8009ea0: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009ea4: 617b str r3, [r7, #20]
if (hmsc == NULL)
8009ea6: 697b ldr r3, [r7, #20]
8009ea8: 2b00 cmp r3, #0
8009eaa: d102 bne.n 8009eb2 <SCSI_TestUnitReady+0x2a>
{
return -1;
8009eac: f04f 33ff mov.w r3, #4294967295
8009eb0: e043 b.n 8009f3a <SCSI_TestUnitReady+0xb2>
}
/* case 9 : Hi > D0 */
if (hmsc->cbw.dDataLength != 0U)
8009eb2: 697b ldr r3, [r7, #20]
8009eb4: f503 5300 add.w r3, r3, #8192 @ 0x2000
8009eb8: 699b ldr r3, [r3, #24]
8009eba: 2b00 cmp r3, #0
8009ebc: d00b beq.n 8009ed6 <SCSI_TestUnitReady+0x4e>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
8009ebe: 697b ldr r3, [r7, #20]
8009ec0: f503 5300 add.w r3, r3, #8192 @ 0x2000
8009ec4: 7f59 ldrb r1, [r3, #29]
8009ec6: 2320 movs r3, #32
8009ec8: 2205 movs r2, #5
8009eca: 68f8 ldr r0, [r7, #12]
8009ecc: f000 fbb2 bl 800a634 <SCSI_SenseCode>
return -1;
8009ed0: f04f 33ff mov.w r3, #4294967295
8009ed4: e031 b.n 8009f3a <SCSI_TestUnitReady+0xb2>
}
if (hmsc->scsi_medium_state == SCSI_MEDIUM_EJECTED)
8009ed6: 697b ldr r3, [r7, #20]
8009ed8: f503 5300 add.w r3, r3, #8192 @ 0x2000
8009edc: f893 3062 ldrb.w r3, [r3, #98] @ 0x62
8009ee0: 2b02 cmp r3, #2
8009ee2: d10b bne.n 8009efc <SCSI_TestUnitReady+0x74>
{
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
8009ee4: 7af9 ldrb r1, [r7, #11]
8009ee6: 233a movs r3, #58 @ 0x3a
8009ee8: 2202 movs r2, #2
8009eea: 68f8 ldr r0, [r7, #12]
8009eec: f000 fba2 bl 800a634 <SCSI_SenseCode>
hmsc->bot_state = USBD_BOT_NO_DATA;
8009ef0: 697b ldr r3, [r7, #20]
8009ef2: 2205 movs r2, #5
8009ef4: 721a strb r2, [r3, #8]
return -1;
8009ef6: f04f 33ff mov.w r3, #4294967295
8009efa: e01e b.n 8009f3a <SCSI_TestUnitReady+0xb2>
}
if (((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->IsReady(lun) != 0)
8009efc: 68fb ldr r3, [r7, #12]
8009efe: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8009f02: 68fa ldr r2, [r7, #12]
8009f04: 33b0 adds r3, #176 @ 0xb0
8009f06: 009b lsls r3, r3, #2
8009f08: 4413 add r3, r2
8009f0a: 685b ldr r3, [r3, #4]
8009f0c: 689b ldr r3, [r3, #8]
8009f0e: 7afa ldrb r2, [r7, #11]
8009f10: 4610 mov r0, r2
8009f12: 4798 blx r3
8009f14: 4603 mov r3, r0
8009f16: 2b00 cmp r3, #0
8009f18: d00b beq.n 8009f32 <SCSI_TestUnitReady+0xaa>
{
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
8009f1a: 7af9 ldrb r1, [r7, #11]
8009f1c: 233a movs r3, #58 @ 0x3a
8009f1e: 2202 movs r2, #2
8009f20: 68f8 ldr r0, [r7, #12]
8009f22: f000 fb87 bl 800a634 <SCSI_SenseCode>
hmsc->bot_state = USBD_BOT_NO_DATA;
8009f26: 697b ldr r3, [r7, #20]
8009f28: 2205 movs r2, #5
8009f2a: 721a strb r2, [r3, #8]
return -1;
8009f2c: f04f 33ff mov.w r3, #4294967295
8009f30: e003 b.n 8009f3a <SCSI_TestUnitReady+0xb2>
}
hmsc->bot_data_length = 0U;
8009f32: 697b ldr r3, [r7, #20]
8009f34: 2200 movs r2, #0
8009f36: 60da str r2, [r3, #12]
return 0;
8009f38: 2300 movs r3, #0
}
8009f3a: 4618 mov r0, r3
8009f3c: 3718 adds r7, #24
8009f3e: 46bd mov sp, r7
8009f40: bd80 pop {r7, pc}
...
08009f44 <SCSI_Inquiry>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_Inquiry(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
8009f44: b580 push {r7, lr}
8009f46: b088 sub sp, #32
8009f48: af00 add r7, sp, #0
8009f4a: 60f8 str r0, [r7, #12]
8009f4c: 460b mov r3, r1
8009f4e: 607a str r2, [r7, #4]
8009f50: 72fb strb r3, [r7, #11]
uint8_t *pPage;
uint16_t len;
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
8009f52: 68fb ldr r3, [r7, #12]
8009f54: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8009f58: 68fb ldr r3, [r7, #12]
8009f5a: 32b0 adds r2, #176 @ 0xb0
8009f5c: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009f60: 61bb str r3, [r7, #24]
if (hmsc == NULL)
8009f62: 69bb ldr r3, [r7, #24]
8009f64: 2b00 cmp r3, #0
8009f66: d102 bne.n 8009f6e <SCSI_Inquiry+0x2a>
{
return -1;
8009f68: f04f 33ff mov.w r3, #4294967295
8009f6c: e061 b.n 800a032 <SCSI_Inquiry+0xee>
}
if (hmsc->cbw.dDataLength == 0U)
8009f6e: 69bb ldr r3, [r7, #24]
8009f70: f503 5300 add.w r3, r3, #8192 @ 0x2000
8009f74: 699b ldr r3, [r3, #24]
8009f76: 2b00 cmp r3, #0
8009f78: d10b bne.n 8009f92 <SCSI_Inquiry+0x4e>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
8009f7a: 69bb ldr r3, [r7, #24]
8009f7c: f503 5300 add.w r3, r3, #8192 @ 0x2000
8009f80: 7f59 ldrb r1, [r3, #29]
8009f82: 2320 movs r3, #32
8009f84: 2205 movs r2, #5
8009f86: 68f8 ldr r0, [r7, #12]
8009f88: f000 fb54 bl 800a634 <SCSI_SenseCode>
return -1;
8009f8c: f04f 33ff mov.w r3, #4294967295
8009f90: e04f b.n 800a032 <SCSI_Inquiry+0xee>
}
if ((params[1] & 0x01U) != 0U) /* Evpd is set */
8009f92: 687b ldr r3, [r7, #4]
8009f94: 3301 adds r3, #1
8009f96: 781b ldrb r3, [r3, #0]
8009f98: f003 0301 and.w r3, r3, #1
8009f9c: 2b00 cmp r3, #0
8009f9e: d021 beq.n 8009fe4 <SCSI_Inquiry+0xa0>
{
if (params[2] == 0U) /* Request for Supported Vital Product Data Pages*/
8009fa0: 687b ldr r3, [r7, #4]
8009fa2: 3302 adds r3, #2
8009fa4: 781b ldrb r3, [r3, #0]
8009fa6: 2b00 cmp r3, #0
8009fa8: d105 bne.n 8009fb6 <SCSI_Inquiry+0x72>
{
(void)SCSI_UpdateBotData(hmsc, MSC_Page00_Inquiry_Data, LENGTH_INQUIRY_PAGE00);
8009faa: 2206 movs r2, #6
8009fac: 4923 ldr r1, [pc, #140] @ (800a03c <SCSI_Inquiry+0xf8>)
8009fae: 69b8 ldr r0, [r7, #24]
8009fb0: f001 f926 bl 800b200 <SCSI_UpdateBotData>
8009fb4: e03c b.n 800a030 <SCSI_Inquiry+0xec>
}
else if (params[2] == 0x80U) /* Request for VPD page 0x80 Unit Serial Number */
8009fb6: 687b ldr r3, [r7, #4]
8009fb8: 3302 adds r3, #2
8009fba: 781b ldrb r3, [r3, #0]
8009fbc: 2b80 cmp r3, #128 @ 0x80
8009fbe: d105 bne.n 8009fcc <SCSI_Inquiry+0x88>
{
(void)SCSI_UpdateBotData(hmsc, MSC_Page80_Inquiry_Data, LENGTH_INQUIRY_PAGE80);
8009fc0: 2208 movs r2, #8
8009fc2: 491f ldr r1, [pc, #124] @ (800a040 <SCSI_Inquiry+0xfc>)
8009fc4: 69b8 ldr r0, [r7, #24]
8009fc6: f001 f91b bl 800b200 <SCSI_UpdateBotData>
8009fca: e031 b.n 800a030 <SCSI_Inquiry+0xec>
}
else /* Request Not supported */
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST,
8009fcc: 69bb ldr r3, [r7, #24]
8009fce: f503 5300 add.w r3, r3, #8192 @ 0x2000
8009fd2: 7f59 ldrb r1, [r3, #29]
8009fd4: 2324 movs r3, #36 @ 0x24
8009fd6: 2205 movs r2, #5
8009fd8: 68f8 ldr r0, [r7, #12]
8009fda: f000 fb2b bl 800a634 <SCSI_SenseCode>
INVALID_FIELED_IN_COMMAND);
return -1;
8009fde: f04f 33ff mov.w r3, #4294967295
8009fe2: e026 b.n 800a032 <SCSI_Inquiry+0xee>
}
}
else
{
pPage = (uint8_t *) & ((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId]) \
8009fe4: 68fb ldr r3, [r7, #12]
8009fe6: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8009fea: 68fa ldr r2, [r7, #12]
8009fec: 33b0 adds r3, #176 @ 0xb0
8009fee: 009b lsls r3, r3, #2
8009ff0: 4413 add r3, r2
8009ff2: 685b ldr r3, [r3, #4]
->pInquiry[lun * STANDARD_INQUIRY_DATA_LEN];
8009ff4: 69d9 ldr r1, [r3, #28]
8009ff6: 7afa ldrb r2, [r7, #11]
8009ff8: 4613 mov r3, r2
8009ffa: 00db lsls r3, r3, #3
8009ffc: 4413 add r3, r2
8009ffe: 009b lsls r3, r3, #2
pPage = (uint8_t *) & ((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId]) \
800a000: 440b add r3, r1
800a002: 617b str r3, [r7, #20]
len = (uint16_t)pPage[4] + 5U;
800a004: 697b ldr r3, [r7, #20]
800a006: 3304 adds r3, #4
800a008: 781b ldrb r3, [r3, #0]
800a00a: 3305 adds r3, #5
800a00c: 83fb strh r3, [r7, #30]
if (params[4] <= len)
800a00e: 687b ldr r3, [r7, #4]
800a010: 3304 adds r3, #4
800a012: 781b ldrb r3, [r3, #0]
800a014: 461a mov r2, r3
800a016: 8bfb ldrh r3, [r7, #30]
800a018: 4293 cmp r3, r2
800a01a: d303 bcc.n 800a024 <SCSI_Inquiry+0xe0>
{
len = params[4];
800a01c: 687b ldr r3, [r7, #4]
800a01e: 3304 adds r3, #4
800a020: 781b ldrb r3, [r3, #0]
800a022: 83fb strh r3, [r7, #30]
}
(void)SCSI_UpdateBotData(hmsc, pPage, len);
800a024: 8bfb ldrh r3, [r7, #30]
800a026: 461a mov r2, r3
800a028: 6979 ldr r1, [r7, #20]
800a02a: 69b8 ldr r0, [r7, #24]
800a02c: f001 f8e8 bl 800b200 <SCSI_UpdateBotData>
}
return 0;
800a030: 2300 movs r3, #0
}
800a032: 4618 mov r0, r3
800a034: 3720 adds r7, #32
800a036: 46bd mov sp, r7
800a038: bd80 pop {r7, pc}
800a03a: bf00 nop
800a03c: 20000084 .word 0x20000084
800a040: 2000008c .word 0x2000008c
0800a044 <SCSI_ReadCapacity10>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_ReadCapacity10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
800a044: b590 push {r4, r7, lr}
800a046: b087 sub sp, #28
800a048: af00 add r7, sp, #0
800a04a: 60f8 str r0, [r7, #12]
800a04c: 460b mov r3, r1
800a04e: 607a str r2, [r7, #4]
800a050: 72fb strb r3, [r7, #11]
UNUSED(params);
int8_t ret;
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800a052: 68fb ldr r3, [r7, #12]
800a054: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800a058: 68fb ldr r3, [r7, #12]
800a05a: 32b0 adds r2, #176 @ 0xb0
800a05c: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800a060: 617b str r3, [r7, #20]
if (hmsc == NULL)
800a062: 697b ldr r3, [r7, #20]
800a064: 2b00 cmp r3, #0
800a066: d102 bne.n 800a06e <SCSI_ReadCapacity10+0x2a>
{
return -1;
800a068: f04f 33ff mov.w r3, #4294967295
800a06c: e075 b.n 800a15a <SCSI_ReadCapacity10+0x116>
}
ret = ((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->GetCapacity(lun, &hmsc->scsi_blk_nbr,
800a06e: 68fb ldr r3, [r7, #12]
800a070: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a074: 68fa ldr r2, [r7, #12]
800a076: 33b0 adds r3, #176 @ 0xb0
800a078: 009b lsls r3, r3, #2
800a07a: 4413 add r3, r2
800a07c: 685b ldr r3, [r3, #4]
800a07e: 685c ldr r4, [r3, #4]
800a080: 697b ldr r3, [r7, #20]
800a082: f503 5301 add.w r3, r3, #8256 @ 0x2040
800a086: 3328 adds r3, #40 @ 0x28
800a088: 697a ldr r2, [r7, #20]
800a08a: f502 5201 add.w r2, r2, #8256 @ 0x2040
800a08e: 3224 adds r2, #36 @ 0x24
800a090: 7af8 ldrb r0, [r7, #11]
800a092: 4619 mov r1, r3
800a094: 47a0 blx r4
800a096: 4603 mov r3, r0
800a098: 74fb strb r3, [r7, #19]
&hmsc->scsi_blk_size);
if ((ret != 0) || (hmsc->scsi_medium_state == SCSI_MEDIUM_EJECTED))
800a09a: f997 3013 ldrsb.w r3, [r7, #19]
800a09e: 2b00 cmp r3, #0
800a0a0: d106 bne.n 800a0b0 <SCSI_ReadCapacity10+0x6c>
800a0a2: 697b ldr r3, [r7, #20]
800a0a4: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a0a8: f893 3062 ldrb.w r3, [r3, #98] @ 0x62
800a0ac: 2b02 cmp r3, #2
800a0ae: d108 bne.n 800a0c2 <SCSI_ReadCapacity10+0x7e>
{
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
800a0b0: 7af9 ldrb r1, [r7, #11]
800a0b2: 233a movs r3, #58 @ 0x3a
800a0b4: 2202 movs r2, #2
800a0b6: 68f8 ldr r0, [r7, #12]
800a0b8: f000 fabc bl 800a634 <SCSI_SenseCode>
return -1;
800a0bc: f04f 33ff mov.w r3, #4294967295
800a0c0: e04b b.n 800a15a <SCSI_ReadCapacity10+0x116>
}
hmsc->bot_data[0] = (uint8_t)((hmsc->scsi_blk_nbr - 1U) >> 24);
800a0c2: 697b ldr r3, [r7, #20]
800a0c4: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a0c8: 6e9b ldr r3, [r3, #104] @ 0x68
800a0ca: 3b01 subs r3, #1
800a0cc: 0e1b lsrs r3, r3, #24
800a0ce: b2da uxtb r2, r3
800a0d0: 697b ldr r3, [r7, #20]
800a0d2: 741a strb r2, [r3, #16]
hmsc->bot_data[1] = (uint8_t)((hmsc->scsi_blk_nbr - 1U) >> 16);
800a0d4: 697b ldr r3, [r7, #20]
800a0d6: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a0da: 6e9b ldr r3, [r3, #104] @ 0x68
800a0dc: 3b01 subs r3, #1
800a0de: 0c1b lsrs r3, r3, #16
800a0e0: b2da uxtb r2, r3
800a0e2: 697b ldr r3, [r7, #20]
800a0e4: 745a strb r2, [r3, #17]
hmsc->bot_data[2] = (uint8_t)((hmsc->scsi_blk_nbr - 1U) >> 8);
800a0e6: 697b ldr r3, [r7, #20]
800a0e8: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a0ec: 6e9b ldr r3, [r3, #104] @ 0x68
800a0ee: 3b01 subs r3, #1
800a0f0: 0a1b lsrs r3, r3, #8
800a0f2: b2da uxtb r2, r3
800a0f4: 697b ldr r3, [r7, #20]
800a0f6: 749a strb r2, [r3, #18]
hmsc->bot_data[3] = (uint8_t)(hmsc->scsi_blk_nbr - 1U);
800a0f8: 697b ldr r3, [r7, #20]
800a0fa: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a0fe: 6e9b ldr r3, [r3, #104] @ 0x68
800a100: b2db uxtb r3, r3
800a102: 3b01 subs r3, #1
800a104: b2da uxtb r2, r3
800a106: 697b ldr r3, [r7, #20]
800a108: 74da strb r2, [r3, #19]
hmsc->bot_data[4] = (uint8_t)(hmsc->scsi_blk_size >> 24);
800a10a: 697b ldr r3, [r7, #20]
800a10c: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a110: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
800a114: 161b asrs r3, r3, #24
800a116: b2da uxtb r2, r3
800a118: 697b ldr r3, [r7, #20]
800a11a: 751a strb r2, [r3, #20]
hmsc->bot_data[5] = (uint8_t)(hmsc->scsi_blk_size >> 16);
800a11c: 697b ldr r3, [r7, #20]
800a11e: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a122: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
800a126: 141b asrs r3, r3, #16
800a128: b2da uxtb r2, r3
800a12a: 697b ldr r3, [r7, #20]
800a12c: 755a strb r2, [r3, #21]
hmsc->bot_data[6] = (uint8_t)(hmsc->scsi_blk_size >> 8);
800a12e: 697b ldr r3, [r7, #20]
800a130: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a134: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
800a138: 0a1b lsrs r3, r3, #8
800a13a: b29b uxth r3, r3
800a13c: b2da uxtb r2, r3
800a13e: 697b ldr r3, [r7, #20]
800a140: 759a strb r2, [r3, #22]
hmsc->bot_data[7] = (uint8_t)(hmsc->scsi_blk_size);
800a142: 697b ldr r3, [r7, #20]
800a144: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a148: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
800a14c: b2da uxtb r2, r3
800a14e: 697b ldr r3, [r7, #20]
800a150: 75da strb r2, [r3, #23]
hmsc->bot_data_length = 8U;
800a152: 697b ldr r3, [r7, #20]
800a154: 2208 movs r2, #8
800a156: 60da str r2, [r3, #12]
return 0;
800a158: 2300 movs r3, #0
}
800a15a: 4618 mov r0, r3
800a15c: 371c adds r7, #28
800a15e: 46bd mov sp, r7
800a160: bd90 pop {r4, r7, pc}
0800a162 <SCSI_ReadCapacity16>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_ReadCapacity16(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
800a162: b590 push {r4, r7, lr}
800a164: b089 sub sp, #36 @ 0x24
800a166: af00 add r7, sp, #0
800a168: 60f8 str r0, [r7, #12]
800a16a: 460b mov r3, r1
800a16c: 607a str r2, [r7, #4]
800a16e: 72fb strb r3, [r7, #11]
UNUSED(params);
uint32_t idx;
int8_t ret;
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800a170: 68fb ldr r3, [r7, #12]
800a172: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800a176: 68fb ldr r3, [r7, #12]
800a178: 32b0 adds r2, #176 @ 0xb0
800a17a: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800a17e: 61bb str r3, [r7, #24]
if (hmsc == NULL)
800a180: 69bb ldr r3, [r7, #24]
800a182: 2b00 cmp r3, #0
800a184: d102 bne.n 800a18c <SCSI_ReadCapacity16+0x2a>
{
return -1;
800a186: f04f 33ff mov.w r3, #4294967295
800a18a: e0ab b.n 800a2e4 <SCSI_ReadCapacity16+0x182>
}
ret = ((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->GetCapacity(lun, &hmsc->scsi_blk_nbr,
800a18c: 68fb ldr r3, [r7, #12]
800a18e: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a192: 68fa ldr r2, [r7, #12]
800a194: 33b0 adds r3, #176 @ 0xb0
800a196: 009b lsls r3, r3, #2
800a198: 4413 add r3, r2
800a19a: 685b ldr r3, [r3, #4]
800a19c: 685c ldr r4, [r3, #4]
800a19e: 69bb ldr r3, [r7, #24]
800a1a0: f503 5301 add.w r3, r3, #8256 @ 0x2040
800a1a4: 3328 adds r3, #40 @ 0x28
800a1a6: 69ba ldr r2, [r7, #24]
800a1a8: f502 5201 add.w r2, r2, #8256 @ 0x2040
800a1ac: 3224 adds r2, #36 @ 0x24
800a1ae: 7af8 ldrb r0, [r7, #11]
800a1b0: 4619 mov r1, r3
800a1b2: 47a0 blx r4
800a1b4: 4603 mov r3, r0
800a1b6: 75fb strb r3, [r7, #23]
&hmsc->scsi_blk_size);
if ((ret != 0) || (hmsc->scsi_medium_state == SCSI_MEDIUM_EJECTED))
800a1b8: f997 3017 ldrsb.w r3, [r7, #23]
800a1bc: 2b00 cmp r3, #0
800a1be: d106 bne.n 800a1ce <SCSI_ReadCapacity16+0x6c>
800a1c0: 69bb ldr r3, [r7, #24]
800a1c2: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a1c6: f893 3062 ldrb.w r3, [r3, #98] @ 0x62
800a1ca: 2b02 cmp r3, #2
800a1cc: d108 bne.n 800a1e0 <SCSI_ReadCapacity16+0x7e>
{
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
800a1ce: 7af9 ldrb r1, [r7, #11]
800a1d0: 233a movs r3, #58 @ 0x3a
800a1d2: 2202 movs r2, #2
800a1d4: 68f8 ldr r0, [r7, #12]
800a1d6: f000 fa2d bl 800a634 <SCSI_SenseCode>
return -1;
800a1da: f04f 33ff mov.w r3, #4294967295
800a1de: e081 b.n 800a2e4 <SCSI_ReadCapacity16+0x182>
}
hmsc->bot_data_length = ((uint32_t)params[10] << 24) |
800a1e0: 687b ldr r3, [r7, #4]
800a1e2: 330a adds r3, #10
800a1e4: 781b ldrb r3, [r3, #0]
800a1e6: 061a lsls r2, r3, #24
((uint32_t)params[11] << 16) |
800a1e8: 687b ldr r3, [r7, #4]
800a1ea: 330b adds r3, #11
800a1ec: 781b ldrb r3, [r3, #0]
800a1ee: 041b lsls r3, r3, #16
hmsc->bot_data_length = ((uint32_t)params[10] << 24) |
800a1f0: 431a orrs r2, r3
((uint32_t)params[12] << 8) |
800a1f2: 687b ldr r3, [r7, #4]
800a1f4: 330c adds r3, #12
800a1f6: 781b ldrb r3, [r3, #0]
800a1f8: 021b lsls r3, r3, #8
((uint32_t)params[11] << 16) |
800a1fa: 4313 orrs r3, r2
(uint32_t)params[13];
800a1fc: 687a ldr r2, [r7, #4]
800a1fe: 320d adds r2, #13
800a200: 7812 ldrb r2, [r2, #0]
((uint32_t)params[12] << 8) |
800a202: 431a orrs r2, r3
hmsc->bot_data_length = ((uint32_t)params[10] << 24) |
800a204: 69bb ldr r3, [r7, #24]
800a206: 60da str r2, [r3, #12]
for (idx = 0U; idx < hmsc->bot_data_length; idx++)
800a208: 2300 movs r3, #0
800a20a: 61fb str r3, [r7, #28]
800a20c: e008 b.n 800a220 <SCSI_ReadCapacity16+0xbe>
{
hmsc->bot_data[idx] = 0U;
800a20e: 69ba ldr r2, [r7, #24]
800a210: 69fb ldr r3, [r7, #28]
800a212: 4413 add r3, r2
800a214: 3310 adds r3, #16
800a216: 2200 movs r2, #0
800a218: 701a strb r2, [r3, #0]
for (idx = 0U; idx < hmsc->bot_data_length; idx++)
800a21a: 69fb ldr r3, [r7, #28]
800a21c: 3301 adds r3, #1
800a21e: 61fb str r3, [r7, #28]
800a220: 69bb ldr r3, [r7, #24]
800a222: 68db ldr r3, [r3, #12]
800a224: 69fa ldr r2, [r7, #28]
800a226: 429a cmp r2, r3
800a228: d3f1 bcc.n 800a20e <SCSI_ReadCapacity16+0xac>
}
hmsc->bot_data[4] = (uint8_t)((hmsc->scsi_blk_nbr - 1U) >> 24);
800a22a: 69bb ldr r3, [r7, #24]
800a22c: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a230: 6e9b ldr r3, [r3, #104] @ 0x68
800a232: 3b01 subs r3, #1
800a234: 0e1b lsrs r3, r3, #24
800a236: b2da uxtb r2, r3
800a238: 69bb ldr r3, [r7, #24]
800a23a: 751a strb r2, [r3, #20]
hmsc->bot_data[5] = (uint8_t)((hmsc->scsi_blk_nbr - 1U) >> 16);
800a23c: 69bb ldr r3, [r7, #24]
800a23e: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a242: 6e9b ldr r3, [r3, #104] @ 0x68
800a244: 3b01 subs r3, #1
800a246: 0c1b lsrs r3, r3, #16
800a248: b2da uxtb r2, r3
800a24a: 69bb ldr r3, [r7, #24]
800a24c: 755a strb r2, [r3, #21]
hmsc->bot_data[6] = (uint8_t)((hmsc->scsi_blk_nbr - 1U) >> 8);
800a24e: 69bb ldr r3, [r7, #24]
800a250: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a254: 6e9b ldr r3, [r3, #104] @ 0x68
800a256: 3b01 subs r3, #1
800a258: 0a1b lsrs r3, r3, #8
800a25a: b2da uxtb r2, r3
800a25c: 69bb ldr r3, [r7, #24]
800a25e: 759a strb r2, [r3, #22]
hmsc->bot_data[7] = (uint8_t)(hmsc->scsi_blk_nbr - 1U);
800a260: 69bb ldr r3, [r7, #24]
800a262: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a266: 6e9b ldr r3, [r3, #104] @ 0x68
800a268: b2db uxtb r3, r3
800a26a: 3b01 subs r3, #1
800a26c: b2da uxtb r2, r3
800a26e: 69bb ldr r3, [r7, #24]
800a270: 75da strb r2, [r3, #23]
hmsc->bot_data[8] = (uint8_t)(hmsc->scsi_blk_size >> 24);
800a272: 69bb ldr r3, [r7, #24]
800a274: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a278: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
800a27c: 161b asrs r3, r3, #24
800a27e: b2da uxtb r2, r3
800a280: 69bb ldr r3, [r7, #24]
800a282: 761a strb r2, [r3, #24]
hmsc->bot_data[9] = (uint8_t)(hmsc->scsi_blk_size >> 16);
800a284: 69bb ldr r3, [r7, #24]
800a286: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a28a: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
800a28e: 141b asrs r3, r3, #16
800a290: b2da uxtb r2, r3
800a292: 69bb ldr r3, [r7, #24]
800a294: 765a strb r2, [r3, #25]
hmsc->bot_data[10] = (uint8_t)(hmsc->scsi_blk_size >> 8);
800a296: 69bb ldr r3, [r7, #24]
800a298: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a29c: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
800a2a0: 0a1b lsrs r3, r3, #8
800a2a2: b29b uxth r3, r3
800a2a4: b2da uxtb r2, r3
800a2a6: 69bb ldr r3, [r7, #24]
800a2a8: 769a strb r2, [r3, #26]
hmsc->bot_data[11] = (uint8_t)(hmsc->scsi_blk_size);
800a2aa: 69bb ldr r3, [r7, #24]
800a2ac: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a2b0: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
800a2b4: b2da uxtb r2, r3
800a2b6: 69bb ldr r3, [r7, #24]
800a2b8: 76da strb r2, [r3, #27]
hmsc->bot_data_length = ((uint32_t)params[10] << 24) |
800a2ba: 687b ldr r3, [r7, #4]
800a2bc: 330a adds r3, #10
800a2be: 781b ldrb r3, [r3, #0]
800a2c0: 061a lsls r2, r3, #24
((uint32_t)params[11] << 16) |
800a2c2: 687b ldr r3, [r7, #4]
800a2c4: 330b adds r3, #11
800a2c6: 781b ldrb r3, [r3, #0]
800a2c8: 041b lsls r3, r3, #16
hmsc->bot_data_length = ((uint32_t)params[10] << 24) |
800a2ca: 431a orrs r2, r3
((uint32_t)params[12] << 8) |
800a2cc: 687b ldr r3, [r7, #4]
800a2ce: 330c adds r3, #12
800a2d0: 781b ldrb r3, [r3, #0]
800a2d2: 021b lsls r3, r3, #8
((uint32_t)params[11] << 16) |
800a2d4: 4313 orrs r3, r2
(uint32_t)params[13];
800a2d6: 687a ldr r2, [r7, #4]
800a2d8: 320d adds r2, #13
800a2da: 7812 ldrb r2, [r2, #0]
((uint32_t)params[12] << 8) |
800a2dc: 431a orrs r2, r3
hmsc->bot_data_length = ((uint32_t)params[10] << 24) |
800a2de: 69bb ldr r3, [r7, #24]
800a2e0: 60da str r2, [r3, #12]
return 0;
800a2e2: 2300 movs r3, #0
}
800a2e4: 4618 mov r0, r3
800a2e6: 3724 adds r7, #36 @ 0x24
800a2e8: 46bd mov sp, r7
800a2ea: bd90 pop {r4, r7, pc}
0800a2ec <SCSI_ReadFormatCapacity>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_ReadFormatCapacity(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
800a2ec: b580 push {r7, lr}
800a2ee: b088 sub sp, #32
800a2f0: af00 add r7, sp, #0
800a2f2: 60f8 str r0, [r7, #12]
800a2f4: 460b mov r3, r1
800a2f6: 607a str r2, [r7, #4]
800a2f8: 72fb strb r3, [r7, #11]
UNUSED(params);
uint16_t blk_size;
uint32_t blk_nbr;
uint16_t i;
int8_t ret;
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800a2fa: 68fb ldr r3, [r7, #12]
800a2fc: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800a300: 68fb ldr r3, [r7, #12]
800a302: 32b0 adds r2, #176 @ 0xb0
800a304: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800a308: 61bb str r3, [r7, #24]
if (hmsc == NULL)
800a30a: 69bb ldr r3, [r7, #24]
800a30c: 2b00 cmp r3, #0
800a30e: d102 bne.n 800a316 <SCSI_ReadFormatCapacity+0x2a>
{
return -1;
800a310: f04f 33ff mov.w r3, #4294967295
800a314: e063 b.n 800a3de <SCSI_ReadFormatCapacity+0xf2>
}
ret = ((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->GetCapacity(lun, &blk_nbr, &blk_size);
800a316: 68fb ldr r3, [r7, #12]
800a318: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a31c: 68fa ldr r2, [r7, #12]
800a31e: 33b0 adds r3, #176 @ 0xb0
800a320: 009b lsls r3, r3, #2
800a322: 4413 add r3, r2
800a324: 685b ldr r3, [r3, #4]
800a326: 685b ldr r3, [r3, #4]
800a328: f107 0214 add.w r2, r7, #20
800a32c: f107 0110 add.w r1, r7, #16
800a330: 7af8 ldrb r0, [r7, #11]
800a332: 4798 blx r3
800a334: 4603 mov r3, r0
800a336: 75fb strb r3, [r7, #23]
if ((ret != 0) || (hmsc->scsi_medium_state == SCSI_MEDIUM_EJECTED))
800a338: f997 3017 ldrsb.w r3, [r7, #23]
800a33c: 2b00 cmp r3, #0
800a33e: d106 bne.n 800a34e <SCSI_ReadFormatCapacity+0x62>
800a340: 69bb ldr r3, [r7, #24]
800a342: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a346: f893 3062 ldrb.w r3, [r3, #98] @ 0x62
800a34a: 2b02 cmp r3, #2
800a34c: d108 bne.n 800a360 <SCSI_ReadFormatCapacity+0x74>
{
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
800a34e: 7af9 ldrb r1, [r7, #11]
800a350: 233a movs r3, #58 @ 0x3a
800a352: 2202 movs r2, #2
800a354: 68f8 ldr r0, [r7, #12]
800a356: f000 f96d bl 800a634 <SCSI_SenseCode>
return -1;
800a35a: f04f 33ff mov.w r3, #4294967295
800a35e: e03e b.n 800a3de <SCSI_ReadFormatCapacity+0xf2>
}
for (i = 0U; i < 12U ; i++)
800a360: 2300 movs r3, #0
800a362: 83fb strh r3, [r7, #30]
800a364: e007 b.n 800a376 <SCSI_ReadFormatCapacity+0x8a>
{
hmsc->bot_data[i] = 0U;
800a366: 8bfb ldrh r3, [r7, #30]
800a368: 69ba ldr r2, [r7, #24]
800a36a: 4413 add r3, r2
800a36c: 2200 movs r2, #0
800a36e: 741a strb r2, [r3, #16]
for (i = 0U; i < 12U ; i++)
800a370: 8bfb ldrh r3, [r7, #30]
800a372: 3301 adds r3, #1
800a374: 83fb strh r3, [r7, #30]
800a376: 8bfb ldrh r3, [r7, #30]
800a378: 2b0b cmp r3, #11
800a37a: d9f4 bls.n 800a366 <SCSI_ReadFormatCapacity+0x7a>
}
hmsc->bot_data[3] = 0x08U;
800a37c: 69bb ldr r3, [r7, #24]
800a37e: 2208 movs r2, #8
800a380: 74da strb r2, [r3, #19]
hmsc->bot_data[4] = (uint8_t)((blk_nbr - 1U) >> 24);
800a382: 693b ldr r3, [r7, #16]
800a384: 3b01 subs r3, #1
800a386: 0e1b lsrs r3, r3, #24
800a388: b2da uxtb r2, r3
800a38a: 69bb ldr r3, [r7, #24]
800a38c: 751a strb r2, [r3, #20]
hmsc->bot_data[5] = (uint8_t)((blk_nbr - 1U) >> 16);
800a38e: 693b ldr r3, [r7, #16]
800a390: 3b01 subs r3, #1
800a392: 0c1b lsrs r3, r3, #16
800a394: b2da uxtb r2, r3
800a396: 69bb ldr r3, [r7, #24]
800a398: 755a strb r2, [r3, #21]
hmsc->bot_data[6] = (uint8_t)((blk_nbr - 1U) >> 8);
800a39a: 693b ldr r3, [r7, #16]
800a39c: 3b01 subs r3, #1
800a39e: 0a1b lsrs r3, r3, #8
800a3a0: b2da uxtb r2, r3
800a3a2: 69bb ldr r3, [r7, #24]
800a3a4: 759a strb r2, [r3, #22]
hmsc->bot_data[7] = (uint8_t)(blk_nbr - 1U);
800a3a6: 693b ldr r3, [r7, #16]
800a3a8: b2db uxtb r3, r3
800a3aa: 3b01 subs r3, #1
800a3ac: b2da uxtb r2, r3
800a3ae: 69bb ldr r3, [r7, #24]
800a3b0: 75da strb r2, [r3, #23]
hmsc->bot_data[8] = 0x02U;
800a3b2: 69bb ldr r3, [r7, #24]
800a3b4: 2202 movs r2, #2
800a3b6: 761a strb r2, [r3, #24]
hmsc->bot_data[9] = (uint8_t)(blk_size >> 16);
800a3b8: 8abb ldrh r3, [r7, #20]
800a3ba: 141b asrs r3, r3, #16
800a3bc: b2da uxtb r2, r3
800a3be: 69bb ldr r3, [r7, #24]
800a3c0: 765a strb r2, [r3, #25]
hmsc->bot_data[10] = (uint8_t)(blk_size >> 8);
800a3c2: 8abb ldrh r3, [r7, #20]
800a3c4: 0a1b lsrs r3, r3, #8
800a3c6: b29b uxth r3, r3
800a3c8: b2da uxtb r2, r3
800a3ca: 69bb ldr r3, [r7, #24]
800a3cc: 769a strb r2, [r3, #26]
hmsc->bot_data[11] = (uint8_t)(blk_size);
800a3ce: 8abb ldrh r3, [r7, #20]
800a3d0: b2da uxtb r2, r3
800a3d2: 69bb ldr r3, [r7, #24]
800a3d4: 76da strb r2, [r3, #27]
hmsc->bot_data_length = 12U;
800a3d6: 69bb ldr r3, [r7, #24]
800a3d8: 220c movs r2, #12
800a3da: 60da str r2, [r3, #12]
return 0;
800a3dc: 2300 movs r3, #0
}
800a3de: 4618 mov r0, r3
800a3e0: 3720 adds r7, #32
800a3e2: 46bd mov sp, r7
800a3e4: bd80 pop {r7, pc}
...
0800a3e8 <SCSI_ModeSense6>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_ModeSense6(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
800a3e8: b580 push {r7, lr}
800a3ea: b086 sub sp, #24
800a3ec: af00 add r7, sp, #0
800a3ee: 60f8 str r0, [r7, #12]
800a3f0: 460b mov r3, r1
800a3f2: 607a str r2, [r7, #4]
800a3f4: 72fb strb r3, [r7, #11]
UNUSED(lun);
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800a3f6: 68fb ldr r3, [r7, #12]
800a3f8: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800a3fc: 68fb ldr r3, [r7, #12]
800a3fe: 32b0 adds r2, #176 @ 0xb0
800a400: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800a404: 613b str r3, [r7, #16]
uint16_t len = MODE_SENSE6_LEN;
800a406: 2304 movs r3, #4
800a408: 82fb strh r3, [r7, #22]
if (hmsc == NULL)
800a40a: 693b ldr r3, [r7, #16]
800a40c: 2b00 cmp r3, #0
800a40e: d102 bne.n 800a416 <SCSI_ModeSense6+0x2e>
{
return -1;
800a410: f04f 33ff mov.w r3, #4294967295
800a414: e027 b.n 800a466 <SCSI_ModeSense6+0x7e>
}
/* Check If media is write-protected */
if (((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->IsWriteProtected(lun) != 0)
800a416: 68fb ldr r3, [r7, #12]
800a418: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a41c: 68fa ldr r2, [r7, #12]
800a41e: 33b0 adds r3, #176 @ 0xb0
800a420: 009b lsls r3, r3, #2
800a422: 4413 add r3, r2
800a424: 685b ldr r3, [r3, #4]
800a426: 68db ldr r3, [r3, #12]
800a428: 7afa ldrb r2, [r7, #11]
800a42a: 4610 mov r0, r2
800a42c: 4798 blx r3
800a42e: 4603 mov r3, r0
800a430: 2b00 cmp r3, #0
800a432: d006 beq.n 800a442 <SCSI_ModeSense6+0x5a>
{
MSC_Mode_Sense6_data[2] |= 0x80U;
800a434: 4b0e ldr r3, [pc, #56] @ (800a470 <SCSI_ModeSense6+0x88>)
800a436: 789b ldrb r3, [r3, #2]
800a438: f063 037f orn r3, r3, #127 @ 0x7f
800a43c: b2da uxtb r2, r3
800a43e: 4b0c ldr r3, [pc, #48] @ (800a470 <SCSI_ModeSense6+0x88>)
800a440: 709a strb r2, [r3, #2]
}
if (params[4] <= len)
800a442: 687b ldr r3, [r7, #4]
800a444: 3304 adds r3, #4
800a446: 781b ldrb r3, [r3, #0]
800a448: 461a mov r2, r3
800a44a: 8afb ldrh r3, [r7, #22]
800a44c: 4293 cmp r3, r2
800a44e: d303 bcc.n 800a458 <SCSI_ModeSense6+0x70>
{
len = params[4];
800a450: 687b ldr r3, [r7, #4]
800a452: 3304 adds r3, #4
800a454: 781b ldrb r3, [r3, #0]
800a456: 82fb strh r3, [r7, #22]
}
(void)SCSI_UpdateBotData(hmsc, MSC_Mode_Sense6_data, len);
800a458: 8afb ldrh r3, [r7, #22]
800a45a: 461a mov r2, r3
800a45c: 4904 ldr r1, [pc, #16] @ (800a470 <SCSI_ModeSense6+0x88>)
800a45e: 6938 ldr r0, [r7, #16]
800a460: f000 fece bl 800b200 <SCSI_UpdateBotData>
return 0;
800a464: 2300 movs r3, #0
}
800a466: 4618 mov r0, r3
800a468: 3718 adds r7, #24
800a46a: 46bd mov sp, r7
800a46c: bd80 pop {r7, pc}
800a46e: bf00 nop
800a470: 20000094 .word 0x20000094
0800a474 <SCSI_ModeSense10>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_ModeSense10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
800a474: b580 push {r7, lr}
800a476: b086 sub sp, #24
800a478: af00 add r7, sp, #0
800a47a: 60f8 str r0, [r7, #12]
800a47c: 460b mov r3, r1
800a47e: 607a str r2, [r7, #4]
800a480: 72fb strb r3, [r7, #11]
UNUSED(lun);
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800a482: 68fb ldr r3, [r7, #12]
800a484: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800a488: 68fb ldr r3, [r7, #12]
800a48a: 32b0 adds r2, #176 @ 0xb0
800a48c: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800a490: 613b str r3, [r7, #16]
uint16_t len = MODE_SENSE10_LEN;
800a492: 2308 movs r3, #8
800a494: 82fb strh r3, [r7, #22]
if (hmsc == NULL)
800a496: 693b ldr r3, [r7, #16]
800a498: 2b00 cmp r3, #0
800a49a: d102 bne.n 800a4a2 <SCSI_ModeSense10+0x2e>
{
return -1;
800a49c: f04f 33ff mov.w r3, #4294967295
800a4a0: e027 b.n 800a4f2 <SCSI_ModeSense10+0x7e>
}
/* Check If media is write-protected */
if (((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->IsWriteProtected(lun) != 0)
800a4a2: 68fb ldr r3, [r7, #12]
800a4a4: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a4a8: 68fa ldr r2, [r7, #12]
800a4aa: 33b0 adds r3, #176 @ 0xb0
800a4ac: 009b lsls r3, r3, #2
800a4ae: 4413 add r3, r2
800a4b0: 685b ldr r3, [r3, #4]
800a4b2: 68db ldr r3, [r3, #12]
800a4b4: 7afa ldrb r2, [r7, #11]
800a4b6: 4610 mov r0, r2
800a4b8: 4798 blx r3
800a4ba: 4603 mov r3, r0
800a4bc: 2b00 cmp r3, #0
800a4be: d006 beq.n 800a4ce <SCSI_ModeSense10+0x5a>
{
MSC_Mode_Sense10_data[3] |= 0x80U;
800a4c0: 4b0e ldr r3, [pc, #56] @ (800a4fc <SCSI_ModeSense10+0x88>)
800a4c2: 78db ldrb r3, [r3, #3]
800a4c4: f063 037f orn r3, r3, #127 @ 0x7f
800a4c8: b2da uxtb r2, r3
800a4ca: 4b0c ldr r3, [pc, #48] @ (800a4fc <SCSI_ModeSense10+0x88>)
800a4cc: 70da strb r2, [r3, #3]
}
if (params[8] <= len)
800a4ce: 687b ldr r3, [r7, #4]
800a4d0: 3308 adds r3, #8
800a4d2: 781b ldrb r3, [r3, #0]
800a4d4: 461a mov r2, r3
800a4d6: 8afb ldrh r3, [r7, #22]
800a4d8: 4293 cmp r3, r2
800a4da: d303 bcc.n 800a4e4 <SCSI_ModeSense10+0x70>
{
len = params[8];
800a4dc: 687b ldr r3, [r7, #4]
800a4de: 3308 adds r3, #8
800a4e0: 781b ldrb r3, [r3, #0]
800a4e2: 82fb strh r3, [r7, #22]
}
(void)SCSI_UpdateBotData(hmsc, MSC_Mode_Sense10_data, len);
800a4e4: 8afb ldrh r3, [r7, #22]
800a4e6: 461a mov r2, r3
800a4e8: 4904 ldr r1, [pc, #16] @ (800a4fc <SCSI_ModeSense10+0x88>)
800a4ea: 6938 ldr r0, [r7, #16]
800a4ec: f000 fe88 bl 800b200 <SCSI_UpdateBotData>
return 0;
800a4f0: 2300 movs r3, #0
}
800a4f2: 4618 mov r0, r3
800a4f4: 3718 adds r7, #24
800a4f6: 46bd mov sp, r7
800a4f8: bd80 pop {r7, pc}
800a4fa: bf00 nop
800a4fc: 20000098 .word 0x20000098
0800a500 <SCSI_RequestSense>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_RequestSense(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
800a500: b580 push {r7, lr}
800a502: b086 sub sp, #24
800a504: af00 add r7, sp, #0
800a506: 60f8 str r0, [r7, #12]
800a508: 460b mov r3, r1
800a50a: 607a str r2, [r7, #4]
800a50c: 72fb strb r3, [r7, #11]
UNUSED(lun);
uint8_t i;
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800a50e: 68fb ldr r3, [r7, #12]
800a510: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800a514: 68fb ldr r3, [r7, #12]
800a516: 32b0 adds r2, #176 @ 0xb0
800a518: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800a51c: 613b str r3, [r7, #16]
if (hmsc == NULL)
800a51e: 693b ldr r3, [r7, #16]
800a520: 2b00 cmp r3, #0
800a522: d102 bne.n 800a52a <SCSI_RequestSense+0x2a>
{
return -1;
800a524: f04f 33ff mov.w r3, #4294967295
800a528: e080 b.n 800a62c <SCSI_RequestSense+0x12c>
}
if (hmsc->cbw.dDataLength == 0U)
800a52a: 693b ldr r3, [r7, #16]
800a52c: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a530: 699b ldr r3, [r3, #24]
800a532: 2b00 cmp r3, #0
800a534: d10b bne.n 800a54e <SCSI_RequestSense+0x4e>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
800a536: 693b ldr r3, [r7, #16]
800a538: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a53c: 7f59 ldrb r1, [r3, #29]
800a53e: 2320 movs r3, #32
800a540: 2205 movs r2, #5
800a542: 68f8 ldr r0, [r7, #12]
800a544: f000 f876 bl 800a634 <SCSI_SenseCode>
return -1;
800a548: f04f 33ff mov.w r3, #4294967295
800a54c: e06e b.n 800a62c <SCSI_RequestSense+0x12c>
}
for (i = 0U; i < REQUEST_SENSE_DATA_LEN; i++)
800a54e: 2300 movs r3, #0
800a550: 75fb strb r3, [r7, #23]
800a552: e007 b.n 800a564 <SCSI_RequestSense+0x64>
{
hmsc->bot_data[i] = 0U;
800a554: 7dfb ldrb r3, [r7, #23]
800a556: 693a ldr r2, [r7, #16]
800a558: 4413 add r3, r2
800a55a: 2200 movs r2, #0
800a55c: 741a strb r2, [r3, #16]
for (i = 0U; i < REQUEST_SENSE_DATA_LEN; i++)
800a55e: 7dfb ldrb r3, [r7, #23]
800a560: 3301 adds r3, #1
800a562: 75fb strb r3, [r7, #23]
800a564: 7dfb ldrb r3, [r7, #23]
800a566: 2b11 cmp r3, #17
800a568: d9f4 bls.n 800a554 <SCSI_RequestSense+0x54>
}
hmsc->bot_data[0] = 0x70U;
800a56a: 693b ldr r3, [r7, #16]
800a56c: 2270 movs r2, #112 @ 0x70
800a56e: 741a strb r2, [r3, #16]
hmsc->bot_data[7] = REQUEST_SENSE_DATA_LEN - 6U;
800a570: 693b ldr r3, [r7, #16]
800a572: 220c movs r2, #12
800a574: 75da strb r2, [r3, #23]
if ((hmsc->scsi_sense_head != hmsc->scsi_sense_tail))
800a576: 693b ldr r3, [r7, #16]
800a578: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a57c: f893 2060 ldrb.w r2, [r3, #96] @ 0x60
800a580: 693b ldr r3, [r7, #16]
800a582: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a586: f893 3061 ldrb.w r3, [r3, #97] @ 0x61
800a58a: 429a cmp r2, r3
800a58c: d03f beq.n 800a60e <SCSI_RequestSense+0x10e>
{
hmsc->bot_data[2] = (uint8_t)hmsc->scsi_sense[hmsc->scsi_sense_head].Skey;
800a58e: 693b ldr r3, [r7, #16]
800a590: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a594: f893 3060 ldrb.w r3, [r3, #96] @ 0x60
800a598: 461a mov r2, r3
800a59a: 693b ldr r3, [r7, #16]
800a59c: f502 6281 add.w r2, r2, #1032 @ 0x408
800a5a0: f813 2032 ldrb.w r2, [r3, r2, lsl #3]
800a5a4: 693b ldr r3, [r7, #16]
800a5a6: 749a strb r2, [r3, #18]
hmsc->bot_data[12] = (uint8_t)hmsc->scsi_sense[hmsc->scsi_sense_head].w.b.ASC;
800a5a8: 693b ldr r3, [r7, #16]
800a5aa: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a5ae: f893 3060 ldrb.w r3, [r3, #96] @ 0x60
800a5b2: 693a ldr r2, [r7, #16]
800a5b4: f503 6381 add.w r3, r3, #1032 @ 0x408
800a5b8: 00db lsls r3, r3, #3
800a5ba: 4413 add r3, r2
800a5bc: 791a ldrb r2, [r3, #4]
800a5be: 693b ldr r3, [r7, #16]
800a5c0: 771a strb r2, [r3, #28]
hmsc->bot_data[13] = (uint8_t)hmsc->scsi_sense[hmsc->scsi_sense_head].w.b.ASCQ;
800a5c2: 693b ldr r3, [r7, #16]
800a5c4: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a5c8: f893 3060 ldrb.w r3, [r3, #96] @ 0x60
800a5cc: 693a ldr r2, [r7, #16]
800a5ce: f503 6381 add.w r3, r3, #1032 @ 0x408
800a5d2: 00db lsls r3, r3, #3
800a5d4: 4413 add r3, r2
800a5d6: 795a ldrb r2, [r3, #5]
800a5d8: 693b ldr r3, [r7, #16]
800a5da: 775a strb r2, [r3, #29]
hmsc->scsi_sense_head++;
800a5dc: 693b ldr r3, [r7, #16]
800a5de: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a5e2: f893 3060 ldrb.w r3, [r3, #96] @ 0x60
800a5e6: 3301 adds r3, #1
800a5e8: b2da uxtb r2, r3
800a5ea: 693b ldr r3, [r7, #16]
800a5ec: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a5f0: f883 2060 strb.w r2, [r3, #96] @ 0x60
if (hmsc->scsi_sense_head == SENSE_LIST_DEEPTH)
800a5f4: 693b ldr r3, [r7, #16]
800a5f6: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a5fa: f893 3060 ldrb.w r3, [r3, #96] @ 0x60
800a5fe: 2b04 cmp r3, #4
800a600: d105 bne.n 800a60e <SCSI_RequestSense+0x10e>
{
hmsc->scsi_sense_head = 0U;
800a602: 693b ldr r3, [r7, #16]
800a604: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a608: 2200 movs r2, #0
800a60a: f883 2060 strb.w r2, [r3, #96] @ 0x60
}
}
hmsc->bot_data_length = REQUEST_SENSE_DATA_LEN;
800a60e: 693b ldr r3, [r7, #16]
800a610: 2212 movs r2, #18
800a612: 60da str r2, [r3, #12]
if (params[4] <= REQUEST_SENSE_DATA_LEN)
800a614: 687b ldr r3, [r7, #4]
800a616: 3304 adds r3, #4
800a618: 781b ldrb r3, [r3, #0]
800a61a: 2b12 cmp r3, #18
800a61c: d805 bhi.n 800a62a <SCSI_RequestSense+0x12a>
{
hmsc->bot_data_length = params[4];
800a61e: 687b ldr r3, [r7, #4]
800a620: 3304 adds r3, #4
800a622: 781b ldrb r3, [r3, #0]
800a624: 461a mov r2, r3
800a626: 693b ldr r3, [r7, #16]
800a628: 60da str r2, [r3, #12]
}
return 0;
800a62a: 2300 movs r3, #0
}
800a62c: 4618 mov r0, r3
800a62e: 3718 adds r7, #24
800a630: 46bd mov sp, r7
800a632: bd80 pop {r7, pc}
0800a634 <SCSI_SenseCode>:
* @param ASC: Additional Sense Code
* @retval none
*/
void SCSI_SenseCode(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t sKey, uint8_t ASC)
{
800a634: b480 push {r7}
800a636: b085 sub sp, #20
800a638: af00 add r7, sp, #0
800a63a: 6078 str r0, [r7, #4]
800a63c: 4608 mov r0, r1
800a63e: 4611 mov r1, r2
800a640: 461a mov r2, r3
800a642: 4603 mov r3, r0
800a644: 70fb strb r3, [r7, #3]
800a646: 460b mov r3, r1
800a648: 70bb strb r3, [r7, #2]
800a64a: 4613 mov r3, r2
800a64c: 707b strb r3, [r7, #1]
UNUSED(lun);
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800a64e: 687b ldr r3, [r7, #4]
800a650: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800a654: 687b ldr r3, [r7, #4]
800a656: 32b0 adds r2, #176 @ 0xb0
800a658: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800a65c: 60fb str r3, [r7, #12]
if (hmsc == NULL)
800a65e: 68fb ldr r3, [r7, #12]
800a660: 2b00 cmp r3, #0
800a662: d03d beq.n 800a6e0 <SCSI_SenseCode+0xac>
{
return;
}
hmsc->scsi_sense[hmsc->scsi_sense_tail].Skey = sKey;
800a664: 68fb ldr r3, [r7, #12]
800a666: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a66a: f893 3061 ldrb.w r3, [r3, #97] @ 0x61
800a66e: 461a mov r2, r3
800a670: 68fb ldr r3, [r7, #12]
800a672: f502 6281 add.w r2, r2, #1032 @ 0x408
800a676: 78b9 ldrb r1, [r7, #2]
800a678: f803 1032 strb.w r1, [r3, r2, lsl #3]
hmsc->scsi_sense[hmsc->scsi_sense_tail].w.b.ASC = ASC;
800a67c: 68fb ldr r3, [r7, #12]
800a67e: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a682: f893 3061 ldrb.w r3, [r3, #97] @ 0x61
800a686: 68fa ldr r2, [r7, #12]
800a688: f503 6381 add.w r3, r3, #1032 @ 0x408
800a68c: 00db lsls r3, r3, #3
800a68e: 4413 add r3, r2
800a690: 787a ldrb r2, [r7, #1]
800a692: 711a strb r2, [r3, #4]
hmsc->scsi_sense[hmsc->scsi_sense_tail].w.b.ASCQ = 0U;
800a694: 68fb ldr r3, [r7, #12]
800a696: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a69a: f893 3061 ldrb.w r3, [r3, #97] @ 0x61
800a69e: 68fa ldr r2, [r7, #12]
800a6a0: f503 6381 add.w r3, r3, #1032 @ 0x408
800a6a4: 00db lsls r3, r3, #3
800a6a6: 4413 add r3, r2
800a6a8: 2200 movs r2, #0
800a6aa: 715a strb r2, [r3, #5]
hmsc->scsi_sense_tail++;
800a6ac: 68fb ldr r3, [r7, #12]
800a6ae: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a6b2: f893 3061 ldrb.w r3, [r3, #97] @ 0x61
800a6b6: 3301 adds r3, #1
800a6b8: b2da uxtb r2, r3
800a6ba: 68fb ldr r3, [r7, #12]
800a6bc: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a6c0: f883 2061 strb.w r2, [r3, #97] @ 0x61
if (hmsc->scsi_sense_tail == SENSE_LIST_DEEPTH)
800a6c4: 68fb ldr r3, [r7, #12]
800a6c6: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a6ca: f893 3061 ldrb.w r3, [r3, #97] @ 0x61
800a6ce: 2b04 cmp r3, #4
800a6d0: d107 bne.n 800a6e2 <SCSI_SenseCode+0xae>
{
hmsc->scsi_sense_tail = 0U;
800a6d2: 68fb ldr r3, [r7, #12]
800a6d4: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a6d8: 2200 movs r2, #0
800a6da: f883 2061 strb.w r2, [r3, #97] @ 0x61
800a6de: e000 b.n 800a6e2 <SCSI_SenseCode+0xae>
return;
800a6e0: bf00 nop
}
}
800a6e2: 3714 adds r7, #20
800a6e4: 46bd mov sp, r7
800a6e6: f85d 7b04 ldr.w r7, [sp], #4
800a6ea: 4770 bx lr
0800a6ec <SCSI_StartStopUnit>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_StartStopUnit(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
800a6ec: b580 push {r7, lr}
800a6ee: b086 sub sp, #24
800a6f0: af00 add r7, sp, #0
800a6f2: 60f8 str r0, [r7, #12]
800a6f4: 460b mov r3, r1
800a6f6: 607a str r2, [r7, #4]
800a6f8: 72fb strb r3, [r7, #11]
UNUSED(lun);
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800a6fa: 68fb ldr r3, [r7, #12]
800a6fc: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800a700: 68fb ldr r3, [r7, #12]
800a702: 32b0 adds r2, #176 @ 0xb0
800a704: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800a708: 617b str r3, [r7, #20]
if (hmsc == NULL)
800a70a: 697b ldr r3, [r7, #20]
800a70c: 2b00 cmp r3, #0
800a70e: d102 bne.n 800a716 <SCSI_StartStopUnit+0x2a>
{
return -1;
800a710: f04f 33ff mov.w r3, #4294967295
800a714: e043 b.n 800a79e <SCSI_StartStopUnit+0xb2>
}
if ((hmsc->scsi_medium_state == SCSI_MEDIUM_LOCKED) && ((params[4] & 0x3U) == 2U))
800a716: 697b ldr r3, [r7, #20]
800a718: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a71c: f893 3062 ldrb.w r3, [r3, #98] @ 0x62
800a720: 2b01 cmp r3, #1
800a722: d10f bne.n 800a744 <SCSI_StartStopUnit+0x58>
800a724: 687b ldr r3, [r7, #4]
800a726: 3304 adds r3, #4
800a728: 781b ldrb r3, [r3, #0]
800a72a: f003 0303 and.w r3, r3, #3
800a72e: 2b02 cmp r3, #2
800a730: d108 bne.n 800a744 <SCSI_StartStopUnit+0x58>
{
SCSI_SenseCode(pdev, lun, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND);
800a732: 7af9 ldrb r1, [r7, #11]
800a734: 2324 movs r3, #36 @ 0x24
800a736: 2205 movs r2, #5
800a738: 68f8 ldr r0, [r7, #12]
800a73a: f7ff ff7b bl 800a634 <SCSI_SenseCode>
return -1;
800a73e: f04f 33ff mov.w r3, #4294967295
800a742: e02c b.n 800a79e <SCSI_StartStopUnit+0xb2>
}
if ((params[4] & 0x3U) == 0x1U) /* START=1 */
800a744: 687b ldr r3, [r7, #4]
800a746: 3304 adds r3, #4
800a748: 781b ldrb r3, [r3, #0]
800a74a: f003 0303 and.w r3, r3, #3
800a74e: 2b01 cmp r3, #1
800a750: d106 bne.n 800a760 <SCSI_StartStopUnit+0x74>
{
hmsc->scsi_medium_state = SCSI_MEDIUM_UNLOCKED;
800a752: 697b ldr r3, [r7, #20]
800a754: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a758: 2200 movs r2, #0
800a75a: f883 2062 strb.w r2, [r3, #98] @ 0x62
800a75e: e01a b.n 800a796 <SCSI_StartStopUnit+0xaa>
}
else if ((params[4] & 0x3U) == 0x2U) /* START=0 and LOEJ Load Eject=1 */
800a760: 687b ldr r3, [r7, #4]
800a762: 3304 adds r3, #4
800a764: 781b ldrb r3, [r3, #0]
800a766: f003 0303 and.w r3, r3, #3
800a76a: 2b02 cmp r3, #2
800a76c: d106 bne.n 800a77c <SCSI_StartStopUnit+0x90>
{
hmsc->scsi_medium_state = SCSI_MEDIUM_EJECTED;
800a76e: 697b ldr r3, [r7, #20]
800a770: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a774: 2202 movs r2, #2
800a776: f883 2062 strb.w r2, [r3, #98] @ 0x62
800a77a: e00c b.n 800a796 <SCSI_StartStopUnit+0xaa>
}
else if ((params[4] & 0x3U) == 0x3U) /* START=1 and LOEJ Load Eject=1 */
800a77c: 687b ldr r3, [r7, #4]
800a77e: 3304 adds r3, #4
800a780: 781b ldrb r3, [r3, #0]
800a782: f003 0303 and.w r3, r3, #3
800a786: 2b03 cmp r3, #3
800a788: d105 bne.n 800a796 <SCSI_StartStopUnit+0xaa>
{
hmsc->scsi_medium_state = SCSI_MEDIUM_UNLOCKED;
800a78a: 697b ldr r3, [r7, #20]
800a78c: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a790: 2200 movs r2, #0
800a792: f883 2062 strb.w r2, [r3, #98] @ 0x62
}
else
{
/* .. */
}
hmsc->bot_data_length = 0U;
800a796: 697b ldr r3, [r7, #20]
800a798: 2200 movs r2, #0
800a79a: 60da str r2, [r3, #12]
return 0;
800a79c: 2300 movs r3, #0
}
800a79e: 4618 mov r0, r3
800a7a0: 3718 adds r7, #24
800a7a2: 46bd mov sp, r7
800a7a4: bd80 pop {r7, pc}
0800a7a6 <SCSI_AllowPreventRemovable>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_AllowPreventRemovable(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
800a7a6: b480 push {r7}
800a7a8: b087 sub sp, #28
800a7aa: af00 add r7, sp, #0
800a7ac: 60f8 str r0, [r7, #12]
800a7ae: 460b mov r3, r1
800a7b0: 607a str r2, [r7, #4]
800a7b2: 72fb strb r3, [r7, #11]
UNUSED(lun);
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800a7b4: 68fb ldr r3, [r7, #12]
800a7b6: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800a7ba: 68fb ldr r3, [r7, #12]
800a7bc: 32b0 adds r2, #176 @ 0xb0
800a7be: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800a7c2: 617b str r3, [r7, #20]
if (hmsc == NULL)
800a7c4: 697b ldr r3, [r7, #20]
800a7c6: 2b00 cmp r3, #0
800a7c8: d102 bne.n 800a7d0 <SCSI_AllowPreventRemovable+0x2a>
{
return -1;
800a7ca: f04f 33ff mov.w r3, #4294967295
800a7ce: e015 b.n 800a7fc <SCSI_AllowPreventRemovable+0x56>
}
if (params[4] == 0U)
800a7d0: 687b ldr r3, [r7, #4]
800a7d2: 3304 adds r3, #4
800a7d4: 781b ldrb r3, [r3, #0]
800a7d6: 2b00 cmp r3, #0
800a7d8: d106 bne.n 800a7e8 <SCSI_AllowPreventRemovable+0x42>
{
hmsc->scsi_medium_state = SCSI_MEDIUM_UNLOCKED;
800a7da: 697b ldr r3, [r7, #20]
800a7dc: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a7e0: 2200 movs r2, #0
800a7e2: f883 2062 strb.w r2, [r3, #98] @ 0x62
800a7e6: e005 b.n 800a7f4 <SCSI_AllowPreventRemovable+0x4e>
}
else
{
hmsc->scsi_medium_state = SCSI_MEDIUM_LOCKED;
800a7e8: 697b ldr r3, [r7, #20]
800a7ea: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a7ee: 2201 movs r2, #1
800a7f0: f883 2062 strb.w r2, [r3, #98] @ 0x62
}
hmsc->bot_data_length = 0U;
800a7f4: 697b ldr r3, [r7, #20]
800a7f6: 2200 movs r2, #0
800a7f8: 60da str r2, [r3, #12]
return 0;
800a7fa: 2300 movs r3, #0
}
800a7fc: 4618 mov r0, r3
800a7fe: 371c adds r7, #28
800a800: 46bd mov sp, r7
800a802: f85d 7b04 ldr.w r7, [sp], #4
800a806: 4770 bx lr
0800a808 <SCSI_Read10>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_Read10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
800a808: b580 push {r7, lr}
800a80a: b086 sub sp, #24
800a80c: af00 add r7, sp, #0
800a80e: 60f8 str r0, [r7, #12]
800a810: 460b mov r3, r1
800a812: 607a str r2, [r7, #4]
800a814: 72fb strb r3, [r7, #11]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800a816: 68fb ldr r3, [r7, #12]
800a818: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800a81c: 68fb ldr r3, [r7, #12]
800a81e: 32b0 adds r2, #176 @ 0xb0
800a820: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800a824: 617b str r3, [r7, #20]
if (hmsc == NULL)
800a826: 697b ldr r3, [r7, #20]
800a828: 2b00 cmp r3, #0
800a82a: d102 bne.n 800a832 <SCSI_Read10+0x2a>
{
return -1;
800a82c: f04f 33ff mov.w r3, #4294967295
800a830: e09d b.n 800a96e <SCSI_Read10+0x166>
}
if (hmsc->bot_state == USBD_BOT_IDLE) /* Idle */
800a832: 697b ldr r3, [r7, #20]
800a834: 7a1b ldrb r3, [r3, #8]
800a836: 2b00 cmp r3, #0
800a838: f040 808f bne.w 800a95a <SCSI_Read10+0x152>
{
/* case 10 : Ho <> Di */
if ((hmsc->cbw.bmFlags & 0x80U) != 0x80U)
800a83c: 697b ldr r3, [r7, #20]
800a83e: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a842: 7f1b ldrb r3, [r3, #28]
800a844: b25b sxtb r3, r3
800a846: 2b00 cmp r3, #0
800a848: db0b blt.n 800a862 <SCSI_Read10+0x5a>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
800a84a: 697b ldr r3, [r7, #20]
800a84c: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a850: 7f59 ldrb r1, [r3, #29]
800a852: 2320 movs r3, #32
800a854: 2205 movs r2, #5
800a856: 68f8 ldr r0, [r7, #12]
800a858: f7ff feec bl 800a634 <SCSI_SenseCode>
return -1;
800a85c: f04f 33ff mov.w r3, #4294967295
800a860: e085 b.n 800a96e <SCSI_Read10+0x166>
}
if (hmsc->scsi_medium_state == SCSI_MEDIUM_EJECTED)
800a862: 697b ldr r3, [r7, #20]
800a864: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a868: f893 3062 ldrb.w r3, [r3, #98] @ 0x62
800a86c: 2b02 cmp r3, #2
800a86e: d108 bne.n 800a882 <SCSI_Read10+0x7a>
{
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
800a870: 7af9 ldrb r1, [r7, #11]
800a872: 233a movs r3, #58 @ 0x3a
800a874: 2202 movs r2, #2
800a876: 68f8 ldr r0, [r7, #12]
800a878: f7ff fedc bl 800a634 <SCSI_SenseCode>
return -1;
800a87c: f04f 33ff mov.w r3, #4294967295
800a880: e075 b.n 800a96e <SCSI_Read10+0x166>
}
if (((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->IsReady(lun) != 0)
800a882: 68fb ldr r3, [r7, #12]
800a884: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a888: 68fa ldr r2, [r7, #12]
800a88a: 33b0 adds r3, #176 @ 0xb0
800a88c: 009b lsls r3, r3, #2
800a88e: 4413 add r3, r2
800a890: 685b ldr r3, [r3, #4]
800a892: 689b ldr r3, [r3, #8]
800a894: 7afa ldrb r2, [r7, #11]
800a896: 4610 mov r0, r2
800a898: 4798 blx r3
800a89a: 4603 mov r3, r0
800a89c: 2b00 cmp r3, #0
800a89e: d008 beq.n 800a8b2 <SCSI_Read10+0xaa>
{
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
800a8a0: 7af9 ldrb r1, [r7, #11]
800a8a2: 233a movs r3, #58 @ 0x3a
800a8a4: 2202 movs r2, #2
800a8a6: 68f8 ldr r0, [r7, #12]
800a8a8: f7ff fec4 bl 800a634 <SCSI_SenseCode>
return -1;
800a8ac: f04f 33ff mov.w r3, #4294967295
800a8b0: e05d b.n 800a96e <SCSI_Read10+0x166>
}
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
800a8b2: 687b ldr r3, [r7, #4]
800a8b4: 3302 adds r3, #2
800a8b6: 781b ldrb r3, [r3, #0]
800a8b8: 061a lsls r2, r3, #24
((uint32_t)params[3] << 16) |
800a8ba: 687b ldr r3, [r7, #4]
800a8bc: 3303 adds r3, #3
800a8be: 781b ldrb r3, [r3, #0]
800a8c0: 041b lsls r3, r3, #16
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
800a8c2: 431a orrs r2, r3
((uint32_t)params[4] << 8) |
800a8c4: 687b ldr r3, [r7, #4]
800a8c6: 3304 adds r3, #4
800a8c8: 781b ldrb r3, [r3, #0]
800a8ca: 021b lsls r3, r3, #8
((uint32_t)params[3] << 16) |
800a8cc: 4313 orrs r3, r2
(uint32_t)params[5];
800a8ce: 687a ldr r2, [r7, #4]
800a8d0: 3205 adds r2, #5
800a8d2: 7812 ldrb r2, [r2, #0]
((uint32_t)params[4] << 8) |
800a8d4: 4313 orrs r3, r2
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
800a8d6: 697a ldr r2, [r7, #20]
800a8d8: f502 5200 add.w r2, r2, #8192 @ 0x2000
800a8dc: 66d3 str r3, [r2, #108] @ 0x6c
hmsc->scsi_blk_len = ((uint32_t)params[7] << 8) | (uint32_t)params[8];
800a8de: 687b ldr r3, [r7, #4]
800a8e0: 3307 adds r3, #7
800a8e2: 781b ldrb r3, [r3, #0]
800a8e4: 021b lsls r3, r3, #8
800a8e6: 687a ldr r2, [r7, #4]
800a8e8: 3208 adds r2, #8
800a8ea: 7812 ldrb r2, [r2, #0]
800a8ec: 4313 orrs r3, r2
800a8ee: 697a ldr r2, [r7, #20]
800a8f0: f502 5200 add.w r2, r2, #8192 @ 0x2000
800a8f4: 6713 str r3, [r2, #112] @ 0x70
if (SCSI_CheckAddressRange(pdev, lun, hmsc->scsi_blk_addr,
800a8f6: 697b ldr r3, [r7, #20]
800a8f8: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a8fc: 6eda ldr r2, [r3, #108] @ 0x6c
800a8fe: 697b ldr r3, [r7, #20]
800a900: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a904: 6f1b ldr r3, [r3, #112] @ 0x70
800a906: 7af9 ldrb r1, [r7, #11]
800a908: 68f8 ldr r0, [r7, #12]
800a90a: f000 fb0c bl 800af26 <SCSI_CheckAddressRange>
800a90e: 4603 mov r3, r0
800a910: 2b00 cmp r3, #0
800a912: da02 bge.n 800a91a <SCSI_Read10+0x112>
hmsc->scsi_blk_len) < 0)
{
return -1; /* error */
800a914: f04f 33ff mov.w r3, #4294967295
800a918: e029 b.n 800a96e <SCSI_Read10+0x166>
}
/* cases 4,5 : Hi <> Dn */
if (hmsc->cbw.dDataLength != (hmsc->scsi_blk_len * hmsc->scsi_blk_size))
800a91a: 697b ldr r3, [r7, #20]
800a91c: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a920: 699a ldr r2, [r3, #24]
800a922: 697b ldr r3, [r7, #20]
800a924: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a928: 6f1b ldr r3, [r3, #112] @ 0x70
800a92a: 6979 ldr r1, [r7, #20]
800a92c: f501 5100 add.w r1, r1, #8192 @ 0x2000
800a930: f8b1 1064 ldrh.w r1, [r1, #100] @ 0x64
800a934: fb01 f303 mul.w r3, r1, r3
800a938: 429a cmp r2, r3
800a93a: d00b beq.n 800a954 <SCSI_Read10+0x14c>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
800a93c: 697b ldr r3, [r7, #20]
800a93e: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a942: 7f59 ldrb r1, [r3, #29]
800a944: 2320 movs r3, #32
800a946: 2205 movs r2, #5
800a948: 68f8 ldr r0, [r7, #12]
800a94a: f7ff fe73 bl 800a634 <SCSI_SenseCode>
return -1;
800a94e: f04f 33ff mov.w r3, #4294967295
800a952: e00c b.n 800a96e <SCSI_Read10+0x166>
}
hmsc->bot_state = USBD_BOT_DATA_IN;
800a954: 697b ldr r3, [r7, #20]
800a956: 2202 movs r2, #2
800a958: 721a strb r2, [r3, #8]
}
hmsc->bot_data_length = MSC_MEDIA_PACKET;
800a95a: 697b ldr r3, [r7, #20]
800a95c: f44f 5200 mov.w r2, #8192 @ 0x2000
800a960: 60da str r2, [r3, #12]
return SCSI_ProcessRead(pdev, lun);
800a962: 7afb ldrb r3, [r7, #11]
800a964: 4619 mov r1, r3
800a966: 68f8 ldr r0, [r7, #12]
800a968: f000 fb0a bl 800af80 <SCSI_ProcessRead>
800a96c: 4603 mov r3, r0
}
800a96e: 4618 mov r0, r3
800a970: 3718 adds r7, #24
800a972: 46bd mov sp, r7
800a974: bd80 pop {r7, pc}
0800a976 <SCSI_Read12>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_Read12(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
800a976: b580 push {r7, lr}
800a978: b086 sub sp, #24
800a97a: af00 add r7, sp, #0
800a97c: 60f8 str r0, [r7, #12]
800a97e: 460b mov r3, r1
800a980: 607a str r2, [r7, #4]
800a982: 72fb strb r3, [r7, #11]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800a984: 68fb ldr r3, [r7, #12]
800a986: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800a98a: 68fb ldr r3, [r7, #12]
800a98c: 32b0 adds r2, #176 @ 0xb0
800a98e: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800a992: 617b str r3, [r7, #20]
if (hmsc == NULL)
800a994: 697b ldr r3, [r7, #20]
800a996: 2b00 cmp r3, #0
800a998: d102 bne.n 800a9a0 <SCSI_Read12+0x2a>
{
return -1;
800a99a: f04f 33ff mov.w r3, #4294967295
800a99e: e0a7 b.n 800aaf0 <SCSI_Read12+0x17a>
}
if (hmsc->bot_state == USBD_BOT_IDLE) /* Idle */
800a9a0: 697b ldr r3, [r7, #20]
800a9a2: 7a1b ldrb r3, [r3, #8]
800a9a4: 2b00 cmp r3, #0
800a9a6: f040 8099 bne.w 800aadc <SCSI_Read12+0x166>
{
/* case 10 : Ho <> Di */
if ((hmsc->cbw.bmFlags & 0x80U) != 0x80U)
800a9aa: 697b ldr r3, [r7, #20]
800a9ac: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a9b0: 7f1b ldrb r3, [r3, #28]
800a9b2: b25b sxtb r3, r3
800a9b4: 2b00 cmp r3, #0
800a9b6: db0b blt.n 800a9d0 <SCSI_Read12+0x5a>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
800a9b8: 697b ldr r3, [r7, #20]
800a9ba: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a9be: 7f59 ldrb r1, [r3, #29]
800a9c0: 2320 movs r3, #32
800a9c2: 2205 movs r2, #5
800a9c4: 68f8 ldr r0, [r7, #12]
800a9c6: f7ff fe35 bl 800a634 <SCSI_SenseCode>
return -1;
800a9ca: f04f 33ff mov.w r3, #4294967295
800a9ce: e08f b.n 800aaf0 <SCSI_Read12+0x17a>
}
if (hmsc->scsi_medium_state == SCSI_MEDIUM_EJECTED)
800a9d0: 697b ldr r3, [r7, #20]
800a9d2: f503 5300 add.w r3, r3, #8192 @ 0x2000
800a9d6: f893 3062 ldrb.w r3, [r3, #98] @ 0x62
800a9da: 2b02 cmp r3, #2
800a9dc: d108 bne.n 800a9f0 <SCSI_Read12+0x7a>
{
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
800a9de: 7af9 ldrb r1, [r7, #11]
800a9e0: 233a movs r3, #58 @ 0x3a
800a9e2: 2202 movs r2, #2
800a9e4: 68f8 ldr r0, [r7, #12]
800a9e6: f7ff fe25 bl 800a634 <SCSI_SenseCode>
return -1;
800a9ea: f04f 33ff mov.w r3, #4294967295
800a9ee: e07f b.n 800aaf0 <SCSI_Read12+0x17a>
}
if (((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->IsReady(lun) != 0)
800a9f0: 68fb ldr r3, [r7, #12]
800a9f2: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a9f6: 68fa ldr r2, [r7, #12]
800a9f8: 33b0 adds r3, #176 @ 0xb0
800a9fa: 009b lsls r3, r3, #2
800a9fc: 4413 add r3, r2
800a9fe: 685b ldr r3, [r3, #4]
800aa00: 689b ldr r3, [r3, #8]
800aa02: 7afa ldrb r2, [r7, #11]
800aa04: 4610 mov r0, r2
800aa06: 4798 blx r3
800aa08: 4603 mov r3, r0
800aa0a: 2b00 cmp r3, #0
800aa0c: d008 beq.n 800aa20 <SCSI_Read12+0xaa>
{
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
800aa0e: 7af9 ldrb r1, [r7, #11]
800aa10: 233a movs r3, #58 @ 0x3a
800aa12: 2202 movs r2, #2
800aa14: 68f8 ldr r0, [r7, #12]
800aa16: f7ff fe0d bl 800a634 <SCSI_SenseCode>
return -1;
800aa1a: f04f 33ff mov.w r3, #4294967295
800aa1e: e067 b.n 800aaf0 <SCSI_Read12+0x17a>
}
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
800aa20: 687b ldr r3, [r7, #4]
800aa22: 3302 adds r3, #2
800aa24: 781b ldrb r3, [r3, #0]
800aa26: 061a lsls r2, r3, #24
((uint32_t)params[3] << 16) |
800aa28: 687b ldr r3, [r7, #4]
800aa2a: 3303 adds r3, #3
800aa2c: 781b ldrb r3, [r3, #0]
800aa2e: 041b lsls r3, r3, #16
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
800aa30: 431a orrs r2, r3
((uint32_t)params[4] << 8) |
800aa32: 687b ldr r3, [r7, #4]
800aa34: 3304 adds r3, #4
800aa36: 781b ldrb r3, [r3, #0]
800aa38: 021b lsls r3, r3, #8
((uint32_t)params[3] << 16) |
800aa3a: 4313 orrs r3, r2
(uint32_t)params[5];
800aa3c: 687a ldr r2, [r7, #4]
800aa3e: 3205 adds r2, #5
800aa40: 7812 ldrb r2, [r2, #0]
((uint32_t)params[4] << 8) |
800aa42: 4313 orrs r3, r2
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
800aa44: 697a ldr r2, [r7, #20]
800aa46: f502 5200 add.w r2, r2, #8192 @ 0x2000
800aa4a: 66d3 str r3, [r2, #108] @ 0x6c
hmsc->scsi_blk_len = ((uint32_t)params[6] << 24) |
800aa4c: 687b ldr r3, [r7, #4]
800aa4e: 3306 adds r3, #6
800aa50: 781b ldrb r3, [r3, #0]
800aa52: 061a lsls r2, r3, #24
((uint32_t)params[7] << 16) |
800aa54: 687b ldr r3, [r7, #4]
800aa56: 3307 adds r3, #7
800aa58: 781b ldrb r3, [r3, #0]
800aa5a: 041b lsls r3, r3, #16
hmsc->scsi_blk_len = ((uint32_t)params[6] << 24) |
800aa5c: 431a orrs r2, r3
((uint32_t)params[8] << 8) |
800aa5e: 687b ldr r3, [r7, #4]
800aa60: 3308 adds r3, #8
800aa62: 781b ldrb r3, [r3, #0]
800aa64: 021b lsls r3, r3, #8
((uint32_t)params[7] << 16) |
800aa66: 4313 orrs r3, r2
(uint32_t)params[9];
800aa68: 687a ldr r2, [r7, #4]
800aa6a: 3209 adds r2, #9
800aa6c: 7812 ldrb r2, [r2, #0]
((uint32_t)params[8] << 8) |
800aa6e: 4313 orrs r3, r2
hmsc->scsi_blk_len = ((uint32_t)params[6] << 24) |
800aa70: 697a ldr r2, [r7, #20]
800aa72: f502 5200 add.w r2, r2, #8192 @ 0x2000
800aa76: 6713 str r3, [r2, #112] @ 0x70
if (SCSI_CheckAddressRange(pdev, lun, hmsc->scsi_blk_addr,
800aa78: 697b ldr r3, [r7, #20]
800aa7a: f503 5300 add.w r3, r3, #8192 @ 0x2000
800aa7e: 6eda ldr r2, [r3, #108] @ 0x6c
800aa80: 697b ldr r3, [r7, #20]
800aa82: f503 5300 add.w r3, r3, #8192 @ 0x2000
800aa86: 6f1b ldr r3, [r3, #112] @ 0x70
800aa88: 7af9 ldrb r1, [r7, #11]
800aa8a: 68f8 ldr r0, [r7, #12]
800aa8c: f000 fa4b bl 800af26 <SCSI_CheckAddressRange>
800aa90: 4603 mov r3, r0
800aa92: 2b00 cmp r3, #0
800aa94: da02 bge.n 800aa9c <SCSI_Read12+0x126>
hmsc->scsi_blk_len) < 0)
{
return -1; /* error */
800aa96: f04f 33ff mov.w r3, #4294967295
800aa9a: e029 b.n 800aaf0 <SCSI_Read12+0x17a>
}
/* cases 4,5 : Hi <> Dn */
if (hmsc->cbw.dDataLength != (hmsc->scsi_blk_len * hmsc->scsi_blk_size))
800aa9c: 697b ldr r3, [r7, #20]
800aa9e: f503 5300 add.w r3, r3, #8192 @ 0x2000
800aaa2: 699a ldr r2, [r3, #24]
800aaa4: 697b ldr r3, [r7, #20]
800aaa6: f503 5300 add.w r3, r3, #8192 @ 0x2000
800aaaa: 6f1b ldr r3, [r3, #112] @ 0x70
800aaac: 6979 ldr r1, [r7, #20]
800aaae: f501 5100 add.w r1, r1, #8192 @ 0x2000
800aab2: f8b1 1064 ldrh.w r1, [r1, #100] @ 0x64
800aab6: fb01 f303 mul.w r3, r1, r3
800aaba: 429a cmp r2, r3
800aabc: d00b beq.n 800aad6 <SCSI_Read12+0x160>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
800aabe: 697b ldr r3, [r7, #20]
800aac0: f503 5300 add.w r3, r3, #8192 @ 0x2000
800aac4: 7f59 ldrb r1, [r3, #29]
800aac6: 2320 movs r3, #32
800aac8: 2205 movs r2, #5
800aaca: 68f8 ldr r0, [r7, #12]
800aacc: f7ff fdb2 bl 800a634 <SCSI_SenseCode>
return -1;
800aad0: f04f 33ff mov.w r3, #4294967295
800aad4: e00c b.n 800aaf0 <SCSI_Read12+0x17a>
}
hmsc->bot_state = USBD_BOT_DATA_IN;
800aad6: 697b ldr r3, [r7, #20]
800aad8: 2202 movs r2, #2
800aada: 721a strb r2, [r3, #8]
}
hmsc->bot_data_length = MSC_MEDIA_PACKET;
800aadc: 697b ldr r3, [r7, #20]
800aade: f44f 5200 mov.w r2, #8192 @ 0x2000
800aae2: 60da str r2, [r3, #12]
return SCSI_ProcessRead(pdev, lun);
800aae4: 7afb ldrb r3, [r7, #11]
800aae6: 4619 mov r1, r3
800aae8: 68f8 ldr r0, [r7, #12]
800aaea: f000 fa49 bl 800af80 <SCSI_ProcessRead>
800aaee: 4603 mov r3, r0
}
800aaf0: 4618 mov r0, r3
800aaf2: 3718 adds r7, #24
800aaf4: 46bd mov sp, r7
800aaf6: bd80 pop {r7, pc}
0800aaf8 <SCSI_Write10>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_Write10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
800aaf8: b580 push {r7, lr}
800aafa: b086 sub sp, #24
800aafc: af00 add r7, sp, #0
800aafe: 60f8 str r0, [r7, #12]
800ab00: 460b mov r3, r1
800ab02: 607a str r2, [r7, #4]
800ab04: 72fb strb r3, [r7, #11]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800ab06: 68fb ldr r3, [r7, #12]
800ab08: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800ab0c: 68fb ldr r3, [r7, #12]
800ab0e: 32b0 adds r2, #176 @ 0xb0
800ab10: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800ab14: 617b str r3, [r7, #20]
uint32_t len;
if (hmsc == NULL)
800ab16: 697b ldr r3, [r7, #20]
800ab18: 2b00 cmp r3, #0
800ab1a: d102 bne.n 800ab22 <SCSI_Write10+0x2a>
{
return -1;
800ab1c: f04f 33ff mov.w r3, #4294967295
800ab20: e0c7 b.n 800acb2 <SCSI_Write10+0x1ba>
#ifdef USE_USBD_COMPOSITE
/* Get the Endpoints addresses allocated for this class instance */
MSCOutEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_OUT, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
#endif /* USE_USBD_COMPOSITE */
if (hmsc->bot_state == USBD_BOT_IDLE) /* Idle */
800ab22: 697b ldr r3, [r7, #20]
800ab24: 7a1b ldrb r3, [r3, #8]
800ab26: 2b00 cmp r3, #0
800ab28: f040 80bd bne.w 800aca6 <SCSI_Write10+0x1ae>
{
if (hmsc->cbw.dDataLength == 0U)
800ab2c: 697b ldr r3, [r7, #20]
800ab2e: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ab32: 699b ldr r3, [r3, #24]
800ab34: 2b00 cmp r3, #0
800ab36: d10b bne.n 800ab50 <SCSI_Write10+0x58>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
800ab38: 697b ldr r3, [r7, #20]
800ab3a: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ab3e: 7f59 ldrb r1, [r3, #29]
800ab40: 2320 movs r3, #32
800ab42: 2205 movs r2, #5
800ab44: 68f8 ldr r0, [r7, #12]
800ab46: f7ff fd75 bl 800a634 <SCSI_SenseCode>
return -1;
800ab4a: f04f 33ff mov.w r3, #4294967295
800ab4e: e0b0 b.n 800acb2 <SCSI_Write10+0x1ba>
}
/* case 8 : Hi <> Do */
if ((hmsc->cbw.bmFlags & 0x80U) == 0x80U)
800ab50: 697b ldr r3, [r7, #20]
800ab52: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ab56: 7f1b ldrb r3, [r3, #28]
800ab58: b25b sxtb r3, r3
800ab5a: 2b00 cmp r3, #0
800ab5c: da0b bge.n 800ab76 <SCSI_Write10+0x7e>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
800ab5e: 697b ldr r3, [r7, #20]
800ab60: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ab64: 7f59 ldrb r1, [r3, #29]
800ab66: 2320 movs r3, #32
800ab68: 2205 movs r2, #5
800ab6a: 68f8 ldr r0, [r7, #12]
800ab6c: f7ff fd62 bl 800a634 <SCSI_SenseCode>
return -1;
800ab70: f04f 33ff mov.w r3, #4294967295
800ab74: e09d b.n 800acb2 <SCSI_Write10+0x1ba>
}
/* Check whether Media is ready */
if (((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->IsReady(lun) != 0)
800ab76: 68fb ldr r3, [r7, #12]
800ab78: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800ab7c: 68fa ldr r2, [r7, #12]
800ab7e: 33b0 adds r3, #176 @ 0xb0
800ab80: 009b lsls r3, r3, #2
800ab82: 4413 add r3, r2
800ab84: 685b ldr r3, [r3, #4]
800ab86: 689b ldr r3, [r3, #8]
800ab88: 7afa ldrb r2, [r7, #11]
800ab8a: 4610 mov r0, r2
800ab8c: 4798 blx r3
800ab8e: 4603 mov r3, r0
800ab90: 2b00 cmp r3, #0
800ab92: d008 beq.n 800aba6 <SCSI_Write10+0xae>
{
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
800ab94: 7af9 ldrb r1, [r7, #11]
800ab96: 233a movs r3, #58 @ 0x3a
800ab98: 2202 movs r2, #2
800ab9a: 68f8 ldr r0, [r7, #12]
800ab9c: f7ff fd4a bl 800a634 <SCSI_SenseCode>
return -1;
800aba0: f04f 33ff mov.w r3, #4294967295
800aba4: e085 b.n 800acb2 <SCSI_Write10+0x1ba>
}
/* Check If media is write-protected */
if (((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->IsWriteProtected(lun) != 0)
800aba6: 68fb ldr r3, [r7, #12]
800aba8: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800abac: 68fa ldr r2, [r7, #12]
800abae: 33b0 adds r3, #176 @ 0xb0
800abb0: 009b lsls r3, r3, #2
800abb2: 4413 add r3, r2
800abb4: 685b ldr r3, [r3, #4]
800abb6: 68db ldr r3, [r3, #12]
800abb8: 7afa ldrb r2, [r7, #11]
800abba: 4610 mov r0, r2
800abbc: 4798 blx r3
800abbe: 4603 mov r3, r0
800abc0: 2b00 cmp r3, #0
800abc2: d008 beq.n 800abd6 <SCSI_Write10+0xde>
{
SCSI_SenseCode(pdev, lun, NOT_READY, WRITE_PROTECTED);
800abc4: 7af9 ldrb r1, [r7, #11]
800abc6: 2327 movs r3, #39 @ 0x27
800abc8: 2202 movs r2, #2
800abca: 68f8 ldr r0, [r7, #12]
800abcc: f7ff fd32 bl 800a634 <SCSI_SenseCode>
return -1;
800abd0: f04f 33ff mov.w r3, #4294967295
800abd4: e06d b.n 800acb2 <SCSI_Write10+0x1ba>
}
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
800abd6: 687b ldr r3, [r7, #4]
800abd8: 3302 adds r3, #2
800abda: 781b ldrb r3, [r3, #0]
800abdc: 061a lsls r2, r3, #24
((uint32_t)params[3] << 16) |
800abde: 687b ldr r3, [r7, #4]
800abe0: 3303 adds r3, #3
800abe2: 781b ldrb r3, [r3, #0]
800abe4: 041b lsls r3, r3, #16
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
800abe6: 431a orrs r2, r3
((uint32_t)params[4] << 8) |
800abe8: 687b ldr r3, [r7, #4]
800abea: 3304 adds r3, #4
800abec: 781b ldrb r3, [r3, #0]
800abee: 021b lsls r3, r3, #8
((uint32_t)params[3] << 16) |
800abf0: 4313 orrs r3, r2
(uint32_t)params[5];
800abf2: 687a ldr r2, [r7, #4]
800abf4: 3205 adds r2, #5
800abf6: 7812 ldrb r2, [r2, #0]
((uint32_t)params[4] << 8) |
800abf8: 4313 orrs r3, r2
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
800abfa: 697a ldr r2, [r7, #20]
800abfc: f502 5200 add.w r2, r2, #8192 @ 0x2000
800ac00: 66d3 str r3, [r2, #108] @ 0x6c
hmsc->scsi_blk_len = ((uint32_t)params[7] << 8) |
800ac02: 687b ldr r3, [r7, #4]
800ac04: 3307 adds r3, #7
800ac06: 781b ldrb r3, [r3, #0]
800ac08: 021b lsls r3, r3, #8
(uint32_t)params[8];
800ac0a: 687a ldr r2, [r7, #4]
800ac0c: 3208 adds r2, #8
800ac0e: 7812 ldrb r2, [r2, #0]
hmsc->scsi_blk_len = ((uint32_t)params[7] << 8) |
800ac10: 4313 orrs r3, r2
800ac12: 697a ldr r2, [r7, #20]
800ac14: f502 5200 add.w r2, r2, #8192 @ 0x2000
800ac18: 6713 str r3, [r2, #112] @ 0x70
/* check if LBA address is in the right range */
if (SCSI_CheckAddressRange(pdev, lun, hmsc->scsi_blk_addr,
800ac1a: 697b ldr r3, [r7, #20]
800ac1c: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ac20: 6eda ldr r2, [r3, #108] @ 0x6c
800ac22: 697b ldr r3, [r7, #20]
800ac24: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ac28: 6f1b ldr r3, [r3, #112] @ 0x70
800ac2a: 7af9 ldrb r1, [r7, #11]
800ac2c: 68f8 ldr r0, [r7, #12]
800ac2e: f000 f97a bl 800af26 <SCSI_CheckAddressRange>
800ac32: 4603 mov r3, r0
800ac34: 2b00 cmp r3, #0
800ac36: da02 bge.n 800ac3e <SCSI_Write10+0x146>
hmsc->scsi_blk_len) < 0)
{
return -1; /* error */
800ac38: f04f 33ff mov.w r3, #4294967295
800ac3c: e039 b.n 800acb2 <SCSI_Write10+0x1ba>
}
len = hmsc->scsi_blk_len * hmsc->scsi_blk_size;
800ac3e: 697b ldr r3, [r7, #20]
800ac40: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ac44: 6f1b ldr r3, [r3, #112] @ 0x70
800ac46: 697a ldr r2, [r7, #20]
800ac48: f502 5200 add.w r2, r2, #8192 @ 0x2000
800ac4c: f8b2 2064 ldrh.w r2, [r2, #100] @ 0x64
800ac50: fb02 f303 mul.w r3, r2, r3
800ac54: 613b str r3, [r7, #16]
/* cases 3,11,13 : Hn,Ho <> D0 */
if (hmsc->cbw.dDataLength != len)
800ac56: 697b ldr r3, [r7, #20]
800ac58: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ac5c: 699b ldr r3, [r3, #24]
800ac5e: 693a ldr r2, [r7, #16]
800ac60: 429a cmp r2, r3
800ac62: d00b beq.n 800ac7c <SCSI_Write10+0x184>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
800ac64: 697b ldr r3, [r7, #20]
800ac66: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ac6a: 7f59 ldrb r1, [r3, #29]
800ac6c: 2320 movs r3, #32
800ac6e: 2205 movs r2, #5
800ac70: 68f8 ldr r0, [r7, #12]
800ac72: f7ff fcdf bl 800a634 <SCSI_SenseCode>
return -1;
800ac76: f04f 33ff mov.w r3, #4294967295
800ac7a: e01a b.n 800acb2 <SCSI_Write10+0x1ba>
}
len = MIN(len, MSC_MEDIA_PACKET);
800ac7c: 693b ldr r3, [r7, #16]
800ac7e: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
800ac82: bf28 it cs
800ac84: f44f 5300 movcs.w r3, #8192 @ 0x2000
800ac88: 613b str r3, [r7, #16]
/* Prepare EP to receive first data packet */
hmsc->bot_state = USBD_BOT_DATA_OUT;
800ac8a: 697b ldr r3, [r7, #20]
800ac8c: 2201 movs r2, #1
800ac8e: 721a strb r2, [r3, #8]
(void)USBD_LL_PrepareReceive(pdev, MSCOutEpAdd, hmsc->bot_data, len);
800ac90: 4b0a ldr r3, [pc, #40] @ (800acbc <SCSI_Write10+0x1c4>)
800ac92: 7819 ldrb r1, [r3, #0]
800ac94: 697b ldr r3, [r7, #20]
800ac96: f103 0210 add.w r2, r3, #16
800ac9a: 693b ldr r3, [r7, #16]
800ac9c: 68f8 ldr r0, [r7, #12]
800ac9e: f008 f8fe bl 8012e9e <USBD_LL_PrepareReceive>
else /* Write Process ongoing */
{
return SCSI_ProcessWrite(pdev, lun);
}
return 0;
800aca2: 2300 movs r3, #0
800aca4: e005 b.n 800acb2 <SCSI_Write10+0x1ba>
return SCSI_ProcessWrite(pdev, lun);
800aca6: 7afb ldrb r3, [r7, #11]
800aca8: 4619 mov r1, r3
800acaa: 68f8 ldr r0, [r7, #12]
800acac: f000 f9fe bl 800b0ac <SCSI_ProcessWrite>
800acb0: 4603 mov r3, r0
}
800acb2: 4618 mov r0, r3
800acb4: 3718 adds r7, #24
800acb6: 46bd mov sp, r7
800acb8: bd80 pop {r7, pc}
800acba: bf00 nop
800acbc: 20000083 .word 0x20000083
0800acc0 <SCSI_Write12>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_Write12(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
800acc0: b580 push {r7, lr}
800acc2: b086 sub sp, #24
800acc4: af00 add r7, sp, #0
800acc6: 60f8 str r0, [r7, #12]
800acc8: 460b mov r3, r1
800acca: 607a str r2, [r7, #4]
800accc: 72fb strb r3, [r7, #11]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800acce: 68fb ldr r3, [r7, #12]
800acd0: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800acd4: 68fb ldr r3, [r7, #12]
800acd6: 32b0 adds r2, #176 @ 0xb0
800acd8: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800acdc: 617b str r3, [r7, #20]
uint32_t len;
if (hmsc == NULL)
800acde: 697b ldr r3, [r7, #20]
800ace0: 2b00 cmp r3, #0
800ace2: d102 bne.n 800acea <SCSI_Write12+0x2a>
{
return -1;
800ace4: f04f 33ff mov.w r3, #4294967295
800ace8: e0d7 b.n 800ae9a <SCSI_Write12+0x1da>
#ifdef USE_USBD_COMPOSITE
/* Get the Endpoints addresses allocated for this class instance */
MSCOutEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_OUT, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
#endif /* USE_USBD_COMPOSITE */
if (hmsc->bot_state == USBD_BOT_IDLE) /* Idle */
800acea: 697b ldr r3, [r7, #20]
800acec: 7a1b ldrb r3, [r3, #8]
800acee: 2b00 cmp r3, #0
800acf0: f040 80cd bne.w 800ae8e <SCSI_Write12+0x1ce>
{
if (hmsc->cbw.dDataLength == 0U)
800acf4: 697b ldr r3, [r7, #20]
800acf6: f503 5300 add.w r3, r3, #8192 @ 0x2000
800acfa: 699b ldr r3, [r3, #24]
800acfc: 2b00 cmp r3, #0
800acfe: d10b bne.n 800ad18 <SCSI_Write12+0x58>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
800ad00: 697b ldr r3, [r7, #20]
800ad02: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ad06: 7f59 ldrb r1, [r3, #29]
800ad08: 2320 movs r3, #32
800ad0a: 2205 movs r2, #5
800ad0c: 68f8 ldr r0, [r7, #12]
800ad0e: f7ff fc91 bl 800a634 <SCSI_SenseCode>
return -1;
800ad12: f04f 33ff mov.w r3, #4294967295
800ad16: e0c0 b.n 800ae9a <SCSI_Write12+0x1da>
}
/* case 8 : Hi <> Do */
if ((hmsc->cbw.bmFlags & 0x80U) == 0x80U)
800ad18: 697b ldr r3, [r7, #20]
800ad1a: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ad1e: 7f1b ldrb r3, [r3, #28]
800ad20: b25b sxtb r3, r3
800ad22: 2b00 cmp r3, #0
800ad24: da0b bge.n 800ad3e <SCSI_Write12+0x7e>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
800ad26: 697b ldr r3, [r7, #20]
800ad28: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ad2c: 7f59 ldrb r1, [r3, #29]
800ad2e: 2320 movs r3, #32
800ad30: 2205 movs r2, #5
800ad32: 68f8 ldr r0, [r7, #12]
800ad34: f7ff fc7e bl 800a634 <SCSI_SenseCode>
return -1;
800ad38: f04f 33ff mov.w r3, #4294967295
800ad3c: e0ad b.n 800ae9a <SCSI_Write12+0x1da>
}
/* Check whether Media is ready */
if (((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->IsReady(lun) != 0)
800ad3e: 68fb ldr r3, [r7, #12]
800ad40: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800ad44: 68fa ldr r2, [r7, #12]
800ad46: 33b0 adds r3, #176 @ 0xb0
800ad48: 009b lsls r3, r3, #2
800ad4a: 4413 add r3, r2
800ad4c: 685b ldr r3, [r3, #4]
800ad4e: 689b ldr r3, [r3, #8]
800ad50: 7afa ldrb r2, [r7, #11]
800ad52: 4610 mov r0, r2
800ad54: 4798 blx r3
800ad56: 4603 mov r3, r0
800ad58: 2b00 cmp r3, #0
800ad5a: d00b beq.n 800ad74 <SCSI_Write12+0xb4>
{
SCSI_SenseCode(pdev, lun, NOT_READY, MEDIUM_NOT_PRESENT);
800ad5c: 7af9 ldrb r1, [r7, #11]
800ad5e: 233a movs r3, #58 @ 0x3a
800ad60: 2202 movs r2, #2
800ad62: 68f8 ldr r0, [r7, #12]
800ad64: f7ff fc66 bl 800a634 <SCSI_SenseCode>
hmsc->bot_state = USBD_BOT_NO_DATA;
800ad68: 697b ldr r3, [r7, #20]
800ad6a: 2205 movs r2, #5
800ad6c: 721a strb r2, [r3, #8]
return -1;
800ad6e: f04f 33ff mov.w r3, #4294967295
800ad72: e092 b.n 800ae9a <SCSI_Write12+0x1da>
}
/* Check If media is write-protected */
if (((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->IsWriteProtected(lun) != 0)
800ad74: 68fb ldr r3, [r7, #12]
800ad76: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800ad7a: 68fa ldr r2, [r7, #12]
800ad7c: 33b0 adds r3, #176 @ 0xb0
800ad7e: 009b lsls r3, r3, #2
800ad80: 4413 add r3, r2
800ad82: 685b ldr r3, [r3, #4]
800ad84: 68db ldr r3, [r3, #12]
800ad86: 7afa ldrb r2, [r7, #11]
800ad88: 4610 mov r0, r2
800ad8a: 4798 blx r3
800ad8c: 4603 mov r3, r0
800ad8e: 2b00 cmp r3, #0
800ad90: d00b beq.n 800adaa <SCSI_Write12+0xea>
{
SCSI_SenseCode(pdev, lun, NOT_READY, WRITE_PROTECTED);
800ad92: 7af9 ldrb r1, [r7, #11]
800ad94: 2327 movs r3, #39 @ 0x27
800ad96: 2202 movs r2, #2
800ad98: 68f8 ldr r0, [r7, #12]
800ad9a: f7ff fc4b bl 800a634 <SCSI_SenseCode>
hmsc->bot_state = USBD_BOT_NO_DATA;
800ad9e: 697b ldr r3, [r7, #20]
800ada0: 2205 movs r2, #5
800ada2: 721a strb r2, [r3, #8]
return -1;
800ada4: f04f 33ff mov.w r3, #4294967295
800ada8: e077 b.n 800ae9a <SCSI_Write12+0x1da>
}
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
800adaa: 687b ldr r3, [r7, #4]
800adac: 3302 adds r3, #2
800adae: 781b ldrb r3, [r3, #0]
800adb0: 061a lsls r2, r3, #24
((uint32_t)params[3] << 16) |
800adb2: 687b ldr r3, [r7, #4]
800adb4: 3303 adds r3, #3
800adb6: 781b ldrb r3, [r3, #0]
800adb8: 041b lsls r3, r3, #16
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
800adba: 431a orrs r2, r3
((uint32_t)params[4] << 8) |
800adbc: 687b ldr r3, [r7, #4]
800adbe: 3304 adds r3, #4
800adc0: 781b ldrb r3, [r3, #0]
800adc2: 021b lsls r3, r3, #8
((uint32_t)params[3] << 16) |
800adc4: 4313 orrs r3, r2
(uint32_t)params[5];
800adc6: 687a ldr r2, [r7, #4]
800adc8: 3205 adds r2, #5
800adca: 7812 ldrb r2, [r2, #0]
((uint32_t)params[4] << 8) |
800adcc: 4313 orrs r3, r2
hmsc->scsi_blk_addr = ((uint32_t)params[2] << 24) |
800adce: 697a ldr r2, [r7, #20]
800add0: f502 5200 add.w r2, r2, #8192 @ 0x2000
800add4: 66d3 str r3, [r2, #108] @ 0x6c
hmsc->scsi_blk_len = ((uint32_t)params[6] << 24) |
800add6: 687b ldr r3, [r7, #4]
800add8: 3306 adds r3, #6
800adda: 781b ldrb r3, [r3, #0]
800addc: 061a lsls r2, r3, #24
((uint32_t)params[7] << 16) |
800adde: 687b ldr r3, [r7, #4]
800ade0: 3307 adds r3, #7
800ade2: 781b ldrb r3, [r3, #0]
800ade4: 041b lsls r3, r3, #16
hmsc->scsi_blk_len = ((uint32_t)params[6] << 24) |
800ade6: 431a orrs r2, r3
((uint32_t)params[8] << 8) |
800ade8: 687b ldr r3, [r7, #4]
800adea: 3308 adds r3, #8
800adec: 781b ldrb r3, [r3, #0]
800adee: 021b lsls r3, r3, #8
((uint32_t)params[7] << 16) |
800adf0: 4313 orrs r3, r2
(uint32_t)params[9];
800adf2: 687a ldr r2, [r7, #4]
800adf4: 3209 adds r2, #9
800adf6: 7812 ldrb r2, [r2, #0]
((uint32_t)params[8] << 8) |
800adf8: 4313 orrs r3, r2
hmsc->scsi_blk_len = ((uint32_t)params[6] << 24) |
800adfa: 697a ldr r2, [r7, #20]
800adfc: f502 5200 add.w r2, r2, #8192 @ 0x2000
800ae00: 6713 str r3, [r2, #112] @ 0x70
/* check if LBA address is in the right range */
if (SCSI_CheckAddressRange(pdev, lun, hmsc->scsi_blk_addr,
800ae02: 697b ldr r3, [r7, #20]
800ae04: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ae08: 6eda ldr r2, [r3, #108] @ 0x6c
800ae0a: 697b ldr r3, [r7, #20]
800ae0c: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ae10: 6f1b ldr r3, [r3, #112] @ 0x70
800ae12: 7af9 ldrb r1, [r7, #11]
800ae14: 68f8 ldr r0, [r7, #12]
800ae16: f000 f886 bl 800af26 <SCSI_CheckAddressRange>
800ae1a: 4603 mov r3, r0
800ae1c: 2b00 cmp r3, #0
800ae1e: da02 bge.n 800ae26 <SCSI_Write12+0x166>
hmsc->scsi_blk_len) < 0)
{
return -1; /* error */
800ae20: f04f 33ff mov.w r3, #4294967295
800ae24: e039 b.n 800ae9a <SCSI_Write12+0x1da>
}
len = hmsc->scsi_blk_len * hmsc->scsi_blk_size;
800ae26: 697b ldr r3, [r7, #20]
800ae28: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ae2c: 6f1b ldr r3, [r3, #112] @ 0x70
800ae2e: 697a ldr r2, [r7, #20]
800ae30: f502 5200 add.w r2, r2, #8192 @ 0x2000
800ae34: f8b2 2064 ldrh.w r2, [r2, #100] @ 0x64
800ae38: fb02 f303 mul.w r3, r2, r3
800ae3c: 613b str r3, [r7, #16]
/* cases 3,11,13 : Hn,Ho <> D0 */
if (hmsc->cbw.dDataLength != len)
800ae3e: 697b ldr r3, [r7, #20]
800ae40: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ae44: 699b ldr r3, [r3, #24]
800ae46: 693a ldr r2, [r7, #16]
800ae48: 429a cmp r2, r3
800ae4a: d00b beq.n 800ae64 <SCSI_Write12+0x1a4>
{
SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
800ae4c: 697b ldr r3, [r7, #20]
800ae4e: f503 5300 add.w r3, r3, #8192 @ 0x2000
800ae52: 7f59 ldrb r1, [r3, #29]
800ae54: 2320 movs r3, #32
800ae56: 2205 movs r2, #5
800ae58: 68f8 ldr r0, [r7, #12]
800ae5a: f7ff fbeb bl 800a634 <SCSI_SenseCode>
return -1;
800ae5e: f04f 33ff mov.w r3, #4294967295
800ae62: e01a b.n 800ae9a <SCSI_Write12+0x1da>
}
len = MIN(len, MSC_MEDIA_PACKET);
800ae64: 693b ldr r3, [r7, #16]
800ae66: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
800ae6a: bf28 it cs
800ae6c: f44f 5300 movcs.w r3, #8192 @ 0x2000
800ae70: 613b str r3, [r7, #16]
/* Prepare EP to receive first data packet */
hmsc->bot_state = USBD_BOT_DATA_OUT;
800ae72: 697b ldr r3, [r7, #20]
800ae74: 2201 movs r2, #1
800ae76: 721a strb r2, [r3, #8]
(void)USBD_LL_PrepareReceive(pdev, MSCOutEpAdd, hmsc->bot_data, len);
800ae78: 4b0a ldr r3, [pc, #40] @ (800aea4 <SCSI_Write12+0x1e4>)
800ae7a: 7819 ldrb r1, [r3, #0]
800ae7c: 697b ldr r3, [r7, #20]
800ae7e: f103 0210 add.w r2, r3, #16
800ae82: 693b ldr r3, [r7, #16]
800ae84: 68f8 ldr r0, [r7, #12]
800ae86: f008 f80a bl 8012e9e <USBD_LL_PrepareReceive>
else /* Write Process ongoing */
{
return SCSI_ProcessWrite(pdev, lun);
}
return 0;
800ae8a: 2300 movs r3, #0
800ae8c: e005 b.n 800ae9a <SCSI_Write12+0x1da>
return SCSI_ProcessWrite(pdev, lun);
800ae8e: 7afb ldrb r3, [r7, #11]
800ae90: 4619 mov r1, r3
800ae92: 68f8 ldr r0, [r7, #12]
800ae94: f000 f90a bl 800b0ac <SCSI_ProcessWrite>
800ae98: 4603 mov r3, r0
}
800ae9a: 4618 mov r0, r3
800ae9c: 3718 adds r7, #24
800ae9e: 46bd mov sp, r7
800aea0: bd80 pop {r7, pc}
800aea2: bf00 nop
800aea4: 20000083 .word 0x20000083
0800aea8 <SCSI_Verify10>:
* @param lun: Logical unit number
* @param params: Command parameters
* @retval status
*/
static int8_t SCSI_Verify10(USBD_HandleTypeDef *pdev, uint8_t lun, uint8_t *params)
{
800aea8: b580 push {r7, lr}
800aeaa: b086 sub sp, #24
800aeac: af00 add r7, sp, #0
800aeae: 60f8 str r0, [r7, #12]
800aeb0: 460b mov r3, r1
800aeb2: 607a str r2, [r7, #4]
800aeb4: 72fb strb r3, [r7, #11]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800aeb6: 68fb ldr r3, [r7, #12]
800aeb8: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800aebc: 68fb ldr r3, [r7, #12]
800aebe: 32b0 adds r2, #176 @ 0xb0
800aec0: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800aec4: 617b str r3, [r7, #20]
if (hmsc == NULL)
800aec6: 697b ldr r3, [r7, #20]
800aec8: 2b00 cmp r3, #0
800aeca: d102 bne.n 800aed2 <SCSI_Verify10+0x2a>
{
return -1;
800aecc: f04f 33ff mov.w r3, #4294967295
800aed0: e025 b.n 800af1e <SCSI_Verify10+0x76>
}
if ((params[1] & 0x02U) == 0x02U)
800aed2: 687b ldr r3, [r7, #4]
800aed4: 3301 adds r3, #1
800aed6: 781b ldrb r3, [r3, #0]
800aed8: f003 0302 and.w r3, r3, #2
800aedc: 2b00 cmp r3, #0
800aede: d008 beq.n 800aef2 <SCSI_Verify10+0x4a>
{
SCSI_SenseCode(pdev, lun, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND);
800aee0: 7af9 ldrb r1, [r7, #11]
800aee2: 2324 movs r3, #36 @ 0x24
800aee4: 2205 movs r2, #5
800aee6: 68f8 ldr r0, [r7, #12]
800aee8: f7ff fba4 bl 800a634 <SCSI_SenseCode>
return -1; /* Error, Verify Mode Not supported*/
800aeec: f04f 33ff mov.w r3, #4294967295
800aef0: e015 b.n 800af1e <SCSI_Verify10+0x76>
}
if (SCSI_CheckAddressRange(pdev, lun, hmsc->scsi_blk_addr, hmsc->scsi_blk_len) < 0)
800aef2: 697b ldr r3, [r7, #20]
800aef4: f503 5300 add.w r3, r3, #8192 @ 0x2000
800aef8: 6eda ldr r2, [r3, #108] @ 0x6c
800aefa: 697b ldr r3, [r7, #20]
800aefc: f503 5300 add.w r3, r3, #8192 @ 0x2000
800af00: 6f1b ldr r3, [r3, #112] @ 0x70
800af02: 7af9 ldrb r1, [r7, #11]
800af04: 68f8 ldr r0, [r7, #12]
800af06: f000 f80e bl 800af26 <SCSI_CheckAddressRange>
800af0a: 4603 mov r3, r0
800af0c: 2b00 cmp r3, #0
800af0e: da02 bge.n 800af16 <SCSI_Verify10+0x6e>
{
return -1; /* error */
800af10: f04f 33ff mov.w r3, #4294967295
800af14: e003 b.n 800af1e <SCSI_Verify10+0x76>
}
hmsc->bot_data_length = 0U;
800af16: 697b ldr r3, [r7, #20]
800af18: 2200 movs r2, #0
800af1a: 60da str r2, [r3, #12]
return 0;
800af1c: 2300 movs r3, #0
}
800af1e: 4618 mov r0, r3
800af20: 3718 adds r7, #24
800af22: 46bd mov sp, r7
800af24: bd80 pop {r7, pc}
0800af26 <SCSI_CheckAddressRange>:
* @param blk_nbr: number of block to be processed
* @retval status
*/
static int8_t SCSI_CheckAddressRange(USBD_HandleTypeDef *pdev, uint8_t lun,
uint32_t blk_offset, uint32_t blk_nbr)
{
800af26: b580 push {r7, lr}
800af28: b086 sub sp, #24
800af2a: af00 add r7, sp, #0
800af2c: 60f8 str r0, [r7, #12]
800af2e: 607a str r2, [r7, #4]
800af30: 603b str r3, [r7, #0]
800af32: 460b mov r3, r1
800af34: 72fb strb r3, [r7, #11]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800af36: 68fb ldr r3, [r7, #12]
800af38: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800af3c: 68fb ldr r3, [r7, #12]
800af3e: 32b0 adds r2, #176 @ 0xb0
800af40: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800af44: 617b str r3, [r7, #20]
if (hmsc == NULL)
800af46: 697b ldr r3, [r7, #20]
800af48: 2b00 cmp r3, #0
800af4a: d102 bne.n 800af52 <SCSI_CheckAddressRange+0x2c>
{
return -1;
800af4c: f04f 33ff mov.w r3, #4294967295
800af50: e012 b.n 800af78 <SCSI_CheckAddressRange+0x52>
}
if ((blk_offset + blk_nbr) > hmsc->scsi_blk_nbr)
800af52: 687a ldr r2, [r7, #4]
800af54: 683b ldr r3, [r7, #0]
800af56: 441a add r2, r3
800af58: 697b ldr r3, [r7, #20]
800af5a: f503 5300 add.w r3, r3, #8192 @ 0x2000
800af5e: 6e9b ldr r3, [r3, #104] @ 0x68
800af60: 429a cmp r2, r3
800af62: d908 bls.n 800af76 <SCSI_CheckAddressRange+0x50>
{
SCSI_SenseCode(pdev, lun, ILLEGAL_REQUEST, ADDRESS_OUT_OF_RANGE);
800af64: 7af9 ldrb r1, [r7, #11]
800af66: 2321 movs r3, #33 @ 0x21
800af68: 2205 movs r2, #5
800af6a: 68f8 ldr r0, [r7, #12]
800af6c: f7ff fb62 bl 800a634 <SCSI_SenseCode>
return -1;
800af70: f04f 33ff mov.w r3, #4294967295
800af74: e000 b.n 800af78 <SCSI_CheckAddressRange+0x52>
}
return 0;
800af76: 2300 movs r3, #0
}
800af78: 4618 mov r0, r3
800af7a: 3718 adds r7, #24
800af7c: 46bd mov sp, r7
800af7e: bd80 pop {r7, pc}
0800af80 <SCSI_ProcessRead>:
* Handle Read Process
* @param lun: Logical unit number
* @retval status
*/
static int8_t SCSI_ProcessRead(USBD_HandleTypeDef *pdev, uint8_t lun)
{
800af80: b590 push {r4, r7, lr}
800af82: b085 sub sp, #20
800af84: af00 add r7, sp, #0
800af86: 6078 str r0, [r7, #4]
800af88: 460b mov r3, r1
800af8a: 70fb strb r3, [r7, #3]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800af8c: 687b ldr r3, [r7, #4]
800af8e: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800af92: 687b ldr r3, [r7, #4]
800af94: 32b0 adds r2, #176 @ 0xb0
800af96: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800af9a: 60fb str r3, [r7, #12]
uint32_t len;
if (hmsc == NULL)
800af9c: 68fb ldr r3, [r7, #12]
800af9e: 2b00 cmp r3, #0
800afa0: d102 bne.n 800afa8 <SCSI_ProcessRead+0x28>
{
return -1;
800afa2: f04f 33ff mov.w r3, #4294967295
800afa6: e07b b.n 800b0a0 <SCSI_ProcessRead+0x120>
}
len = hmsc->scsi_blk_len * hmsc->scsi_blk_size;
800afa8: 68fb ldr r3, [r7, #12]
800afaa: f503 5300 add.w r3, r3, #8192 @ 0x2000
800afae: 6f1b ldr r3, [r3, #112] @ 0x70
800afb0: 68fa ldr r2, [r7, #12]
800afb2: f502 5200 add.w r2, r2, #8192 @ 0x2000
800afb6: f8b2 2064 ldrh.w r2, [r2, #100] @ 0x64
800afba: fb02 f303 mul.w r3, r2, r3
800afbe: 60bb str r3, [r7, #8]
#ifdef USE_USBD_COMPOSITE
/* Get the Endpoints addresses allocated for this class instance */
MSCInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
#endif /* USE_USBD_COMPOSITE */
len = MIN(len, MSC_MEDIA_PACKET);
800afc0: 68bb ldr r3, [r7, #8]
800afc2: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
800afc6: bf28 it cs
800afc8: f44f 5300 movcs.w r3, #8192 @ 0x2000
800afcc: 60bb str r3, [r7, #8]
if (((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->Read(lun, hmsc->bot_data,
800afce: 687b ldr r3, [r7, #4]
800afd0: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800afd4: 687a ldr r2, [r7, #4]
800afd6: 33b0 adds r3, #176 @ 0xb0
800afd8: 009b lsls r3, r3, #2
800afda: 4413 add r3, r2
800afdc: 685b ldr r3, [r3, #4]
800afde: 691c ldr r4, [r3, #16]
800afe0: 68fb ldr r3, [r7, #12]
800afe2: f103 0110 add.w r1, r3, #16
800afe6: 68fb ldr r3, [r7, #12]
800afe8: f503 5300 add.w r3, r3, #8192 @ 0x2000
800afec: 6eda ldr r2, [r3, #108] @ 0x6c
hmsc->scsi_blk_addr,
(len / hmsc->scsi_blk_size)) < 0)
800afee: 68fb ldr r3, [r7, #12]
800aff0: f503 5300 add.w r3, r3, #8192 @ 0x2000
800aff4: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
800aff8: 4618 mov r0, r3
800affa: 68bb ldr r3, [r7, #8]
800affc: fbb3 f3f0 udiv r3, r3, r0
if (((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->Read(lun, hmsc->bot_data,
800b000: b29b uxth r3, r3
800b002: 78f8 ldrb r0, [r7, #3]
800b004: 47a0 blx r4
800b006: 4603 mov r3, r0
800b008: 2b00 cmp r3, #0
800b00a: da08 bge.n 800b01e <SCSI_ProcessRead+0x9e>
{
SCSI_SenseCode(pdev, lun, HARDWARE_ERROR, UNRECOVERED_READ_ERROR);
800b00c: 78f9 ldrb r1, [r7, #3]
800b00e: 2311 movs r3, #17
800b010: 2204 movs r2, #4
800b012: 6878 ldr r0, [r7, #4]
800b014: f7ff fb0e bl 800a634 <SCSI_SenseCode>
return -1;
800b018: f04f 33ff mov.w r3, #4294967295
800b01c: e040 b.n 800b0a0 <SCSI_ProcessRead+0x120>
}
(void)USBD_LL_Transmit(pdev, MSCInEpAdd, hmsc->bot_data, len);
800b01e: 4b22 ldr r3, [pc, #136] @ (800b0a8 <SCSI_ProcessRead+0x128>)
800b020: 7819 ldrb r1, [r3, #0]
800b022: 68fb ldr r3, [r7, #12]
800b024: f103 0210 add.w r2, r3, #16
800b028: 68bb ldr r3, [r7, #8]
800b02a: 6878 ldr r0, [r7, #4]
800b02c: f007 ff16 bl 8012e5c <USBD_LL_Transmit>
hmsc->scsi_blk_addr += (len / hmsc->scsi_blk_size);
800b030: 68fb ldr r3, [r7, #12]
800b032: f503 5300 add.w r3, r3, #8192 @ 0x2000
800b036: 6eda ldr r2, [r3, #108] @ 0x6c
800b038: 68fb ldr r3, [r7, #12]
800b03a: f503 5300 add.w r3, r3, #8192 @ 0x2000
800b03e: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
800b042: 4619 mov r1, r3
800b044: 68bb ldr r3, [r7, #8]
800b046: fbb3 f3f1 udiv r3, r3, r1
800b04a: 4413 add r3, r2
800b04c: 68fa ldr r2, [r7, #12]
800b04e: f502 5200 add.w r2, r2, #8192 @ 0x2000
800b052: 66d3 str r3, [r2, #108] @ 0x6c
hmsc->scsi_blk_len -= (len / hmsc->scsi_blk_size);
800b054: 68fb ldr r3, [r7, #12]
800b056: f503 5300 add.w r3, r3, #8192 @ 0x2000
800b05a: 6f1a ldr r2, [r3, #112] @ 0x70
800b05c: 68fb ldr r3, [r7, #12]
800b05e: f503 5300 add.w r3, r3, #8192 @ 0x2000
800b062: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
800b066: 4619 mov r1, r3
800b068: 68bb ldr r3, [r7, #8]
800b06a: fbb3 f3f1 udiv r3, r3, r1
800b06e: 1ad3 subs r3, r2, r3
800b070: 68fa ldr r2, [r7, #12]
800b072: f502 5200 add.w r2, r2, #8192 @ 0x2000
800b076: 6713 str r3, [r2, #112] @ 0x70
/* case 6 : Hi = Di */
hmsc->csw.dDataResidue -= len;
800b078: 68fb ldr r3, [r7, #12]
800b07a: f503 5300 add.w r3, r3, #8192 @ 0x2000
800b07e: 6b9a ldr r2, [r3, #56] @ 0x38
800b080: 68bb ldr r3, [r7, #8]
800b082: 1ad3 subs r3, r2, r3
800b084: 68fa ldr r2, [r7, #12]
800b086: f502 5200 add.w r2, r2, #8192 @ 0x2000
800b08a: 6393 str r3, [r2, #56] @ 0x38
if (hmsc->scsi_blk_len == 0U)
800b08c: 68fb ldr r3, [r7, #12]
800b08e: f503 5300 add.w r3, r3, #8192 @ 0x2000
800b092: 6f1b ldr r3, [r3, #112] @ 0x70
800b094: 2b00 cmp r3, #0
800b096: d102 bne.n 800b09e <SCSI_ProcessRead+0x11e>
{
hmsc->bot_state = USBD_BOT_LAST_DATA_IN;
800b098: 68fb ldr r3, [r7, #12]
800b09a: 2203 movs r2, #3
800b09c: 721a strb r2, [r3, #8]
}
return 0;
800b09e: 2300 movs r3, #0
}
800b0a0: 4618 mov r0, r3
800b0a2: 3714 adds r7, #20
800b0a4: 46bd mov sp, r7
800b0a6: bd90 pop {r4, r7, pc}
800b0a8: 20000082 .word 0x20000082
0800b0ac <SCSI_ProcessWrite>:
* Handle Write Process
* @param lun: Logical unit number
* @retval status
*/
static int8_t SCSI_ProcessWrite(USBD_HandleTypeDef *pdev, uint8_t lun)
{
800b0ac: b590 push {r4, r7, lr}
800b0ae: b085 sub sp, #20
800b0b0: af00 add r7, sp, #0
800b0b2: 6078 str r0, [r7, #4]
800b0b4: 460b mov r3, r1
800b0b6: 70fb strb r3, [r7, #3]
USBD_MSC_BOT_HandleTypeDef *hmsc = (USBD_MSC_BOT_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800b0b8: 687b ldr r3, [r7, #4]
800b0ba: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800b0be: 687b ldr r3, [r7, #4]
800b0c0: 32b0 adds r2, #176 @ 0xb0
800b0c2: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800b0c6: 60fb str r3, [r7, #12]
uint32_t len;
if (hmsc == NULL)
800b0c8: 68fb ldr r3, [r7, #12]
800b0ca: 2b00 cmp r3, #0
800b0cc: d102 bne.n 800b0d4 <SCSI_ProcessWrite+0x28>
{
return -1;
800b0ce: f04f 33ff mov.w r3, #4294967295
800b0d2: e08e b.n 800b1f2 <SCSI_ProcessWrite+0x146>
}
len = hmsc->scsi_blk_len * hmsc->scsi_blk_size;
800b0d4: 68fb ldr r3, [r7, #12]
800b0d6: f503 5300 add.w r3, r3, #8192 @ 0x2000
800b0da: 6f1b ldr r3, [r3, #112] @ 0x70
800b0dc: 68fa ldr r2, [r7, #12]
800b0de: f502 5200 add.w r2, r2, #8192 @ 0x2000
800b0e2: f8b2 2064 ldrh.w r2, [r2, #100] @ 0x64
800b0e6: fb02 f303 mul.w r3, r2, r3
800b0ea: 60bb str r3, [r7, #8]
#ifdef USE_USBD_COMPOSITE
/* Get the Endpoints addresses allocated for this class instance */
MSCOutEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_OUT, USBD_EP_TYPE_BULK, (uint8_t)pdev->classId);
#endif /* USE_USBD_COMPOSITE */
len = MIN(len, MSC_MEDIA_PACKET);
800b0ec: 68bb ldr r3, [r7, #8]
800b0ee: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
800b0f2: bf28 it cs
800b0f4: f44f 5300 movcs.w r3, #8192 @ 0x2000
800b0f8: 60bb str r3, [r7, #8]
if (((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->Write(lun, hmsc->bot_data,
800b0fa: 687b ldr r3, [r7, #4]
800b0fc: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800b100: 687a ldr r2, [r7, #4]
800b102: 33b0 adds r3, #176 @ 0xb0
800b104: 009b lsls r3, r3, #2
800b106: 4413 add r3, r2
800b108: 685b ldr r3, [r3, #4]
800b10a: 695c ldr r4, [r3, #20]
800b10c: 68fb ldr r3, [r7, #12]
800b10e: f103 0110 add.w r1, r3, #16
800b112: 68fb ldr r3, [r7, #12]
800b114: f503 5300 add.w r3, r3, #8192 @ 0x2000
800b118: 6eda ldr r2, [r3, #108] @ 0x6c
hmsc->scsi_blk_addr,
(len / hmsc->scsi_blk_size)) < 0)
800b11a: 68fb ldr r3, [r7, #12]
800b11c: f503 5300 add.w r3, r3, #8192 @ 0x2000
800b120: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
800b124: 4618 mov r0, r3
800b126: 68bb ldr r3, [r7, #8]
800b128: fbb3 f3f0 udiv r3, r3, r0
if (((USBD_StorageTypeDef *)pdev->pUserData[pdev->classId])->Write(lun, hmsc->bot_data,
800b12c: b29b uxth r3, r3
800b12e: 78f8 ldrb r0, [r7, #3]
800b130: 47a0 blx r4
800b132: 4603 mov r3, r0
800b134: 2b00 cmp r3, #0
800b136: da08 bge.n 800b14a <SCSI_ProcessWrite+0x9e>
{
SCSI_SenseCode(pdev, lun, HARDWARE_ERROR, WRITE_FAULT);
800b138: 78f9 ldrb r1, [r7, #3]
800b13a: 2303 movs r3, #3
800b13c: 2204 movs r2, #4
800b13e: 6878 ldr r0, [r7, #4]
800b140: f7ff fa78 bl 800a634 <SCSI_SenseCode>
return -1;
800b144: f04f 33ff mov.w r3, #4294967295
800b148: e053 b.n 800b1f2 <SCSI_ProcessWrite+0x146>
}
hmsc->scsi_blk_addr += (len / hmsc->scsi_blk_size);
800b14a: 68fb ldr r3, [r7, #12]
800b14c: f503 5300 add.w r3, r3, #8192 @ 0x2000
800b150: 6eda ldr r2, [r3, #108] @ 0x6c
800b152: 68fb ldr r3, [r7, #12]
800b154: f503 5300 add.w r3, r3, #8192 @ 0x2000
800b158: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
800b15c: 4619 mov r1, r3
800b15e: 68bb ldr r3, [r7, #8]
800b160: fbb3 f3f1 udiv r3, r3, r1
800b164: 4413 add r3, r2
800b166: 68fa ldr r2, [r7, #12]
800b168: f502 5200 add.w r2, r2, #8192 @ 0x2000
800b16c: 66d3 str r3, [r2, #108] @ 0x6c
hmsc->scsi_blk_len -= (len / hmsc->scsi_blk_size);
800b16e: 68fb ldr r3, [r7, #12]
800b170: f503 5300 add.w r3, r3, #8192 @ 0x2000
800b174: 6f1a ldr r2, [r3, #112] @ 0x70
800b176: 68fb ldr r3, [r7, #12]
800b178: f503 5300 add.w r3, r3, #8192 @ 0x2000
800b17c: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
800b180: 4619 mov r1, r3
800b182: 68bb ldr r3, [r7, #8]
800b184: fbb3 f3f1 udiv r3, r3, r1
800b188: 1ad3 subs r3, r2, r3
800b18a: 68fa ldr r2, [r7, #12]
800b18c: f502 5200 add.w r2, r2, #8192 @ 0x2000
800b190: 6713 str r3, [r2, #112] @ 0x70
/* case 12 : Ho = Do */
hmsc->csw.dDataResidue -= len;
800b192: 68fb ldr r3, [r7, #12]
800b194: f503 5300 add.w r3, r3, #8192 @ 0x2000
800b198: 6b9a ldr r2, [r3, #56] @ 0x38
800b19a: 68bb ldr r3, [r7, #8]
800b19c: 1ad3 subs r3, r2, r3
800b19e: 68fa ldr r2, [r7, #12]
800b1a0: f502 5200 add.w r2, r2, #8192 @ 0x2000
800b1a4: 6393 str r3, [r2, #56] @ 0x38
if (hmsc->scsi_blk_len == 0U)
800b1a6: 68fb ldr r3, [r7, #12]
800b1a8: f503 5300 add.w r3, r3, #8192 @ 0x2000
800b1ac: 6f1b ldr r3, [r3, #112] @ 0x70
800b1ae: 2b00 cmp r3, #0
800b1b0: d104 bne.n 800b1bc <SCSI_ProcessWrite+0x110>
{
MSC_BOT_SendCSW(pdev, USBD_CSW_CMD_PASSED);
800b1b2: 2100 movs r1, #0
800b1b4: 6878 ldr r0, [r7, #4]
800b1b6: f7fe fc27 bl 8009a08 <MSC_BOT_SendCSW>
800b1ba: e019 b.n 800b1f0 <SCSI_ProcessWrite+0x144>
}
else
{
len = MIN((hmsc->scsi_blk_len * hmsc->scsi_blk_size), MSC_MEDIA_PACKET);
800b1bc: 68fb ldr r3, [r7, #12]
800b1be: f503 5300 add.w r3, r3, #8192 @ 0x2000
800b1c2: 6f1b ldr r3, [r3, #112] @ 0x70
800b1c4: 68fa ldr r2, [r7, #12]
800b1c6: f502 5200 add.w r2, r2, #8192 @ 0x2000
800b1ca: f8b2 2064 ldrh.w r2, [r2, #100] @ 0x64
800b1ce: fb02 f303 mul.w r3, r2, r3
800b1d2: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
800b1d6: bf28 it cs
800b1d8: f44f 5300 movcs.w r3, #8192 @ 0x2000
800b1dc: 60bb str r3, [r7, #8]
/* Prepare EP to Receive next packet */
(void)USBD_LL_PrepareReceive(pdev, MSCOutEpAdd, hmsc->bot_data, len);
800b1de: 4b07 ldr r3, [pc, #28] @ (800b1fc <SCSI_ProcessWrite+0x150>)
800b1e0: 7819 ldrb r1, [r3, #0]
800b1e2: 68fb ldr r3, [r7, #12]
800b1e4: f103 0210 add.w r2, r3, #16
800b1e8: 68bb ldr r3, [r7, #8]
800b1ea: 6878 ldr r0, [r7, #4]
800b1ec: f007 fe57 bl 8012e9e <USBD_LL_PrepareReceive>
}
return 0;
800b1f0: 2300 movs r3, #0
}
800b1f2: 4618 mov r0, r3
800b1f4: 3714 adds r7, #20
800b1f6: 46bd mov sp, r7
800b1f8: bd90 pop {r4, r7, pc}
800b1fa: bf00 nop
800b1fc: 20000083 .word 0x20000083
0800b200 <SCSI_UpdateBotData>:
* @param length: Data length
* @retval status
*/
static int8_t SCSI_UpdateBotData(USBD_MSC_BOT_HandleTypeDef *hmsc,
uint8_t *pBuff, uint16_t length)
{
800b200: b480 push {r7}
800b202: b087 sub sp, #28
800b204: af00 add r7, sp, #0
800b206: 60f8 str r0, [r7, #12]
800b208: 60b9 str r1, [r7, #8]
800b20a: 4613 mov r3, r2
800b20c: 80fb strh r3, [r7, #6]
uint16_t len = length;
800b20e: 88fb ldrh r3, [r7, #6]
800b210: 82fb strh r3, [r7, #22]
if (hmsc == NULL)
800b212: 68fb ldr r3, [r7, #12]
800b214: 2b00 cmp r3, #0
800b216: d102 bne.n 800b21e <SCSI_UpdateBotData+0x1e>
{
return -1;
800b218: f04f 33ff mov.w r3, #4294967295
800b21c: e013 b.n 800b246 <SCSI_UpdateBotData+0x46>
}
hmsc->bot_data_length = len;
800b21e: 8afa ldrh r2, [r7, #22]
800b220: 68fb ldr r3, [r7, #12]
800b222: 60da str r2, [r3, #12]
while (len != 0U)
800b224: e00b b.n 800b23e <SCSI_UpdateBotData+0x3e>
{
len--;
800b226: 8afb ldrh r3, [r7, #22]
800b228: 3b01 subs r3, #1
800b22a: 82fb strh r3, [r7, #22]
hmsc->bot_data[len] = pBuff[len];
800b22c: 8afb ldrh r3, [r7, #22]
800b22e: 68ba ldr r2, [r7, #8]
800b230: 441a add r2, r3
800b232: 8afb ldrh r3, [r7, #22]
800b234: 7811 ldrb r1, [r2, #0]
800b236: 68fa ldr r2, [r7, #12]
800b238: 4413 add r3, r2
800b23a: 460a mov r2, r1
800b23c: 741a strb r2, [r3, #16]
while (len != 0U)
800b23e: 8afb ldrh r3, [r7, #22]
800b240: 2b00 cmp r3, #0
800b242: d1f0 bne.n 800b226 <SCSI_UpdateBotData+0x26>
}
return 0;
800b244: 2300 movs r3, #0
}
800b246: 4618 mov r0, r3
800b248: 371c adds r7, #28
800b24a: 46bd mov sp, r7
800b24c: f85d 7b04 ldr.w r7, [sp], #4
800b250: 4770 bx lr
0800b252 <USBD_Init>:
* @param id: Low level core index
* @retval status: USBD Status
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
800b252: b580 push {r7, lr}
800b254: b086 sub sp, #24
800b256: af00 add r7, sp, #0
800b258: 60f8 str r0, [r7, #12]
800b25a: 60b9 str r1, [r7, #8]
800b25c: 4613 mov r3, r2
800b25e: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef ret;
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
800b260: 68fb ldr r3, [r7, #12]
800b262: 2b00 cmp r3, #0
800b264: d101 bne.n 800b26a <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif /* (USBD_DEBUG_LEVEL > 1U) */
return USBD_FAIL;
800b266: 2303 movs r3, #3
800b268: e01f b.n 800b2aa <USBD_Init+0x58>
pdev->NumClasses = 0;
pdev->classId = 0;
}
#else
/* Unlink previous class*/
pdev->pClass[0] = NULL;
800b26a: 68fb ldr r3, [r7, #12]
800b26c: 2200 movs r2, #0
800b26e: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
pdev->pUserData[0] = NULL;
800b272: 68fb ldr r3, [r7, #12]
800b274: 2200 movs r2, #0
800b276: f8c3 22c4 str.w r2, [r3, #708] @ 0x2c4
#endif /* USE_USBD_COMPOSITE */
pdev->pConfDesc = NULL;
800b27a: 68fb ldr r3, [r7, #12]
800b27c: 2200 movs r2, #0
800b27e: f8c3 22d0 str.w r2, [r3, #720] @ 0x2d0
/* Assign USBD Descriptors */
if (pdesc != NULL)
800b282: 68bb ldr r3, [r7, #8]
800b284: 2b00 cmp r3, #0
800b286: d003 beq.n 800b290 <USBD_Init+0x3e>
{
pdev->pDesc = pdesc;
800b288: 68fb ldr r3, [r7, #12]
800b28a: 68ba ldr r2, [r7, #8]
800b28c: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
800b290: 68fb ldr r3, [r7, #12]
800b292: 2201 movs r2, #1
800b294: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->id = id;
800b298: 68fb ldr r3, [r7, #12]
800b29a: 79fa ldrb r2, [r7, #7]
800b29c: 701a strb r2, [r3, #0]
/* Initialize low level driver */
ret = USBD_LL_Init(pdev);
800b29e: 68f8 ldr r0, [r7, #12]
800b2a0: f007 fc4e bl 8012b40 <USBD_LL_Init>
800b2a4: 4603 mov r3, r0
800b2a6: 75fb strb r3, [r7, #23]
return ret;
800b2a8: 7dfb ldrb r3, [r7, #23]
}
800b2aa: 4618 mov r0, r3
800b2ac: 3718 adds r7, #24
800b2ae: 46bd mov sp, r7
800b2b0: bd80 pop {r7, pc}
0800b2b2 <USBD_DeInit>:
* De-Initialize the device library
* @param pdev: device instance
* @retval status: USBD Status
*/
USBD_StatusTypeDef USBD_DeInit(USBD_HandleTypeDef *pdev)
{
800b2b2: b580 push {r7, lr}
800b2b4: b084 sub sp, #16
800b2b6: af00 add r7, sp, #0
800b2b8: 6078 str r0, [r7, #4]
USBD_StatusTypeDef ret;
/* Disconnect the USB Device */
(void)USBD_LL_Stop(pdev);
800b2ba: 6878 ldr r0, [r7, #4]
800b2bc: f007 fcc6 bl 8012c4c <USBD_LL_Stop>
/* Set Default State */
pdev->dev_state = USBD_STATE_DEFAULT;
800b2c0: 687b ldr r3, [r7, #4]
800b2c2: 2201 movs r2, #1
800b2c4: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
}
}
#else
/* Free Class Resources */
if (pdev->pClass[0] != NULL)
800b2c8: 687b ldr r3, [r7, #4]
800b2ca: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b2ce: 2b00 cmp r3, #0
800b2d0: d009 beq.n 800b2e6 <USBD_DeInit+0x34>
{
pdev->pClass[0]->DeInit(pdev, (uint8_t)pdev->dev_config);
800b2d2: 687b ldr r3, [r7, #4]
800b2d4: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b2d8: 685b ldr r3, [r3, #4]
800b2da: 687a ldr r2, [r7, #4]
800b2dc: 6852 ldr r2, [r2, #4]
800b2de: b2d2 uxtb r2, r2
800b2e0: 4611 mov r1, r2
800b2e2: 6878 ldr r0, [r7, #4]
800b2e4: 4798 blx r3
}
pdev->pUserData[0] = NULL;
800b2e6: 687b ldr r3, [r7, #4]
800b2e8: 2200 movs r2, #0
800b2ea: f8c3 22c4 str.w r2, [r3, #708] @ 0x2c4
#endif /* USE_USBD_COMPOSITE */
/* Free Device descriptors resources */
pdev->pDesc = NULL;
800b2ee: 687b ldr r3, [r7, #4]
800b2f0: 2200 movs r2, #0
800b2f2: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
pdev->pConfDesc = NULL;
800b2f6: 687b ldr r3, [r7, #4]
800b2f8: 2200 movs r2, #0
800b2fa: f8c3 22d0 str.w r2, [r3, #720] @ 0x2d0
/* DeInitialize low level driver */
ret = USBD_LL_DeInit(pdev);
800b2fe: 6878 ldr r0, [r7, #4]
800b300: f007 fc6e bl 8012be0 <USBD_LL_DeInit>
800b304: 4603 mov r3, r0
800b306: 73fb strb r3, [r7, #15]
return ret;
800b308: 7bfb ldrb r3, [r7, #15]
}
800b30a: 4618 mov r0, r3
800b30c: 3710 adds r7, #16
800b30e: 46bd mov sp, r7
800b310: bd80 pop {r7, pc}
0800b312 <USBD_RegisterClass>:
* @param pdev: Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
800b312: b580 push {r7, lr}
800b314: b084 sub sp, #16
800b316: af00 add r7, sp, #0
800b318: 6078 str r0, [r7, #4]
800b31a: 6039 str r1, [r7, #0]
uint16_t len = 0U;
800b31c: 2300 movs r3, #0
800b31e: 81fb strh r3, [r7, #14]
if (pclass == NULL)
800b320: 683b ldr r3, [r7, #0]
800b322: 2b00 cmp r3, #0
800b324: d101 bne.n 800b32a <USBD_RegisterClass+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif /* (USBD_DEBUG_LEVEL > 1U) */
return USBD_FAIL;
800b326: 2303 movs r3, #3
800b328: e025 b.n 800b376 <USBD_RegisterClass+0x64>
}
/* link the class to the USB Device handle */
pdev->pClass[0] = pclass;
800b32a: 687b ldr r3, [r7, #4]
800b32c: 683a ldr r2, [r7, #0]
800b32e: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
if (pdev->pClass[pdev->classId]->GetHSConfigDescriptor != NULL)
{
pdev->pConfDesc = (void *)pdev->pClass[pdev->classId]->GetHSConfigDescriptor(&len);
}
#else /* Default USE_USB_FS */
if (pdev->pClass[pdev->classId]->GetFSConfigDescriptor != NULL)
800b332: 687b ldr r3, [r7, #4]
800b334: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800b338: 687b ldr r3, [r7, #4]
800b33a: 32ae adds r2, #174 @ 0xae
800b33c: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800b340: 6adb ldr r3, [r3, #44] @ 0x2c
800b342: 2b00 cmp r3, #0
800b344: d00f beq.n 800b366 <USBD_RegisterClass+0x54>
{
pdev->pConfDesc = (void *)pdev->pClass[pdev->classId]->GetFSConfigDescriptor(&len);
800b346: 687b ldr r3, [r7, #4]
800b348: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800b34c: 687b ldr r3, [r7, #4]
800b34e: 32ae adds r2, #174 @ 0xae
800b350: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800b354: 6adb ldr r3, [r3, #44] @ 0x2c
800b356: f107 020e add.w r2, r7, #14
800b35a: 4610 mov r0, r2
800b35c: 4798 blx r3
800b35e: 4602 mov r2, r0
800b360: 687b ldr r3, [r7, #4]
800b362: f8c3 22d0 str.w r2, [r3, #720] @ 0x2d0
}
#endif /* USE_USB_FS */
/* Increment the NumClasses */
pdev->NumClasses++;
800b366: 687b ldr r3, [r7, #4]
800b368: f8d3 32d8 ldr.w r3, [r3, #728] @ 0x2d8
800b36c: 1c5a adds r2, r3, #1
800b36e: 687b ldr r3, [r7, #4]
800b370: f8c3 22d8 str.w r2, [r3, #728] @ 0x2d8
return USBD_OK;
800b374: 2300 movs r3, #0
}
800b376: 4618 mov r0, r3
800b378: 3710 adds r7, #16
800b37a: 46bd mov sp, r7
800b37c: bd80 pop {r7, pc}
0800b37e <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
800b37e: b580 push {r7, lr}
800b380: b082 sub sp, #8
800b382: af00 add r7, sp, #0
800b384: 6078 str r0, [r7, #4]
#ifdef USE_USBD_COMPOSITE
pdev->classId = 0U;
#endif /* USE_USBD_COMPOSITE */
/* Start the low level driver */
return USBD_LL_Start(pdev);
800b386: 6878 ldr r0, [r7, #4]
800b388: f007 fc45 bl 8012c16 <USBD_LL_Start>
800b38c: 4603 mov r3, r0
}
800b38e: 4618 mov r0, r3
800b390: 3708 adds r7, #8
800b392: 46bd mov sp, r7
800b394: bd80 pop {r7, pc}
0800b396 <USBD_Stop>:
* Stop the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Stop(USBD_HandleTypeDef *pdev)
{
800b396: b580 push {r7, lr}
800b398: b082 sub sp, #8
800b39a: af00 add r7, sp, #0
800b39c: 6078 str r0, [r7, #4]
/* Disconnect USB Device */
(void)USBD_LL_Stop(pdev);
800b39e: 6878 ldr r0, [r7, #4]
800b3a0: f007 fc54 bl 8012c4c <USBD_LL_Stop>
}
/* Reset the class ID */
pdev->classId = 0U;
#else
if (pdev->pClass[0] != NULL)
800b3a4: 687b ldr r3, [r7, #4]
800b3a6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b3aa: 2b00 cmp r3, #0
800b3ac: d009 beq.n 800b3c2 <USBD_Stop+0x2c>
{
(void)pdev->pClass[0]->DeInit(pdev, (uint8_t)pdev->dev_config);
800b3ae: 687b ldr r3, [r7, #4]
800b3b0: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b3b4: 685b ldr r3, [r3, #4]
800b3b6: 687a ldr r2, [r7, #4]
800b3b8: 6852 ldr r2, [r2, #4]
800b3ba: b2d2 uxtb r2, r2
800b3bc: 4611 mov r1, r2
800b3be: 6878 ldr r0, [r7, #4]
800b3c0: 4798 blx r3
}
#endif /* USE_USBD_COMPOSITE */
return USBD_OK;
800b3c2: 2300 movs r3, #0
}
800b3c4: 4618 mov r0, r3
800b3c6: 3708 adds r7, #8
800b3c8: 46bd mov sp, r7
800b3ca: bd80 pop {r7, pc}
0800b3cc <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
800b3cc: b480 push {r7}
800b3ce: b083 sub sp, #12
800b3d0: af00 add r7, sp, #0
800b3d2: 6078 str r0, [r7, #4]
return ret;
#else
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
800b3d4: 2300 movs r3, #0
#endif /* USBD_HS_TESTMODE_ENABLE */
}
800b3d6: 4618 mov r0, r3
800b3d8: 370c adds r7, #12
800b3da: 46bd mov sp, r7
800b3dc: f85d 7b04 ldr.w r7, [sp], #4
800b3e0: 4770 bx lr
0800b3e2 <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800b3e2: b580 push {r7, lr}
800b3e4: b084 sub sp, #16
800b3e6: af00 add r7, sp, #0
800b3e8: 6078 str r0, [r7, #4]
800b3ea: 460b mov r3, r1
800b3ec: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_OK;
800b3ee: 2300 movs r3, #0
800b3f0: 73fb strb r3, [r7, #15]
}
}
}
}
#else
if (pdev->pClass[0] != NULL)
800b3f2: 687b ldr r3, [r7, #4]
800b3f4: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b3f8: 2b00 cmp r3, #0
800b3fa: d009 beq.n 800b410 <USBD_SetClassConfig+0x2e>
{
/* Set configuration and Start the Class */
ret = (USBD_StatusTypeDef)pdev->pClass[0]->Init(pdev, cfgidx);
800b3fc: 687b ldr r3, [r7, #4]
800b3fe: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b402: 681b ldr r3, [r3, #0]
800b404: 78fa ldrb r2, [r7, #3]
800b406: 4611 mov r1, r2
800b408: 6878 ldr r0, [r7, #4]
800b40a: 4798 blx r3
800b40c: 4603 mov r3, r0
800b40e: 73fb strb r3, [r7, #15]
}
#endif /* USE_USBD_COMPOSITE */
return ret;
800b410: 7bfb ldrb r3, [r7, #15]
}
800b412: 4618 mov r0, r3
800b414: 3710 adds r7, #16
800b416: 46bd mov sp, r7
800b418: bd80 pop {r7, pc}
0800b41a <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800b41a: b580 push {r7, lr}
800b41c: b084 sub sp, #16
800b41e: af00 add r7, sp, #0
800b420: 6078 str r0, [r7, #4]
800b422: 460b mov r3, r1
800b424: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_OK;
800b426: 2300 movs r3, #0
800b428: 73fb strb r3, [r7, #15]
}
}
}
#else
/* Clear configuration and De-initialize the Class process */
if (pdev->pClass[0]->DeInit(pdev, cfgidx) != 0U)
800b42a: 687b ldr r3, [r7, #4]
800b42c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b430: 685b ldr r3, [r3, #4]
800b432: 78fa ldrb r2, [r7, #3]
800b434: 4611 mov r1, r2
800b436: 6878 ldr r0, [r7, #4]
800b438: 4798 blx r3
800b43a: 4603 mov r3, r0
800b43c: 2b00 cmp r3, #0
800b43e: d001 beq.n 800b444 <USBD_ClrClassConfig+0x2a>
{
ret = USBD_FAIL;
800b440: 2303 movs r3, #3
800b442: 73fb strb r3, [r7, #15]
}
#endif /* USE_USBD_COMPOSITE */
return ret;
800b444: 7bfb ldrb r3, [r7, #15]
}
800b446: 4618 mov r0, r3
800b448: 3710 adds r7, #16
800b44a: 46bd mov sp, r7
800b44c: bd80 pop {r7, pc}
0800b44e <USBD_LL_SetupStage>:
* @param pdev: device instance
* @param psetup: setup packet buffer pointer
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
800b44e: b580 push {r7, lr}
800b450: b084 sub sp, #16
800b452: af00 add r7, sp, #0
800b454: 6078 str r0, [r7, #4]
800b456: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret;
USBD_ParseSetupRequest(&pdev->request, psetup);
800b458: 687b ldr r3, [r7, #4]
800b45a: f203 23aa addw r3, r3, #682 @ 0x2aa
800b45e: 6839 ldr r1, [r7, #0]
800b460: 4618 mov r0, r3
800b462: f001 f90c bl 800c67e <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
800b466: 687b ldr r3, [r7, #4]
800b468: 2201 movs r2, #1
800b46a: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep0_data_len = pdev->request.wLength;
800b46e: 687b ldr r3, [r7, #4]
800b470: f8b3 32b0 ldrh.w r3, [r3, #688] @ 0x2b0
800b474: 461a mov r2, r3
800b476: 687b ldr r3, [r7, #4]
800b478: f8c3 2298 str.w r2, [r3, #664] @ 0x298
switch (pdev->request.bmRequest & 0x1FU)
800b47c: 687b ldr r3, [r7, #4]
800b47e: f893 32aa ldrb.w r3, [r3, #682] @ 0x2aa
800b482: f003 031f and.w r3, r3, #31
800b486: 2b02 cmp r3, #2
800b488: d01a beq.n 800b4c0 <USBD_LL_SetupStage+0x72>
800b48a: 2b02 cmp r3, #2
800b48c: d822 bhi.n 800b4d4 <USBD_LL_SetupStage+0x86>
800b48e: 2b00 cmp r3, #0
800b490: d002 beq.n 800b498 <USBD_LL_SetupStage+0x4a>
800b492: 2b01 cmp r3, #1
800b494: d00a beq.n 800b4ac <USBD_LL_SetupStage+0x5e>
800b496: e01d b.n 800b4d4 <USBD_LL_SetupStage+0x86>
{
case USB_REQ_RECIPIENT_DEVICE:
ret = USBD_StdDevReq(pdev, &pdev->request);
800b498: 687b ldr r3, [r7, #4]
800b49a: f203 23aa addw r3, r3, #682 @ 0x2aa
800b49e: 4619 mov r1, r3
800b4a0: 6878 ldr r0, [r7, #4]
800b4a2: f000 fb63 bl 800bb6c <USBD_StdDevReq>
800b4a6: 4603 mov r3, r0
800b4a8: 73fb strb r3, [r7, #15]
break;
800b4aa: e020 b.n 800b4ee <USBD_LL_SetupStage+0xa0>
case USB_REQ_RECIPIENT_INTERFACE:
ret = USBD_StdItfReq(pdev, &pdev->request);
800b4ac: 687b ldr r3, [r7, #4]
800b4ae: f203 23aa addw r3, r3, #682 @ 0x2aa
800b4b2: 4619 mov r1, r3
800b4b4: 6878 ldr r0, [r7, #4]
800b4b6: f000 fbcb bl 800bc50 <USBD_StdItfReq>
800b4ba: 4603 mov r3, r0
800b4bc: 73fb strb r3, [r7, #15]
break;
800b4be: e016 b.n 800b4ee <USBD_LL_SetupStage+0xa0>
case USB_REQ_RECIPIENT_ENDPOINT:
ret = USBD_StdEPReq(pdev, &pdev->request);
800b4c0: 687b ldr r3, [r7, #4]
800b4c2: f203 23aa addw r3, r3, #682 @ 0x2aa
800b4c6: 4619 mov r1, r3
800b4c8: 6878 ldr r0, [r7, #4]
800b4ca: f000 fc2d bl 800bd28 <USBD_StdEPReq>
800b4ce: 4603 mov r3, r0
800b4d0: 73fb strb r3, [r7, #15]
break;
800b4d2: e00c b.n 800b4ee <USBD_LL_SetupStage+0xa0>
default:
ret = USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
800b4d4: 687b ldr r3, [r7, #4]
800b4d6: f893 32aa ldrb.w r3, [r3, #682] @ 0x2aa
800b4da: f023 037f bic.w r3, r3, #127 @ 0x7f
800b4de: b2db uxtb r3, r3
800b4e0: 4619 mov r1, r3
800b4e2: 6878 ldr r0, [r7, #4]
800b4e4: f007 fc31 bl 8012d4a <USBD_LL_StallEP>
800b4e8: 4603 mov r3, r0
800b4ea: 73fb strb r3, [r7, #15]
break;
800b4ec: bf00 nop
}
return ret;
800b4ee: 7bfb ldrb r3, [r7, #15]
}
800b4f0: 4618 mov r0, r3
800b4f2: 3710 adds r7, #16
800b4f4: 46bd mov sp, r7
800b4f6: bd80 pop {r7, pc}
0800b4f8 <USBD_LL_DataOutStage>:
* @param pdata: data pointer
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800b4f8: b580 push {r7, lr}
800b4fa: b086 sub sp, #24
800b4fc: af00 add r7, sp, #0
800b4fe: 60f8 str r0, [r7, #12]
800b500: 460b mov r3, r1
800b502: 607a str r2, [r7, #4]
800b504: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
USBD_StatusTypeDef ret = USBD_OK;
800b506: 2300 movs r3, #0
800b508: 75fb strb r3, [r7, #23]
uint8_t idx;
if (epnum == 0U)
800b50a: 7afb ldrb r3, [r7, #11]
800b50c: 2b00 cmp r3, #0
800b50e: d16e bne.n 800b5ee <USBD_LL_DataOutStage+0xf6>
{
pep = &pdev->ep_out[0];
800b510: 68fb ldr r3, [r7, #12]
800b512: f503 73aa add.w r3, r3, #340 @ 0x154
800b516: 613b str r3, [r7, #16]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
800b518: 68fb ldr r3, [r7, #12]
800b51a: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800b51e: 2b03 cmp r3, #3
800b520: f040 8098 bne.w 800b654 <USBD_LL_DataOutStage+0x15c>
{
if (pep->rem_length > pep->maxpacket)
800b524: 693b ldr r3, [r7, #16]
800b526: 689a ldr r2, [r3, #8]
800b528: 693b ldr r3, [r7, #16]
800b52a: 68db ldr r3, [r3, #12]
800b52c: 429a cmp r2, r3
800b52e: d913 bls.n 800b558 <USBD_LL_DataOutStage+0x60>
{
pep->rem_length -= pep->maxpacket;
800b530: 693b ldr r3, [r7, #16]
800b532: 689a ldr r2, [r3, #8]
800b534: 693b ldr r3, [r7, #16]
800b536: 68db ldr r3, [r3, #12]
800b538: 1ad2 subs r2, r2, r3
800b53a: 693b ldr r3, [r7, #16]
800b53c: 609a str r2, [r3, #8]
(void)USBD_CtlContinueRx(pdev, pdata, MIN(pep->rem_length, pep->maxpacket));
800b53e: 693b ldr r3, [r7, #16]
800b540: 68da ldr r2, [r3, #12]
800b542: 693b ldr r3, [r7, #16]
800b544: 689b ldr r3, [r3, #8]
800b546: 4293 cmp r3, r2
800b548: bf28 it cs
800b54a: 4613 movcs r3, r2
800b54c: 461a mov r2, r3
800b54e: 6879 ldr r1, [r7, #4]
800b550: 68f8 ldr r0, [r7, #12]
800b552: f001 f977 bl 800c844 <USBD_CtlContinueRx>
800b556: e07d b.n 800b654 <USBD_LL_DataOutStage+0x15c>
}
else
{
/* Find the class ID relative to the current request */
switch (pdev->request.bmRequest & 0x1FU)
800b558: 68fb ldr r3, [r7, #12]
800b55a: f893 32aa ldrb.w r3, [r3, #682] @ 0x2aa
800b55e: f003 031f and.w r3, r3, #31
800b562: 2b02 cmp r3, #2
800b564: d014 beq.n 800b590 <USBD_LL_DataOutStage+0x98>
800b566: 2b02 cmp r3, #2
800b568: d81d bhi.n 800b5a6 <USBD_LL_DataOutStage+0xae>
800b56a: 2b00 cmp r3, #0
800b56c: d002 beq.n 800b574 <USBD_LL_DataOutStage+0x7c>
800b56e: 2b01 cmp r3, #1
800b570: d003 beq.n 800b57a <USBD_LL_DataOutStage+0x82>
800b572: e018 b.n 800b5a6 <USBD_LL_DataOutStage+0xae>
{
case USB_REQ_RECIPIENT_DEVICE:
/* Device requests must be managed by the first instantiated class
(or duplicated by all classes for simplicity) */
idx = 0U;
800b574: 2300 movs r3, #0
800b576: 75bb strb r3, [r7, #22]
break;
800b578: e018 b.n 800b5ac <USBD_LL_DataOutStage+0xb4>
case USB_REQ_RECIPIENT_INTERFACE:
idx = USBD_CoreFindIF(pdev, LOBYTE(pdev->request.wIndex));
800b57a: 68fb ldr r3, [r7, #12]
800b57c: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
800b580: b2db uxtb r3, r3
800b582: 4619 mov r1, r3
800b584: 68f8 ldr r0, [r7, #12]
800b586: f000 fa64 bl 800ba52 <USBD_CoreFindIF>
800b58a: 4603 mov r3, r0
800b58c: 75bb strb r3, [r7, #22]
break;
800b58e: e00d b.n 800b5ac <USBD_LL_DataOutStage+0xb4>
case USB_REQ_RECIPIENT_ENDPOINT:
idx = USBD_CoreFindEP(pdev, LOBYTE(pdev->request.wIndex));
800b590: 68fb ldr r3, [r7, #12]
800b592: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
800b596: b2db uxtb r3, r3
800b598: 4619 mov r1, r3
800b59a: 68f8 ldr r0, [r7, #12]
800b59c: f000 fa66 bl 800ba6c <USBD_CoreFindEP>
800b5a0: 4603 mov r3, r0
800b5a2: 75bb strb r3, [r7, #22]
break;
800b5a4: e002 b.n 800b5ac <USBD_LL_DataOutStage+0xb4>
default:
/* Back to the first class in case of doubt */
idx = 0U;
800b5a6: 2300 movs r3, #0
800b5a8: 75bb strb r3, [r7, #22]
break;
800b5aa: bf00 nop
}
if (idx < USBD_MAX_SUPPORTED_CLASS)
800b5ac: 7dbb ldrb r3, [r7, #22]
800b5ae: 2b00 cmp r3, #0
800b5b0: d119 bne.n 800b5e6 <USBD_LL_DataOutStage+0xee>
{
/* Setup the class ID and route the request to the relative class function */
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800b5b2: 68fb ldr r3, [r7, #12]
800b5b4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b5b8: b2db uxtb r3, r3
800b5ba: 2b03 cmp r3, #3
800b5bc: d113 bne.n 800b5e6 <USBD_LL_DataOutStage+0xee>
{
if (pdev->pClass[idx]->EP0_RxReady != NULL)
800b5be: 7dba ldrb r2, [r7, #22]
800b5c0: 68fb ldr r3, [r7, #12]
800b5c2: 32ae adds r2, #174 @ 0xae
800b5c4: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800b5c8: 691b ldr r3, [r3, #16]
800b5ca: 2b00 cmp r3, #0
800b5cc: d00b beq.n 800b5e6 <USBD_LL_DataOutStage+0xee>
{
pdev->classId = idx;
800b5ce: 7dba ldrb r2, [r7, #22]
800b5d0: 68fb ldr r3, [r7, #12]
800b5d2: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4
pdev->pClass[idx]->EP0_RxReady(pdev);
800b5d6: 7dba ldrb r2, [r7, #22]
800b5d8: 68fb ldr r3, [r7, #12]
800b5da: 32ae adds r2, #174 @ 0xae
800b5dc: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800b5e0: 691b ldr r3, [r3, #16]
800b5e2: 68f8 ldr r0, [r7, #12]
800b5e4: 4798 blx r3
}
}
}
(void)USBD_CtlSendStatus(pdev);
800b5e6: 68f8 ldr r0, [r7, #12]
800b5e8: f001 f93d bl 800c866 <USBD_CtlSendStatus>
800b5ec: e032 b.n 800b654 <USBD_LL_DataOutStage+0x15c>
}
}
else
{
/* Get the class index relative to this interface */
idx = USBD_CoreFindEP(pdev, (epnum & 0x7FU));
800b5ee: 7afb ldrb r3, [r7, #11]
800b5f0: f003 037f and.w r3, r3, #127 @ 0x7f
800b5f4: b2db uxtb r3, r3
800b5f6: 4619 mov r1, r3
800b5f8: 68f8 ldr r0, [r7, #12]
800b5fa: f000 fa37 bl 800ba6c <USBD_CoreFindEP>
800b5fe: 4603 mov r3, r0
800b600: 75bb strb r3, [r7, #22]
if (((uint16_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS))
800b602: 7dbb ldrb r3, [r7, #22]
800b604: 2bff cmp r3, #255 @ 0xff
800b606: d025 beq.n 800b654 <USBD_LL_DataOutStage+0x15c>
800b608: 7dbb ldrb r3, [r7, #22]
800b60a: 2b00 cmp r3, #0
800b60c: d122 bne.n 800b654 <USBD_LL_DataOutStage+0x15c>
{
/* Call the class data out function to manage the request */
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800b60e: 68fb ldr r3, [r7, #12]
800b610: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b614: b2db uxtb r3, r3
800b616: 2b03 cmp r3, #3
800b618: d117 bne.n 800b64a <USBD_LL_DataOutStage+0x152>
{
if (pdev->pClass[idx]->DataOut != NULL)
800b61a: 7dba ldrb r2, [r7, #22]
800b61c: 68fb ldr r3, [r7, #12]
800b61e: 32ae adds r2, #174 @ 0xae
800b620: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800b624: 699b ldr r3, [r3, #24]
800b626: 2b00 cmp r3, #0
800b628: d00f beq.n 800b64a <USBD_LL_DataOutStage+0x152>
{
pdev->classId = idx;
800b62a: 7dba ldrb r2, [r7, #22]
800b62c: 68fb ldr r3, [r7, #12]
800b62e: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4
ret = (USBD_StatusTypeDef)pdev->pClass[idx]->DataOut(pdev, epnum);
800b632: 7dba ldrb r2, [r7, #22]
800b634: 68fb ldr r3, [r7, #12]
800b636: 32ae adds r2, #174 @ 0xae
800b638: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800b63c: 699b ldr r3, [r3, #24]
800b63e: 7afa ldrb r2, [r7, #11]
800b640: 4611 mov r1, r2
800b642: 68f8 ldr r0, [r7, #12]
800b644: 4798 blx r3
800b646: 4603 mov r3, r0
800b648: 75fb strb r3, [r7, #23]
}
}
if (ret != USBD_OK)
800b64a: 7dfb ldrb r3, [r7, #23]
800b64c: 2b00 cmp r3, #0
800b64e: d001 beq.n 800b654 <USBD_LL_DataOutStage+0x15c>
{
return ret;
800b650: 7dfb ldrb r3, [r7, #23]
800b652: e000 b.n 800b656 <USBD_LL_DataOutStage+0x15e>
}
}
}
return USBD_OK;
800b654: 2300 movs r3, #0
}
800b656: 4618 mov r0, r3
800b658: 3718 adds r7, #24
800b65a: 46bd mov sp, r7
800b65c: bd80 pop {r7, pc}
0800b65e <USBD_LL_DataInStage>:
* @param pdata: data pointer
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800b65e: b580 push {r7, lr}
800b660: b086 sub sp, #24
800b662: af00 add r7, sp, #0
800b664: 60f8 str r0, [r7, #12]
800b666: 460b mov r3, r1
800b668: 607a str r2, [r7, #4]
800b66a: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
USBD_StatusTypeDef ret;
uint8_t idx;
if (epnum == 0U)
800b66c: 7afb ldrb r3, [r7, #11]
800b66e: 2b00 cmp r3, #0
800b670: d16f bne.n 800b752 <USBD_LL_DataInStage+0xf4>
{
pep = &pdev->ep_in[0];
800b672: 68fb ldr r3, [r7, #12]
800b674: 3314 adds r3, #20
800b676: 613b str r3, [r7, #16]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
800b678: 68fb ldr r3, [r7, #12]
800b67a: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800b67e: 2b02 cmp r3, #2
800b680: d15a bne.n 800b738 <USBD_LL_DataInStage+0xda>
{
if (pep->rem_length > pep->maxpacket)
800b682: 693b ldr r3, [r7, #16]
800b684: 689a ldr r2, [r3, #8]
800b686: 693b ldr r3, [r7, #16]
800b688: 68db ldr r3, [r3, #12]
800b68a: 429a cmp r2, r3
800b68c: d914 bls.n 800b6b8 <USBD_LL_DataInStage+0x5a>
{
pep->rem_length -= pep->maxpacket;
800b68e: 693b ldr r3, [r7, #16]
800b690: 689a ldr r2, [r3, #8]
800b692: 693b ldr r3, [r7, #16]
800b694: 68db ldr r3, [r3, #12]
800b696: 1ad2 subs r2, r2, r3
800b698: 693b ldr r3, [r7, #16]
800b69a: 609a str r2, [r3, #8]
(void)USBD_CtlContinueSendData(pdev, pdata, pep->rem_length);
800b69c: 693b ldr r3, [r7, #16]
800b69e: 689b ldr r3, [r3, #8]
800b6a0: 461a mov r2, r3
800b6a2: 6879 ldr r1, [r7, #4]
800b6a4: 68f8 ldr r0, [r7, #12]
800b6a6: f001 f8bc bl 800c822 <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
(void)USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800b6aa: 2300 movs r3, #0
800b6ac: 2200 movs r2, #0
800b6ae: 2100 movs r1, #0
800b6b0: 68f8 ldr r0, [r7, #12]
800b6b2: f007 fbf4 bl 8012e9e <USBD_LL_PrepareReceive>
800b6b6: e03f b.n 800b738 <USBD_LL_DataInStage+0xda>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->maxpacket == pep->rem_length) &&
800b6b8: 693b ldr r3, [r7, #16]
800b6ba: 68da ldr r2, [r3, #12]
800b6bc: 693b ldr r3, [r7, #16]
800b6be: 689b ldr r3, [r3, #8]
800b6c0: 429a cmp r2, r3
800b6c2: d11c bne.n 800b6fe <USBD_LL_DataInStage+0xa0>
(pep->total_length >= pep->maxpacket) &&
800b6c4: 693b ldr r3, [r7, #16]
800b6c6: 685a ldr r2, [r3, #4]
800b6c8: 693b ldr r3, [r7, #16]
800b6ca: 68db ldr r3, [r3, #12]
if ((pep->maxpacket == pep->rem_length) &&
800b6cc: 429a cmp r2, r3
800b6ce: d316 bcc.n 800b6fe <USBD_LL_DataInStage+0xa0>
(pep->total_length < pdev->ep0_data_len))
800b6d0: 693b ldr r3, [r7, #16]
800b6d2: 685a ldr r2, [r3, #4]
800b6d4: 68fb ldr r3, [r7, #12]
800b6d6: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298
(pep->total_length >= pep->maxpacket) &&
800b6da: 429a cmp r2, r3
800b6dc: d20f bcs.n 800b6fe <USBD_LL_DataInStage+0xa0>
{
(void)USBD_CtlContinueSendData(pdev, NULL, 0U);
800b6de: 2200 movs r2, #0
800b6e0: 2100 movs r1, #0
800b6e2: 68f8 ldr r0, [r7, #12]
800b6e4: f001 f89d bl 800c822 <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
800b6e8: 68fb ldr r3, [r7, #12]
800b6ea: 2200 movs r2, #0
800b6ec: f8c3 2298 str.w r2, [r3, #664] @ 0x298
/* Prepare endpoint for premature end of transfer */
(void)USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800b6f0: 2300 movs r3, #0
800b6f2: 2200 movs r2, #0
800b6f4: 2100 movs r1, #0
800b6f6: 68f8 ldr r0, [r7, #12]
800b6f8: f007 fbd1 bl 8012e9e <USBD_LL_PrepareReceive>
800b6fc: e01c b.n 800b738 <USBD_LL_DataInStage+0xda>
}
else
{
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800b6fe: 68fb ldr r3, [r7, #12]
800b700: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b704: b2db uxtb r3, r3
800b706: 2b03 cmp r3, #3
800b708: d10f bne.n 800b72a <USBD_LL_DataInStage+0xcc>
{
if (pdev->pClass[0]->EP0_TxSent != NULL)
800b70a: 68fb ldr r3, [r7, #12]
800b70c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b710: 68db ldr r3, [r3, #12]
800b712: 2b00 cmp r3, #0
800b714: d009 beq.n 800b72a <USBD_LL_DataInStage+0xcc>
{
pdev->classId = 0U;
800b716: 68fb ldr r3, [r7, #12]
800b718: 2200 movs r2, #0
800b71a: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4
pdev->pClass[0]->EP0_TxSent(pdev);
800b71e: 68fb ldr r3, [r7, #12]
800b720: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b724: 68db ldr r3, [r3, #12]
800b726: 68f8 ldr r0, [r7, #12]
800b728: 4798 blx r3
}
}
(void)USBD_LL_StallEP(pdev, 0x80U);
800b72a: 2180 movs r1, #128 @ 0x80
800b72c: 68f8 ldr r0, [r7, #12]
800b72e: f007 fb0c bl 8012d4a <USBD_LL_StallEP>
(void)USBD_CtlReceiveStatus(pdev);
800b732: 68f8 ldr r0, [r7, #12]
800b734: f001 f8aa bl 800c88c <USBD_CtlReceiveStatus>
}
}
}
if (pdev->dev_test_mode != 0U)
800b738: 68fb ldr r3, [r7, #12]
800b73a: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0
800b73e: 2b00 cmp r3, #0
800b740: d03a beq.n 800b7b8 <USBD_LL_DataInStage+0x15a>
{
(void)USBD_RunTestMode(pdev);
800b742: 68f8 ldr r0, [r7, #12]
800b744: f7ff fe42 bl 800b3cc <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
800b748: 68fb ldr r3, [r7, #12]
800b74a: 2200 movs r2, #0
800b74c: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
800b750: e032 b.n 800b7b8 <USBD_LL_DataInStage+0x15a>
}
}
else
{
/* Get the class index relative to this interface */
idx = USBD_CoreFindEP(pdev, ((uint8_t)epnum | 0x80U));
800b752: 7afb ldrb r3, [r7, #11]
800b754: f063 037f orn r3, r3, #127 @ 0x7f
800b758: b2db uxtb r3, r3
800b75a: 4619 mov r1, r3
800b75c: 68f8 ldr r0, [r7, #12]
800b75e: f000 f985 bl 800ba6c <USBD_CoreFindEP>
800b762: 4603 mov r3, r0
800b764: 75fb strb r3, [r7, #23]
if (((uint16_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS))
800b766: 7dfb ldrb r3, [r7, #23]
800b768: 2bff cmp r3, #255 @ 0xff
800b76a: d025 beq.n 800b7b8 <USBD_LL_DataInStage+0x15a>
800b76c: 7dfb ldrb r3, [r7, #23]
800b76e: 2b00 cmp r3, #0
800b770: d122 bne.n 800b7b8 <USBD_LL_DataInStage+0x15a>
{
/* Call the class data out function to manage the request */
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800b772: 68fb ldr r3, [r7, #12]
800b774: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b778: b2db uxtb r3, r3
800b77a: 2b03 cmp r3, #3
800b77c: d11c bne.n 800b7b8 <USBD_LL_DataInStage+0x15a>
{
if (pdev->pClass[idx]->DataIn != NULL)
800b77e: 7dfa ldrb r2, [r7, #23]
800b780: 68fb ldr r3, [r7, #12]
800b782: 32ae adds r2, #174 @ 0xae
800b784: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800b788: 695b ldr r3, [r3, #20]
800b78a: 2b00 cmp r3, #0
800b78c: d014 beq.n 800b7b8 <USBD_LL_DataInStage+0x15a>
{
pdev->classId = idx;
800b78e: 7dfa ldrb r2, [r7, #23]
800b790: 68fb ldr r3, [r7, #12]
800b792: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4
ret = (USBD_StatusTypeDef)pdev->pClass[idx]->DataIn(pdev, epnum);
800b796: 7dfa ldrb r2, [r7, #23]
800b798: 68fb ldr r3, [r7, #12]
800b79a: 32ae adds r2, #174 @ 0xae
800b79c: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800b7a0: 695b ldr r3, [r3, #20]
800b7a2: 7afa ldrb r2, [r7, #11]
800b7a4: 4611 mov r1, r2
800b7a6: 68f8 ldr r0, [r7, #12]
800b7a8: 4798 blx r3
800b7aa: 4603 mov r3, r0
800b7ac: 75bb strb r3, [r7, #22]
if (ret != USBD_OK)
800b7ae: 7dbb ldrb r3, [r7, #22]
800b7b0: 2b00 cmp r3, #0
800b7b2: d001 beq.n 800b7b8 <USBD_LL_DataInStage+0x15a>
{
return ret;
800b7b4: 7dbb ldrb r3, [r7, #22]
800b7b6: e000 b.n 800b7ba <USBD_LL_DataInStage+0x15c>
}
}
}
}
return USBD_OK;
800b7b8: 2300 movs r3, #0
}
800b7ba: 4618 mov r0, r3
800b7bc: 3718 adds r7, #24
800b7be: 46bd mov sp, r7
800b7c0: bd80 pop {r7, pc}
0800b7c2 <USBD_LL_Reset>:
* Handle Reset event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
800b7c2: b580 push {r7, lr}
800b7c4: b084 sub sp, #16
800b7c6: af00 add r7, sp, #0
800b7c8: 6078 str r0, [r7, #4]
USBD_StatusTypeDef ret = USBD_OK;
800b7ca: 2300 movs r3, #0
800b7cc: 73fb strb r3, [r7, #15]
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
800b7ce: 687b ldr r3, [r7, #4]
800b7d0: 2201 movs r2, #1
800b7d2: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
800b7d6: 687b ldr r3, [r7, #4]
800b7d8: 2200 movs r2, #0
800b7da: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->dev_config = 0U;
800b7de: 687b ldr r3, [r7, #4]
800b7e0: 2200 movs r2, #0
800b7e2: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
800b7e4: 687b ldr r3, [r7, #4]
800b7e6: 2200 movs r2, #0
800b7e8: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
pdev->dev_test_mode = 0U;
800b7ec: 687b ldr r3, [r7, #4]
800b7ee: 2200 movs r2, #0
800b7f0: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
}
}
}
#else
if (pdev->pClass[0] != NULL)
800b7f4: 687b ldr r3, [r7, #4]
800b7f6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b7fa: 2b00 cmp r3, #0
800b7fc: d014 beq.n 800b828 <USBD_LL_Reset+0x66>
{
if (pdev->pClass[0]->DeInit != NULL)
800b7fe: 687b ldr r3, [r7, #4]
800b800: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b804: 685b ldr r3, [r3, #4]
800b806: 2b00 cmp r3, #0
800b808: d00e beq.n 800b828 <USBD_LL_Reset+0x66>
{
if (pdev->pClass[0]->DeInit(pdev, (uint8_t)pdev->dev_config) != USBD_OK)
800b80a: 687b ldr r3, [r7, #4]
800b80c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b810: 685b ldr r3, [r3, #4]
800b812: 687a ldr r2, [r7, #4]
800b814: 6852 ldr r2, [r2, #4]
800b816: b2d2 uxtb r2, r2
800b818: 4611 mov r1, r2
800b81a: 6878 ldr r0, [r7, #4]
800b81c: 4798 blx r3
800b81e: 4603 mov r3, r0
800b820: 2b00 cmp r3, #0
800b822: d001 beq.n 800b828 <USBD_LL_Reset+0x66>
{
ret = USBD_FAIL;
800b824: 2303 movs r3, #3
800b826: 73fb strb r3, [r7, #15]
}
}
#endif /* USE_USBD_COMPOSITE */
/* Open EP0 OUT */
(void)USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800b828: 2340 movs r3, #64 @ 0x40
800b82a: 2200 movs r2, #0
800b82c: 2100 movs r1, #0
800b82e: 6878 ldr r0, [r7, #4]
800b830: f007 fa27 bl 8012c82 <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
800b834: 687b ldr r3, [r7, #4]
800b836: 2201 movs r2, #1
800b838: f8a3 2164 strh.w r2, [r3, #356] @ 0x164
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
800b83c: 687b ldr r3, [r7, #4]
800b83e: 2240 movs r2, #64 @ 0x40
800b840: f8c3 2160 str.w r2, [r3, #352] @ 0x160
/* Open EP0 IN */
(void)USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800b844: 2340 movs r3, #64 @ 0x40
800b846: 2200 movs r2, #0
800b848: 2180 movs r1, #128 @ 0x80
800b84a: 6878 ldr r0, [r7, #4]
800b84c: f007 fa19 bl 8012c82 <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
800b850: 687b ldr r3, [r7, #4]
800b852: 2201 movs r2, #1
800b854: 849a strh r2, [r3, #36] @ 0x24
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
800b856: 687b ldr r3, [r7, #4]
800b858: 2240 movs r2, #64 @ 0x40
800b85a: 621a str r2, [r3, #32]
return ret;
800b85c: 7bfb ldrb r3, [r7, #15]
}
800b85e: 4618 mov r0, r3
800b860: 3710 adds r7, #16
800b862: 46bd mov sp, r7
800b864: bd80 pop {r7, pc}
0800b866 <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
800b866: b480 push {r7}
800b868: b083 sub sp, #12
800b86a: af00 add r7, sp, #0
800b86c: 6078 str r0, [r7, #4]
800b86e: 460b mov r3, r1
800b870: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
800b872: 687b ldr r3, [r7, #4]
800b874: 78fa ldrb r2, [r7, #3]
800b876: 741a strb r2, [r3, #16]
return USBD_OK;
800b878: 2300 movs r3, #0
}
800b87a: 4618 mov r0, r3
800b87c: 370c adds r7, #12
800b87e: 46bd mov sp, r7
800b880: f85d 7b04 ldr.w r7, [sp], #4
800b884: 4770 bx lr
0800b886 <USBD_LL_Suspend>:
* Handle Suspend event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
800b886: b480 push {r7}
800b888: b083 sub sp, #12
800b88a: af00 add r7, sp, #0
800b88c: 6078 str r0, [r7, #4]
if (pdev->dev_state != USBD_STATE_SUSPENDED)
800b88e: 687b ldr r3, [r7, #4]
800b890: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b894: b2db uxtb r3, r3
800b896: 2b04 cmp r3, #4
800b898: d006 beq.n 800b8a8 <USBD_LL_Suspend+0x22>
{
pdev->dev_old_state = pdev->dev_state;
800b89a: 687b ldr r3, [r7, #4]
800b89c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b8a0: b2da uxtb r2, r3
800b8a2: 687b ldr r3, [r7, #4]
800b8a4: f883 229d strb.w r2, [r3, #669] @ 0x29d
}
pdev->dev_state = USBD_STATE_SUSPENDED;
800b8a8: 687b ldr r3, [r7, #4]
800b8aa: 2204 movs r2, #4
800b8ac: f883 229c strb.w r2, [r3, #668] @ 0x29c
return USBD_OK;
800b8b0: 2300 movs r3, #0
}
800b8b2: 4618 mov r0, r3
800b8b4: 370c adds r7, #12
800b8b6: 46bd mov sp, r7
800b8b8: f85d 7b04 ldr.w r7, [sp], #4
800b8bc: 4770 bx lr
0800b8be <USBD_LL_Resume>:
* Handle Resume event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
800b8be: b480 push {r7}
800b8c0: b083 sub sp, #12
800b8c2: af00 add r7, sp, #0
800b8c4: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
800b8c6: 687b ldr r3, [r7, #4]
800b8c8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b8cc: b2db uxtb r3, r3
800b8ce: 2b04 cmp r3, #4
800b8d0: d106 bne.n 800b8e0 <USBD_LL_Resume+0x22>
{
pdev->dev_state = pdev->dev_old_state;
800b8d2: 687b ldr r3, [r7, #4]
800b8d4: f893 329d ldrb.w r3, [r3, #669] @ 0x29d
800b8d8: b2da uxtb r2, r3
800b8da: 687b ldr r3, [r7, #4]
800b8dc: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
return USBD_OK;
800b8e0: 2300 movs r3, #0
}
800b8e2: 4618 mov r0, r3
800b8e4: 370c adds r7, #12
800b8e6: 46bd mov sp, r7
800b8e8: f85d 7b04 ldr.w r7, [sp], #4
800b8ec: 4770 bx lr
0800b8ee <USBD_LL_SOF>:
* Handle SOF event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
800b8ee: b580 push {r7, lr}
800b8f0: b082 sub sp, #8
800b8f2: af00 add r7, sp, #0
800b8f4: 6078 str r0, [r7, #4]
/* The SOF event can be distributed for all classes that support it */
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800b8f6: 687b ldr r3, [r7, #4]
800b8f8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b8fc: b2db uxtb r3, r3
800b8fe: 2b03 cmp r3, #3
800b900: d110 bne.n 800b924 <USBD_LL_SOF+0x36>
}
}
}
}
#else
if (pdev->pClass[0] != NULL)
800b902: 687b ldr r3, [r7, #4]
800b904: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b908: 2b00 cmp r3, #0
800b90a: d00b beq.n 800b924 <USBD_LL_SOF+0x36>
{
if (pdev->pClass[0]->SOF != NULL)
800b90c: 687b ldr r3, [r7, #4]
800b90e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b912: 69db ldr r3, [r3, #28]
800b914: 2b00 cmp r3, #0
800b916: d005 beq.n 800b924 <USBD_LL_SOF+0x36>
{
(void)pdev->pClass[0]->SOF(pdev);
800b918: 687b ldr r3, [r7, #4]
800b91a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b91e: 69db ldr r3, [r3, #28]
800b920: 6878 ldr r0, [r7, #4]
800b922: 4798 blx r3
}
}
#endif /* USE_USBD_COMPOSITE */
}
return USBD_OK;
800b924: 2300 movs r3, #0
}
800b926: 4618 mov r0, r3
800b928: 3708 adds r7, #8
800b92a: 46bd mov sp, r7
800b92c: bd80 pop {r7, pc}
0800b92e <USBD_LL_IsoINIncomplete>:
* @param epnum: Endpoint number
* @retval status
*/
USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev,
uint8_t epnum)
{
800b92e: b580 push {r7, lr}
800b930: b082 sub sp, #8
800b932: af00 add r7, sp, #0
800b934: 6078 str r0, [r7, #4]
800b936: 460b mov r3, r1
800b938: 70fb strb r3, [r7, #3]
if (pdev->pClass[pdev->classId] == NULL)
800b93a: 687b ldr r3, [r7, #4]
800b93c: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800b940: 687b ldr r3, [r7, #4]
800b942: 32ae adds r2, #174 @ 0xae
800b944: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800b948: 2b00 cmp r3, #0
800b94a: d101 bne.n 800b950 <USBD_LL_IsoINIncomplete+0x22>
{
return USBD_FAIL;
800b94c: 2303 movs r3, #3
800b94e: e01c b.n 800b98a <USBD_LL_IsoINIncomplete+0x5c>
}
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800b950: 687b ldr r3, [r7, #4]
800b952: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b956: b2db uxtb r3, r3
800b958: 2b03 cmp r3, #3
800b95a: d115 bne.n 800b988 <USBD_LL_IsoINIncomplete+0x5a>
{
if (pdev->pClass[pdev->classId]->IsoINIncomplete != NULL)
800b95c: 687b ldr r3, [r7, #4]
800b95e: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800b962: 687b ldr r3, [r7, #4]
800b964: 32ae adds r2, #174 @ 0xae
800b966: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800b96a: 6a1b ldr r3, [r3, #32]
800b96c: 2b00 cmp r3, #0
800b96e: d00b beq.n 800b988 <USBD_LL_IsoINIncomplete+0x5a>
{
(void)pdev->pClass[pdev->classId]->IsoINIncomplete(pdev, epnum);
800b970: 687b ldr r3, [r7, #4]
800b972: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800b976: 687b ldr r3, [r7, #4]
800b978: 32ae adds r2, #174 @ 0xae
800b97a: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800b97e: 6a1b ldr r3, [r3, #32]
800b980: 78fa ldrb r2, [r7, #3]
800b982: 4611 mov r1, r2
800b984: 6878 ldr r0, [r7, #4]
800b986: 4798 blx r3
}
}
return USBD_OK;
800b988: 2300 movs r3, #0
}
800b98a: 4618 mov r0, r3
800b98c: 3708 adds r7, #8
800b98e: 46bd mov sp, r7
800b990: bd80 pop {r7, pc}
0800b992 <USBD_LL_IsoOUTIncomplete>:
* @param epnum: Endpoint number
* @retval status
*/
USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev,
uint8_t epnum)
{
800b992: b580 push {r7, lr}
800b994: b082 sub sp, #8
800b996: af00 add r7, sp, #0
800b998: 6078 str r0, [r7, #4]
800b99a: 460b mov r3, r1
800b99c: 70fb strb r3, [r7, #3]
if (pdev->pClass[pdev->classId] == NULL)
800b99e: 687b ldr r3, [r7, #4]
800b9a0: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800b9a4: 687b ldr r3, [r7, #4]
800b9a6: 32ae adds r2, #174 @ 0xae
800b9a8: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800b9ac: 2b00 cmp r3, #0
800b9ae: d101 bne.n 800b9b4 <USBD_LL_IsoOUTIncomplete+0x22>
{
return USBD_FAIL;
800b9b0: 2303 movs r3, #3
800b9b2: e01c b.n 800b9ee <USBD_LL_IsoOUTIncomplete+0x5c>
}
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800b9b4: 687b ldr r3, [r7, #4]
800b9b6: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b9ba: b2db uxtb r3, r3
800b9bc: 2b03 cmp r3, #3
800b9be: d115 bne.n 800b9ec <USBD_LL_IsoOUTIncomplete+0x5a>
{
if (pdev->pClass[pdev->classId]->IsoOUTIncomplete != NULL)
800b9c0: 687b ldr r3, [r7, #4]
800b9c2: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800b9c6: 687b ldr r3, [r7, #4]
800b9c8: 32ae adds r2, #174 @ 0xae
800b9ca: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800b9ce: 6a5b ldr r3, [r3, #36] @ 0x24
800b9d0: 2b00 cmp r3, #0
800b9d2: d00b beq.n 800b9ec <USBD_LL_IsoOUTIncomplete+0x5a>
{
(void)pdev->pClass[pdev->classId]->IsoOUTIncomplete(pdev, epnum);
800b9d4: 687b ldr r3, [r7, #4]
800b9d6: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800b9da: 687b ldr r3, [r7, #4]
800b9dc: 32ae adds r2, #174 @ 0xae
800b9de: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800b9e2: 6a5b ldr r3, [r3, #36] @ 0x24
800b9e4: 78fa ldrb r2, [r7, #3]
800b9e6: 4611 mov r1, r2
800b9e8: 6878 ldr r0, [r7, #4]
800b9ea: 4798 blx r3
}
}
return USBD_OK;
800b9ec: 2300 movs r3, #0
}
800b9ee: 4618 mov r0, r3
800b9f0: 3708 adds r7, #8
800b9f2: 46bd mov sp, r7
800b9f4: bd80 pop {r7, pc}
0800b9f6 <USBD_LL_DevConnected>:
* Handle device connection event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev)
{
800b9f6: b480 push {r7}
800b9f8: b083 sub sp, #12
800b9fa: af00 add r7, sp, #0
800b9fc: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
800b9fe: 2300 movs r3, #0
}
800ba00: 4618 mov r0, r3
800ba02: 370c adds r7, #12
800ba04: 46bd mov sp, r7
800ba06: f85d 7b04 ldr.w r7, [sp], #4
800ba0a: 4770 bx lr
0800ba0c <USBD_LL_DevDisconnected>:
* Handle device disconnection event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev)
{
800ba0c: b580 push {r7, lr}
800ba0e: b084 sub sp, #16
800ba10: af00 add r7, sp, #0
800ba12: 6078 str r0, [r7, #4]
USBD_StatusTypeDef ret = USBD_OK;
800ba14: 2300 movs r3, #0
800ba16: 73fb strb r3, [r7, #15]
/* Free Class Resources */
pdev->dev_state = USBD_STATE_DEFAULT;
800ba18: 687b ldr r3, [r7, #4]
800ba1a: 2201 movs r2, #1
800ba1c: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
}
}
}
#else
if (pdev->pClass[0] != NULL)
800ba20: 687b ldr r3, [r7, #4]
800ba22: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800ba26: 2b00 cmp r3, #0
800ba28: d00e beq.n 800ba48 <USBD_LL_DevDisconnected+0x3c>
{
if (pdev->pClass[0]->DeInit(pdev, (uint8_t)pdev->dev_config) != 0U)
800ba2a: 687b ldr r3, [r7, #4]
800ba2c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800ba30: 685b ldr r3, [r3, #4]
800ba32: 687a ldr r2, [r7, #4]
800ba34: 6852 ldr r2, [r2, #4]
800ba36: b2d2 uxtb r2, r2
800ba38: 4611 mov r1, r2
800ba3a: 6878 ldr r0, [r7, #4]
800ba3c: 4798 blx r3
800ba3e: 4603 mov r3, r0
800ba40: 2b00 cmp r3, #0
800ba42: d001 beq.n 800ba48 <USBD_LL_DevDisconnected+0x3c>
{
ret = USBD_FAIL;
800ba44: 2303 movs r3, #3
800ba46: 73fb strb r3, [r7, #15]
}
}
#endif /* USE_USBD_COMPOSITE */
return ret;
800ba48: 7bfb ldrb r3, [r7, #15]
}
800ba4a: 4618 mov r0, r3
800ba4c: 3710 adds r7, #16
800ba4e: 46bd mov sp, r7
800ba50: bd80 pop {r7, pc}
0800ba52 <USBD_CoreFindIF>:
* @param pdev: device instance
* @param index : selected interface number
* @retval index of the class using the selected interface number. OxFF if no class found.
*/
uint8_t USBD_CoreFindIF(USBD_HandleTypeDef *pdev, uint8_t index)
{
800ba52: b480 push {r7}
800ba54: b083 sub sp, #12
800ba56: af00 add r7, sp, #0
800ba58: 6078 str r0, [r7, #4]
800ba5a: 460b mov r3, r1
800ba5c: 70fb strb r3, [r7, #3]
return 0xFFU;
#else
UNUSED(pdev);
UNUSED(index);
return 0x00U;
800ba5e: 2300 movs r3, #0
#endif /* USE_USBD_COMPOSITE */
}
800ba60: 4618 mov r0, r3
800ba62: 370c adds r7, #12
800ba64: 46bd mov sp, r7
800ba66: f85d 7b04 ldr.w r7, [sp], #4
800ba6a: 4770 bx lr
0800ba6c <USBD_CoreFindEP>:
* @param pdev: device instance
* @param index : selected endpoint number
* @retval index of the class using the selected endpoint number. 0xFF if no class found.
*/
uint8_t USBD_CoreFindEP(USBD_HandleTypeDef *pdev, uint8_t index)
{
800ba6c: b480 push {r7}
800ba6e: b083 sub sp, #12
800ba70: af00 add r7, sp, #0
800ba72: 6078 str r0, [r7, #4]
800ba74: 460b mov r3, r1
800ba76: 70fb strb r3, [r7, #3]
return 0xFFU;
#else
UNUSED(pdev);
UNUSED(index);
return 0x00U;
800ba78: 2300 movs r3, #0
#endif /* USE_USBD_COMPOSITE */
}
800ba7a: 4618 mov r0, r3
800ba7c: 370c adds r7, #12
800ba7e: 46bd mov sp, r7
800ba80: f85d 7b04 ldr.w r7, [sp], #4
800ba84: 4770 bx lr
0800ba86 <USBD_GetEpDesc>:
* @param pConfDesc: pointer to Bos descriptor
* @param EpAddr: endpoint address
* @retval pointer to video endpoint descriptor
*/
void *USBD_GetEpDesc(uint8_t *pConfDesc, uint8_t EpAddr)
{
800ba86: b580 push {r7, lr}
800ba88: b086 sub sp, #24
800ba8a: af00 add r7, sp, #0
800ba8c: 6078 str r0, [r7, #4]
800ba8e: 460b mov r3, r1
800ba90: 70fb strb r3, [r7, #3]
USBD_DescHeaderTypeDef *pdesc = (USBD_DescHeaderTypeDef *)(void *)pConfDesc;
800ba92: 687b ldr r3, [r7, #4]
800ba94: 617b str r3, [r7, #20]
USBD_ConfigDescTypeDef *desc = (USBD_ConfigDescTypeDef *)(void *)pConfDesc;
800ba96: 687b ldr r3, [r7, #4]
800ba98: 60fb str r3, [r7, #12]
USBD_EpDescTypeDef *pEpDesc = NULL;
800ba9a: 2300 movs r3, #0
800ba9c: 613b str r3, [r7, #16]
uint16_t ptr;
if (desc->wTotalLength > desc->bLength)
800ba9e: 68fb ldr r3, [r7, #12]
800baa0: 885b ldrh r3, [r3, #2]
800baa2: b29b uxth r3, r3
800baa4: 68fa ldr r2, [r7, #12]
800baa6: 7812 ldrb r2, [r2, #0]
800baa8: 4293 cmp r3, r2
800baaa: d91f bls.n 800baec <USBD_GetEpDesc+0x66>
{
ptr = desc->bLength;
800baac: 68fb ldr r3, [r7, #12]
800baae: 781b ldrb r3, [r3, #0]
800bab0: 817b strh r3, [r7, #10]
while (ptr < desc->wTotalLength)
800bab2: e013 b.n 800badc <USBD_GetEpDesc+0x56>
{
pdesc = USBD_GetNextDesc((uint8_t *)pdesc, &ptr);
800bab4: f107 030a add.w r3, r7, #10
800bab8: 4619 mov r1, r3
800baba: 6978 ldr r0, [r7, #20]
800babc: f000 f81b bl 800baf6 <USBD_GetNextDesc>
800bac0: 6178 str r0, [r7, #20]
if (pdesc->bDescriptorType == USB_DESC_TYPE_ENDPOINT)
800bac2: 697b ldr r3, [r7, #20]
800bac4: 785b ldrb r3, [r3, #1]
800bac6: 2b05 cmp r3, #5
800bac8: d108 bne.n 800badc <USBD_GetEpDesc+0x56>
{
pEpDesc = (USBD_EpDescTypeDef *)(void *)pdesc;
800baca: 697b ldr r3, [r7, #20]
800bacc: 613b str r3, [r7, #16]
if (pEpDesc->bEndpointAddress == EpAddr)
800bace: 693b ldr r3, [r7, #16]
800bad0: 789b ldrb r3, [r3, #2]
800bad2: 78fa ldrb r2, [r7, #3]
800bad4: 429a cmp r2, r3
800bad6: d008 beq.n 800baea <USBD_GetEpDesc+0x64>
{
break;
}
else
{
pEpDesc = NULL;
800bad8: 2300 movs r3, #0
800bada: 613b str r3, [r7, #16]
while (ptr < desc->wTotalLength)
800badc: 68fb ldr r3, [r7, #12]
800bade: 885b ldrh r3, [r3, #2]
800bae0: b29a uxth r2, r3
800bae2: 897b ldrh r3, [r7, #10]
800bae4: 429a cmp r2, r3
800bae6: d8e5 bhi.n 800bab4 <USBD_GetEpDesc+0x2e>
800bae8: e000 b.n 800baec <USBD_GetEpDesc+0x66>
break;
800baea: bf00 nop
}
}
}
}
return (void *)pEpDesc;
800baec: 693b ldr r3, [r7, #16]
}
800baee: 4618 mov r0, r3
800baf0: 3718 adds r7, #24
800baf2: 46bd mov sp, r7
800baf4: bd80 pop {r7, pc}
0800baf6 <USBD_GetNextDesc>:
* @param buf: Buffer where the descriptor is available
* @param ptr: data pointer inside the descriptor
* @retval next header
*/
USBD_DescHeaderTypeDef *USBD_GetNextDesc(uint8_t *pbuf, uint16_t *ptr)
{
800baf6: b480 push {r7}
800baf8: b085 sub sp, #20
800bafa: af00 add r7, sp, #0
800bafc: 6078 str r0, [r7, #4]
800bafe: 6039 str r1, [r7, #0]
USBD_DescHeaderTypeDef *pnext = (USBD_DescHeaderTypeDef *)(void *)pbuf;
800bb00: 687b ldr r3, [r7, #4]
800bb02: 60fb str r3, [r7, #12]
*ptr += pnext->bLength;
800bb04: 683b ldr r3, [r7, #0]
800bb06: 881b ldrh r3, [r3, #0]
800bb08: 68fa ldr r2, [r7, #12]
800bb0a: 7812 ldrb r2, [r2, #0]
800bb0c: 4413 add r3, r2
800bb0e: b29a uxth r2, r3
800bb10: 683b ldr r3, [r7, #0]
800bb12: 801a strh r2, [r3, #0]
pnext = (USBD_DescHeaderTypeDef *)(void *)(pbuf + pnext->bLength);
800bb14: 68fb ldr r3, [r7, #12]
800bb16: 781b ldrb r3, [r3, #0]
800bb18: 461a mov r2, r3
800bb1a: 687b ldr r3, [r7, #4]
800bb1c: 4413 add r3, r2
800bb1e: 60fb str r3, [r7, #12]
return (pnext);
800bb20: 68fb ldr r3, [r7, #12]
}
800bb22: 4618 mov r0, r3
800bb24: 3714 adds r7, #20
800bb26: 46bd mov sp, r7
800bb28: f85d 7b04 ldr.w r7, [sp], #4
800bb2c: 4770 bx lr
0800bb2e <SWAPBYTE>:
/** @defgroup USBD_DEF_Exported_Macros
* @{
*/
__STATIC_INLINE uint16_t SWAPBYTE(uint8_t *addr)
{
800bb2e: b480 push {r7}
800bb30: b087 sub sp, #28
800bb32: af00 add r7, sp, #0
800bb34: 6078 str r0, [r7, #4]
uint16_t _SwapVal;
uint16_t _Byte1;
uint16_t _Byte2;
uint8_t *_pbuff = addr;
800bb36: 687b ldr r3, [r7, #4]
800bb38: 617b str r3, [r7, #20]
_Byte1 = *(uint8_t *)_pbuff;
800bb3a: 697b ldr r3, [r7, #20]
800bb3c: 781b ldrb r3, [r3, #0]
800bb3e: 827b strh r3, [r7, #18]
_pbuff++;
800bb40: 697b ldr r3, [r7, #20]
800bb42: 3301 adds r3, #1
800bb44: 617b str r3, [r7, #20]
_Byte2 = *(uint8_t *)_pbuff;
800bb46: 697b ldr r3, [r7, #20]
800bb48: 781b ldrb r3, [r3, #0]
800bb4a: 823b strh r3, [r7, #16]
_SwapVal = (_Byte2 << 8) | _Byte1;
800bb4c: 8a3b ldrh r3, [r7, #16]
800bb4e: 021b lsls r3, r3, #8
800bb50: b21a sxth r2, r3
800bb52: f9b7 3012 ldrsh.w r3, [r7, #18]
800bb56: 4313 orrs r3, r2
800bb58: b21b sxth r3, r3
800bb5a: 81fb strh r3, [r7, #14]
return _SwapVal;
800bb5c: 89fb ldrh r3, [r7, #14]
}
800bb5e: 4618 mov r0, r3
800bb60: 371c adds r7, #28
800bb62: 46bd mov sp, r7
800bb64: f85d 7b04 ldr.w r7, [sp], #4
800bb68: 4770 bx lr
...
0800bb6c <USBD_StdDevReq>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800bb6c: b580 push {r7, lr}
800bb6e: b084 sub sp, #16
800bb70: af00 add r7, sp, #0
800bb72: 6078 str r0, [r7, #4]
800bb74: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800bb76: 2300 movs r3, #0
800bb78: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800bb7a: 683b ldr r3, [r7, #0]
800bb7c: 781b ldrb r3, [r3, #0]
800bb7e: f003 0360 and.w r3, r3, #96 @ 0x60
800bb82: 2b40 cmp r3, #64 @ 0x40
800bb84: d005 beq.n 800bb92 <USBD_StdDevReq+0x26>
800bb86: 2b40 cmp r3, #64 @ 0x40
800bb88: d857 bhi.n 800bc3a <USBD_StdDevReq+0xce>
800bb8a: 2b00 cmp r3, #0
800bb8c: d00f beq.n 800bbae <USBD_StdDevReq+0x42>
800bb8e: 2b20 cmp r3, #32
800bb90: d153 bne.n 800bc3a <USBD_StdDevReq+0xce>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
ret = (USBD_StatusTypeDef)pdev->pClass[pdev->classId]->Setup(pdev, req);
800bb92: 687b ldr r3, [r7, #4]
800bb94: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800bb98: 687b ldr r3, [r7, #4]
800bb9a: 32ae adds r2, #174 @ 0xae
800bb9c: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800bba0: 689b ldr r3, [r3, #8]
800bba2: 6839 ldr r1, [r7, #0]
800bba4: 6878 ldr r0, [r7, #4]
800bba6: 4798 blx r3
800bba8: 4603 mov r3, r0
800bbaa: 73fb strb r3, [r7, #15]
break;
800bbac: e04a b.n 800bc44 <USBD_StdDevReq+0xd8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800bbae: 683b ldr r3, [r7, #0]
800bbb0: 785b ldrb r3, [r3, #1]
800bbb2: 2b09 cmp r3, #9
800bbb4: d83b bhi.n 800bc2e <USBD_StdDevReq+0xc2>
800bbb6: a201 add r2, pc, #4 @ (adr r2, 800bbbc <USBD_StdDevReq+0x50>)
800bbb8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800bbbc: 0800bc11 .word 0x0800bc11
800bbc0: 0800bc25 .word 0x0800bc25
800bbc4: 0800bc2f .word 0x0800bc2f
800bbc8: 0800bc1b .word 0x0800bc1b
800bbcc: 0800bc2f .word 0x0800bc2f
800bbd0: 0800bbef .word 0x0800bbef
800bbd4: 0800bbe5 .word 0x0800bbe5
800bbd8: 0800bc2f .word 0x0800bc2f
800bbdc: 0800bc07 .word 0x0800bc07
800bbe0: 0800bbf9 .word 0x0800bbf9
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
800bbe4: 6839 ldr r1, [r7, #0]
800bbe6: 6878 ldr r0, [r7, #4]
800bbe8: f000 fa3c bl 800c064 <USBD_GetDescriptor>
break;
800bbec: e024 b.n 800bc38 <USBD_StdDevReq+0xcc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
800bbee: 6839 ldr r1, [r7, #0]
800bbf0: 6878 ldr r0, [r7, #4]
800bbf2: f000 fba1 bl 800c338 <USBD_SetAddress>
break;
800bbf6: e01f b.n 800bc38 <USBD_StdDevReq+0xcc>
case USB_REQ_SET_CONFIGURATION:
ret = USBD_SetConfig(pdev, req);
800bbf8: 6839 ldr r1, [r7, #0]
800bbfa: 6878 ldr r0, [r7, #4]
800bbfc: f000 fbe0 bl 800c3c0 <USBD_SetConfig>
800bc00: 4603 mov r3, r0
800bc02: 73fb strb r3, [r7, #15]
break;
800bc04: e018 b.n 800bc38 <USBD_StdDevReq+0xcc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
800bc06: 6839 ldr r1, [r7, #0]
800bc08: 6878 ldr r0, [r7, #4]
800bc0a: f000 fc83 bl 800c514 <USBD_GetConfig>
break;
800bc0e: e013 b.n 800bc38 <USBD_StdDevReq+0xcc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
800bc10: 6839 ldr r1, [r7, #0]
800bc12: 6878 ldr r0, [r7, #4]
800bc14: f000 fcb4 bl 800c580 <USBD_GetStatus>
break;
800bc18: e00e b.n 800bc38 <USBD_StdDevReq+0xcc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
800bc1a: 6839 ldr r1, [r7, #0]
800bc1c: 6878 ldr r0, [r7, #4]
800bc1e: f000 fce3 bl 800c5e8 <USBD_SetFeature>
break;
800bc22: e009 b.n 800bc38 <USBD_StdDevReq+0xcc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
800bc24: 6839 ldr r1, [r7, #0]
800bc26: 6878 ldr r0, [r7, #4]
800bc28: f000 fd07 bl 800c63a <USBD_ClrFeature>
break;
800bc2c: e004 b.n 800bc38 <USBD_StdDevReq+0xcc>
default:
USBD_CtlError(pdev, req);
800bc2e: 6839 ldr r1, [r7, #0]
800bc30: 6878 ldr r0, [r7, #4]
800bc32: f000 fd5e bl 800c6f2 <USBD_CtlError>
break;
800bc36: bf00 nop
}
break;
800bc38: e004 b.n 800bc44 <USBD_StdDevReq+0xd8>
default:
USBD_CtlError(pdev, req);
800bc3a: 6839 ldr r1, [r7, #0]
800bc3c: 6878 ldr r0, [r7, #4]
800bc3e: f000 fd58 bl 800c6f2 <USBD_CtlError>
break;
800bc42: bf00 nop
}
return ret;
800bc44: 7bfb ldrb r3, [r7, #15]
}
800bc46: 4618 mov r0, r3
800bc48: 3710 adds r7, #16
800bc4a: 46bd mov sp, r7
800bc4c: bd80 pop {r7, pc}
800bc4e: bf00 nop
0800bc50 <USBD_StdItfReq>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800bc50: b580 push {r7, lr}
800bc52: b084 sub sp, #16
800bc54: af00 add r7, sp, #0
800bc56: 6078 str r0, [r7, #4]
800bc58: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800bc5a: 2300 movs r3, #0
800bc5c: 73fb strb r3, [r7, #15]
uint8_t idx;
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800bc5e: 683b ldr r3, [r7, #0]
800bc60: 781b ldrb r3, [r3, #0]
800bc62: f003 0360 and.w r3, r3, #96 @ 0x60
800bc66: 2b40 cmp r3, #64 @ 0x40
800bc68: d005 beq.n 800bc76 <USBD_StdItfReq+0x26>
800bc6a: 2b40 cmp r3, #64 @ 0x40
800bc6c: d852 bhi.n 800bd14 <USBD_StdItfReq+0xc4>
800bc6e: 2b00 cmp r3, #0
800bc70: d001 beq.n 800bc76 <USBD_StdItfReq+0x26>
800bc72: 2b20 cmp r3, #32
800bc74: d14e bne.n 800bd14 <USBD_StdItfReq+0xc4>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
800bc76: 687b ldr r3, [r7, #4]
800bc78: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800bc7c: b2db uxtb r3, r3
800bc7e: 3b01 subs r3, #1
800bc80: 2b02 cmp r3, #2
800bc82: d840 bhi.n 800bd06 <USBD_StdItfReq+0xb6>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
800bc84: 683b ldr r3, [r7, #0]
800bc86: 889b ldrh r3, [r3, #4]
800bc88: b2db uxtb r3, r3
800bc8a: 2b01 cmp r3, #1
800bc8c: d836 bhi.n 800bcfc <USBD_StdItfReq+0xac>
{
/* Get the class index relative to this interface */
idx = USBD_CoreFindIF(pdev, LOBYTE(req->wIndex));
800bc8e: 683b ldr r3, [r7, #0]
800bc90: 889b ldrh r3, [r3, #4]
800bc92: b2db uxtb r3, r3
800bc94: 4619 mov r1, r3
800bc96: 6878 ldr r0, [r7, #4]
800bc98: f7ff fedb bl 800ba52 <USBD_CoreFindIF>
800bc9c: 4603 mov r3, r0
800bc9e: 73bb strb r3, [r7, #14]
if (((uint8_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS))
800bca0: 7bbb ldrb r3, [r7, #14]
800bca2: 2bff cmp r3, #255 @ 0xff
800bca4: d01d beq.n 800bce2 <USBD_StdItfReq+0x92>
800bca6: 7bbb ldrb r3, [r7, #14]
800bca8: 2b00 cmp r3, #0
800bcaa: d11a bne.n 800bce2 <USBD_StdItfReq+0x92>
{
/* Call the class data out function to manage the request */
if (pdev->pClass[idx]->Setup != NULL)
800bcac: 7bba ldrb r2, [r7, #14]
800bcae: 687b ldr r3, [r7, #4]
800bcb0: 32ae adds r2, #174 @ 0xae
800bcb2: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800bcb6: 689b ldr r3, [r3, #8]
800bcb8: 2b00 cmp r3, #0
800bcba: d00f beq.n 800bcdc <USBD_StdItfReq+0x8c>
{
pdev->classId = idx;
800bcbc: 7bba ldrb r2, [r7, #14]
800bcbe: 687b ldr r3, [r7, #4]
800bcc0: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4
ret = (USBD_StatusTypeDef)(pdev->pClass[idx]->Setup(pdev, req));
800bcc4: 7bba ldrb r2, [r7, #14]
800bcc6: 687b ldr r3, [r7, #4]
800bcc8: 32ae adds r2, #174 @ 0xae
800bcca: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800bcce: 689b ldr r3, [r3, #8]
800bcd0: 6839 ldr r1, [r7, #0]
800bcd2: 6878 ldr r0, [r7, #4]
800bcd4: 4798 blx r3
800bcd6: 4603 mov r3, r0
800bcd8: 73fb strb r3, [r7, #15]
if (pdev->pClass[idx]->Setup != NULL)
800bcda: e004 b.n 800bce6 <USBD_StdItfReq+0x96>
}
else
{
/* should never reach this condition */
ret = USBD_FAIL;
800bcdc: 2303 movs r3, #3
800bcde: 73fb strb r3, [r7, #15]
if (pdev->pClass[idx]->Setup != NULL)
800bce0: e001 b.n 800bce6 <USBD_StdItfReq+0x96>
}
}
else
{
/* No relative interface found */
ret = USBD_FAIL;
800bce2: 2303 movs r3, #3
800bce4: 73fb strb r3, [r7, #15]
}
if ((req->wLength == 0U) && (ret == USBD_OK))
800bce6: 683b ldr r3, [r7, #0]
800bce8: 88db ldrh r3, [r3, #6]
800bcea: 2b00 cmp r3, #0
800bcec: d110 bne.n 800bd10 <USBD_StdItfReq+0xc0>
800bcee: 7bfb ldrb r3, [r7, #15]
800bcf0: 2b00 cmp r3, #0
800bcf2: d10d bne.n 800bd10 <USBD_StdItfReq+0xc0>
{
(void)USBD_CtlSendStatus(pdev);
800bcf4: 6878 ldr r0, [r7, #4]
800bcf6: f000 fdb6 bl 800c866 <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800bcfa: e009 b.n 800bd10 <USBD_StdItfReq+0xc0>
USBD_CtlError(pdev, req);
800bcfc: 6839 ldr r1, [r7, #0]
800bcfe: 6878 ldr r0, [r7, #4]
800bd00: f000 fcf7 bl 800c6f2 <USBD_CtlError>
break;
800bd04: e004 b.n 800bd10 <USBD_StdItfReq+0xc0>
default:
USBD_CtlError(pdev, req);
800bd06: 6839 ldr r1, [r7, #0]
800bd08: 6878 ldr r0, [r7, #4]
800bd0a: f000 fcf2 bl 800c6f2 <USBD_CtlError>
break;
800bd0e: e000 b.n 800bd12 <USBD_StdItfReq+0xc2>
break;
800bd10: bf00 nop
}
break;
800bd12: e004 b.n 800bd1e <USBD_StdItfReq+0xce>
default:
USBD_CtlError(pdev, req);
800bd14: 6839 ldr r1, [r7, #0]
800bd16: 6878 ldr r0, [r7, #4]
800bd18: f000 fceb bl 800c6f2 <USBD_CtlError>
break;
800bd1c: bf00 nop
}
return ret;
800bd1e: 7bfb ldrb r3, [r7, #15]
}
800bd20: 4618 mov r0, r3
800bd22: 3710 adds r7, #16
800bd24: 46bd mov sp, r7
800bd26: bd80 pop {r7, pc}
0800bd28 <USBD_StdEPReq>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800bd28: b580 push {r7, lr}
800bd2a: b084 sub sp, #16
800bd2c: af00 add r7, sp, #0
800bd2e: 6078 str r0, [r7, #4]
800bd30: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
uint8_t idx;
USBD_StatusTypeDef ret = USBD_OK;
800bd32: 2300 movs r3, #0
800bd34: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
800bd36: 683b ldr r3, [r7, #0]
800bd38: 889b ldrh r3, [r3, #4]
800bd3a: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800bd3c: 683b ldr r3, [r7, #0]
800bd3e: 781b ldrb r3, [r3, #0]
800bd40: f003 0360 and.w r3, r3, #96 @ 0x60
800bd44: 2b40 cmp r3, #64 @ 0x40
800bd46: d007 beq.n 800bd58 <USBD_StdEPReq+0x30>
800bd48: 2b40 cmp r3, #64 @ 0x40
800bd4a: f200 817f bhi.w 800c04c <USBD_StdEPReq+0x324>
800bd4e: 2b00 cmp r3, #0
800bd50: d02a beq.n 800bda8 <USBD_StdEPReq+0x80>
800bd52: 2b20 cmp r3, #32
800bd54: f040 817a bne.w 800c04c <USBD_StdEPReq+0x324>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
/* Get the class index relative to this endpoint */
idx = USBD_CoreFindEP(pdev, ep_addr);
800bd58: 7bbb ldrb r3, [r7, #14]
800bd5a: 4619 mov r1, r3
800bd5c: 6878 ldr r0, [r7, #4]
800bd5e: f7ff fe85 bl 800ba6c <USBD_CoreFindEP>
800bd62: 4603 mov r3, r0
800bd64: 737b strb r3, [r7, #13]
if (((uint8_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS))
800bd66: 7b7b ldrb r3, [r7, #13]
800bd68: 2bff cmp r3, #255 @ 0xff
800bd6a: f000 8174 beq.w 800c056 <USBD_StdEPReq+0x32e>
800bd6e: 7b7b ldrb r3, [r7, #13]
800bd70: 2b00 cmp r3, #0
800bd72: f040 8170 bne.w 800c056 <USBD_StdEPReq+0x32e>
{
pdev->classId = idx;
800bd76: 7b7a ldrb r2, [r7, #13]
800bd78: 687b ldr r3, [r7, #4]
800bd7a: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4
/* Call the class data out function to manage the request */
if (pdev->pClass[idx]->Setup != NULL)
800bd7e: 7b7a ldrb r2, [r7, #13]
800bd80: 687b ldr r3, [r7, #4]
800bd82: 32ae adds r2, #174 @ 0xae
800bd84: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800bd88: 689b ldr r3, [r3, #8]
800bd8a: 2b00 cmp r3, #0
800bd8c: f000 8163 beq.w 800c056 <USBD_StdEPReq+0x32e>
{
ret = (USBD_StatusTypeDef)pdev->pClass[idx]->Setup(pdev, req);
800bd90: 7b7a ldrb r2, [r7, #13]
800bd92: 687b ldr r3, [r7, #4]
800bd94: 32ae adds r2, #174 @ 0xae
800bd96: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800bd9a: 689b ldr r3, [r3, #8]
800bd9c: 6839 ldr r1, [r7, #0]
800bd9e: 6878 ldr r0, [r7, #4]
800bda0: 4798 blx r3
800bda2: 4603 mov r3, r0
800bda4: 73fb strb r3, [r7, #15]
}
}
break;
800bda6: e156 b.n 800c056 <USBD_StdEPReq+0x32e>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800bda8: 683b ldr r3, [r7, #0]
800bdaa: 785b ldrb r3, [r3, #1]
800bdac: 2b03 cmp r3, #3
800bdae: d008 beq.n 800bdc2 <USBD_StdEPReq+0x9a>
800bdb0: 2b03 cmp r3, #3
800bdb2: f300 8145 bgt.w 800c040 <USBD_StdEPReq+0x318>
800bdb6: 2b00 cmp r3, #0
800bdb8: f000 809b beq.w 800bef2 <USBD_StdEPReq+0x1ca>
800bdbc: 2b01 cmp r3, #1
800bdbe: d03c beq.n 800be3a <USBD_StdEPReq+0x112>
800bdc0: e13e b.n 800c040 <USBD_StdEPReq+0x318>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
800bdc2: 687b ldr r3, [r7, #4]
800bdc4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800bdc8: b2db uxtb r3, r3
800bdca: 2b02 cmp r3, #2
800bdcc: d002 beq.n 800bdd4 <USBD_StdEPReq+0xac>
800bdce: 2b03 cmp r3, #3
800bdd0: d016 beq.n 800be00 <USBD_StdEPReq+0xd8>
800bdd2: e02c b.n 800be2e <USBD_StdEPReq+0x106>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800bdd4: 7bbb ldrb r3, [r7, #14]
800bdd6: 2b00 cmp r3, #0
800bdd8: d00d beq.n 800bdf6 <USBD_StdEPReq+0xce>
800bdda: 7bbb ldrb r3, [r7, #14]
800bddc: 2b80 cmp r3, #128 @ 0x80
800bdde: d00a beq.n 800bdf6 <USBD_StdEPReq+0xce>
{
(void)USBD_LL_StallEP(pdev, ep_addr);
800bde0: 7bbb ldrb r3, [r7, #14]
800bde2: 4619 mov r1, r3
800bde4: 6878 ldr r0, [r7, #4]
800bde6: f006 ffb0 bl 8012d4a <USBD_LL_StallEP>
(void)USBD_LL_StallEP(pdev, 0x80U);
800bdea: 2180 movs r1, #128 @ 0x80
800bdec: 6878 ldr r0, [r7, #4]
800bdee: f006 ffac bl 8012d4a <USBD_LL_StallEP>
800bdf2: bf00 nop
}
else
{
USBD_CtlError(pdev, req);
}
break;
800bdf4: e020 b.n 800be38 <USBD_StdEPReq+0x110>
USBD_CtlError(pdev, req);
800bdf6: 6839 ldr r1, [r7, #0]
800bdf8: 6878 ldr r0, [r7, #4]
800bdfa: f000 fc7a bl 800c6f2 <USBD_CtlError>
break;
800bdfe: e01b b.n 800be38 <USBD_StdEPReq+0x110>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800be00: 683b ldr r3, [r7, #0]
800be02: 885b ldrh r3, [r3, #2]
800be04: 2b00 cmp r3, #0
800be06: d10e bne.n 800be26 <USBD_StdEPReq+0xfe>
{
if ((ep_addr != 0x00U) && (ep_addr != 0x80U) && (req->wLength == 0x00U))
800be08: 7bbb ldrb r3, [r7, #14]
800be0a: 2b00 cmp r3, #0
800be0c: d00b beq.n 800be26 <USBD_StdEPReq+0xfe>
800be0e: 7bbb ldrb r3, [r7, #14]
800be10: 2b80 cmp r3, #128 @ 0x80
800be12: d008 beq.n 800be26 <USBD_StdEPReq+0xfe>
800be14: 683b ldr r3, [r7, #0]
800be16: 88db ldrh r3, [r3, #6]
800be18: 2b00 cmp r3, #0
800be1a: d104 bne.n 800be26 <USBD_StdEPReq+0xfe>
{
(void)USBD_LL_StallEP(pdev, ep_addr);
800be1c: 7bbb ldrb r3, [r7, #14]
800be1e: 4619 mov r1, r3
800be20: 6878 ldr r0, [r7, #4]
800be22: f006 ff92 bl 8012d4a <USBD_LL_StallEP>
}
}
(void)USBD_CtlSendStatus(pdev);
800be26: 6878 ldr r0, [r7, #4]
800be28: f000 fd1d bl 800c866 <USBD_CtlSendStatus>
break;
800be2c: e004 b.n 800be38 <USBD_StdEPReq+0x110>
default:
USBD_CtlError(pdev, req);
800be2e: 6839 ldr r1, [r7, #0]
800be30: 6878 ldr r0, [r7, #4]
800be32: f000 fc5e bl 800c6f2 <USBD_CtlError>
break;
800be36: bf00 nop
}
break;
800be38: e107 b.n 800c04a <USBD_StdEPReq+0x322>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
800be3a: 687b ldr r3, [r7, #4]
800be3c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800be40: b2db uxtb r3, r3
800be42: 2b02 cmp r3, #2
800be44: d002 beq.n 800be4c <USBD_StdEPReq+0x124>
800be46: 2b03 cmp r3, #3
800be48: d016 beq.n 800be78 <USBD_StdEPReq+0x150>
800be4a: e04b b.n 800bee4 <USBD_StdEPReq+0x1bc>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800be4c: 7bbb ldrb r3, [r7, #14]
800be4e: 2b00 cmp r3, #0
800be50: d00d beq.n 800be6e <USBD_StdEPReq+0x146>
800be52: 7bbb ldrb r3, [r7, #14]
800be54: 2b80 cmp r3, #128 @ 0x80
800be56: d00a beq.n 800be6e <USBD_StdEPReq+0x146>
{
(void)USBD_LL_StallEP(pdev, ep_addr);
800be58: 7bbb ldrb r3, [r7, #14]
800be5a: 4619 mov r1, r3
800be5c: 6878 ldr r0, [r7, #4]
800be5e: f006 ff74 bl 8012d4a <USBD_LL_StallEP>
(void)USBD_LL_StallEP(pdev, 0x80U);
800be62: 2180 movs r1, #128 @ 0x80
800be64: 6878 ldr r0, [r7, #4]
800be66: f006 ff70 bl 8012d4a <USBD_LL_StallEP>
800be6a: bf00 nop
}
else
{
USBD_CtlError(pdev, req);
}
break;
800be6c: e040 b.n 800bef0 <USBD_StdEPReq+0x1c8>
USBD_CtlError(pdev, req);
800be6e: 6839 ldr r1, [r7, #0]
800be70: 6878 ldr r0, [r7, #4]
800be72: f000 fc3e bl 800c6f2 <USBD_CtlError>
break;
800be76: e03b b.n 800bef0 <USBD_StdEPReq+0x1c8>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800be78: 683b ldr r3, [r7, #0]
800be7a: 885b ldrh r3, [r3, #2]
800be7c: 2b00 cmp r3, #0
800be7e: d136 bne.n 800beee <USBD_StdEPReq+0x1c6>
{
if ((ep_addr & 0x7FU) != 0x00U)
800be80: 7bbb ldrb r3, [r7, #14]
800be82: f003 037f and.w r3, r3, #127 @ 0x7f
800be86: 2b00 cmp r3, #0
800be88: d004 beq.n 800be94 <USBD_StdEPReq+0x16c>
{
(void)USBD_LL_ClearStallEP(pdev, ep_addr);
800be8a: 7bbb ldrb r3, [r7, #14]
800be8c: 4619 mov r1, r3
800be8e: 6878 ldr r0, [r7, #4]
800be90: f006 ff7a bl 8012d88 <USBD_LL_ClearStallEP>
}
(void)USBD_CtlSendStatus(pdev);
800be94: 6878 ldr r0, [r7, #4]
800be96: f000 fce6 bl 800c866 <USBD_CtlSendStatus>
/* Get the class index relative to this interface */
idx = USBD_CoreFindEP(pdev, ep_addr);
800be9a: 7bbb ldrb r3, [r7, #14]
800be9c: 4619 mov r1, r3
800be9e: 6878 ldr r0, [r7, #4]
800bea0: f7ff fde4 bl 800ba6c <USBD_CoreFindEP>
800bea4: 4603 mov r3, r0
800bea6: 737b strb r3, [r7, #13]
if (((uint8_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS))
800bea8: 7b7b ldrb r3, [r7, #13]
800beaa: 2bff cmp r3, #255 @ 0xff
800beac: d01f beq.n 800beee <USBD_StdEPReq+0x1c6>
800beae: 7b7b ldrb r3, [r7, #13]
800beb0: 2b00 cmp r3, #0
800beb2: d11c bne.n 800beee <USBD_StdEPReq+0x1c6>
{
pdev->classId = idx;
800beb4: 7b7a ldrb r2, [r7, #13]
800beb6: 687b ldr r3, [r7, #4]
800beb8: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4
/* Call the class data out function to manage the request */
if (pdev->pClass[idx]->Setup != NULL)
800bebc: 7b7a ldrb r2, [r7, #13]
800bebe: 687b ldr r3, [r7, #4]
800bec0: 32ae adds r2, #174 @ 0xae
800bec2: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800bec6: 689b ldr r3, [r3, #8]
800bec8: 2b00 cmp r3, #0
800beca: d010 beq.n 800beee <USBD_StdEPReq+0x1c6>
{
ret = (USBD_StatusTypeDef)(pdev->pClass[idx]->Setup(pdev, req));
800becc: 7b7a ldrb r2, [r7, #13]
800bece: 687b ldr r3, [r7, #4]
800bed0: 32ae adds r2, #174 @ 0xae
800bed2: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800bed6: 689b ldr r3, [r3, #8]
800bed8: 6839 ldr r1, [r7, #0]
800beda: 6878 ldr r0, [r7, #4]
800bedc: 4798 blx r3
800bede: 4603 mov r3, r0
800bee0: 73fb strb r3, [r7, #15]
}
}
}
break;
800bee2: e004 b.n 800beee <USBD_StdEPReq+0x1c6>
default:
USBD_CtlError(pdev, req);
800bee4: 6839 ldr r1, [r7, #0]
800bee6: 6878 ldr r0, [r7, #4]
800bee8: f000 fc03 bl 800c6f2 <USBD_CtlError>
break;
800beec: e000 b.n 800bef0 <USBD_StdEPReq+0x1c8>
break;
800beee: bf00 nop
}
break;
800bef0: e0ab b.n 800c04a <USBD_StdEPReq+0x322>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
800bef2: 687b ldr r3, [r7, #4]
800bef4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800bef8: b2db uxtb r3, r3
800befa: 2b02 cmp r3, #2
800befc: d002 beq.n 800bf04 <USBD_StdEPReq+0x1dc>
800befe: 2b03 cmp r3, #3
800bf00: d032 beq.n 800bf68 <USBD_StdEPReq+0x240>
800bf02: e097 b.n 800c034 <USBD_StdEPReq+0x30c>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800bf04: 7bbb ldrb r3, [r7, #14]
800bf06: 2b00 cmp r3, #0
800bf08: d007 beq.n 800bf1a <USBD_StdEPReq+0x1f2>
800bf0a: 7bbb ldrb r3, [r7, #14]
800bf0c: 2b80 cmp r3, #128 @ 0x80
800bf0e: d004 beq.n 800bf1a <USBD_StdEPReq+0x1f2>
{
USBD_CtlError(pdev, req);
800bf10: 6839 ldr r1, [r7, #0]
800bf12: 6878 ldr r0, [r7, #4]
800bf14: f000 fbed bl 800c6f2 <USBD_CtlError>
break;
800bf18: e091 b.n 800c03e <USBD_StdEPReq+0x316>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800bf1a: f997 300e ldrsb.w r3, [r7, #14]
800bf1e: 2b00 cmp r3, #0
800bf20: da0b bge.n 800bf3a <USBD_StdEPReq+0x212>
800bf22: 7bbb ldrb r3, [r7, #14]
800bf24: f003 027f and.w r2, r3, #127 @ 0x7f
800bf28: 4613 mov r3, r2
800bf2a: 009b lsls r3, r3, #2
800bf2c: 4413 add r3, r2
800bf2e: 009b lsls r3, r3, #2
800bf30: 3310 adds r3, #16
800bf32: 687a ldr r2, [r7, #4]
800bf34: 4413 add r3, r2
800bf36: 3304 adds r3, #4
800bf38: e00b b.n 800bf52 <USBD_StdEPReq+0x22a>
&pdev->ep_out[ep_addr & 0x7FU];
800bf3a: 7bbb ldrb r3, [r7, #14]
800bf3c: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800bf40: 4613 mov r3, r2
800bf42: 009b lsls r3, r3, #2
800bf44: 4413 add r3, r2
800bf46: 009b lsls r3, r3, #2
800bf48: f503 73a8 add.w r3, r3, #336 @ 0x150
800bf4c: 687a ldr r2, [r7, #4]
800bf4e: 4413 add r3, r2
800bf50: 3304 adds r3, #4
800bf52: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
800bf54: 68bb ldr r3, [r7, #8]
800bf56: 2200 movs r2, #0
800bf58: 601a str r2, [r3, #0]
(void)USBD_CtlSendData(pdev, (uint8_t *)&pep->status, 2U);
800bf5a: 68bb ldr r3, [r7, #8]
800bf5c: 2202 movs r2, #2
800bf5e: 4619 mov r1, r3
800bf60: 6878 ldr r0, [r7, #4]
800bf62: f000 fc43 bl 800c7ec <USBD_CtlSendData>
break;
800bf66: e06a b.n 800c03e <USBD_StdEPReq+0x316>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
800bf68: f997 300e ldrsb.w r3, [r7, #14]
800bf6c: 2b00 cmp r3, #0
800bf6e: da11 bge.n 800bf94 <USBD_StdEPReq+0x26c>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
800bf70: 7bbb ldrb r3, [r7, #14]
800bf72: f003 020f and.w r2, r3, #15
800bf76: 6879 ldr r1, [r7, #4]
800bf78: 4613 mov r3, r2
800bf7a: 009b lsls r3, r3, #2
800bf7c: 4413 add r3, r2
800bf7e: 009b lsls r3, r3, #2
800bf80: 440b add r3, r1
800bf82: 3324 adds r3, #36 @ 0x24
800bf84: 881b ldrh r3, [r3, #0]
800bf86: 2b00 cmp r3, #0
800bf88: d117 bne.n 800bfba <USBD_StdEPReq+0x292>
{
USBD_CtlError(pdev, req);
800bf8a: 6839 ldr r1, [r7, #0]
800bf8c: 6878 ldr r0, [r7, #4]
800bf8e: f000 fbb0 bl 800c6f2 <USBD_CtlError>
break;
800bf92: e054 b.n 800c03e <USBD_StdEPReq+0x316>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
800bf94: 7bbb ldrb r3, [r7, #14]
800bf96: f003 020f and.w r2, r3, #15
800bf9a: 6879 ldr r1, [r7, #4]
800bf9c: 4613 mov r3, r2
800bf9e: 009b lsls r3, r3, #2
800bfa0: 4413 add r3, r2
800bfa2: 009b lsls r3, r3, #2
800bfa4: 440b add r3, r1
800bfa6: f503 73b2 add.w r3, r3, #356 @ 0x164
800bfaa: 881b ldrh r3, [r3, #0]
800bfac: 2b00 cmp r3, #0
800bfae: d104 bne.n 800bfba <USBD_StdEPReq+0x292>
{
USBD_CtlError(pdev, req);
800bfb0: 6839 ldr r1, [r7, #0]
800bfb2: 6878 ldr r0, [r7, #4]
800bfb4: f000 fb9d bl 800c6f2 <USBD_CtlError>
break;
800bfb8: e041 b.n 800c03e <USBD_StdEPReq+0x316>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800bfba: f997 300e ldrsb.w r3, [r7, #14]
800bfbe: 2b00 cmp r3, #0
800bfc0: da0b bge.n 800bfda <USBD_StdEPReq+0x2b2>
800bfc2: 7bbb ldrb r3, [r7, #14]
800bfc4: f003 027f and.w r2, r3, #127 @ 0x7f
800bfc8: 4613 mov r3, r2
800bfca: 009b lsls r3, r3, #2
800bfcc: 4413 add r3, r2
800bfce: 009b lsls r3, r3, #2
800bfd0: 3310 adds r3, #16
800bfd2: 687a ldr r2, [r7, #4]
800bfd4: 4413 add r3, r2
800bfd6: 3304 adds r3, #4
800bfd8: e00b b.n 800bff2 <USBD_StdEPReq+0x2ca>
&pdev->ep_out[ep_addr & 0x7FU];
800bfda: 7bbb ldrb r3, [r7, #14]
800bfdc: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800bfe0: 4613 mov r3, r2
800bfe2: 009b lsls r3, r3, #2
800bfe4: 4413 add r3, r2
800bfe6: 009b lsls r3, r3, #2
800bfe8: f503 73a8 add.w r3, r3, #336 @ 0x150
800bfec: 687a ldr r2, [r7, #4]
800bfee: 4413 add r3, r2
800bff0: 3304 adds r3, #4
800bff2: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
800bff4: 7bbb ldrb r3, [r7, #14]
800bff6: 2b00 cmp r3, #0
800bff8: d002 beq.n 800c000 <USBD_StdEPReq+0x2d8>
800bffa: 7bbb ldrb r3, [r7, #14]
800bffc: 2b80 cmp r3, #128 @ 0x80
800bffe: d103 bne.n 800c008 <USBD_StdEPReq+0x2e0>
{
pep->status = 0x0000U;
800c000: 68bb ldr r3, [r7, #8]
800c002: 2200 movs r2, #0
800c004: 601a str r2, [r3, #0]
800c006: e00e b.n 800c026 <USBD_StdEPReq+0x2fe>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr) != 0U)
800c008: 7bbb ldrb r3, [r7, #14]
800c00a: 4619 mov r1, r3
800c00c: 6878 ldr r0, [r7, #4]
800c00e: f006 feda bl 8012dc6 <USBD_LL_IsStallEP>
800c012: 4603 mov r3, r0
800c014: 2b00 cmp r3, #0
800c016: d003 beq.n 800c020 <USBD_StdEPReq+0x2f8>
{
pep->status = 0x0001U;
800c018: 68bb ldr r3, [r7, #8]
800c01a: 2201 movs r2, #1
800c01c: 601a str r2, [r3, #0]
800c01e: e002 b.n 800c026 <USBD_StdEPReq+0x2fe>
}
else
{
pep->status = 0x0000U;
800c020: 68bb ldr r3, [r7, #8]
800c022: 2200 movs r2, #0
800c024: 601a str r2, [r3, #0]
}
(void)USBD_CtlSendData(pdev, (uint8_t *)&pep->status, 2U);
800c026: 68bb ldr r3, [r7, #8]
800c028: 2202 movs r2, #2
800c02a: 4619 mov r1, r3
800c02c: 6878 ldr r0, [r7, #4]
800c02e: f000 fbdd bl 800c7ec <USBD_CtlSendData>
break;
800c032: e004 b.n 800c03e <USBD_StdEPReq+0x316>
default:
USBD_CtlError(pdev, req);
800c034: 6839 ldr r1, [r7, #0]
800c036: 6878 ldr r0, [r7, #4]
800c038: f000 fb5b bl 800c6f2 <USBD_CtlError>
break;
800c03c: bf00 nop
}
break;
800c03e: e004 b.n 800c04a <USBD_StdEPReq+0x322>
default:
USBD_CtlError(pdev, req);
800c040: 6839 ldr r1, [r7, #0]
800c042: 6878 ldr r0, [r7, #4]
800c044: f000 fb55 bl 800c6f2 <USBD_CtlError>
break;
800c048: bf00 nop
}
break;
800c04a: e005 b.n 800c058 <USBD_StdEPReq+0x330>
default:
USBD_CtlError(pdev, req);
800c04c: 6839 ldr r1, [r7, #0]
800c04e: 6878 ldr r0, [r7, #4]
800c050: f000 fb4f bl 800c6f2 <USBD_CtlError>
break;
800c054: e000 b.n 800c058 <USBD_StdEPReq+0x330>
break;
800c056: bf00 nop
}
return ret;
800c058: 7bfb ldrb r3, [r7, #15]
}
800c05a: 4618 mov r0, r3
800c05c: 3710 adds r7, #16
800c05e: 46bd mov sp, r7
800c060: bd80 pop {r7, pc}
...
0800c064 <USBD_GetDescriptor>:
* @param pdev: device instance
* @param req: usb request
* @retval None
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800c064: b580 push {r7, lr}
800c066: b084 sub sp, #16
800c068: af00 add r7, sp, #0
800c06a: 6078 str r0, [r7, #4]
800c06c: 6039 str r1, [r7, #0]
uint16_t len = 0U;
800c06e: 2300 movs r3, #0
800c070: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
800c072: 2300 movs r3, #0
800c074: 60fb str r3, [r7, #12]
uint8_t err = 0U;
800c076: 2300 movs r3, #0
800c078: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
800c07a: 683b ldr r3, [r7, #0]
800c07c: 885b ldrh r3, [r3, #2]
800c07e: 0a1b lsrs r3, r3, #8
800c080: b29b uxth r3, r3
800c082: 3b01 subs r3, #1
800c084: 2b06 cmp r3, #6
800c086: f200 8128 bhi.w 800c2da <USBD_GetDescriptor+0x276>
800c08a: a201 add r2, pc, #4 @ (adr r2, 800c090 <USBD_GetDescriptor+0x2c>)
800c08c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800c090: 0800c0ad .word 0x0800c0ad
800c094: 0800c0c5 .word 0x0800c0c5
800c098: 0800c105 .word 0x0800c105
800c09c: 0800c2db .word 0x0800c2db
800c0a0: 0800c2db .word 0x0800c2db
800c0a4: 0800c27b .word 0x0800c27b
800c0a8: 0800c2a7 .word 0x0800c2a7
err++;
}
break;
#endif /* (USBD_LPM_ENABLED == 1U) || (USBD_CLASS_BOS_ENABLED == 1U) */
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
800c0ac: 687b ldr r3, [r7, #4]
800c0ae: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c0b2: 681b ldr r3, [r3, #0]
800c0b4: 687a ldr r2, [r7, #4]
800c0b6: 7c12 ldrb r2, [r2, #16]
800c0b8: f107 0108 add.w r1, r7, #8
800c0bc: 4610 mov r0, r2
800c0be: 4798 blx r3
800c0c0: 60f8 str r0, [r7, #12]
break;
800c0c2: e112 b.n 800c2ea <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c0c4: 687b ldr r3, [r7, #4]
800c0c6: 7c1b ldrb r3, [r3, #16]
800c0c8: 2b00 cmp r3, #0
800c0ca: d10d bne.n 800c0e8 <USBD_GetDescriptor+0x84>
pbuf = (uint8_t *)USBD_CMPSIT.GetHSConfigDescriptor(&len);
}
else
#endif /* USE_USBD_COMPOSITE */
{
pbuf = (uint8_t *)pdev->pClass[0]->GetHSConfigDescriptor(&len);
800c0cc: 687b ldr r3, [r7, #4]
800c0ce: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c0d2: 6a9b ldr r3, [r3, #40] @ 0x28
800c0d4: f107 0208 add.w r2, r7, #8
800c0d8: 4610 mov r0, r2
800c0da: 4798 blx r3
800c0dc: 60f8 str r0, [r7, #12]
}
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800c0de: 68fb ldr r3, [r7, #12]
800c0e0: 3301 adds r3, #1
800c0e2: 2202 movs r2, #2
800c0e4: 701a strb r2, [r3, #0]
{
pbuf = (uint8_t *)pdev->pClass[0]->GetFSConfigDescriptor(&len);
}
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
800c0e6: e100 b.n 800c2ea <USBD_GetDescriptor+0x286>
pbuf = (uint8_t *)pdev->pClass[0]->GetFSConfigDescriptor(&len);
800c0e8: 687b ldr r3, [r7, #4]
800c0ea: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c0ee: 6adb ldr r3, [r3, #44] @ 0x2c
800c0f0: f107 0208 add.w r2, r7, #8
800c0f4: 4610 mov r0, r2
800c0f6: 4798 blx r3
800c0f8: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800c0fa: 68fb ldr r3, [r7, #12]
800c0fc: 3301 adds r3, #1
800c0fe: 2202 movs r2, #2
800c100: 701a strb r2, [r3, #0]
break;
800c102: e0f2 b.n 800c2ea <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
800c104: 683b ldr r3, [r7, #0]
800c106: 885b ldrh r3, [r3, #2]
800c108: b2db uxtb r3, r3
800c10a: 2b05 cmp r3, #5
800c10c: f200 80ac bhi.w 800c268 <USBD_GetDescriptor+0x204>
800c110: a201 add r2, pc, #4 @ (adr r2, 800c118 <USBD_GetDescriptor+0xb4>)
800c112: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800c116: bf00 nop
800c118: 0800c131 .word 0x0800c131
800c11c: 0800c165 .word 0x0800c165
800c120: 0800c199 .word 0x0800c199
800c124: 0800c1cd .word 0x0800c1cd
800c128: 0800c201 .word 0x0800c201
800c12c: 0800c235 .word 0x0800c235
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
800c130: 687b ldr r3, [r7, #4]
800c132: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c136: 685b ldr r3, [r3, #4]
800c138: 2b00 cmp r3, #0
800c13a: d00b beq.n 800c154 <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
800c13c: 687b ldr r3, [r7, #4]
800c13e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c142: 685b ldr r3, [r3, #4]
800c144: 687a ldr r2, [r7, #4]
800c146: 7c12 ldrb r2, [r2, #16]
800c148: f107 0108 add.w r1, r7, #8
800c14c: 4610 mov r0, r2
800c14e: 4798 blx r3
800c150: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800c152: e091 b.n 800c278 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800c154: 6839 ldr r1, [r7, #0]
800c156: 6878 ldr r0, [r7, #4]
800c158: f000 facb bl 800c6f2 <USBD_CtlError>
err++;
800c15c: 7afb ldrb r3, [r7, #11]
800c15e: 3301 adds r3, #1
800c160: 72fb strb r3, [r7, #11]
break;
800c162: e089 b.n 800c278 <USBD_GetDescriptor+0x214>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
800c164: 687b ldr r3, [r7, #4]
800c166: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c16a: 689b ldr r3, [r3, #8]
800c16c: 2b00 cmp r3, #0
800c16e: d00b beq.n 800c188 <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
800c170: 687b ldr r3, [r7, #4]
800c172: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c176: 689b ldr r3, [r3, #8]
800c178: 687a ldr r2, [r7, #4]
800c17a: 7c12 ldrb r2, [r2, #16]
800c17c: f107 0108 add.w r1, r7, #8
800c180: 4610 mov r0, r2
800c182: 4798 blx r3
800c184: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800c186: e077 b.n 800c278 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800c188: 6839 ldr r1, [r7, #0]
800c18a: 6878 ldr r0, [r7, #4]
800c18c: f000 fab1 bl 800c6f2 <USBD_CtlError>
err++;
800c190: 7afb ldrb r3, [r7, #11]
800c192: 3301 adds r3, #1
800c194: 72fb strb r3, [r7, #11]
break;
800c196: e06f b.n 800c278 <USBD_GetDescriptor+0x214>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
800c198: 687b ldr r3, [r7, #4]
800c19a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c19e: 68db ldr r3, [r3, #12]
800c1a0: 2b00 cmp r3, #0
800c1a2: d00b beq.n 800c1bc <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
800c1a4: 687b ldr r3, [r7, #4]
800c1a6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c1aa: 68db ldr r3, [r3, #12]
800c1ac: 687a ldr r2, [r7, #4]
800c1ae: 7c12 ldrb r2, [r2, #16]
800c1b0: f107 0108 add.w r1, r7, #8
800c1b4: 4610 mov r0, r2
800c1b6: 4798 blx r3
800c1b8: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800c1ba: e05d b.n 800c278 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800c1bc: 6839 ldr r1, [r7, #0]
800c1be: 6878 ldr r0, [r7, #4]
800c1c0: f000 fa97 bl 800c6f2 <USBD_CtlError>
err++;
800c1c4: 7afb ldrb r3, [r7, #11]
800c1c6: 3301 adds r3, #1
800c1c8: 72fb strb r3, [r7, #11]
break;
800c1ca: e055 b.n 800c278 <USBD_GetDescriptor+0x214>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
800c1cc: 687b ldr r3, [r7, #4]
800c1ce: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c1d2: 691b ldr r3, [r3, #16]
800c1d4: 2b00 cmp r3, #0
800c1d6: d00b beq.n 800c1f0 <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
800c1d8: 687b ldr r3, [r7, #4]
800c1da: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c1de: 691b ldr r3, [r3, #16]
800c1e0: 687a ldr r2, [r7, #4]
800c1e2: 7c12 ldrb r2, [r2, #16]
800c1e4: f107 0108 add.w r1, r7, #8
800c1e8: 4610 mov r0, r2
800c1ea: 4798 blx r3
800c1ec: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800c1ee: e043 b.n 800c278 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800c1f0: 6839 ldr r1, [r7, #0]
800c1f2: 6878 ldr r0, [r7, #4]
800c1f4: f000 fa7d bl 800c6f2 <USBD_CtlError>
err++;
800c1f8: 7afb ldrb r3, [r7, #11]
800c1fa: 3301 adds r3, #1
800c1fc: 72fb strb r3, [r7, #11]
break;
800c1fe: e03b b.n 800c278 <USBD_GetDescriptor+0x214>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
800c200: 687b ldr r3, [r7, #4]
800c202: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c206: 695b ldr r3, [r3, #20]
800c208: 2b00 cmp r3, #0
800c20a: d00b beq.n 800c224 <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
800c20c: 687b ldr r3, [r7, #4]
800c20e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c212: 695b ldr r3, [r3, #20]
800c214: 687a ldr r2, [r7, #4]
800c216: 7c12 ldrb r2, [r2, #16]
800c218: f107 0108 add.w r1, r7, #8
800c21c: 4610 mov r0, r2
800c21e: 4798 blx r3
800c220: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800c222: e029 b.n 800c278 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800c224: 6839 ldr r1, [r7, #0]
800c226: 6878 ldr r0, [r7, #4]
800c228: f000 fa63 bl 800c6f2 <USBD_CtlError>
err++;
800c22c: 7afb ldrb r3, [r7, #11]
800c22e: 3301 adds r3, #1
800c230: 72fb strb r3, [r7, #11]
break;
800c232: e021 b.n 800c278 <USBD_GetDescriptor+0x214>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
800c234: 687b ldr r3, [r7, #4]
800c236: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c23a: 699b ldr r3, [r3, #24]
800c23c: 2b00 cmp r3, #0
800c23e: d00b beq.n 800c258 <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
800c240: 687b ldr r3, [r7, #4]
800c242: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c246: 699b ldr r3, [r3, #24]
800c248: 687a ldr r2, [r7, #4]
800c24a: 7c12 ldrb r2, [r2, #16]
800c24c: f107 0108 add.w r1, r7, #8
800c250: 4610 mov r0, r2
800c252: 4798 blx r3
800c254: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800c256: e00f b.n 800c278 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800c258: 6839 ldr r1, [r7, #0]
800c25a: 6878 ldr r0, [r7, #4]
800c25c: f000 fa49 bl 800c6f2 <USBD_CtlError>
err++;
800c260: 7afb ldrb r3, [r7, #11]
800c262: 3301 adds r3, #1
800c264: 72fb strb r3, [r7, #11]
break;
800c266: e007 b.n 800c278 <USBD_GetDescriptor+0x214>
err++;
}
#endif /* USBD_SUPPORT_USER_STRING_DESC */
#if ((USBD_CLASS_USER_STRING_DESC == 0U) && (USBD_SUPPORT_USER_STRING_DESC == 0U))
USBD_CtlError(pdev, req);
800c268: 6839 ldr r1, [r7, #0]
800c26a: 6878 ldr r0, [r7, #4]
800c26c: f000 fa41 bl 800c6f2 <USBD_CtlError>
err++;
800c270: 7afb ldrb r3, [r7, #11]
800c272: 3301 adds r3, #1
800c274: 72fb strb r3, [r7, #11]
#endif /* (USBD_CLASS_USER_STRING_DESC == 0U) && (USBD_SUPPORT_USER_STRING_DESC == 0U) */
break;
800c276: bf00 nop
}
break;
800c278: e037 b.n 800c2ea <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c27a: 687b ldr r3, [r7, #4]
800c27c: 7c1b ldrb r3, [r3, #16]
800c27e: 2b00 cmp r3, #0
800c280: d109 bne.n 800c296 <USBD_GetDescriptor+0x232>
pbuf = (uint8_t *)USBD_CMPSIT.GetDeviceQualifierDescriptor(&len);
}
else
#endif /* USE_USBD_COMPOSITE */
{
pbuf = (uint8_t *)pdev->pClass[0]->GetDeviceQualifierDescriptor(&len);
800c282: 687b ldr r3, [r7, #4]
800c284: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c288: 6b5b ldr r3, [r3, #52] @ 0x34
800c28a: f107 0208 add.w r2, r7, #8
800c28e: 4610 mov r0, r2
800c290: 4798 blx r3
800c292: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800c294: e029 b.n 800c2ea <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800c296: 6839 ldr r1, [r7, #0]
800c298: 6878 ldr r0, [r7, #4]
800c29a: f000 fa2a bl 800c6f2 <USBD_CtlError>
err++;
800c29e: 7afb ldrb r3, [r7, #11]
800c2a0: 3301 adds r3, #1
800c2a2: 72fb strb r3, [r7, #11]
break;
800c2a4: e021 b.n 800c2ea <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c2a6: 687b ldr r3, [r7, #4]
800c2a8: 7c1b ldrb r3, [r3, #16]
800c2aa: 2b00 cmp r3, #0
800c2ac: d10d bne.n 800c2ca <USBD_GetDescriptor+0x266>
pbuf = (uint8_t *)USBD_CMPSIT.GetOtherSpeedConfigDescriptor(&len);
}
else
#endif /* USE_USBD_COMPOSITE */
{
pbuf = (uint8_t *)pdev->pClass[0]->GetOtherSpeedConfigDescriptor(&len);
800c2ae: 687b ldr r3, [r7, #4]
800c2b0: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c2b4: 6b1b ldr r3, [r3, #48] @ 0x30
800c2b6: f107 0208 add.w r2, r7, #8
800c2ba: 4610 mov r0, r2
800c2bc: 4798 blx r3
800c2be: 60f8 str r0, [r7, #12]
}
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
800c2c0: 68fb ldr r3, [r7, #12]
800c2c2: 3301 adds r3, #1
800c2c4: 2207 movs r2, #7
800c2c6: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800c2c8: e00f b.n 800c2ea <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800c2ca: 6839 ldr r1, [r7, #0]
800c2cc: 6878 ldr r0, [r7, #4]
800c2ce: f000 fa10 bl 800c6f2 <USBD_CtlError>
err++;
800c2d2: 7afb ldrb r3, [r7, #11]
800c2d4: 3301 adds r3, #1
800c2d6: 72fb strb r3, [r7, #11]
break;
800c2d8: e007 b.n 800c2ea <USBD_GetDescriptor+0x286>
default:
USBD_CtlError(pdev, req);
800c2da: 6839 ldr r1, [r7, #0]
800c2dc: 6878 ldr r0, [r7, #4]
800c2de: f000 fa08 bl 800c6f2 <USBD_CtlError>
err++;
800c2e2: 7afb ldrb r3, [r7, #11]
800c2e4: 3301 adds r3, #1
800c2e6: 72fb strb r3, [r7, #11]
break;
800c2e8: bf00 nop
}
if (err != 0U)
800c2ea: 7afb ldrb r3, [r7, #11]
800c2ec: 2b00 cmp r3, #0
800c2ee: d11e bne.n 800c32e <USBD_GetDescriptor+0x2ca>
{
return;
}
if (req->wLength != 0U)
800c2f0: 683b ldr r3, [r7, #0]
800c2f2: 88db ldrh r3, [r3, #6]
800c2f4: 2b00 cmp r3, #0
800c2f6: d016 beq.n 800c326 <USBD_GetDescriptor+0x2c2>
{
if (len != 0U)
800c2f8: 893b ldrh r3, [r7, #8]
800c2fa: 2b00 cmp r3, #0
800c2fc: d00e beq.n 800c31c <USBD_GetDescriptor+0x2b8>
{
len = MIN(len, req->wLength);
800c2fe: 683b ldr r3, [r7, #0]
800c300: 88da ldrh r2, [r3, #6]
800c302: 893b ldrh r3, [r7, #8]
800c304: 4293 cmp r3, r2
800c306: bf28 it cs
800c308: 4613 movcs r3, r2
800c30a: b29b uxth r3, r3
800c30c: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
800c30e: 893b ldrh r3, [r7, #8]
800c310: 461a mov r2, r3
800c312: 68f9 ldr r1, [r7, #12]
800c314: 6878 ldr r0, [r7, #4]
800c316: f000 fa69 bl 800c7ec <USBD_CtlSendData>
800c31a: e009 b.n 800c330 <USBD_GetDescriptor+0x2cc>
}
else
{
USBD_CtlError(pdev, req);
800c31c: 6839 ldr r1, [r7, #0]
800c31e: 6878 ldr r0, [r7, #4]
800c320: f000 f9e7 bl 800c6f2 <USBD_CtlError>
800c324: e004 b.n 800c330 <USBD_GetDescriptor+0x2cc>
}
}
else
{
(void)USBD_CtlSendStatus(pdev);
800c326: 6878 ldr r0, [r7, #4]
800c328: f000 fa9d bl 800c866 <USBD_CtlSendStatus>
800c32c: e000 b.n 800c330 <USBD_GetDescriptor+0x2cc>
return;
800c32e: bf00 nop
}
}
800c330: 3710 adds r7, #16
800c332: 46bd mov sp, r7
800c334: bd80 pop {r7, pc}
800c336: bf00 nop
0800c338 <USBD_SetAddress>:
* @param pdev: device instance
* @param req: usb request
* @retval None
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800c338: b580 push {r7, lr}
800c33a: b084 sub sp, #16
800c33c: af00 add r7, sp, #0
800c33e: 6078 str r0, [r7, #4]
800c340: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
800c342: 683b ldr r3, [r7, #0]
800c344: 889b ldrh r3, [r3, #4]
800c346: 2b00 cmp r3, #0
800c348: d131 bne.n 800c3ae <USBD_SetAddress+0x76>
800c34a: 683b ldr r3, [r7, #0]
800c34c: 88db ldrh r3, [r3, #6]
800c34e: 2b00 cmp r3, #0
800c350: d12d bne.n 800c3ae <USBD_SetAddress+0x76>
800c352: 683b ldr r3, [r7, #0]
800c354: 885b ldrh r3, [r3, #2]
800c356: 2b7f cmp r3, #127 @ 0x7f
800c358: d829 bhi.n 800c3ae <USBD_SetAddress+0x76>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
800c35a: 683b ldr r3, [r7, #0]
800c35c: 885b ldrh r3, [r3, #2]
800c35e: b2db uxtb r3, r3
800c360: f003 037f and.w r3, r3, #127 @ 0x7f
800c364: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c366: 687b ldr r3, [r7, #4]
800c368: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c36c: b2db uxtb r3, r3
800c36e: 2b03 cmp r3, #3
800c370: d104 bne.n 800c37c <USBD_SetAddress+0x44>
{
USBD_CtlError(pdev, req);
800c372: 6839 ldr r1, [r7, #0]
800c374: 6878 ldr r0, [r7, #4]
800c376: f000 f9bc bl 800c6f2 <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c37a: e01d b.n 800c3b8 <USBD_SetAddress+0x80>
}
else
{
pdev->dev_address = dev_addr;
800c37c: 687b ldr r3, [r7, #4]
800c37e: 7bfa ldrb r2, [r7, #15]
800c380: f883 229e strb.w r2, [r3, #670] @ 0x29e
(void)USBD_LL_SetUSBAddress(pdev, dev_addr);
800c384: 7bfb ldrb r3, [r7, #15]
800c386: 4619 mov r1, r3
800c388: 6878 ldr r0, [r7, #4]
800c38a: f006 fd48 bl 8012e1e <USBD_LL_SetUSBAddress>
(void)USBD_CtlSendStatus(pdev);
800c38e: 6878 ldr r0, [r7, #4]
800c390: f000 fa69 bl 800c866 <USBD_CtlSendStatus>
if (dev_addr != 0U)
800c394: 7bfb ldrb r3, [r7, #15]
800c396: 2b00 cmp r3, #0
800c398: d004 beq.n 800c3a4 <USBD_SetAddress+0x6c>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800c39a: 687b ldr r3, [r7, #4]
800c39c: 2202 movs r2, #2
800c39e: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c3a2: e009 b.n 800c3b8 <USBD_SetAddress+0x80>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
800c3a4: 687b ldr r3, [r7, #4]
800c3a6: 2201 movs r2, #1
800c3a8: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c3ac: e004 b.n 800c3b8 <USBD_SetAddress+0x80>
}
}
}
else
{
USBD_CtlError(pdev, req);
800c3ae: 6839 ldr r1, [r7, #0]
800c3b0: 6878 ldr r0, [r7, #4]
800c3b2: f000 f99e bl 800c6f2 <USBD_CtlError>
}
}
800c3b6: bf00 nop
800c3b8: bf00 nop
800c3ba: 3710 adds r7, #16
800c3bc: 46bd mov sp, r7
800c3be: bd80 pop {r7, pc}
0800c3c0 <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static USBD_StatusTypeDef USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800c3c0: b580 push {r7, lr}
800c3c2: b084 sub sp, #16
800c3c4: af00 add r7, sp, #0
800c3c6: 6078 str r0, [r7, #4]
800c3c8: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800c3ca: 2300 movs r3, #0
800c3cc: 73fb strb r3, [r7, #15]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
800c3ce: 683b ldr r3, [r7, #0]
800c3d0: 885b ldrh r3, [r3, #2]
800c3d2: b2da uxtb r2, r3
800c3d4: 4b4e ldr r3, [pc, #312] @ (800c510 <USBD_SetConfig+0x150>)
800c3d6: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
800c3d8: 4b4d ldr r3, [pc, #308] @ (800c510 <USBD_SetConfig+0x150>)
800c3da: 781b ldrb r3, [r3, #0]
800c3dc: 2b01 cmp r3, #1
800c3de: d905 bls.n 800c3ec <USBD_SetConfig+0x2c>
{
USBD_CtlError(pdev, req);
800c3e0: 6839 ldr r1, [r7, #0]
800c3e2: 6878 ldr r0, [r7, #4]
800c3e4: f000 f985 bl 800c6f2 <USBD_CtlError>
return USBD_FAIL;
800c3e8: 2303 movs r3, #3
800c3ea: e08c b.n 800c506 <USBD_SetConfig+0x146>
}
switch (pdev->dev_state)
800c3ec: 687b ldr r3, [r7, #4]
800c3ee: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c3f2: b2db uxtb r3, r3
800c3f4: 2b02 cmp r3, #2
800c3f6: d002 beq.n 800c3fe <USBD_SetConfig+0x3e>
800c3f8: 2b03 cmp r3, #3
800c3fa: d029 beq.n 800c450 <USBD_SetConfig+0x90>
800c3fc: e075 b.n 800c4ea <USBD_SetConfig+0x12a>
{
case USBD_STATE_ADDRESSED:
if (cfgidx != 0U)
800c3fe: 4b44 ldr r3, [pc, #272] @ (800c510 <USBD_SetConfig+0x150>)
800c400: 781b ldrb r3, [r3, #0]
800c402: 2b00 cmp r3, #0
800c404: d020 beq.n 800c448 <USBD_SetConfig+0x88>
{
pdev->dev_config = cfgidx;
800c406: 4b42 ldr r3, [pc, #264] @ (800c510 <USBD_SetConfig+0x150>)
800c408: 781b ldrb r3, [r3, #0]
800c40a: 461a mov r2, r3
800c40c: 687b ldr r3, [r7, #4]
800c40e: 605a str r2, [r3, #4]
ret = USBD_SetClassConfig(pdev, cfgidx);
800c410: 4b3f ldr r3, [pc, #252] @ (800c510 <USBD_SetConfig+0x150>)
800c412: 781b ldrb r3, [r3, #0]
800c414: 4619 mov r1, r3
800c416: 6878 ldr r0, [r7, #4]
800c418: f7fe ffe3 bl 800b3e2 <USBD_SetClassConfig>
800c41c: 4603 mov r3, r0
800c41e: 73fb strb r3, [r7, #15]
if (ret != USBD_OK)
800c420: 7bfb ldrb r3, [r7, #15]
800c422: 2b00 cmp r3, #0
800c424: d008 beq.n 800c438 <USBD_SetConfig+0x78>
{
USBD_CtlError(pdev, req);
800c426: 6839 ldr r1, [r7, #0]
800c428: 6878 ldr r0, [r7, #4]
800c42a: f000 f962 bl 800c6f2 <USBD_CtlError>
pdev->dev_state = USBD_STATE_ADDRESSED;
800c42e: 687b ldr r3, [r7, #4]
800c430: 2202 movs r2, #2
800c432: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
else
{
(void)USBD_CtlSendStatus(pdev);
}
break;
800c436: e065 b.n 800c504 <USBD_SetConfig+0x144>
(void)USBD_CtlSendStatus(pdev);
800c438: 6878 ldr r0, [r7, #4]
800c43a: f000 fa14 bl 800c866 <USBD_CtlSendStatus>
pdev->dev_state = USBD_STATE_CONFIGURED;
800c43e: 687b ldr r3, [r7, #4]
800c440: 2203 movs r2, #3
800c442: f883 229c strb.w r2, [r3, #668] @ 0x29c
break;
800c446: e05d b.n 800c504 <USBD_SetConfig+0x144>
(void)USBD_CtlSendStatus(pdev);
800c448: 6878 ldr r0, [r7, #4]
800c44a: f000 fa0c bl 800c866 <USBD_CtlSendStatus>
break;
800c44e: e059 b.n 800c504 <USBD_SetConfig+0x144>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
800c450: 4b2f ldr r3, [pc, #188] @ (800c510 <USBD_SetConfig+0x150>)
800c452: 781b ldrb r3, [r3, #0]
800c454: 2b00 cmp r3, #0
800c456: d112 bne.n 800c47e <USBD_SetConfig+0xbe>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800c458: 687b ldr r3, [r7, #4]
800c45a: 2202 movs r2, #2
800c45c: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->dev_config = cfgidx;
800c460: 4b2b ldr r3, [pc, #172] @ (800c510 <USBD_SetConfig+0x150>)
800c462: 781b ldrb r3, [r3, #0]
800c464: 461a mov r2, r3
800c466: 687b ldr r3, [r7, #4]
800c468: 605a str r2, [r3, #4]
(void)USBD_ClrClassConfig(pdev, cfgidx);
800c46a: 4b29 ldr r3, [pc, #164] @ (800c510 <USBD_SetConfig+0x150>)
800c46c: 781b ldrb r3, [r3, #0]
800c46e: 4619 mov r1, r3
800c470: 6878 ldr r0, [r7, #4]
800c472: f7fe ffd2 bl 800b41a <USBD_ClrClassConfig>
(void)USBD_CtlSendStatus(pdev);
800c476: 6878 ldr r0, [r7, #4]
800c478: f000 f9f5 bl 800c866 <USBD_CtlSendStatus>
}
else
{
(void)USBD_CtlSendStatus(pdev);
}
break;
800c47c: e042 b.n 800c504 <USBD_SetConfig+0x144>
else if (cfgidx != pdev->dev_config)
800c47e: 4b24 ldr r3, [pc, #144] @ (800c510 <USBD_SetConfig+0x150>)
800c480: 781b ldrb r3, [r3, #0]
800c482: 461a mov r2, r3
800c484: 687b ldr r3, [r7, #4]
800c486: 685b ldr r3, [r3, #4]
800c488: 429a cmp r2, r3
800c48a: d02a beq.n 800c4e2 <USBD_SetConfig+0x122>
(void)USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
800c48c: 687b ldr r3, [r7, #4]
800c48e: 685b ldr r3, [r3, #4]
800c490: b2db uxtb r3, r3
800c492: 4619 mov r1, r3
800c494: 6878 ldr r0, [r7, #4]
800c496: f7fe ffc0 bl 800b41a <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
800c49a: 4b1d ldr r3, [pc, #116] @ (800c510 <USBD_SetConfig+0x150>)
800c49c: 781b ldrb r3, [r3, #0]
800c49e: 461a mov r2, r3
800c4a0: 687b ldr r3, [r7, #4]
800c4a2: 605a str r2, [r3, #4]
ret = USBD_SetClassConfig(pdev, cfgidx);
800c4a4: 4b1a ldr r3, [pc, #104] @ (800c510 <USBD_SetConfig+0x150>)
800c4a6: 781b ldrb r3, [r3, #0]
800c4a8: 4619 mov r1, r3
800c4aa: 6878 ldr r0, [r7, #4]
800c4ac: f7fe ff99 bl 800b3e2 <USBD_SetClassConfig>
800c4b0: 4603 mov r3, r0
800c4b2: 73fb strb r3, [r7, #15]
if (ret != USBD_OK)
800c4b4: 7bfb ldrb r3, [r7, #15]
800c4b6: 2b00 cmp r3, #0
800c4b8: d00f beq.n 800c4da <USBD_SetConfig+0x11a>
USBD_CtlError(pdev, req);
800c4ba: 6839 ldr r1, [r7, #0]
800c4bc: 6878 ldr r0, [r7, #4]
800c4be: f000 f918 bl 800c6f2 <USBD_CtlError>
(void)USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
800c4c2: 687b ldr r3, [r7, #4]
800c4c4: 685b ldr r3, [r3, #4]
800c4c6: b2db uxtb r3, r3
800c4c8: 4619 mov r1, r3
800c4ca: 6878 ldr r0, [r7, #4]
800c4cc: f7fe ffa5 bl 800b41a <USBD_ClrClassConfig>
pdev->dev_state = USBD_STATE_ADDRESSED;
800c4d0: 687b ldr r3, [r7, #4]
800c4d2: 2202 movs r2, #2
800c4d4: f883 229c strb.w r2, [r3, #668] @ 0x29c
break;
800c4d8: e014 b.n 800c504 <USBD_SetConfig+0x144>
(void)USBD_CtlSendStatus(pdev);
800c4da: 6878 ldr r0, [r7, #4]
800c4dc: f000 f9c3 bl 800c866 <USBD_CtlSendStatus>
break;
800c4e0: e010 b.n 800c504 <USBD_SetConfig+0x144>
(void)USBD_CtlSendStatus(pdev);
800c4e2: 6878 ldr r0, [r7, #4]
800c4e4: f000 f9bf bl 800c866 <USBD_CtlSendStatus>
break;
800c4e8: e00c b.n 800c504 <USBD_SetConfig+0x144>
default:
USBD_CtlError(pdev, req);
800c4ea: 6839 ldr r1, [r7, #0]
800c4ec: 6878 ldr r0, [r7, #4]
800c4ee: f000 f900 bl 800c6f2 <USBD_CtlError>
(void)USBD_ClrClassConfig(pdev, cfgidx);
800c4f2: 4b07 ldr r3, [pc, #28] @ (800c510 <USBD_SetConfig+0x150>)
800c4f4: 781b ldrb r3, [r3, #0]
800c4f6: 4619 mov r1, r3
800c4f8: 6878 ldr r0, [r7, #4]
800c4fa: f7fe ff8e bl 800b41a <USBD_ClrClassConfig>
ret = USBD_FAIL;
800c4fe: 2303 movs r3, #3
800c500: 73fb strb r3, [r7, #15]
break;
800c502: bf00 nop
}
return ret;
800c504: 7bfb ldrb r3, [r7, #15]
}
800c506: 4618 mov r0, r3
800c508: 3710 adds r7, #16
800c50a: 46bd mov sp, r7
800c50c: bd80 pop {r7, pc}
800c50e: bf00 nop
800c510: 20010120 .word 0x20010120
0800c514 <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval None
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800c514: b580 push {r7, lr}
800c516: b082 sub sp, #8
800c518: af00 add r7, sp, #0
800c51a: 6078 str r0, [r7, #4]
800c51c: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
800c51e: 683b ldr r3, [r7, #0]
800c520: 88db ldrh r3, [r3, #6]
800c522: 2b01 cmp r3, #1
800c524: d004 beq.n 800c530 <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
800c526: 6839 ldr r1, [r7, #0]
800c528: 6878 ldr r0, [r7, #4]
800c52a: f000 f8e2 bl 800c6f2 <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
800c52e: e023 b.n 800c578 <USBD_GetConfig+0x64>
switch (pdev->dev_state)
800c530: 687b ldr r3, [r7, #4]
800c532: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c536: b2db uxtb r3, r3
800c538: 2b02 cmp r3, #2
800c53a: dc02 bgt.n 800c542 <USBD_GetConfig+0x2e>
800c53c: 2b00 cmp r3, #0
800c53e: dc03 bgt.n 800c548 <USBD_GetConfig+0x34>
800c540: e015 b.n 800c56e <USBD_GetConfig+0x5a>
800c542: 2b03 cmp r3, #3
800c544: d00b beq.n 800c55e <USBD_GetConfig+0x4a>
800c546: e012 b.n 800c56e <USBD_GetConfig+0x5a>
pdev->dev_default_config = 0U;
800c548: 687b ldr r3, [r7, #4]
800c54a: 2200 movs r2, #0
800c54c: 609a str r2, [r3, #8]
(void)USBD_CtlSendData(pdev, (uint8_t *)&pdev->dev_default_config, 1U);
800c54e: 687b ldr r3, [r7, #4]
800c550: 3308 adds r3, #8
800c552: 2201 movs r2, #1
800c554: 4619 mov r1, r3
800c556: 6878 ldr r0, [r7, #4]
800c558: f000 f948 bl 800c7ec <USBD_CtlSendData>
break;
800c55c: e00c b.n 800c578 <USBD_GetConfig+0x64>
(void)USBD_CtlSendData(pdev, (uint8_t *)&pdev->dev_config, 1U);
800c55e: 687b ldr r3, [r7, #4]
800c560: 3304 adds r3, #4
800c562: 2201 movs r2, #1
800c564: 4619 mov r1, r3
800c566: 6878 ldr r0, [r7, #4]
800c568: f000 f940 bl 800c7ec <USBD_CtlSendData>
break;
800c56c: e004 b.n 800c578 <USBD_GetConfig+0x64>
USBD_CtlError(pdev, req);
800c56e: 6839 ldr r1, [r7, #0]
800c570: 6878 ldr r0, [r7, #4]
800c572: f000 f8be bl 800c6f2 <USBD_CtlError>
break;
800c576: bf00 nop
}
800c578: bf00 nop
800c57a: 3708 adds r7, #8
800c57c: 46bd mov sp, r7
800c57e: bd80 pop {r7, pc}
0800c580 <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval None
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800c580: b580 push {r7, lr}
800c582: b082 sub sp, #8
800c584: af00 add r7, sp, #0
800c586: 6078 str r0, [r7, #4]
800c588: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800c58a: 687b ldr r3, [r7, #4]
800c58c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c590: b2db uxtb r3, r3
800c592: 3b01 subs r3, #1
800c594: 2b02 cmp r3, #2
800c596: d81e bhi.n 800c5d6 <USBD_GetStatus+0x56>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
800c598: 683b ldr r3, [r7, #0]
800c59a: 88db ldrh r3, [r3, #6]
800c59c: 2b02 cmp r3, #2
800c59e: d004 beq.n 800c5aa <USBD_GetStatus+0x2a>
{
USBD_CtlError(pdev, req);
800c5a0: 6839 ldr r1, [r7, #0]
800c5a2: 6878 ldr r0, [r7, #4]
800c5a4: f000 f8a5 bl 800c6f2 <USBD_CtlError>
break;
800c5a8: e01a b.n 800c5e0 <USBD_GetStatus+0x60>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
800c5aa: 687b ldr r3, [r7, #4]
800c5ac: 2201 movs r2, #1
800c5ae: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif /* USBD_SELF_POWERED */
if (pdev->dev_remote_wakeup != 0U)
800c5b0: 687b ldr r3, [r7, #4]
800c5b2: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4
800c5b6: 2b00 cmp r3, #0
800c5b8: d005 beq.n 800c5c6 <USBD_GetStatus+0x46>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
800c5ba: 687b ldr r3, [r7, #4]
800c5bc: 68db ldr r3, [r3, #12]
800c5be: f043 0202 orr.w r2, r3, #2
800c5c2: 687b ldr r3, [r7, #4]
800c5c4: 60da str r2, [r3, #12]
}
(void)USBD_CtlSendData(pdev, (uint8_t *)&pdev->dev_config_status, 2U);
800c5c6: 687b ldr r3, [r7, #4]
800c5c8: 330c adds r3, #12
800c5ca: 2202 movs r2, #2
800c5cc: 4619 mov r1, r3
800c5ce: 6878 ldr r0, [r7, #4]
800c5d0: f000 f90c bl 800c7ec <USBD_CtlSendData>
break;
800c5d4: e004 b.n 800c5e0 <USBD_GetStatus+0x60>
default:
USBD_CtlError(pdev, req);
800c5d6: 6839 ldr r1, [r7, #0]
800c5d8: 6878 ldr r0, [r7, #4]
800c5da: f000 f88a bl 800c6f2 <USBD_CtlError>
break;
800c5de: bf00 nop
}
}
800c5e0: bf00 nop
800c5e2: 3708 adds r7, #8
800c5e4: 46bd mov sp, r7
800c5e6: bd80 pop {r7, pc}
0800c5e8 <USBD_SetFeature>:
* @param pdev: device instance
* @param req: usb request
* @retval None
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800c5e8: b580 push {r7, lr}
800c5ea: b082 sub sp, #8
800c5ec: af00 add r7, sp, #0
800c5ee: 6078 str r0, [r7, #4]
800c5f0: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800c5f2: 683b ldr r3, [r7, #0]
800c5f4: 885b ldrh r3, [r3, #2]
800c5f6: 2b01 cmp r3, #1
800c5f8: d107 bne.n 800c60a <USBD_SetFeature+0x22>
{
pdev->dev_remote_wakeup = 1U;
800c5fa: 687b ldr r3, [r7, #4]
800c5fc: 2201 movs r2, #1
800c5fe: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
(void)USBD_CtlSendStatus(pdev);
800c602: 6878 ldr r0, [r7, #4]
800c604: f000 f92f bl 800c866 <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
}
800c608: e013 b.n 800c632 <USBD_SetFeature+0x4a>
else if (req->wValue == USB_FEATURE_TEST_MODE)
800c60a: 683b ldr r3, [r7, #0]
800c60c: 885b ldrh r3, [r3, #2]
800c60e: 2b02 cmp r3, #2
800c610: d10b bne.n 800c62a <USBD_SetFeature+0x42>
pdev->dev_test_mode = (uint8_t)(req->wIndex >> 8);
800c612: 683b ldr r3, [r7, #0]
800c614: 889b ldrh r3, [r3, #4]
800c616: 0a1b lsrs r3, r3, #8
800c618: b29b uxth r3, r3
800c61a: b2da uxtb r2, r3
800c61c: 687b ldr r3, [r7, #4]
800c61e: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
(void)USBD_CtlSendStatus(pdev);
800c622: 6878 ldr r0, [r7, #4]
800c624: f000 f91f bl 800c866 <USBD_CtlSendStatus>
}
800c628: e003 b.n 800c632 <USBD_SetFeature+0x4a>
USBD_CtlError(pdev, req);
800c62a: 6839 ldr r1, [r7, #0]
800c62c: 6878 ldr r0, [r7, #4]
800c62e: f000 f860 bl 800c6f2 <USBD_CtlError>
}
800c632: bf00 nop
800c634: 3708 adds r7, #8
800c636: 46bd mov sp, r7
800c638: bd80 pop {r7, pc}
0800c63a <USBD_ClrFeature>:
* @param pdev: device instance
* @param req: usb request
* @retval None
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800c63a: b580 push {r7, lr}
800c63c: b082 sub sp, #8
800c63e: af00 add r7, sp, #0
800c640: 6078 str r0, [r7, #4]
800c642: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800c644: 687b ldr r3, [r7, #4]
800c646: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c64a: b2db uxtb r3, r3
800c64c: 3b01 subs r3, #1
800c64e: 2b02 cmp r3, #2
800c650: d80b bhi.n 800c66a <USBD_ClrFeature+0x30>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800c652: 683b ldr r3, [r7, #0]
800c654: 885b ldrh r3, [r3, #2]
800c656: 2b01 cmp r3, #1
800c658: d10c bne.n 800c674 <USBD_ClrFeature+0x3a>
{
pdev->dev_remote_wakeup = 0U;
800c65a: 687b ldr r3, [r7, #4]
800c65c: 2200 movs r2, #0
800c65e: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
(void)USBD_CtlSendStatus(pdev);
800c662: 6878 ldr r0, [r7, #4]
800c664: f000 f8ff bl 800c866 <USBD_CtlSendStatus>
}
break;
800c668: e004 b.n 800c674 <USBD_ClrFeature+0x3a>
default:
USBD_CtlError(pdev, req);
800c66a: 6839 ldr r1, [r7, #0]
800c66c: 6878 ldr r0, [r7, #4]
800c66e: f000 f840 bl 800c6f2 <USBD_CtlError>
break;
800c672: e000 b.n 800c676 <USBD_ClrFeature+0x3c>
break;
800c674: bf00 nop
}
}
800c676: bf00 nop
800c678: 3708 adds r7, #8
800c67a: 46bd mov sp, r7
800c67c: bd80 pop {r7, pc}
0800c67e <USBD_ParseSetupRequest>:
* @param req: usb request
* @param pdata: setup data pointer
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
800c67e: b580 push {r7, lr}
800c680: b084 sub sp, #16
800c682: af00 add r7, sp, #0
800c684: 6078 str r0, [r7, #4]
800c686: 6039 str r1, [r7, #0]
uint8_t *pbuff = pdata;
800c688: 683b ldr r3, [r7, #0]
800c68a: 60fb str r3, [r7, #12]
req->bmRequest = *(uint8_t *)(pbuff);
800c68c: 68fb ldr r3, [r7, #12]
800c68e: 781a ldrb r2, [r3, #0]
800c690: 687b ldr r3, [r7, #4]
800c692: 701a strb r2, [r3, #0]
pbuff++;
800c694: 68fb ldr r3, [r7, #12]
800c696: 3301 adds r3, #1
800c698: 60fb str r3, [r7, #12]
req->bRequest = *(uint8_t *)(pbuff);
800c69a: 68fb ldr r3, [r7, #12]
800c69c: 781a ldrb r2, [r3, #0]
800c69e: 687b ldr r3, [r7, #4]
800c6a0: 705a strb r2, [r3, #1]
pbuff++;
800c6a2: 68fb ldr r3, [r7, #12]
800c6a4: 3301 adds r3, #1
800c6a6: 60fb str r3, [r7, #12]
req->wValue = SWAPBYTE(pbuff);
800c6a8: 68f8 ldr r0, [r7, #12]
800c6aa: f7ff fa40 bl 800bb2e <SWAPBYTE>
800c6ae: 4603 mov r3, r0
800c6b0: 461a mov r2, r3
800c6b2: 687b ldr r3, [r7, #4]
800c6b4: 805a strh r2, [r3, #2]
pbuff++;
800c6b6: 68fb ldr r3, [r7, #12]
800c6b8: 3301 adds r3, #1
800c6ba: 60fb str r3, [r7, #12]
pbuff++;
800c6bc: 68fb ldr r3, [r7, #12]
800c6be: 3301 adds r3, #1
800c6c0: 60fb str r3, [r7, #12]
req->wIndex = SWAPBYTE(pbuff);
800c6c2: 68f8 ldr r0, [r7, #12]
800c6c4: f7ff fa33 bl 800bb2e <SWAPBYTE>
800c6c8: 4603 mov r3, r0
800c6ca: 461a mov r2, r3
800c6cc: 687b ldr r3, [r7, #4]
800c6ce: 809a strh r2, [r3, #4]
pbuff++;
800c6d0: 68fb ldr r3, [r7, #12]
800c6d2: 3301 adds r3, #1
800c6d4: 60fb str r3, [r7, #12]
pbuff++;
800c6d6: 68fb ldr r3, [r7, #12]
800c6d8: 3301 adds r3, #1
800c6da: 60fb str r3, [r7, #12]
req->wLength = SWAPBYTE(pbuff);
800c6dc: 68f8 ldr r0, [r7, #12]
800c6de: f7ff fa26 bl 800bb2e <SWAPBYTE>
800c6e2: 4603 mov r3, r0
800c6e4: 461a mov r2, r3
800c6e6: 687b ldr r3, [r7, #4]
800c6e8: 80da strh r2, [r3, #6]
}
800c6ea: bf00 nop
800c6ec: 3710 adds r7, #16
800c6ee: 46bd mov sp, r7
800c6f0: bd80 pop {r7, pc}
0800c6f2 <USBD_CtlError>:
* @param pdev: device instance
* @param req: usb request
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800c6f2: b580 push {r7, lr}
800c6f4: b082 sub sp, #8
800c6f6: af00 add r7, sp, #0
800c6f8: 6078 str r0, [r7, #4]
800c6fa: 6039 str r1, [r7, #0]
UNUSED(req);
(void)USBD_LL_StallEP(pdev, 0x80U);
800c6fc: 2180 movs r1, #128 @ 0x80
800c6fe: 6878 ldr r0, [r7, #4]
800c700: f006 fb23 bl 8012d4a <USBD_LL_StallEP>
(void)USBD_LL_StallEP(pdev, 0U);
800c704: 2100 movs r1, #0
800c706: 6878 ldr r0, [r7, #4]
800c708: f006 fb1f bl 8012d4a <USBD_LL_StallEP>
}
800c70c: bf00 nop
800c70e: 3708 adds r7, #8
800c710: 46bd mov sp, r7
800c712: bd80 pop {r7, pc}
0800c714 <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
800c714: b580 push {r7, lr}
800c716: b086 sub sp, #24
800c718: af00 add r7, sp, #0
800c71a: 60f8 str r0, [r7, #12]
800c71c: 60b9 str r1, [r7, #8]
800c71e: 607a str r2, [r7, #4]
uint8_t idx = 0U;
800c720: 2300 movs r3, #0
800c722: 75fb strb r3, [r7, #23]
uint8_t *pdesc;
if (desc == NULL)
800c724: 68fb ldr r3, [r7, #12]
800c726: 2b00 cmp r3, #0
800c728: d042 beq.n 800c7b0 <USBD_GetString+0x9c>
{
return;
}
pdesc = desc;
800c72a: 68fb ldr r3, [r7, #12]
800c72c: 613b str r3, [r7, #16]
*len = MIN(USBD_MAX_STR_DESC_SIZ, ((uint16_t)USBD_GetLen(pdesc) * 2U) + 2U);
800c72e: 6938 ldr r0, [r7, #16]
800c730: f000 f842 bl 800c7b8 <USBD_GetLen>
800c734: 4603 mov r3, r0
800c736: 3301 adds r3, #1
800c738: 005b lsls r3, r3, #1
800c73a: f5b3 6f80 cmp.w r3, #1024 @ 0x400
800c73e: d808 bhi.n 800c752 <USBD_GetString+0x3e>
800c740: 6938 ldr r0, [r7, #16]
800c742: f000 f839 bl 800c7b8 <USBD_GetLen>
800c746: 4603 mov r3, r0
800c748: 3301 adds r3, #1
800c74a: b29b uxth r3, r3
800c74c: 005b lsls r3, r3, #1
800c74e: b29a uxth r2, r3
800c750: e001 b.n 800c756 <USBD_GetString+0x42>
800c752: f44f 6280 mov.w r2, #1024 @ 0x400
800c756: 687b ldr r3, [r7, #4]
800c758: 801a strh r2, [r3, #0]
unicode[idx] = *(uint8_t *)len;
800c75a: 7dfb ldrb r3, [r7, #23]
800c75c: 68ba ldr r2, [r7, #8]
800c75e: 4413 add r3, r2
800c760: 687a ldr r2, [r7, #4]
800c762: 7812 ldrb r2, [r2, #0]
800c764: 701a strb r2, [r3, #0]
idx++;
800c766: 7dfb ldrb r3, [r7, #23]
800c768: 3301 adds r3, #1
800c76a: 75fb strb r3, [r7, #23]
unicode[idx] = USB_DESC_TYPE_STRING;
800c76c: 7dfb ldrb r3, [r7, #23]
800c76e: 68ba ldr r2, [r7, #8]
800c770: 4413 add r3, r2
800c772: 2203 movs r2, #3
800c774: 701a strb r2, [r3, #0]
idx++;
800c776: 7dfb ldrb r3, [r7, #23]
800c778: 3301 adds r3, #1
800c77a: 75fb strb r3, [r7, #23]
while (*pdesc != (uint8_t)'\0')
800c77c: e013 b.n 800c7a6 <USBD_GetString+0x92>
{
unicode[idx] = *pdesc;
800c77e: 7dfb ldrb r3, [r7, #23]
800c780: 68ba ldr r2, [r7, #8]
800c782: 4413 add r3, r2
800c784: 693a ldr r2, [r7, #16]
800c786: 7812 ldrb r2, [r2, #0]
800c788: 701a strb r2, [r3, #0]
pdesc++;
800c78a: 693b ldr r3, [r7, #16]
800c78c: 3301 adds r3, #1
800c78e: 613b str r3, [r7, #16]
idx++;
800c790: 7dfb ldrb r3, [r7, #23]
800c792: 3301 adds r3, #1
800c794: 75fb strb r3, [r7, #23]
unicode[idx] = 0U;
800c796: 7dfb ldrb r3, [r7, #23]
800c798: 68ba ldr r2, [r7, #8]
800c79a: 4413 add r3, r2
800c79c: 2200 movs r2, #0
800c79e: 701a strb r2, [r3, #0]
idx++;
800c7a0: 7dfb ldrb r3, [r7, #23]
800c7a2: 3301 adds r3, #1
800c7a4: 75fb strb r3, [r7, #23]
while (*pdesc != (uint8_t)'\0')
800c7a6: 693b ldr r3, [r7, #16]
800c7a8: 781b ldrb r3, [r3, #0]
800c7aa: 2b00 cmp r3, #0
800c7ac: d1e7 bne.n 800c77e <USBD_GetString+0x6a>
800c7ae: e000 b.n 800c7b2 <USBD_GetString+0x9e>
return;
800c7b0: bf00 nop
}
}
800c7b2: 3718 adds r7, #24
800c7b4: 46bd mov sp, r7
800c7b6: bd80 pop {r7, pc}
0800c7b8 <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
800c7b8: b480 push {r7}
800c7ba: b085 sub sp, #20
800c7bc: af00 add r7, sp, #0
800c7be: 6078 str r0, [r7, #4]
uint8_t len = 0U;
800c7c0: 2300 movs r3, #0
800c7c2: 73fb strb r3, [r7, #15]
uint8_t *pbuff = buf;
800c7c4: 687b ldr r3, [r7, #4]
800c7c6: 60bb str r3, [r7, #8]
while (*pbuff != (uint8_t)'\0')
800c7c8: e005 b.n 800c7d6 <USBD_GetLen+0x1e>
{
len++;
800c7ca: 7bfb ldrb r3, [r7, #15]
800c7cc: 3301 adds r3, #1
800c7ce: 73fb strb r3, [r7, #15]
pbuff++;
800c7d0: 68bb ldr r3, [r7, #8]
800c7d2: 3301 adds r3, #1
800c7d4: 60bb str r3, [r7, #8]
while (*pbuff != (uint8_t)'\0')
800c7d6: 68bb ldr r3, [r7, #8]
800c7d8: 781b ldrb r3, [r3, #0]
800c7da: 2b00 cmp r3, #0
800c7dc: d1f5 bne.n 800c7ca <USBD_GetLen+0x12>
}
return len;
800c7de: 7bfb ldrb r3, [r7, #15]
}
800c7e0: 4618 mov r0, r3
800c7e2: 3714 adds r7, #20
800c7e4: 46bd mov sp, r7
800c7e6: f85d 7b04 ldr.w r7, [sp], #4
800c7ea: 4770 bx lr
0800c7ec <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint32_t len)
{
800c7ec: b580 push {r7, lr}
800c7ee: b084 sub sp, #16
800c7f0: af00 add r7, sp, #0
800c7f2: 60f8 str r0, [r7, #12]
800c7f4: 60b9 str r1, [r7, #8]
800c7f6: 607a str r2, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
800c7f8: 68fb ldr r3, [r7, #12]
800c7fa: 2202 movs r2, #2
800c7fc: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_in[0].total_length = len;
800c800: 68fb ldr r3, [r7, #12]
800c802: 687a ldr r2, [r7, #4]
800c804: 619a str r2, [r3, #24]
#ifdef USBD_AVOID_PACKET_SPLIT_MPS
pdev->ep_in[0].rem_length = 0U;
#else
pdev->ep_in[0].rem_length = len;
800c806: 68fb ldr r3, [r7, #12]
800c808: 687a ldr r2, [r7, #4]
800c80a: 61da str r2, [r3, #28]
#endif /* USBD_AVOID_PACKET_SPLIT_MPS */
/* Start the transfer */
(void)USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800c80c: 687b ldr r3, [r7, #4]
800c80e: 68ba ldr r2, [r7, #8]
800c810: 2100 movs r1, #0
800c812: 68f8 ldr r0, [r7, #12]
800c814: f006 fb22 bl 8012e5c <USBD_LL_Transmit>
return USBD_OK;
800c818: 2300 movs r3, #0
}
800c81a: 4618 mov r0, r3
800c81c: 3710 adds r7, #16
800c81e: 46bd mov sp, r7
800c820: bd80 pop {r7, pc}
0800c822 <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint32_t len)
{
800c822: b580 push {r7, lr}
800c824: b084 sub sp, #16
800c826: af00 add r7, sp, #0
800c828: 60f8 str r0, [r7, #12]
800c82a: 60b9 str r1, [r7, #8]
800c82c: 607a str r2, [r7, #4]
/* Start the next transfer */
(void)USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800c82e: 687b ldr r3, [r7, #4]
800c830: 68ba ldr r2, [r7, #8]
800c832: 2100 movs r1, #0
800c834: 68f8 ldr r0, [r7, #12]
800c836: f006 fb11 bl 8012e5c <USBD_LL_Transmit>
return USBD_OK;
800c83a: 2300 movs r3, #0
}
800c83c: 4618 mov r0, r3
800c83e: 3710 adds r7, #16
800c840: 46bd mov sp, r7
800c842: bd80 pop {r7, pc}
0800c844 <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint32_t len)
{
800c844: b580 push {r7, lr}
800c846: b084 sub sp, #16
800c848: af00 add r7, sp, #0
800c84a: 60f8 str r0, [r7, #12]
800c84c: 60b9 str r1, [r7, #8]
800c84e: 607a str r2, [r7, #4]
(void)USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800c850: 687b ldr r3, [r7, #4]
800c852: 68ba ldr r2, [r7, #8]
800c854: 2100 movs r1, #0
800c856: 68f8 ldr r0, [r7, #12]
800c858: f006 fb21 bl 8012e9e <USBD_LL_PrepareReceive>
return USBD_OK;
800c85c: 2300 movs r3, #0
}
800c85e: 4618 mov r0, r3
800c860: 3710 adds r7, #16
800c862: 46bd mov sp, r7
800c864: bd80 pop {r7, pc}
0800c866 <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
800c866: b580 push {r7, lr}
800c868: b082 sub sp, #8
800c86a: af00 add r7, sp, #0
800c86c: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
800c86e: 687b ldr r3, [r7, #4]
800c870: 2204 movs r2, #4
800c872: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
(void)USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
800c876: 2300 movs r3, #0
800c878: 2200 movs r2, #0
800c87a: 2100 movs r1, #0
800c87c: 6878 ldr r0, [r7, #4]
800c87e: f006 faed bl 8012e5c <USBD_LL_Transmit>
return USBD_OK;
800c882: 2300 movs r3, #0
}
800c884: 4618 mov r0, r3
800c886: 3708 adds r7, #8
800c888: 46bd mov sp, r7
800c88a: bd80 pop {r7, pc}
0800c88c <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
800c88c: b580 push {r7, lr}
800c88e: b082 sub sp, #8
800c890: af00 add r7, sp, #0
800c892: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
800c894: 687b ldr r3, [r7, #4]
800c896: 2205 movs r2, #5
800c898: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
(void)USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800c89c: 2300 movs r3, #0
800c89e: 2200 movs r2, #0
800c8a0: 2100 movs r1, #0
800c8a2: 6878 ldr r0, [r7, #4]
800c8a4: f006 fafb bl 8012e9e <USBD_LL_PrepareReceive>
return USBD_OK;
800c8a8: 2300 movs r3, #0
}
800c8aa: 4618 mov r0, r3
800c8ac: 3708 adds r7, #8
800c8ae: 46bd mov sp, r7
800c8b0: bd80 pop {r7, pc}
...
0800c8b4 <disk_status>:
* @retval DSTATUS: Operation status
*/
DSTATUS disk_status (
BYTE pdrv /* Physical drive number to identify the drive */
)
{
800c8b4: b580 push {r7, lr}
800c8b6: b084 sub sp, #16
800c8b8: af00 add r7, sp, #0
800c8ba: 4603 mov r3, r0
800c8bc: 71fb strb r3, [r7, #7]
DSTATUS stat;
stat = disk.drv[pdrv]->disk_status(disk.lun[pdrv]);
800c8be: 79fb ldrb r3, [r7, #7]
800c8c0: 4a08 ldr r2, [pc, #32] @ (800c8e4 <disk_status+0x30>)
800c8c2: 009b lsls r3, r3, #2
800c8c4: 4413 add r3, r2
800c8c6: 685b ldr r3, [r3, #4]
800c8c8: 685b ldr r3, [r3, #4]
800c8ca: 79fa ldrb r2, [r7, #7]
800c8cc: 4905 ldr r1, [pc, #20] @ (800c8e4 <disk_status+0x30>)
800c8ce: 440a add r2, r1
800c8d0: 7a12 ldrb r2, [r2, #8]
800c8d2: 4610 mov r0, r2
800c8d4: 4798 blx r3
800c8d6: 4603 mov r3, r0
800c8d8: 73fb strb r3, [r7, #15]
return stat;
800c8da: 7bfb ldrb r3, [r7, #15]
}
800c8dc: 4618 mov r0, r3
800c8de: 3710 adds r7, #16
800c8e0: 46bd mov sp, r7
800c8e2: bd80 pop {r7, pc}
800c8e4: 2001014c .word 0x2001014c
0800c8e8 <disk_initialize>:
* @retval DSTATUS: Operation status
*/
DSTATUS disk_initialize (
BYTE pdrv /* Physical drive nmuber to identify the drive */
)
{
800c8e8: b580 push {r7, lr}
800c8ea: b084 sub sp, #16
800c8ec: af00 add r7, sp, #0
800c8ee: 4603 mov r3, r0
800c8f0: 71fb strb r3, [r7, #7]
DSTATUS stat = RES_OK;
800c8f2: 2300 movs r3, #0
800c8f4: 73fb strb r3, [r7, #15]
if(disk.is_initialized[pdrv] == 0)
800c8f6: 79fb ldrb r3, [r7, #7]
800c8f8: 4a0e ldr r2, [pc, #56] @ (800c934 <disk_initialize+0x4c>)
800c8fa: 5cd3 ldrb r3, [r2, r3]
800c8fc: 2b00 cmp r3, #0
800c8fe: d114 bne.n 800c92a <disk_initialize+0x42>
{
stat = disk.drv[pdrv]->disk_initialize(disk.lun[pdrv]);
800c900: 79fb ldrb r3, [r7, #7]
800c902: 4a0c ldr r2, [pc, #48] @ (800c934 <disk_initialize+0x4c>)
800c904: 009b lsls r3, r3, #2
800c906: 4413 add r3, r2
800c908: 685b ldr r3, [r3, #4]
800c90a: 681b ldr r3, [r3, #0]
800c90c: 79fa ldrb r2, [r7, #7]
800c90e: 4909 ldr r1, [pc, #36] @ (800c934 <disk_initialize+0x4c>)
800c910: 440a add r2, r1
800c912: 7a12 ldrb r2, [r2, #8]
800c914: 4610 mov r0, r2
800c916: 4798 blx r3
800c918: 4603 mov r3, r0
800c91a: 73fb strb r3, [r7, #15]
if(stat == RES_OK)
800c91c: 7bfb ldrb r3, [r7, #15]
800c91e: 2b00 cmp r3, #0
800c920: d103 bne.n 800c92a <disk_initialize+0x42>
{
disk.is_initialized[pdrv] = 1;
800c922: 79fb ldrb r3, [r7, #7]
800c924: 4a03 ldr r2, [pc, #12] @ (800c934 <disk_initialize+0x4c>)
800c926: 2101 movs r1, #1
800c928: 54d1 strb r1, [r2, r3]
}
}
return stat;
800c92a: 7bfb ldrb r3, [r7, #15]
}
800c92c: 4618 mov r0, r3
800c92e: 3710 adds r7, #16
800c930: 46bd mov sp, r7
800c932: bd80 pop {r7, pc}
800c934: 2001014c .word 0x2001014c
0800c938 <disk_read>:
BYTE pdrv, /* Physical drive nmuber to identify the drive */
BYTE *buff, /* Data buffer to store read data */
DWORD sector, /* Sector address in LBA */
UINT count /* Number of sectors to read */
)
{
800c938: b590 push {r4, r7, lr}
800c93a: b087 sub sp, #28
800c93c: af00 add r7, sp, #0
800c93e: 60b9 str r1, [r7, #8]
800c940: 607a str r2, [r7, #4]
800c942: 603b str r3, [r7, #0]
800c944: 4603 mov r3, r0
800c946: 73fb strb r3, [r7, #15]
DRESULT res;
res = disk.drv[pdrv]->disk_read(disk.lun[pdrv], buff, sector, count);
800c948: 7bfb ldrb r3, [r7, #15]
800c94a: 4a0a ldr r2, [pc, #40] @ (800c974 <disk_read+0x3c>)
800c94c: 009b lsls r3, r3, #2
800c94e: 4413 add r3, r2
800c950: 685b ldr r3, [r3, #4]
800c952: 689c ldr r4, [r3, #8]
800c954: 7bfb ldrb r3, [r7, #15]
800c956: 4a07 ldr r2, [pc, #28] @ (800c974 <disk_read+0x3c>)
800c958: 4413 add r3, r2
800c95a: 7a18 ldrb r0, [r3, #8]
800c95c: 683b ldr r3, [r7, #0]
800c95e: 687a ldr r2, [r7, #4]
800c960: 68b9 ldr r1, [r7, #8]
800c962: 47a0 blx r4
800c964: 4603 mov r3, r0
800c966: 75fb strb r3, [r7, #23]
return res;
800c968: 7dfb ldrb r3, [r7, #23]
}
800c96a: 4618 mov r0, r3
800c96c: 371c adds r7, #28
800c96e: 46bd mov sp, r7
800c970: bd90 pop {r4, r7, pc}
800c972: bf00 nop
800c974: 2001014c .word 0x2001014c
0800c978 <disk_write>:
BYTE pdrv, /* Physical drive nmuber to identify the drive */
const BYTE *buff, /* Data to be written */
DWORD sector, /* Sector address in LBA */
UINT count /* Number of sectors to write */
)
{
800c978: b590 push {r4, r7, lr}
800c97a: b087 sub sp, #28
800c97c: af00 add r7, sp, #0
800c97e: 60b9 str r1, [r7, #8]
800c980: 607a str r2, [r7, #4]
800c982: 603b str r3, [r7, #0]
800c984: 4603 mov r3, r0
800c986: 73fb strb r3, [r7, #15]
DRESULT res;
res = disk.drv[pdrv]->disk_write(disk.lun[pdrv], buff, sector, count);
800c988: 7bfb ldrb r3, [r7, #15]
800c98a: 4a0a ldr r2, [pc, #40] @ (800c9b4 <disk_write+0x3c>)
800c98c: 009b lsls r3, r3, #2
800c98e: 4413 add r3, r2
800c990: 685b ldr r3, [r3, #4]
800c992: 68dc ldr r4, [r3, #12]
800c994: 7bfb ldrb r3, [r7, #15]
800c996: 4a07 ldr r2, [pc, #28] @ (800c9b4 <disk_write+0x3c>)
800c998: 4413 add r3, r2
800c99a: 7a18 ldrb r0, [r3, #8]
800c99c: 683b ldr r3, [r7, #0]
800c99e: 687a ldr r2, [r7, #4]
800c9a0: 68b9 ldr r1, [r7, #8]
800c9a2: 47a0 blx r4
800c9a4: 4603 mov r3, r0
800c9a6: 75fb strb r3, [r7, #23]
return res;
800c9a8: 7dfb ldrb r3, [r7, #23]
}
800c9aa: 4618 mov r0, r3
800c9ac: 371c adds r7, #28
800c9ae: 46bd mov sp, r7
800c9b0: bd90 pop {r4, r7, pc}
800c9b2: bf00 nop
800c9b4: 2001014c .word 0x2001014c
0800c9b8 <disk_ioctl>:
DRESULT disk_ioctl (
BYTE pdrv, /* Physical drive nmuber (0..) */
BYTE cmd, /* Control code */
void *buff /* Buffer to send/receive control data */
)
{
800c9b8: b580 push {r7, lr}
800c9ba: b084 sub sp, #16
800c9bc: af00 add r7, sp, #0
800c9be: 4603 mov r3, r0
800c9c0: 603a str r2, [r7, #0]
800c9c2: 71fb strb r3, [r7, #7]
800c9c4: 460b mov r3, r1
800c9c6: 71bb strb r3, [r7, #6]
DRESULT res;
res = disk.drv[pdrv]->disk_ioctl(disk.lun[pdrv], cmd, buff);
800c9c8: 79fb ldrb r3, [r7, #7]
800c9ca: 4a09 ldr r2, [pc, #36] @ (800c9f0 <disk_ioctl+0x38>)
800c9cc: 009b lsls r3, r3, #2
800c9ce: 4413 add r3, r2
800c9d0: 685b ldr r3, [r3, #4]
800c9d2: 691b ldr r3, [r3, #16]
800c9d4: 79fa ldrb r2, [r7, #7]
800c9d6: 4906 ldr r1, [pc, #24] @ (800c9f0 <disk_ioctl+0x38>)
800c9d8: 440a add r2, r1
800c9da: 7a10 ldrb r0, [r2, #8]
800c9dc: 79b9 ldrb r1, [r7, #6]
800c9de: 683a ldr r2, [r7, #0]
800c9e0: 4798 blx r3
800c9e2: 4603 mov r3, r0
800c9e4: 73fb strb r3, [r7, #15]
return res;
800c9e6: 7bfb ldrb r3, [r7, #15]
}
800c9e8: 4618 mov r0, r3
800c9ea: 3710 adds r7, #16
800c9ec: 46bd mov sp, r7
800c9ee: bd80 pop {r7, pc}
800c9f0: 2001014c .word 0x2001014c
0800c9f4 <ld_word>:
/* Load/Store multi-byte word in the FAT structure */
/*-----------------------------------------------------------------------*/
static
WORD ld_word (const BYTE* ptr) /* Load a 2-byte little-endian word */
{
800c9f4: b480 push {r7}
800c9f6: b085 sub sp, #20
800c9f8: af00 add r7, sp, #0
800c9fa: 6078 str r0, [r7, #4]
WORD rv;
rv = ptr[1];
800c9fc: 687b ldr r3, [r7, #4]
800c9fe: 3301 adds r3, #1
800ca00: 781b ldrb r3, [r3, #0]
800ca02: 81fb strh r3, [r7, #14]
rv = rv << 8 | ptr[0];
800ca04: 89fb ldrh r3, [r7, #14]
800ca06: 021b lsls r3, r3, #8
800ca08: b21a sxth r2, r3
800ca0a: 687b ldr r3, [r7, #4]
800ca0c: 781b ldrb r3, [r3, #0]
800ca0e: b21b sxth r3, r3
800ca10: 4313 orrs r3, r2
800ca12: b21b sxth r3, r3
800ca14: 81fb strh r3, [r7, #14]
return rv;
800ca16: 89fb ldrh r3, [r7, #14]
}
800ca18: 4618 mov r0, r3
800ca1a: 3714 adds r7, #20
800ca1c: 46bd mov sp, r7
800ca1e: f85d 7b04 ldr.w r7, [sp], #4
800ca22: 4770 bx lr
0800ca24 <ld_dword>:
static
DWORD ld_dword (const BYTE* ptr) /* Load a 4-byte little-endian word */
{
800ca24: b480 push {r7}
800ca26: b085 sub sp, #20
800ca28: af00 add r7, sp, #0
800ca2a: 6078 str r0, [r7, #4]
DWORD rv;
rv = ptr[3];
800ca2c: 687b ldr r3, [r7, #4]
800ca2e: 3303 adds r3, #3
800ca30: 781b ldrb r3, [r3, #0]
800ca32: 60fb str r3, [r7, #12]
rv = rv << 8 | ptr[2];
800ca34: 68fb ldr r3, [r7, #12]
800ca36: 021b lsls r3, r3, #8
800ca38: 687a ldr r2, [r7, #4]
800ca3a: 3202 adds r2, #2
800ca3c: 7812 ldrb r2, [r2, #0]
800ca3e: 4313 orrs r3, r2
800ca40: 60fb str r3, [r7, #12]
rv = rv << 8 | ptr[1];
800ca42: 68fb ldr r3, [r7, #12]
800ca44: 021b lsls r3, r3, #8
800ca46: 687a ldr r2, [r7, #4]
800ca48: 3201 adds r2, #1
800ca4a: 7812 ldrb r2, [r2, #0]
800ca4c: 4313 orrs r3, r2
800ca4e: 60fb str r3, [r7, #12]
rv = rv << 8 | ptr[0];
800ca50: 68fb ldr r3, [r7, #12]
800ca52: 021b lsls r3, r3, #8
800ca54: 687a ldr r2, [r7, #4]
800ca56: 7812 ldrb r2, [r2, #0]
800ca58: 4313 orrs r3, r2
800ca5a: 60fb str r3, [r7, #12]
return rv;
800ca5c: 68fb ldr r3, [r7, #12]
}
800ca5e: 4618 mov r0, r3
800ca60: 3714 adds r7, #20
800ca62: 46bd mov sp, r7
800ca64: f85d 7b04 ldr.w r7, [sp], #4
800ca68: 4770 bx lr
0800ca6a <st_word>:
#endif
#if !_FS_READONLY
static
void st_word (BYTE* ptr, WORD val) /* Store a 2-byte word in little-endian */
{
800ca6a: b480 push {r7}
800ca6c: b083 sub sp, #12
800ca6e: af00 add r7, sp, #0
800ca70: 6078 str r0, [r7, #4]
800ca72: 460b mov r3, r1
800ca74: 807b strh r3, [r7, #2]
*ptr++ = (BYTE)val; val >>= 8;
800ca76: 687b ldr r3, [r7, #4]
800ca78: 1c5a adds r2, r3, #1
800ca7a: 607a str r2, [r7, #4]
800ca7c: 887a ldrh r2, [r7, #2]
800ca7e: b2d2 uxtb r2, r2
800ca80: 701a strb r2, [r3, #0]
800ca82: 887b ldrh r3, [r7, #2]
800ca84: 0a1b lsrs r3, r3, #8
800ca86: 807b strh r3, [r7, #2]
*ptr++ = (BYTE)val;
800ca88: 687b ldr r3, [r7, #4]
800ca8a: 1c5a adds r2, r3, #1
800ca8c: 607a str r2, [r7, #4]
800ca8e: 887a ldrh r2, [r7, #2]
800ca90: b2d2 uxtb r2, r2
800ca92: 701a strb r2, [r3, #0]
}
800ca94: bf00 nop
800ca96: 370c adds r7, #12
800ca98: 46bd mov sp, r7
800ca9a: f85d 7b04 ldr.w r7, [sp], #4
800ca9e: 4770 bx lr
0800caa0 <st_dword>:
static
void st_dword (BYTE* ptr, DWORD val) /* Store a 4-byte word in little-endian */
{
800caa0: b480 push {r7}
800caa2: b083 sub sp, #12
800caa4: af00 add r7, sp, #0
800caa6: 6078 str r0, [r7, #4]
800caa8: 6039 str r1, [r7, #0]
*ptr++ = (BYTE)val; val >>= 8;
800caaa: 687b ldr r3, [r7, #4]
800caac: 1c5a adds r2, r3, #1
800caae: 607a str r2, [r7, #4]
800cab0: 683a ldr r2, [r7, #0]
800cab2: b2d2 uxtb r2, r2
800cab4: 701a strb r2, [r3, #0]
800cab6: 683b ldr r3, [r7, #0]
800cab8: 0a1b lsrs r3, r3, #8
800caba: 603b str r3, [r7, #0]
*ptr++ = (BYTE)val; val >>= 8;
800cabc: 687b ldr r3, [r7, #4]
800cabe: 1c5a adds r2, r3, #1
800cac0: 607a str r2, [r7, #4]
800cac2: 683a ldr r2, [r7, #0]
800cac4: b2d2 uxtb r2, r2
800cac6: 701a strb r2, [r3, #0]
800cac8: 683b ldr r3, [r7, #0]
800caca: 0a1b lsrs r3, r3, #8
800cacc: 603b str r3, [r7, #0]
*ptr++ = (BYTE)val; val >>= 8;
800cace: 687b ldr r3, [r7, #4]
800cad0: 1c5a adds r2, r3, #1
800cad2: 607a str r2, [r7, #4]
800cad4: 683a ldr r2, [r7, #0]
800cad6: b2d2 uxtb r2, r2
800cad8: 701a strb r2, [r3, #0]
800cada: 683b ldr r3, [r7, #0]
800cadc: 0a1b lsrs r3, r3, #8
800cade: 603b str r3, [r7, #0]
*ptr++ = (BYTE)val;
800cae0: 687b ldr r3, [r7, #4]
800cae2: 1c5a adds r2, r3, #1
800cae4: 607a str r2, [r7, #4]
800cae6: 683a ldr r2, [r7, #0]
800cae8: b2d2 uxtb r2, r2
800caea: 701a strb r2, [r3, #0]
}
800caec: bf00 nop
800caee: 370c adds r7, #12
800caf0: 46bd mov sp, r7
800caf2: f85d 7b04 ldr.w r7, [sp], #4
800caf6: 4770 bx lr
0800caf8 <mem_cpy>:
/* String functions */
/*-----------------------------------------------------------------------*/
/* Copy memory to memory */
static
void mem_cpy (void* dst, const void* src, UINT cnt) {
800caf8: b480 push {r7}
800cafa: b087 sub sp, #28
800cafc: af00 add r7, sp, #0
800cafe: 60f8 str r0, [r7, #12]
800cb00: 60b9 str r1, [r7, #8]
800cb02: 607a str r2, [r7, #4]
BYTE *d = (BYTE*)dst;
800cb04: 68fb ldr r3, [r7, #12]
800cb06: 617b str r3, [r7, #20]
const BYTE *s = (const BYTE*)src;
800cb08: 68bb ldr r3, [r7, #8]
800cb0a: 613b str r3, [r7, #16]
if (cnt) {
800cb0c: 687b ldr r3, [r7, #4]
800cb0e: 2b00 cmp r3, #0
800cb10: d00d beq.n 800cb2e <mem_cpy+0x36>
do {
*d++ = *s++;
800cb12: 693a ldr r2, [r7, #16]
800cb14: 1c53 adds r3, r2, #1
800cb16: 613b str r3, [r7, #16]
800cb18: 697b ldr r3, [r7, #20]
800cb1a: 1c59 adds r1, r3, #1
800cb1c: 6179 str r1, [r7, #20]
800cb1e: 7812 ldrb r2, [r2, #0]
800cb20: 701a strb r2, [r3, #0]
} while (--cnt);
800cb22: 687b ldr r3, [r7, #4]
800cb24: 3b01 subs r3, #1
800cb26: 607b str r3, [r7, #4]
800cb28: 687b ldr r3, [r7, #4]
800cb2a: 2b00 cmp r3, #0
800cb2c: d1f1 bne.n 800cb12 <mem_cpy+0x1a>
}
}
800cb2e: bf00 nop
800cb30: 371c adds r7, #28
800cb32: 46bd mov sp, r7
800cb34: f85d 7b04 ldr.w r7, [sp], #4
800cb38: 4770 bx lr
0800cb3a <mem_set>:
/* Fill memory block */
static
void mem_set (void* dst, int val, UINT cnt) {
800cb3a: b480 push {r7}
800cb3c: b087 sub sp, #28
800cb3e: af00 add r7, sp, #0
800cb40: 60f8 str r0, [r7, #12]
800cb42: 60b9 str r1, [r7, #8]
800cb44: 607a str r2, [r7, #4]
BYTE *d = (BYTE*)dst;
800cb46: 68fb ldr r3, [r7, #12]
800cb48: 617b str r3, [r7, #20]
do {
*d++ = (BYTE)val;
800cb4a: 697b ldr r3, [r7, #20]
800cb4c: 1c5a adds r2, r3, #1
800cb4e: 617a str r2, [r7, #20]
800cb50: 68ba ldr r2, [r7, #8]
800cb52: b2d2 uxtb r2, r2
800cb54: 701a strb r2, [r3, #0]
} while (--cnt);
800cb56: 687b ldr r3, [r7, #4]
800cb58: 3b01 subs r3, #1
800cb5a: 607b str r3, [r7, #4]
800cb5c: 687b ldr r3, [r7, #4]
800cb5e: 2b00 cmp r3, #0
800cb60: d1f3 bne.n 800cb4a <mem_set+0x10>
}
800cb62: bf00 nop
800cb64: bf00 nop
800cb66: 371c adds r7, #28
800cb68: 46bd mov sp, r7
800cb6a: f85d 7b04 ldr.w r7, [sp], #4
800cb6e: 4770 bx lr
0800cb70 <mem_cmp>:
/* Compare memory block */
static
int mem_cmp (const void* dst, const void* src, UINT cnt) { /* ZR:same, NZ:different */
800cb70: b480 push {r7}
800cb72: b089 sub sp, #36 @ 0x24
800cb74: af00 add r7, sp, #0
800cb76: 60f8 str r0, [r7, #12]
800cb78: 60b9 str r1, [r7, #8]
800cb7a: 607a str r2, [r7, #4]
const BYTE *d = (const BYTE *)dst, *s = (const BYTE *)src;
800cb7c: 68fb ldr r3, [r7, #12]
800cb7e: 61fb str r3, [r7, #28]
800cb80: 68bb ldr r3, [r7, #8]
800cb82: 61bb str r3, [r7, #24]
int r = 0;
800cb84: 2300 movs r3, #0
800cb86: 617b str r3, [r7, #20]
do {
r = *d++ - *s++;
800cb88: 69fb ldr r3, [r7, #28]
800cb8a: 1c5a adds r2, r3, #1
800cb8c: 61fa str r2, [r7, #28]
800cb8e: 781b ldrb r3, [r3, #0]
800cb90: 4619 mov r1, r3
800cb92: 69bb ldr r3, [r7, #24]
800cb94: 1c5a adds r2, r3, #1
800cb96: 61ba str r2, [r7, #24]
800cb98: 781b ldrb r3, [r3, #0]
800cb9a: 1acb subs r3, r1, r3
800cb9c: 617b str r3, [r7, #20]
} while (--cnt && r == 0);
800cb9e: 687b ldr r3, [r7, #4]
800cba0: 3b01 subs r3, #1
800cba2: 607b str r3, [r7, #4]
800cba4: 687b ldr r3, [r7, #4]
800cba6: 2b00 cmp r3, #0
800cba8: d002 beq.n 800cbb0 <mem_cmp+0x40>
800cbaa: 697b ldr r3, [r7, #20]
800cbac: 2b00 cmp r3, #0
800cbae: d0eb beq.n 800cb88 <mem_cmp+0x18>
return r;
800cbb0: 697b ldr r3, [r7, #20]
}
800cbb2: 4618 mov r0, r3
800cbb4: 3724 adds r7, #36 @ 0x24
800cbb6: 46bd mov sp, r7
800cbb8: f85d 7b04 ldr.w r7, [sp], #4
800cbbc: 4770 bx lr
0800cbbe <chk_chr>:
/* Check if chr is contained in the string */
static
int chk_chr (const char* str, int chr) { /* NZ:contained, ZR:not contained */
800cbbe: b480 push {r7}
800cbc0: b083 sub sp, #12
800cbc2: af00 add r7, sp, #0
800cbc4: 6078 str r0, [r7, #4]
800cbc6: 6039 str r1, [r7, #0]
while (*str && *str != chr) str++;
800cbc8: e002 b.n 800cbd0 <chk_chr+0x12>
800cbca: 687b ldr r3, [r7, #4]
800cbcc: 3301 adds r3, #1
800cbce: 607b str r3, [r7, #4]
800cbd0: 687b ldr r3, [r7, #4]
800cbd2: 781b ldrb r3, [r3, #0]
800cbd4: 2b00 cmp r3, #0
800cbd6: d005 beq.n 800cbe4 <chk_chr+0x26>
800cbd8: 687b ldr r3, [r7, #4]
800cbda: 781b ldrb r3, [r3, #0]
800cbdc: 461a mov r2, r3
800cbde: 683b ldr r3, [r7, #0]
800cbe0: 4293 cmp r3, r2
800cbe2: d1f2 bne.n 800cbca <chk_chr+0xc>
return *str;
800cbe4: 687b ldr r3, [r7, #4]
800cbe6: 781b ldrb r3, [r3, #0]
}
800cbe8: 4618 mov r0, r3
800cbea: 370c adds r7, #12
800cbec: 46bd mov sp, r7
800cbee: f85d 7b04 ldr.w r7, [sp], #4
800cbf2: 4770 bx lr
0800cbf4 <lock_fs>:
/*-----------------------------------------------------------------------*/
static
int lock_fs (
FATFS* fs /* File system object */
)
{
800cbf4: b580 push {r7, lr}
800cbf6: b082 sub sp, #8
800cbf8: af00 add r7, sp, #0
800cbfa: 6078 str r0, [r7, #4]
return (fs && ff_req_grant(fs->sobj)) ? 1 : 0;
800cbfc: 687b ldr r3, [r7, #4]
800cbfe: 2b00 cmp r3, #0
800cc00: d009 beq.n 800cc16 <lock_fs+0x22>
800cc02: 687b ldr r3, [r7, #4]
800cc04: 68db ldr r3, [r3, #12]
800cc06: 4618 mov r0, r3
800cc08: f002 ffb5 bl 800fb76 <ff_req_grant>
800cc0c: 4603 mov r3, r0
800cc0e: 2b00 cmp r3, #0
800cc10: d001 beq.n 800cc16 <lock_fs+0x22>
800cc12: 2301 movs r3, #1
800cc14: e000 b.n 800cc18 <lock_fs+0x24>
800cc16: 2300 movs r3, #0
}
800cc18: 4618 mov r0, r3
800cc1a: 3708 adds r7, #8
800cc1c: 46bd mov sp, r7
800cc1e: bd80 pop {r7, pc}
0800cc20 <unlock_fs>:
static
void unlock_fs (
FATFS* fs, /* File system object */
FRESULT res /* Result code to be returned */
)
{
800cc20: b580 push {r7, lr}
800cc22: b082 sub sp, #8
800cc24: af00 add r7, sp, #0
800cc26: 6078 str r0, [r7, #4]
800cc28: 460b mov r3, r1
800cc2a: 70fb strb r3, [r7, #3]
if (fs && res != FR_NOT_ENABLED && res != FR_INVALID_DRIVE && res != FR_TIMEOUT) {
800cc2c: 687b ldr r3, [r7, #4]
800cc2e: 2b00 cmp r3, #0
800cc30: d00d beq.n 800cc4e <unlock_fs+0x2e>
800cc32: 78fb ldrb r3, [r7, #3]
800cc34: 2b0c cmp r3, #12
800cc36: d00a beq.n 800cc4e <unlock_fs+0x2e>
800cc38: 78fb ldrb r3, [r7, #3]
800cc3a: 2b0b cmp r3, #11
800cc3c: d007 beq.n 800cc4e <unlock_fs+0x2e>
800cc3e: 78fb ldrb r3, [r7, #3]
800cc40: 2b0f cmp r3, #15
800cc42: d004 beq.n 800cc4e <unlock_fs+0x2e>
ff_rel_grant(fs->sobj);
800cc44: 687b ldr r3, [r7, #4]
800cc46: 68db ldr r3, [r3, #12]
800cc48: 4618 mov r0, r3
800cc4a: f002 ffa9 bl 800fba0 <ff_rel_grant>
}
}
800cc4e: bf00 nop
800cc50: 3708 adds r7, #8
800cc52: 46bd mov sp, r7
800cc54: bd80 pop {r7, pc}
...
0800cc58 <chk_lock>:
static
FRESULT chk_lock ( /* Check if the file can be accessed */
DIR* dp, /* Directory object pointing the file to be checked */
int acc /* Desired access type (0:Read, 1:Write, 2:Delete/Rename) */
)
{
800cc58: b480 push {r7}
800cc5a: b085 sub sp, #20
800cc5c: af00 add r7, sp, #0
800cc5e: 6078 str r0, [r7, #4]
800cc60: 6039 str r1, [r7, #0]
UINT i, be;
/* Search file semaphore table */
for (i = be = 0; i < _FS_LOCK; i++) {
800cc62: 2300 movs r3, #0
800cc64: 60bb str r3, [r7, #8]
800cc66: 68bb ldr r3, [r7, #8]
800cc68: 60fb str r3, [r7, #12]
800cc6a: e029 b.n 800ccc0 <chk_lock+0x68>
if (Files[i].fs) { /* Existing entry */
800cc6c: 4a27 ldr r2, [pc, #156] @ (800cd0c <chk_lock+0xb4>)
800cc6e: 68fb ldr r3, [r7, #12]
800cc70: 011b lsls r3, r3, #4
800cc72: 4413 add r3, r2
800cc74: 681b ldr r3, [r3, #0]
800cc76: 2b00 cmp r3, #0
800cc78: d01d beq.n 800ccb6 <chk_lock+0x5e>
if (Files[i].fs == dp->obj.fs && /* Check if the object matched with an open object */
800cc7a: 4a24 ldr r2, [pc, #144] @ (800cd0c <chk_lock+0xb4>)
800cc7c: 68fb ldr r3, [r7, #12]
800cc7e: 011b lsls r3, r3, #4
800cc80: 4413 add r3, r2
800cc82: 681a ldr r2, [r3, #0]
800cc84: 687b ldr r3, [r7, #4]
800cc86: 681b ldr r3, [r3, #0]
800cc88: 429a cmp r2, r3
800cc8a: d116 bne.n 800ccba <chk_lock+0x62>
Files[i].clu == dp->obj.sclust &&
800cc8c: 4a1f ldr r2, [pc, #124] @ (800cd0c <chk_lock+0xb4>)
800cc8e: 68fb ldr r3, [r7, #12]
800cc90: 011b lsls r3, r3, #4
800cc92: 4413 add r3, r2
800cc94: 3304 adds r3, #4
800cc96: 681a ldr r2, [r3, #0]
800cc98: 687b ldr r3, [r7, #4]
800cc9a: 689b ldr r3, [r3, #8]
if (Files[i].fs == dp->obj.fs && /* Check if the object matched with an open object */
800cc9c: 429a cmp r2, r3
800cc9e: d10c bne.n 800ccba <chk_lock+0x62>
Files[i].ofs == dp->dptr) break;
800cca0: 4a1a ldr r2, [pc, #104] @ (800cd0c <chk_lock+0xb4>)
800cca2: 68fb ldr r3, [r7, #12]
800cca4: 011b lsls r3, r3, #4
800cca6: 4413 add r3, r2
800cca8: 3308 adds r3, #8
800ccaa: 681a ldr r2, [r3, #0]
800ccac: 687b ldr r3, [r7, #4]
800ccae: 695b ldr r3, [r3, #20]
Files[i].clu == dp->obj.sclust &&
800ccb0: 429a cmp r2, r3
800ccb2: d102 bne.n 800ccba <chk_lock+0x62>
Files[i].ofs == dp->dptr) break;
800ccb4: e007 b.n 800ccc6 <chk_lock+0x6e>
} else { /* Blank entry */
be = 1;
800ccb6: 2301 movs r3, #1
800ccb8: 60bb str r3, [r7, #8]
for (i = be = 0; i < _FS_LOCK; i++) {
800ccba: 68fb ldr r3, [r7, #12]
800ccbc: 3301 adds r3, #1
800ccbe: 60fb str r3, [r7, #12]
800ccc0: 68fb ldr r3, [r7, #12]
800ccc2: 2b01 cmp r3, #1
800ccc4: d9d2 bls.n 800cc6c <chk_lock+0x14>
}
}
if (i == _FS_LOCK) { /* The object is not opened */
800ccc6: 68fb ldr r3, [r7, #12]
800ccc8: 2b02 cmp r3, #2
800ccca: d109 bne.n 800cce0 <chk_lock+0x88>
return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES; /* Is there a blank entry for new object? */
800cccc: 68bb ldr r3, [r7, #8]
800ccce: 2b00 cmp r3, #0
800ccd0: d102 bne.n 800ccd8 <chk_lock+0x80>
800ccd2: 683b ldr r3, [r7, #0]
800ccd4: 2b02 cmp r3, #2
800ccd6: d101 bne.n 800ccdc <chk_lock+0x84>
800ccd8: 2300 movs r3, #0
800ccda: e010 b.n 800ccfe <chk_lock+0xa6>
800ccdc: 2312 movs r3, #18
800ccde: e00e b.n 800ccfe <chk_lock+0xa6>
}
/* The object has been opened. Reject any open against writing file and all write mode open */
return (acc || Files[i].ctr == 0x100) ? FR_LOCKED : FR_OK;
800cce0: 683b ldr r3, [r7, #0]
800cce2: 2b00 cmp r3, #0
800cce4: d108 bne.n 800ccf8 <chk_lock+0xa0>
800cce6: 4a09 ldr r2, [pc, #36] @ (800cd0c <chk_lock+0xb4>)
800cce8: 68fb ldr r3, [r7, #12]
800ccea: 011b lsls r3, r3, #4
800ccec: 4413 add r3, r2
800ccee: 330c adds r3, #12
800ccf0: 881b ldrh r3, [r3, #0]
800ccf2: f5b3 7f80 cmp.w r3, #256 @ 0x100
800ccf6: d101 bne.n 800ccfc <chk_lock+0xa4>
800ccf8: 2310 movs r3, #16
800ccfa: e000 b.n 800ccfe <chk_lock+0xa6>
800ccfc: 2300 movs r3, #0
}
800ccfe: 4618 mov r0, r3
800cd00: 3714 adds r7, #20
800cd02: 46bd mov sp, r7
800cd04: f85d 7b04 ldr.w r7, [sp], #4
800cd08: 4770 bx lr
800cd0a: bf00 nop
800cd0c: 2001012c .word 0x2001012c
0800cd10 <enq_lock>:
static
int enq_lock (void) /* Check if an entry is available for a new object */
{
800cd10: b480 push {r7}
800cd12: b083 sub sp, #12
800cd14: af00 add r7, sp, #0
UINT i;
for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ;
800cd16: 2300 movs r3, #0
800cd18: 607b str r3, [r7, #4]
800cd1a: e002 b.n 800cd22 <enq_lock+0x12>
800cd1c: 687b ldr r3, [r7, #4]
800cd1e: 3301 adds r3, #1
800cd20: 607b str r3, [r7, #4]
800cd22: 687b ldr r3, [r7, #4]
800cd24: 2b01 cmp r3, #1
800cd26: d806 bhi.n 800cd36 <enq_lock+0x26>
800cd28: 4a09 ldr r2, [pc, #36] @ (800cd50 <enq_lock+0x40>)
800cd2a: 687b ldr r3, [r7, #4]
800cd2c: 011b lsls r3, r3, #4
800cd2e: 4413 add r3, r2
800cd30: 681b ldr r3, [r3, #0]
800cd32: 2b00 cmp r3, #0
800cd34: d1f2 bne.n 800cd1c <enq_lock+0xc>
return (i == _FS_LOCK) ? 0 : 1;
800cd36: 687b ldr r3, [r7, #4]
800cd38: 2b02 cmp r3, #2
800cd3a: bf14 ite ne
800cd3c: 2301 movne r3, #1
800cd3e: 2300 moveq r3, #0
800cd40: b2db uxtb r3, r3
}
800cd42: 4618 mov r0, r3
800cd44: 370c adds r7, #12
800cd46: 46bd mov sp, r7
800cd48: f85d 7b04 ldr.w r7, [sp], #4
800cd4c: 4770 bx lr
800cd4e: bf00 nop
800cd50: 2001012c .word 0x2001012c
0800cd54 <inc_lock>:
static
UINT inc_lock ( /* Increment object open counter and returns its index (0:Internal error) */
DIR* dp, /* Directory object pointing the file to register or increment */
int acc /* Desired access (0:Read, 1:Write, 2:Delete/Rename) */
)
{
800cd54: b480 push {r7}
800cd56: b085 sub sp, #20
800cd58: af00 add r7, sp, #0
800cd5a: 6078 str r0, [r7, #4]
800cd5c: 6039 str r1, [r7, #0]
UINT i;
for (i = 0; i < _FS_LOCK; i++) { /* Find the object */
800cd5e: 2300 movs r3, #0
800cd60: 60fb str r3, [r7, #12]
800cd62: e01f b.n 800cda4 <inc_lock+0x50>
if (Files[i].fs == dp->obj.fs &&
800cd64: 4a41 ldr r2, [pc, #260] @ (800ce6c <inc_lock+0x118>)
800cd66: 68fb ldr r3, [r7, #12]
800cd68: 011b lsls r3, r3, #4
800cd6a: 4413 add r3, r2
800cd6c: 681a ldr r2, [r3, #0]
800cd6e: 687b ldr r3, [r7, #4]
800cd70: 681b ldr r3, [r3, #0]
800cd72: 429a cmp r2, r3
800cd74: d113 bne.n 800cd9e <inc_lock+0x4a>
Files[i].clu == dp->obj.sclust &&
800cd76: 4a3d ldr r2, [pc, #244] @ (800ce6c <inc_lock+0x118>)
800cd78: 68fb ldr r3, [r7, #12]
800cd7a: 011b lsls r3, r3, #4
800cd7c: 4413 add r3, r2
800cd7e: 3304 adds r3, #4
800cd80: 681a ldr r2, [r3, #0]
800cd82: 687b ldr r3, [r7, #4]
800cd84: 689b ldr r3, [r3, #8]
if (Files[i].fs == dp->obj.fs &&
800cd86: 429a cmp r2, r3
800cd88: d109 bne.n 800cd9e <inc_lock+0x4a>
Files[i].ofs == dp->dptr) break;
800cd8a: 4a38 ldr r2, [pc, #224] @ (800ce6c <inc_lock+0x118>)
800cd8c: 68fb ldr r3, [r7, #12]
800cd8e: 011b lsls r3, r3, #4
800cd90: 4413 add r3, r2
800cd92: 3308 adds r3, #8
800cd94: 681a ldr r2, [r3, #0]
800cd96: 687b ldr r3, [r7, #4]
800cd98: 695b ldr r3, [r3, #20]
Files[i].clu == dp->obj.sclust &&
800cd9a: 429a cmp r2, r3
800cd9c: d006 beq.n 800cdac <inc_lock+0x58>
for (i = 0; i < _FS_LOCK; i++) { /* Find the object */
800cd9e: 68fb ldr r3, [r7, #12]
800cda0: 3301 adds r3, #1
800cda2: 60fb str r3, [r7, #12]
800cda4: 68fb ldr r3, [r7, #12]
800cda6: 2b01 cmp r3, #1
800cda8: d9dc bls.n 800cd64 <inc_lock+0x10>
800cdaa: e000 b.n 800cdae <inc_lock+0x5a>
Files[i].ofs == dp->dptr) break;
800cdac: bf00 nop
}
if (i == _FS_LOCK) { /* Not opened. Register it as new. */
800cdae: 68fb ldr r3, [r7, #12]
800cdb0: 2b02 cmp r3, #2
800cdb2: d132 bne.n 800ce1a <inc_lock+0xc6>
for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ;
800cdb4: 2300 movs r3, #0
800cdb6: 60fb str r3, [r7, #12]
800cdb8: e002 b.n 800cdc0 <inc_lock+0x6c>
800cdba: 68fb ldr r3, [r7, #12]
800cdbc: 3301 adds r3, #1
800cdbe: 60fb str r3, [r7, #12]
800cdc0: 68fb ldr r3, [r7, #12]
800cdc2: 2b01 cmp r3, #1
800cdc4: d806 bhi.n 800cdd4 <inc_lock+0x80>
800cdc6: 4a29 ldr r2, [pc, #164] @ (800ce6c <inc_lock+0x118>)
800cdc8: 68fb ldr r3, [r7, #12]
800cdca: 011b lsls r3, r3, #4
800cdcc: 4413 add r3, r2
800cdce: 681b ldr r3, [r3, #0]
800cdd0: 2b00 cmp r3, #0
800cdd2: d1f2 bne.n 800cdba <inc_lock+0x66>
if (i == _FS_LOCK) return 0; /* No free entry to register (int err) */
800cdd4: 68fb ldr r3, [r7, #12]
800cdd6: 2b02 cmp r3, #2
800cdd8: d101 bne.n 800cdde <inc_lock+0x8a>
800cdda: 2300 movs r3, #0
800cddc: e040 b.n 800ce60 <inc_lock+0x10c>
Files[i].fs = dp->obj.fs;
800cdde: 687b ldr r3, [r7, #4]
800cde0: 681a ldr r2, [r3, #0]
800cde2: 4922 ldr r1, [pc, #136] @ (800ce6c <inc_lock+0x118>)
800cde4: 68fb ldr r3, [r7, #12]
800cde6: 011b lsls r3, r3, #4
800cde8: 440b add r3, r1
800cdea: 601a str r2, [r3, #0]
Files[i].clu = dp->obj.sclust;
800cdec: 687b ldr r3, [r7, #4]
800cdee: 689a ldr r2, [r3, #8]
800cdf0: 491e ldr r1, [pc, #120] @ (800ce6c <inc_lock+0x118>)
800cdf2: 68fb ldr r3, [r7, #12]
800cdf4: 011b lsls r3, r3, #4
800cdf6: 440b add r3, r1
800cdf8: 3304 adds r3, #4
800cdfa: 601a str r2, [r3, #0]
Files[i].ofs = dp->dptr;
800cdfc: 687b ldr r3, [r7, #4]
800cdfe: 695a ldr r2, [r3, #20]
800ce00: 491a ldr r1, [pc, #104] @ (800ce6c <inc_lock+0x118>)
800ce02: 68fb ldr r3, [r7, #12]
800ce04: 011b lsls r3, r3, #4
800ce06: 440b add r3, r1
800ce08: 3308 adds r3, #8
800ce0a: 601a str r2, [r3, #0]
Files[i].ctr = 0;
800ce0c: 4a17 ldr r2, [pc, #92] @ (800ce6c <inc_lock+0x118>)
800ce0e: 68fb ldr r3, [r7, #12]
800ce10: 011b lsls r3, r3, #4
800ce12: 4413 add r3, r2
800ce14: 330c adds r3, #12
800ce16: 2200 movs r2, #0
800ce18: 801a strh r2, [r3, #0]
}
if (acc && Files[i].ctr) return 0; /* Access violation (int err) */
800ce1a: 683b ldr r3, [r7, #0]
800ce1c: 2b00 cmp r3, #0
800ce1e: d009 beq.n 800ce34 <inc_lock+0xe0>
800ce20: 4a12 ldr r2, [pc, #72] @ (800ce6c <inc_lock+0x118>)
800ce22: 68fb ldr r3, [r7, #12]
800ce24: 011b lsls r3, r3, #4
800ce26: 4413 add r3, r2
800ce28: 330c adds r3, #12
800ce2a: 881b ldrh r3, [r3, #0]
800ce2c: 2b00 cmp r3, #0
800ce2e: d001 beq.n 800ce34 <inc_lock+0xe0>
800ce30: 2300 movs r3, #0
800ce32: e015 b.n 800ce60 <inc_lock+0x10c>
Files[i].ctr = acc ? 0x100 : Files[i].ctr + 1; /* Set semaphore value */
800ce34: 683b ldr r3, [r7, #0]
800ce36: 2b00 cmp r3, #0
800ce38: d108 bne.n 800ce4c <inc_lock+0xf8>
800ce3a: 4a0c ldr r2, [pc, #48] @ (800ce6c <inc_lock+0x118>)
800ce3c: 68fb ldr r3, [r7, #12]
800ce3e: 011b lsls r3, r3, #4
800ce40: 4413 add r3, r2
800ce42: 330c adds r3, #12
800ce44: 881b ldrh r3, [r3, #0]
800ce46: 3301 adds r3, #1
800ce48: b29a uxth r2, r3
800ce4a: e001 b.n 800ce50 <inc_lock+0xfc>
800ce4c: f44f 7280 mov.w r2, #256 @ 0x100
800ce50: 4906 ldr r1, [pc, #24] @ (800ce6c <inc_lock+0x118>)
800ce52: 68fb ldr r3, [r7, #12]
800ce54: 011b lsls r3, r3, #4
800ce56: 440b add r3, r1
800ce58: 330c adds r3, #12
800ce5a: 801a strh r2, [r3, #0]
return i + 1;
800ce5c: 68fb ldr r3, [r7, #12]
800ce5e: 3301 adds r3, #1
}
800ce60: 4618 mov r0, r3
800ce62: 3714 adds r7, #20
800ce64: 46bd mov sp, r7
800ce66: f85d 7b04 ldr.w r7, [sp], #4
800ce6a: 4770 bx lr
800ce6c: 2001012c .word 0x2001012c
0800ce70 <dec_lock>:
static
FRESULT dec_lock ( /* Decrement object open counter */
UINT i /* Semaphore index (1..) */
)
{
800ce70: b480 push {r7}
800ce72: b085 sub sp, #20
800ce74: af00 add r7, sp, #0
800ce76: 6078 str r0, [r7, #4]
WORD n;
FRESULT res;
if (--i < _FS_LOCK) { /* Shift index number origin from 0 */
800ce78: 687b ldr r3, [r7, #4]
800ce7a: 3b01 subs r3, #1
800ce7c: 607b str r3, [r7, #4]
800ce7e: 687b ldr r3, [r7, #4]
800ce80: 2b01 cmp r3, #1
800ce82: d825 bhi.n 800ced0 <dec_lock+0x60>
n = Files[i].ctr;
800ce84: 4a17 ldr r2, [pc, #92] @ (800cee4 <dec_lock+0x74>)
800ce86: 687b ldr r3, [r7, #4]
800ce88: 011b lsls r3, r3, #4
800ce8a: 4413 add r3, r2
800ce8c: 330c adds r3, #12
800ce8e: 881b ldrh r3, [r3, #0]
800ce90: 81fb strh r3, [r7, #14]
if (n == 0x100) n = 0; /* If write mode open, delete the entry */
800ce92: 89fb ldrh r3, [r7, #14]
800ce94: f5b3 7f80 cmp.w r3, #256 @ 0x100
800ce98: d101 bne.n 800ce9e <dec_lock+0x2e>
800ce9a: 2300 movs r3, #0
800ce9c: 81fb strh r3, [r7, #14]
if (n > 0) n--; /* Decrement read mode open count */
800ce9e: 89fb ldrh r3, [r7, #14]
800cea0: 2b00 cmp r3, #0
800cea2: d002 beq.n 800ceaa <dec_lock+0x3a>
800cea4: 89fb ldrh r3, [r7, #14]
800cea6: 3b01 subs r3, #1
800cea8: 81fb strh r3, [r7, #14]
Files[i].ctr = n;
800ceaa: 4a0e ldr r2, [pc, #56] @ (800cee4 <dec_lock+0x74>)
800ceac: 687b ldr r3, [r7, #4]
800ceae: 011b lsls r3, r3, #4
800ceb0: 4413 add r3, r2
800ceb2: 330c adds r3, #12
800ceb4: 89fa ldrh r2, [r7, #14]
800ceb6: 801a strh r2, [r3, #0]
if (n == 0) Files[i].fs = 0; /* Delete the entry if open count gets zero */
800ceb8: 89fb ldrh r3, [r7, #14]
800ceba: 2b00 cmp r3, #0
800cebc: d105 bne.n 800ceca <dec_lock+0x5a>
800cebe: 4a09 ldr r2, [pc, #36] @ (800cee4 <dec_lock+0x74>)
800cec0: 687b ldr r3, [r7, #4]
800cec2: 011b lsls r3, r3, #4
800cec4: 4413 add r3, r2
800cec6: 2200 movs r2, #0
800cec8: 601a str r2, [r3, #0]
res = FR_OK;
800ceca: 2300 movs r3, #0
800cecc: 737b strb r3, [r7, #13]
800cece: e001 b.n 800ced4 <dec_lock+0x64>
} else {
res = FR_INT_ERR; /* Invalid index nunber */
800ced0: 2302 movs r3, #2
800ced2: 737b strb r3, [r7, #13]
}
return res;
800ced4: 7b7b ldrb r3, [r7, #13]
}
800ced6: 4618 mov r0, r3
800ced8: 3714 adds r7, #20
800ceda: 46bd mov sp, r7
800cedc: f85d 7b04 ldr.w r7, [sp], #4
800cee0: 4770 bx lr
800cee2: bf00 nop
800cee4: 2001012c .word 0x2001012c
0800cee8 <clear_lock>:
static
void clear_lock ( /* Clear lock entries of the volume */
FATFS *fs
)
{
800cee8: b480 push {r7}
800ceea: b085 sub sp, #20
800ceec: af00 add r7, sp, #0
800ceee: 6078 str r0, [r7, #4]
UINT i;
for (i = 0; i < _FS_LOCK; i++) {
800cef0: 2300 movs r3, #0
800cef2: 60fb str r3, [r7, #12]
800cef4: e010 b.n 800cf18 <clear_lock+0x30>
if (Files[i].fs == fs) Files[i].fs = 0;
800cef6: 4a0d ldr r2, [pc, #52] @ (800cf2c <clear_lock+0x44>)
800cef8: 68fb ldr r3, [r7, #12]
800cefa: 011b lsls r3, r3, #4
800cefc: 4413 add r3, r2
800cefe: 681b ldr r3, [r3, #0]
800cf00: 687a ldr r2, [r7, #4]
800cf02: 429a cmp r2, r3
800cf04: d105 bne.n 800cf12 <clear_lock+0x2a>
800cf06: 4a09 ldr r2, [pc, #36] @ (800cf2c <clear_lock+0x44>)
800cf08: 68fb ldr r3, [r7, #12]
800cf0a: 011b lsls r3, r3, #4
800cf0c: 4413 add r3, r2
800cf0e: 2200 movs r2, #0
800cf10: 601a str r2, [r3, #0]
for (i = 0; i < _FS_LOCK; i++) {
800cf12: 68fb ldr r3, [r7, #12]
800cf14: 3301 adds r3, #1
800cf16: 60fb str r3, [r7, #12]
800cf18: 68fb ldr r3, [r7, #12]
800cf1a: 2b01 cmp r3, #1
800cf1c: d9eb bls.n 800cef6 <clear_lock+0xe>
}
}
800cf1e: bf00 nop
800cf20: bf00 nop
800cf22: 3714 adds r7, #20
800cf24: 46bd mov sp, r7
800cf26: f85d 7b04 ldr.w r7, [sp], #4
800cf2a: 4770 bx lr
800cf2c: 2001012c .word 0x2001012c
0800cf30 <sync_window>:
#if !_FS_READONLY
static
FRESULT sync_window ( /* Returns FR_OK or FR_DISK_ERROR */
FATFS* fs /* File system object */
)
{
800cf30: b580 push {r7, lr}
800cf32: b086 sub sp, #24
800cf34: af00 add r7, sp, #0
800cf36: 6078 str r0, [r7, #4]
DWORD wsect;
UINT nf;
FRESULT res = FR_OK;
800cf38: 2300 movs r3, #0
800cf3a: 73fb strb r3, [r7, #15]
if (fs->wflag) { /* Write back the sector if it is dirty */
800cf3c: 687b ldr r3, [r7, #4]
800cf3e: 78db ldrb r3, [r3, #3]
800cf40: 2b00 cmp r3, #0
800cf42: d034 beq.n 800cfae <sync_window+0x7e>
wsect = fs->winsect; /* Current sector number */
800cf44: 687b ldr r3, [r7, #4]
800cf46: 6b1b ldr r3, [r3, #48] @ 0x30
800cf48: 617b str r3, [r7, #20]
if (disk_write(fs->drv, fs->win, wsect, 1) != RES_OK) {
800cf4a: 687b ldr r3, [r7, #4]
800cf4c: 7858 ldrb r0, [r3, #1]
800cf4e: 687b ldr r3, [r7, #4]
800cf50: f103 0134 add.w r1, r3, #52 @ 0x34
800cf54: 2301 movs r3, #1
800cf56: 697a ldr r2, [r7, #20]
800cf58: f7ff fd0e bl 800c978 <disk_write>
800cf5c: 4603 mov r3, r0
800cf5e: 2b00 cmp r3, #0
800cf60: d002 beq.n 800cf68 <sync_window+0x38>
res = FR_DISK_ERR;
800cf62: 2301 movs r3, #1
800cf64: 73fb strb r3, [r7, #15]
800cf66: e022 b.n 800cfae <sync_window+0x7e>
} else {
fs->wflag = 0;
800cf68: 687b ldr r3, [r7, #4]
800cf6a: 2200 movs r2, #0
800cf6c: 70da strb r2, [r3, #3]
if (wsect - fs->fatbase < fs->fsize) { /* Is it in the FAT area? */
800cf6e: 687b ldr r3, [r7, #4]
800cf70: 6a5b ldr r3, [r3, #36] @ 0x24
800cf72: 697a ldr r2, [r7, #20]
800cf74: 1ad2 subs r2, r2, r3
800cf76: 687b ldr r3, [r7, #4]
800cf78: 69db ldr r3, [r3, #28]
800cf7a: 429a cmp r2, r3
800cf7c: d217 bcs.n 800cfae <sync_window+0x7e>
for (nf = fs->n_fats; nf >= 2; nf--) { /* Reflect the change to all FAT copies */
800cf7e: 687b ldr r3, [r7, #4]
800cf80: 789b ldrb r3, [r3, #2]
800cf82: 613b str r3, [r7, #16]
800cf84: e010 b.n 800cfa8 <sync_window+0x78>
wsect += fs->fsize;
800cf86: 687b ldr r3, [r7, #4]
800cf88: 69db ldr r3, [r3, #28]
800cf8a: 697a ldr r2, [r7, #20]
800cf8c: 4413 add r3, r2
800cf8e: 617b str r3, [r7, #20]
disk_write(fs->drv, fs->win, wsect, 1);
800cf90: 687b ldr r3, [r7, #4]
800cf92: 7858 ldrb r0, [r3, #1]
800cf94: 687b ldr r3, [r7, #4]
800cf96: f103 0134 add.w r1, r3, #52 @ 0x34
800cf9a: 2301 movs r3, #1
800cf9c: 697a ldr r2, [r7, #20]
800cf9e: f7ff fceb bl 800c978 <disk_write>
for (nf = fs->n_fats; nf >= 2; nf--) { /* Reflect the change to all FAT copies */
800cfa2: 693b ldr r3, [r7, #16]
800cfa4: 3b01 subs r3, #1
800cfa6: 613b str r3, [r7, #16]
800cfa8: 693b ldr r3, [r7, #16]
800cfaa: 2b01 cmp r3, #1
800cfac: d8eb bhi.n 800cf86 <sync_window+0x56>
}
}
}
}
return res;
800cfae: 7bfb ldrb r3, [r7, #15]
}
800cfb0: 4618 mov r0, r3
800cfb2: 3718 adds r7, #24
800cfb4: 46bd mov sp, r7
800cfb6: bd80 pop {r7, pc}
0800cfb8 <move_window>:
static
FRESULT move_window ( /* Returns FR_OK or FR_DISK_ERROR */
FATFS* fs, /* File system object */
DWORD sector /* Sector number to make appearance in the fs->win[] */
)
{
800cfb8: b580 push {r7, lr}
800cfba: b084 sub sp, #16
800cfbc: af00 add r7, sp, #0
800cfbe: 6078 str r0, [r7, #4]
800cfc0: 6039 str r1, [r7, #0]
FRESULT res = FR_OK;
800cfc2: 2300 movs r3, #0
800cfc4: 73fb strb r3, [r7, #15]
if (sector != fs->winsect) { /* Window offset changed? */
800cfc6: 687b ldr r3, [r7, #4]
800cfc8: 6b1b ldr r3, [r3, #48] @ 0x30
800cfca: 683a ldr r2, [r7, #0]
800cfcc: 429a cmp r2, r3
800cfce: d01b beq.n 800d008 <move_window+0x50>
#if !_FS_READONLY
res = sync_window(fs); /* Write-back changes */
800cfd0: 6878 ldr r0, [r7, #4]
800cfd2: f7ff ffad bl 800cf30 <sync_window>
800cfd6: 4603 mov r3, r0
800cfd8: 73fb strb r3, [r7, #15]
#endif
if (res == FR_OK) { /* Fill sector window with new data */
800cfda: 7bfb ldrb r3, [r7, #15]
800cfdc: 2b00 cmp r3, #0
800cfde: d113 bne.n 800d008 <move_window+0x50>
if (disk_read(fs->drv, fs->win, sector, 1) != RES_OK) {
800cfe0: 687b ldr r3, [r7, #4]
800cfe2: 7858 ldrb r0, [r3, #1]
800cfe4: 687b ldr r3, [r7, #4]
800cfe6: f103 0134 add.w r1, r3, #52 @ 0x34
800cfea: 2301 movs r3, #1
800cfec: 683a ldr r2, [r7, #0]
800cfee: f7ff fca3 bl 800c938 <disk_read>
800cff2: 4603 mov r3, r0
800cff4: 2b00 cmp r3, #0
800cff6: d004 beq.n 800d002 <move_window+0x4a>
sector = 0xFFFFFFFF; /* Invalidate window if data is not reliable */
800cff8: f04f 33ff mov.w r3, #4294967295
800cffc: 603b str r3, [r7, #0]
res = FR_DISK_ERR;
800cffe: 2301 movs r3, #1
800d000: 73fb strb r3, [r7, #15]
}
fs->winsect = sector;
800d002: 687b ldr r3, [r7, #4]
800d004: 683a ldr r2, [r7, #0]
800d006: 631a str r2, [r3, #48] @ 0x30
}
}
return res;
800d008: 7bfb ldrb r3, [r7, #15]
}
800d00a: 4618 mov r0, r3
800d00c: 3710 adds r7, #16
800d00e: 46bd mov sp, r7
800d010: bd80 pop {r7, pc}
...
0800d014 <sync_fs>:
static
FRESULT sync_fs ( /* FR_OK:succeeded, !=0:error */
FATFS* fs /* File system object */
)
{
800d014: b580 push {r7, lr}
800d016: b084 sub sp, #16
800d018: af00 add r7, sp, #0
800d01a: 6078 str r0, [r7, #4]
FRESULT res;
res = sync_window(fs);
800d01c: 6878 ldr r0, [r7, #4]
800d01e: f7ff ff87 bl 800cf30 <sync_window>
800d022: 4603 mov r3, r0
800d024: 73fb strb r3, [r7, #15]
if (res == FR_OK) {
800d026: 7bfb ldrb r3, [r7, #15]
800d028: 2b00 cmp r3, #0
800d02a: d158 bne.n 800d0de <sync_fs+0xca>
/* Update FSInfo sector if needed */
if (fs->fs_type == FS_FAT32 && fs->fsi_flag == 1) {
800d02c: 687b ldr r3, [r7, #4]
800d02e: 781b ldrb r3, [r3, #0]
800d030: 2b03 cmp r3, #3
800d032: d148 bne.n 800d0c6 <sync_fs+0xb2>
800d034: 687b ldr r3, [r7, #4]
800d036: 791b ldrb r3, [r3, #4]
800d038: 2b01 cmp r3, #1
800d03a: d144 bne.n 800d0c6 <sync_fs+0xb2>
/* Create FSInfo structure */
mem_set(fs->win, 0, SS(fs));
800d03c: 687b ldr r3, [r7, #4]
800d03e: 3334 adds r3, #52 @ 0x34
800d040: f44f 7200 mov.w r2, #512 @ 0x200
800d044: 2100 movs r1, #0
800d046: 4618 mov r0, r3
800d048: f7ff fd77 bl 800cb3a <mem_set>
st_word(fs->win + BS_55AA, 0xAA55);
800d04c: 687b ldr r3, [r7, #4]
800d04e: 3334 adds r3, #52 @ 0x34
800d050: f503 73ff add.w r3, r3, #510 @ 0x1fe
800d054: f64a 2155 movw r1, #43605 @ 0xaa55
800d058: 4618 mov r0, r3
800d05a: f7ff fd06 bl 800ca6a <st_word>
st_dword(fs->win + FSI_LeadSig, 0x41615252);
800d05e: 687b ldr r3, [r7, #4]
800d060: 3334 adds r3, #52 @ 0x34
800d062: 4921 ldr r1, [pc, #132] @ (800d0e8 <sync_fs+0xd4>)
800d064: 4618 mov r0, r3
800d066: f7ff fd1b bl 800caa0 <st_dword>
st_dword(fs->win + FSI_StrucSig, 0x61417272);
800d06a: 687b ldr r3, [r7, #4]
800d06c: 3334 adds r3, #52 @ 0x34
800d06e: f503 73f2 add.w r3, r3, #484 @ 0x1e4
800d072: 491e ldr r1, [pc, #120] @ (800d0ec <sync_fs+0xd8>)
800d074: 4618 mov r0, r3
800d076: f7ff fd13 bl 800caa0 <st_dword>
st_dword(fs->win + FSI_Free_Count, fs->free_clst);
800d07a: 687b ldr r3, [r7, #4]
800d07c: 3334 adds r3, #52 @ 0x34
800d07e: f503 72f4 add.w r2, r3, #488 @ 0x1e8
800d082: 687b ldr r3, [r7, #4]
800d084: 695b ldr r3, [r3, #20]
800d086: 4619 mov r1, r3
800d088: 4610 mov r0, r2
800d08a: f7ff fd09 bl 800caa0 <st_dword>
st_dword(fs->win + FSI_Nxt_Free, fs->last_clst);
800d08e: 687b ldr r3, [r7, #4]
800d090: 3334 adds r3, #52 @ 0x34
800d092: f503 72f6 add.w r2, r3, #492 @ 0x1ec
800d096: 687b ldr r3, [r7, #4]
800d098: 691b ldr r3, [r3, #16]
800d09a: 4619 mov r1, r3
800d09c: 4610 mov r0, r2
800d09e: f7ff fcff bl 800caa0 <st_dword>
/* Write it into the FSInfo sector */
fs->winsect = fs->volbase + 1;
800d0a2: 687b ldr r3, [r7, #4]
800d0a4: 6a1b ldr r3, [r3, #32]
800d0a6: 1c5a adds r2, r3, #1
800d0a8: 687b ldr r3, [r7, #4]
800d0aa: 631a str r2, [r3, #48] @ 0x30
disk_write(fs->drv, fs->win, fs->winsect, 1);
800d0ac: 687b ldr r3, [r7, #4]
800d0ae: 7858 ldrb r0, [r3, #1]
800d0b0: 687b ldr r3, [r7, #4]
800d0b2: f103 0134 add.w r1, r3, #52 @ 0x34
800d0b6: 687b ldr r3, [r7, #4]
800d0b8: 6b1a ldr r2, [r3, #48] @ 0x30
800d0ba: 2301 movs r3, #1
800d0bc: f7ff fc5c bl 800c978 <disk_write>
fs->fsi_flag = 0;
800d0c0: 687b ldr r3, [r7, #4]
800d0c2: 2200 movs r2, #0
800d0c4: 711a strb r2, [r3, #4]
}
/* Make sure that no pending write process in the physical drive */
if (disk_ioctl(fs->drv, CTRL_SYNC, 0) != RES_OK) res = FR_DISK_ERR;
800d0c6: 687b ldr r3, [r7, #4]
800d0c8: 785b ldrb r3, [r3, #1]
800d0ca: 2200 movs r2, #0
800d0cc: 2100 movs r1, #0
800d0ce: 4618 mov r0, r3
800d0d0: f7ff fc72 bl 800c9b8 <disk_ioctl>
800d0d4: 4603 mov r3, r0
800d0d6: 2b00 cmp r3, #0
800d0d8: d001 beq.n 800d0de <sync_fs+0xca>
800d0da: 2301 movs r3, #1
800d0dc: 73fb strb r3, [r7, #15]
}
return res;
800d0de: 7bfb ldrb r3, [r7, #15]
}
800d0e0: 4618 mov r0, r3
800d0e2: 3710 adds r7, #16
800d0e4: 46bd mov sp, r7
800d0e6: bd80 pop {r7, pc}
800d0e8: 41615252 .word 0x41615252
800d0ec: 61417272 .word 0x61417272
0800d0f0 <clust2sect>:
static
DWORD clust2sect ( /* !=0:Sector number, 0:Failed (invalid cluster#) */
FATFS* fs, /* File system object */
DWORD clst /* Cluster# to be converted */
)
{
800d0f0: b480 push {r7}
800d0f2: b083 sub sp, #12
800d0f4: af00 add r7, sp, #0
800d0f6: 6078 str r0, [r7, #4]
800d0f8: 6039 str r1, [r7, #0]
clst -= 2;
800d0fa: 683b ldr r3, [r7, #0]
800d0fc: 3b02 subs r3, #2
800d0fe: 603b str r3, [r7, #0]
if (clst >= fs->n_fatent - 2) return 0; /* Invalid cluster# */
800d100: 687b ldr r3, [r7, #4]
800d102: 699b ldr r3, [r3, #24]
800d104: 3b02 subs r3, #2
800d106: 683a ldr r2, [r7, #0]
800d108: 429a cmp r2, r3
800d10a: d301 bcc.n 800d110 <clust2sect+0x20>
800d10c: 2300 movs r3, #0
800d10e: e008 b.n 800d122 <clust2sect+0x32>
return clst * fs->csize + fs->database;
800d110: 687b ldr r3, [r7, #4]
800d112: 895b ldrh r3, [r3, #10]
800d114: 461a mov r2, r3
800d116: 683b ldr r3, [r7, #0]
800d118: fb03 f202 mul.w r2, r3, r2
800d11c: 687b ldr r3, [r7, #4]
800d11e: 6adb ldr r3, [r3, #44] @ 0x2c
800d120: 4413 add r3, r2
}
800d122: 4618 mov r0, r3
800d124: 370c adds r7, #12
800d126: 46bd mov sp, r7
800d128: f85d 7b04 ldr.w r7, [sp], #4
800d12c: 4770 bx lr
0800d12e <get_fat>:
static
DWORD get_fat ( /* 0xFFFFFFFF:Disk error, 1:Internal error, 2..0x7FFFFFFF:Cluster status */
_FDID* obj, /* Corresponding object */
DWORD clst /* Cluster number to get the value */
)
{
800d12e: b580 push {r7, lr}
800d130: b086 sub sp, #24
800d132: af00 add r7, sp, #0
800d134: 6078 str r0, [r7, #4]
800d136: 6039 str r1, [r7, #0]
UINT wc, bc;
DWORD val;
FATFS *fs = obj->fs;
800d138: 687b ldr r3, [r7, #4]
800d13a: 681b ldr r3, [r3, #0]
800d13c: 613b str r3, [r7, #16]
if (clst < 2 || clst >= fs->n_fatent) { /* Check if in valid range */
800d13e: 683b ldr r3, [r7, #0]
800d140: 2b01 cmp r3, #1
800d142: d904 bls.n 800d14e <get_fat+0x20>
800d144: 693b ldr r3, [r7, #16]
800d146: 699b ldr r3, [r3, #24]
800d148: 683a ldr r2, [r7, #0]
800d14a: 429a cmp r2, r3
800d14c: d302 bcc.n 800d154 <get_fat+0x26>
val = 1; /* Internal error */
800d14e: 2301 movs r3, #1
800d150: 617b str r3, [r7, #20]
800d152: e08e b.n 800d272 <get_fat+0x144>
} else {
val = 0xFFFFFFFF; /* Default value falls on disk error */
800d154: f04f 33ff mov.w r3, #4294967295
800d158: 617b str r3, [r7, #20]
switch (fs->fs_type) {
800d15a: 693b ldr r3, [r7, #16]
800d15c: 781b ldrb r3, [r3, #0]
800d15e: 2b03 cmp r3, #3
800d160: d061 beq.n 800d226 <get_fat+0xf8>
800d162: 2b03 cmp r3, #3
800d164: dc7b bgt.n 800d25e <get_fat+0x130>
800d166: 2b01 cmp r3, #1
800d168: d002 beq.n 800d170 <get_fat+0x42>
800d16a: 2b02 cmp r3, #2
800d16c: d041 beq.n 800d1f2 <get_fat+0xc4>
800d16e: e076 b.n 800d25e <get_fat+0x130>
case FS_FAT12 :
bc = (UINT)clst; bc += bc / 2;
800d170: 683b ldr r3, [r7, #0]
800d172: 60fb str r3, [r7, #12]
800d174: 68fb ldr r3, [r7, #12]
800d176: 085b lsrs r3, r3, #1
800d178: 68fa ldr r2, [r7, #12]
800d17a: 4413 add r3, r2
800d17c: 60fb str r3, [r7, #12]
if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
800d17e: 693b ldr r3, [r7, #16]
800d180: 6a5a ldr r2, [r3, #36] @ 0x24
800d182: 68fb ldr r3, [r7, #12]
800d184: 0a5b lsrs r3, r3, #9
800d186: 4413 add r3, r2
800d188: 4619 mov r1, r3
800d18a: 6938 ldr r0, [r7, #16]
800d18c: f7ff ff14 bl 800cfb8 <move_window>
800d190: 4603 mov r3, r0
800d192: 2b00 cmp r3, #0
800d194: d166 bne.n 800d264 <get_fat+0x136>
wc = fs->win[bc++ % SS(fs)];
800d196: 68fb ldr r3, [r7, #12]
800d198: 1c5a adds r2, r3, #1
800d19a: 60fa str r2, [r7, #12]
800d19c: f3c3 0308 ubfx r3, r3, #0, #9
800d1a0: 693a ldr r2, [r7, #16]
800d1a2: 4413 add r3, r2
800d1a4: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
800d1a8: 60bb str r3, [r7, #8]
if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
800d1aa: 693b ldr r3, [r7, #16]
800d1ac: 6a5a ldr r2, [r3, #36] @ 0x24
800d1ae: 68fb ldr r3, [r7, #12]
800d1b0: 0a5b lsrs r3, r3, #9
800d1b2: 4413 add r3, r2
800d1b4: 4619 mov r1, r3
800d1b6: 6938 ldr r0, [r7, #16]
800d1b8: f7ff fefe bl 800cfb8 <move_window>
800d1bc: 4603 mov r3, r0
800d1be: 2b00 cmp r3, #0
800d1c0: d152 bne.n 800d268 <get_fat+0x13a>
wc |= fs->win[bc % SS(fs)] << 8;
800d1c2: 68fb ldr r3, [r7, #12]
800d1c4: f3c3 0308 ubfx r3, r3, #0, #9
800d1c8: 693a ldr r2, [r7, #16]
800d1ca: 4413 add r3, r2
800d1cc: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
800d1d0: 021b lsls r3, r3, #8
800d1d2: 68ba ldr r2, [r7, #8]
800d1d4: 4313 orrs r3, r2
800d1d6: 60bb str r3, [r7, #8]
val = (clst & 1) ? (wc >> 4) : (wc & 0xFFF);
800d1d8: 683b ldr r3, [r7, #0]
800d1da: f003 0301 and.w r3, r3, #1
800d1de: 2b00 cmp r3, #0
800d1e0: d002 beq.n 800d1e8 <get_fat+0xba>
800d1e2: 68bb ldr r3, [r7, #8]
800d1e4: 091b lsrs r3, r3, #4
800d1e6: e002 b.n 800d1ee <get_fat+0xc0>
800d1e8: 68bb ldr r3, [r7, #8]
800d1ea: f3c3 030b ubfx r3, r3, #0, #12
800d1ee: 617b str r3, [r7, #20]
break;
800d1f0: e03f b.n 800d272 <get_fat+0x144>
case FS_FAT16 :
if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))) != FR_OK) break;
800d1f2: 693b ldr r3, [r7, #16]
800d1f4: 6a5a ldr r2, [r3, #36] @ 0x24
800d1f6: 683b ldr r3, [r7, #0]
800d1f8: 0a1b lsrs r3, r3, #8
800d1fa: 4413 add r3, r2
800d1fc: 4619 mov r1, r3
800d1fe: 6938 ldr r0, [r7, #16]
800d200: f7ff feda bl 800cfb8 <move_window>
800d204: 4603 mov r3, r0
800d206: 2b00 cmp r3, #0
800d208: d130 bne.n 800d26c <get_fat+0x13e>
val = ld_word(fs->win + clst * 2 % SS(fs));
800d20a: 693b ldr r3, [r7, #16]
800d20c: f103 0234 add.w r2, r3, #52 @ 0x34
800d210: 683b ldr r3, [r7, #0]
800d212: 005b lsls r3, r3, #1
800d214: f403 73ff and.w r3, r3, #510 @ 0x1fe
800d218: 4413 add r3, r2
800d21a: 4618 mov r0, r3
800d21c: f7ff fbea bl 800c9f4 <ld_word>
800d220: 4603 mov r3, r0
800d222: 617b str r3, [r7, #20]
break;
800d224: e025 b.n 800d272 <get_fat+0x144>
case FS_FAT32 :
if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break;
800d226: 693b ldr r3, [r7, #16]
800d228: 6a5a ldr r2, [r3, #36] @ 0x24
800d22a: 683b ldr r3, [r7, #0]
800d22c: 09db lsrs r3, r3, #7
800d22e: 4413 add r3, r2
800d230: 4619 mov r1, r3
800d232: 6938 ldr r0, [r7, #16]
800d234: f7ff fec0 bl 800cfb8 <move_window>
800d238: 4603 mov r3, r0
800d23a: 2b00 cmp r3, #0
800d23c: d118 bne.n 800d270 <get_fat+0x142>
val = ld_dword(fs->win + clst * 4 % SS(fs)) & 0x0FFFFFFF;
800d23e: 693b ldr r3, [r7, #16]
800d240: f103 0234 add.w r2, r3, #52 @ 0x34
800d244: 683b ldr r3, [r7, #0]
800d246: 009b lsls r3, r3, #2
800d248: f403 73fe and.w r3, r3, #508 @ 0x1fc
800d24c: 4413 add r3, r2
800d24e: 4618 mov r0, r3
800d250: f7ff fbe8 bl 800ca24 <ld_dword>
800d254: 4603 mov r3, r0
800d256: f023 4370 bic.w r3, r3, #4026531840 @ 0xf0000000
800d25a: 617b str r3, [r7, #20]
break;
800d25c: e009 b.n 800d272 <get_fat+0x144>
}
}
/* go to default */
#endif
default:
val = 1; /* Internal error */
800d25e: 2301 movs r3, #1
800d260: 617b str r3, [r7, #20]
800d262: e006 b.n 800d272 <get_fat+0x144>
if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
800d264: bf00 nop
800d266: e004 b.n 800d272 <get_fat+0x144>
if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
800d268: bf00 nop
800d26a: e002 b.n 800d272 <get_fat+0x144>
if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))) != FR_OK) break;
800d26c: bf00 nop
800d26e: e000 b.n 800d272 <get_fat+0x144>
if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break;
800d270: bf00 nop
}
}
return val;
800d272: 697b ldr r3, [r7, #20]
}
800d274: 4618 mov r0, r3
800d276: 3718 adds r7, #24
800d278: 46bd mov sp, r7
800d27a: bd80 pop {r7, pc}
0800d27c <put_fat>:
FRESULT put_fat ( /* FR_OK(0):succeeded, !=0:error */
FATFS* fs, /* Corresponding file system object */
DWORD clst, /* FAT index number (cluster number) to be changed */
DWORD val /* New value to be set to the entry */
)
{
800d27c: b590 push {r4, r7, lr}
800d27e: b089 sub sp, #36 @ 0x24
800d280: af00 add r7, sp, #0
800d282: 60f8 str r0, [r7, #12]
800d284: 60b9 str r1, [r7, #8]
800d286: 607a str r2, [r7, #4]
UINT bc;
BYTE *p;
FRESULT res = FR_INT_ERR;
800d288: 2302 movs r3, #2
800d28a: 77fb strb r3, [r7, #31]
if (clst >= 2 && clst < fs->n_fatent) { /* Check if in valid range */
800d28c: 68bb ldr r3, [r7, #8]
800d28e: 2b01 cmp r3, #1
800d290: f240 80d9 bls.w 800d446 <put_fat+0x1ca>
800d294: 68fb ldr r3, [r7, #12]
800d296: 699b ldr r3, [r3, #24]
800d298: 68ba ldr r2, [r7, #8]
800d29a: 429a cmp r2, r3
800d29c: f080 80d3 bcs.w 800d446 <put_fat+0x1ca>
switch (fs->fs_type) {
800d2a0: 68fb ldr r3, [r7, #12]
800d2a2: 781b ldrb r3, [r3, #0]
800d2a4: 2b03 cmp r3, #3
800d2a6: f000 8096 beq.w 800d3d6 <put_fat+0x15a>
800d2aa: 2b03 cmp r3, #3
800d2ac: f300 80cb bgt.w 800d446 <put_fat+0x1ca>
800d2b0: 2b01 cmp r3, #1
800d2b2: d002 beq.n 800d2ba <put_fat+0x3e>
800d2b4: 2b02 cmp r3, #2
800d2b6: d06e beq.n 800d396 <put_fat+0x11a>
800d2b8: e0c5 b.n 800d446 <put_fat+0x1ca>
case FS_FAT12 : /* Bitfield items */
bc = (UINT)clst; bc += bc / 2;
800d2ba: 68bb ldr r3, [r7, #8]
800d2bc: 61bb str r3, [r7, #24]
800d2be: 69bb ldr r3, [r7, #24]
800d2c0: 085b lsrs r3, r3, #1
800d2c2: 69ba ldr r2, [r7, #24]
800d2c4: 4413 add r3, r2
800d2c6: 61bb str r3, [r7, #24]
res = move_window(fs, fs->fatbase + (bc / SS(fs)));
800d2c8: 68fb ldr r3, [r7, #12]
800d2ca: 6a5a ldr r2, [r3, #36] @ 0x24
800d2cc: 69bb ldr r3, [r7, #24]
800d2ce: 0a5b lsrs r3, r3, #9
800d2d0: 4413 add r3, r2
800d2d2: 4619 mov r1, r3
800d2d4: 68f8 ldr r0, [r7, #12]
800d2d6: f7ff fe6f bl 800cfb8 <move_window>
800d2da: 4603 mov r3, r0
800d2dc: 77fb strb r3, [r7, #31]
if (res != FR_OK) break;
800d2de: 7ffb ldrb r3, [r7, #31]
800d2e0: 2b00 cmp r3, #0
800d2e2: f040 80a9 bne.w 800d438 <put_fat+0x1bc>
p = fs->win + bc++ % SS(fs);
800d2e6: 68fb ldr r3, [r7, #12]
800d2e8: f103 0234 add.w r2, r3, #52 @ 0x34
800d2ec: 69bb ldr r3, [r7, #24]
800d2ee: 1c59 adds r1, r3, #1
800d2f0: 61b9 str r1, [r7, #24]
800d2f2: f3c3 0308 ubfx r3, r3, #0, #9
800d2f6: 4413 add r3, r2
800d2f8: 617b str r3, [r7, #20]
*p = (clst & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val;
800d2fa: 68bb ldr r3, [r7, #8]
800d2fc: f003 0301 and.w r3, r3, #1
800d300: 2b00 cmp r3, #0
800d302: d00d beq.n 800d320 <put_fat+0xa4>
800d304: 697b ldr r3, [r7, #20]
800d306: 781b ldrb r3, [r3, #0]
800d308: b25b sxtb r3, r3
800d30a: f003 030f and.w r3, r3, #15
800d30e: b25a sxtb r2, r3
800d310: 687b ldr r3, [r7, #4]
800d312: b2db uxtb r3, r3
800d314: 011b lsls r3, r3, #4
800d316: b25b sxtb r3, r3
800d318: 4313 orrs r3, r2
800d31a: b25b sxtb r3, r3
800d31c: b2db uxtb r3, r3
800d31e: e001 b.n 800d324 <put_fat+0xa8>
800d320: 687b ldr r3, [r7, #4]
800d322: b2db uxtb r3, r3
800d324: 697a ldr r2, [r7, #20]
800d326: 7013 strb r3, [r2, #0]
fs->wflag = 1;
800d328: 68fb ldr r3, [r7, #12]
800d32a: 2201 movs r2, #1
800d32c: 70da strb r2, [r3, #3]
res = move_window(fs, fs->fatbase + (bc / SS(fs)));
800d32e: 68fb ldr r3, [r7, #12]
800d330: 6a5a ldr r2, [r3, #36] @ 0x24
800d332: 69bb ldr r3, [r7, #24]
800d334: 0a5b lsrs r3, r3, #9
800d336: 4413 add r3, r2
800d338: 4619 mov r1, r3
800d33a: 68f8 ldr r0, [r7, #12]
800d33c: f7ff fe3c bl 800cfb8 <move_window>
800d340: 4603 mov r3, r0
800d342: 77fb strb r3, [r7, #31]
if (res != FR_OK) break;
800d344: 7ffb ldrb r3, [r7, #31]
800d346: 2b00 cmp r3, #0
800d348: d178 bne.n 800d43c <put_fat+0x1c0>
p = fs->win + bc % SS(fs);
800d34a: 68fb ldr r3, [r7, #12]
800d34c: f103 0234 add.w r2, r3, #52 @ 0x34
800d350: 69bb ldr r3, [r7, #24]
800d352: f3c3 0308 ubfx r3, r3, #0, #9
800d356: 4413 add r3, r2
800d358: 617b str r3, [r7, #20]
*p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F));
800d35a: 68bb ldr r3, [r7, #8]
800d35c: f003 0301 and.w r3, r3, #1
800d360: 2b00 cmp r3, #0
800d362: d003 beq.n 800d36c <put_fat+0xf0>
800d364: 687b ldr r3, [r7, #4]
800d366: 091b lsrs r3, r3, #4
800d368: b2db uxtb r3, r3
800d36a: e00e b.n 800d38a <put_fat+0x10e>
800d36c: 697b ldr r3, [r7, #20]
800d36e: 781b ldrb r3, [r3, #0]
800d370: b25b sxtb r3, r3
800d372: f023 030f bic.w r3, r3, #15
800d376: b25a sxtb r2, r3
800d378: 687b ldr r3, [r7, #4]
800d37a: 0a1b lsrs r3, r3, #8
800d37c: b25b sxtb r3, r3
800d37e: f003 030f and.w r3, r3, #15
800d382: b25b sxtb r3, r3
800d384: 4313 orrs r3, r2
800d386: b25b sxtb r3, r3
800d388: b2db uxtb r3, r3
800d38a: 697a ldr r2, [r7, #20]
800d38c: 7013 strb r3, [r2, #0]
fs->wflag = 1;
800d38e: 68fb ldr r3, [r7, #12]
800d390: 2201 movs r2, #1
800d392: 70da strb r2, [r3, #3]
break;
800d394: e057 b.n 800d446 <put_fat+0x1ca>
case FS_FAT16 : /* WORD aligned items */
res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 2)));
800d396: 68fb ldr r3, [r7, #12]
800d398: 6a5a ldr r2, [r3, #36] @ 0x24
800d39a: 68bb ldr r3, [r7, #8]
800d39c: 0a1b lsrs r3, r3, #8
800d39e: 4413 add r3, r2
800d3a0: 4619 mov r1, r3
800d3a2: 68f8 ldr r0, [r7, #12]
800d3a4: f7ff fe08 bl 800cfb8 <move_window>
800d3a8: 4603 mov r3, r0
800d3aa: 77fb strb r3, [r7, #31]
if (res != FR_OK) break;
800d3ac: 7ffb ldrb r3, [r7, #31]
800d3ae: 2b00 cmp r3, #0
800d3b0: d146 bne.n 800d440 <put_fat+0x1c4>
st_word(fs->win + clst * 2 % SS(fs), (WORD)val);
800d3b2: 68fb ldr r3, [r7, #12]
800d3b4: f103 0234 add.w r2, r3, #52 @ 0x34
800d3b8: 68bb ldr r3, [r7, #8]
800d3ba: 005b lsls r3, r3, #1
800d3bc: f403 73ff and.w r3, r3, #510 @ 0x1fe
800d3c0: 4413 add r3, r2
800d3c2: 687a ldr r2, [r7, #4]
800d3c4: b292 uxth r2, r2
800d3c6: 4611 mov r1, r2
800d3c8: 4618 mov r0, r3
800d3ca: f7ff fb4e bl 800ca6a <st_word>
fs->wflag = 1;
800d3ce: 68fb ldr r3, [r7, #12]
800d3d0: 2201 movs r2, #1
800d3d2: 70da strb r2, [r3, #3]
break;
800d3d4: e037 b.n 800d446 <put_fat+0x1ca>
case FS_FAT32 : /* DWORD aligned items */
#if _FS_EXFAT
case FS_EXFAT :
#endif
res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 4)));
800d3d6: 68fb ldr r3, [r7, #12]
800d3d8: 6a5a ldr r2, [r3, #36] @ 0x24
800d3da: 68bb ldr r3, [r7, #8]
800d3dc: 09db lsrs r3, r3, #7
800d3de: 4413 add r3, r2
800d3e0: 4619 mov r1, r3
800d3e2: 68f8 ldr r0, [r7, #12]
800d3e4: f7ff fde8 bl 800cfb8 <move_window>
800d3e8: 4603 mov r3, r0
800d3ea: 77fb strb r3, [r7, #31]
if (res != FR_OK) break;
800d3ec: 7ffb ldrb r3, [r7, #31]
800d3ee: 2b00 cmp r3, #0
800d3f0: d128 bne.n 800d444 <put_fat+0x1c8>
if (!_FS_EXFAT || fs->fs_type != FS_EXFAT) {
val = (val & 0x0FFFFFFF) | (ld_dword(fs->win + clst * 4 % SS(fs)) & 0xF0000000);
800d3f2: 687b ldr r3, [r7, #4]
800d3f4: f023 4470 bic.w r4, r3, #4026531840 @ 0xf0000000
800d3f8: 68fb ldr r3, [r7, #12]
800d3fa: f103 0234 add.w r2, r3, #52 @ 0x34
800d3fe: 68bb ldr r3, [r7, #8]
800d400: 009b lsls r3, r3, #2
800d402: f403 73fe and.w r3, r3, #508 @ 0x1fc
800d406: 4413 add r3, r2
800d408: 4618 mov r0, r3
800d40a: f7ff fb0b bl 800ca24 <ld_dword>
800d40e: 4603 mov r3, r0
800d410: f003 4370 and.w r3, r3, #4026531840 @ 0xf0000000
800d414: 4323 orrs r3, r4
800d416: 607b str r3, [r7, #4]
}
st_dword(fs->win + clst * 4 % SS(fs), val);
800d418: 68fb ldr r3, [r7, #12]
800d41a: f103 0234 add.w r2, r3, #52 @ 0x34
800d41e: 68bb ldr r3, [r7, #8]
800d420: 009b lsls r3, r3, #2
800d422: f403 73fe and.w r3, r3, #508 @ 0x1fc
800d426: 4413 add r3, r2
800d428: 6879 ldr r1, [r7, #4]
800d42a: 4618 mov r0, r3
800d42c: f7ff fb38 bl 800caa0 <st_dword>
fs->wflag = 1;
800d430: 68fb ldr r3, [r7, #12]
800d432: 2201 movs r2, #1
800d434: 70da strb r2, [r3, #3]
break;
800d436: e006 b.n 800d446 <put_fat+0x1ca>
if (res != FR_OK) break;
800d438: bf00 nop
800d43a: e004 b.n 800d446 <put_fat+0x1ca>
if (res != FR_OK) break;
800d43c: bf00 nop
800d43e: e002 b.n 800d446 <put_fat+0x1ca>
if (res != FR_OK) break;
800d440: bf00 nop
800d442: e000 b.n 800d446 <put_fat+0x1ca>
if (res != FR_OK) break;
800d444: bf00 nop
}
}
return res;
800d446: 7ffb ldrb r3, [r7, #31]
}
800d448: 4618 mov r0, r3
800d44a: 3724 adds r7, #36 @ 0x24
800d44c: 46bd mov sp, r7
800d44e: bd90 pop {r4, r7, pc}
0800d450 <remove_chain>:
FRESULT remove_chain ( /* FR_OK(0):succeeded, !=0:error */
_FDID* obj, /* Corresponding object */
DWORD clst, /* Cluster to remove a chain from */
DWORD pclst /* Previous cluster of clst (0:an entire chain) */
)
{
800d450: b580 push {r7, lr}
800d452: b08c sub sp, #48 @ 0x30
800d454: af00 add r7, sp, #0
800d456: 60f8 str r0, [r7, #12]
800d458: 60b9 str r1, [r7, #8]
800d45a: 607a str r2, [r7, #4]
FRESULT res = FR_OK;
800d45c: 2300 movs r3, #0
800d45e: f887 3027 strb.w r3, [r7, #39] @ 0x27
DWORD nxt;
FATFS *fs = obj->fs;
800d462: 68fb ldr r3, [r7, #12]
800d464: 681b ldr r3, [r3, #0]
800d466: 623b str r3, [r7, #32]
#if _FS_EXFAT || _USE_TRIM
DWORD scl = clst, ecl = clst;
800d468: 68bb ldr r3, [r7, #8]
800d46a: 62fb str r3, [r7, #44] @ 0x2c
800d46c: 68bb ldr r3, [r7, #8]
800d46e: 62bb str r3, [r7, #40] @ 0x28
#endif
#if _USE_TRIM
DWORD rt[2];
#endif
if (clst < 2 || clst >= fs->n_fatent) return FR_INT_ERR; /* Check if in valid range */
800d470: 68bb ldr r3, [r7, #8]
800d472: 2b01 cmp r3, #1
800d474: d904 bls.n 800d480 <remove_chain+0x30>
800d476: 6a3b ldr r3, [r7, #32]
800d478: 699b ldr r3, [r3, #24]
800d47a: 68ba ldr r2, [r7, #8]
800d47c: 429a cmp r2, r3
800d47e: d301 bcc.n 800d484 <remove_chain+0x34>
800d480: 2302 movs r3, #2
800d482: e075 b.n 800d570 <remove_chain+0x120>
/* Mark the previous cluster 'EOC' on the FAT if it exists */
if (pclst && (!_FS_EXFAT || fs->fs_type != FS_EXFAT || obj->stat != 2)) {
800d484: 687b ldr r3, [r7, #4]
800d486: 2b00 cmp r3, #0
800d488: d00f beq.n 800d4aa <remove_chain+0x5a>
res = put_fat(fs, pclst, 0xFFFFFFFF);
800d48a: f04f 32ff mov.w r2, #4294967295
800d48e: 6879 ldr r1, [r7, #4]
800d490: 6a38 ldr r0, [r7, #32]
800d492: f7ff fef3 bl 800d27c <put_fat>
800d496: 4603 mov r3, r0
800d498: f887 3027 strb.w r3, [r7, #39] @ 0x27
if (res != FR_OK) return res;
800d49c: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
800d4a0: 2b00 cmp r3, #0
800d4a2: d002 beq.n 800d4aa <remove_chain+0x5a>
800d4a4: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
800d4a8: e062 b.n 800d570 <remove_chain+0x120>
}
/* Remove the chain */
do {
nxt = get_fat(obj, clst); /* Get cluster status */
800d4aa: 68b9 ldr r1, [r7, #8]
800d4ac: 68f8 ldr r0, [r7, #12]
800d4ae: f7ff fe3e bl 800d12e <get_fat>
800d4b2: 61f8 str r0, [r7, #28]
if (nxt == 0) break; /* Empty cluster? */
800d4b4: 69fb ldr r3, [r7, #28]
800d4b6: 2b00 cmp r3, #0
800d4b8: d058 beq.n 800d56c <remove_chain+0x11c>
if (nxt == 1) return FR_INT_ERR; /* Internal error? */
800d4ba: 69fb ldr r3, [r7, #28]
800d4bc: 2b01 cmp r3, #1
800d4be: d101 bne.n 800d4c4 <remove_chain+0x74>
800d4c0: 2302 movs r3, #2
800d4c2: e055 b.n 800d570 <remove_chain+0x120>
if (nxt == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error? */
800d4c4: 69fb ldr r3, [r7, #28]
800d4c6: f1b3 3fff cmp.w r3, #4294967295
800d4ca: d101 bne.n 800d4d0 <remove_chain+0x80>
800d4cc: 2301 movs r3, #1
800d4ce: e04f b.n 800d570 <remove_chain+0x120>
if (!_FS_EXFAT || fs->fs_type != FS_EXFAT) {
res = put_fat(fs, clst, 0); /* Mark the cluster 'free' on the FAT */
800d4d0: 2200 movs r2, #0
800d4d2: 68b9 ldr r1, [r7, #8]
800d4d4: 6a38 ldr r0, [r7, #32]
800d4d6: f7ff fed1 bl 800d27c <put_fat>
800d4da: 4603 mov r3, r0
800d4dc: f887 3027 strb.w r3, [r7, #39] @ 0x27
if (res != FR_OK) return res;
800d4e0: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
800d4e4: 2b00 cmp r3, #0
800d4e6: d002 beq.n 800d4ee <remove_chain+0x9e>
800d4e8: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
800d4ec: e040 b.n 800d570 <remove_chain+0x120>
}
if (fs->free_clst < fs->n_fatent - 2) { /* Update FSINFO */
800d4ee: 6a3b ldr r3, [r7, #32]
800d4f0: 695a ldr r2, [r3, #20]
800d4f2: 6a3b ldr r3, [r7, #32]
800d4f4: 699b ldr r3, [r3, #24]
800d4f6: 3b02 subs r3, #2
800d4f8: 429a cmp r2, r3
800d4fa: d20b bcs.n 800d514 <remove_chain+0xc4>
fs->free_clst++;
800d4fc: 6a3b ldr r3, [r7, #32]
800d4fe: 695b ldr r3, [r3, #20]
800d500: 1c5a adds r2, r3, #1
800d502: 6a3b ldr r3, [r7, #32]
800d504: 615a str r2, [r3, #20]
fs->fsi_flag |= 1;
800d506: 6a3b ldr r3, [r7, #32]
800d508: 791b ldrb r3, [r3, #4]
800d50a: f043 0301 orr.w r3, r3, #1
800d50e: b2da uxtb r2, r3
800d510: 6a3b ldr r3, [r7, #32]
800d512: 711a strb r2, [r3, #4]
}
#if _FS_EXFAT || _USE_TRIM
if (ecl + 1 == nxt) { /* Is next cluster contiguous? */
800d514: 6abb ldr r3, [r7, #40] @ 0x28
800d516: 3301 adds r3, #1
800d518: 69fa ldr r2, [r7, #28]
800d51a: 429a cmp r2, r3
800d51c: d102 bne.n 800d524 <remove_chain+0xd4>
ecl = nxt;
800d51e: 69fb ldr r3, [r7, #28]
800d520: 62bb str r3, [r7, #40] @ 0x28
800d522: e01b b.n 800d55c <remove_chain+0x10c>
res = change_bitmap(fs, scl, ecl - scl + 1, 0); /* Mark the cluster block 'free' on the bitmap */
if (res != FR_OK) return res;
}
#endif
#if _USE_TRIM
rt[0] = clust2sect(fs, scl); /* Start sector */
800d524: 6af9 ldr r1, [r7, #44] @ 0x2c
800d526: 6a38 ldr r0, [r7, #32]
800d528: f7ff fde2 bl 800d0f0 <clust2sect>
800d52c: 4603 mov r3, r0
800d52e: 617b str r3, [r7, #20]
rt[1] = clust2sect(fs, ecl) + fs->csize - 1; /* End sector */
800d530: 6ab9 ldr r1, [r7, #40] @ 0x28
800d532: 6a38 ldr r0, [r7, #32]
800d534: f7ff fddc bl 800d0f0 <clust2sect>
800d538: 4602 mov r2, r0
800d53a: 6a3b ldr r3, [r7, #32]
800d53c: 895b ldrh r3, [r3, #10]
800d53e: 4413 add r3, r2
800d540: 3b01 subs r3, #1
800d542: 61bb str r3, [r7, #24]
disk_ioctl(fs->drv, CTRL_TRIM, rt); /* Inform device the block can be erased */
800d544: 6a3b ldr r3, [r7, #32]
800d546: 785b ldrb r3, [r3, #1]
800d548: f107 0214 add.w r2, r7, #20
800d54c: 2104 movs r1, #4
800d54e: 4618 mov r0, r3
800d550: f7ff fa32 bl 800c9b8 <disk_ioctl>
#endif
scl = ecl = nxt;
800d554: 69fb ldr r3, [r7, #28]
800d556: 62bb str r3, [r7, #40] @ 0x28
800d558: 6abb ldr r3, [r7, #40] @ 0x28
800d55a: 62fb str r3, [r7, #44] @ 0x2c
}
#endif
clst = nxt; /* Next cluster */
800d55c: 69fb ldr r3, [r7, #28]
800d55e: 60bb str r3, [r7, #8]
} while (clst < fs->n_fatent); /* Repeat while not the last link */
800d560: 6a3b ldr r3, [r7, #32]
800d562: 699b ldr r3, [r3, #24]
800d564: 68ba ldr r2, [r7, #8]
800d566: 429a cmp r2, r3
800d568: d39f bcc.n 800d4aa <remove_chain+0x5a>
800d56a: e000 b.n 800d56e <remove_chain+0x11e>
if (nxt == 0) break; /* Empty cluster? */
800d56c: bf00 nop
obj->stat = 2; /* Change the object status 'contiguous' */
}
}
}
#endif
return FR_OK;
800d56e: 2300 movs r3, #0
}
800d570: 4618 mov r0, r3
800d572: 3730 adds r7, #48 @ 0x30
800d574: 46bd mov sp, r7
800d576: bd80 pop {r7, pc}
0800d578 <create_chain>:
static
DWORD create_chain ( /* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */
_FDID* obj, /* Corresponding object */
DWORD clst /* Cluster# to stretch, 0:Create a new chain */
)
{
800d578: b580 push {r7, lr}
800d57a: b088 sub sp, #32
800d57c: af00 add r7, sp, #0
800d57e: 6078 str r0, [r7, #4]
800d580: 6039 str r1, [r7, #0]
DWORD cs, ncl, scl;
FRESULT res;
FATFS *fs = obj->fs;
800d582: 687b ldr r3, [r7, #4]
800d584: 681b ldr r3, [r3, #0]
800d586: 613b str r3, [r7, #16]
if (clst == 0) { /* Create a new chain */
800d588: 683b ldr r3, [r7, #0]
800d58a: 2b00 cmp r3, #0
800d58c: d10d bne.n 800d5aa <create_chain+0x32>
scl = fs->last_clst; /* Get suggested cluster to start from */
800d58e: 693b ldr r3, [r7, #16]
800d590: 691b ldr r3, [r3, #16]
800d592: 61bb str r3, [r7, #24]
if (scl == 0 || scl >= fs->n_fatent) scl = 1;
800d594: 69bb ldr r3, [r7, #24]
800d596: 2b00 cmp r3, #0
800d598: d004 beq.n 800d5a4 <create_chain+0x2c>
800d59a: 693b ldr r3, [r7, #16]
800d59c: 699b ldr r3, [r3, #24]
800d59e: 69ba ldr r2, [r7, #24]
800d5a0: 429a cmp r2, r3
800d5a2: d31b bcc.n 800d5dc <create_chain+0x64>
800d5a4: 2301 movs r3, #1
800d5a6: 61bb str r3, [r7, #24]
800d5a8: e018 b.n 800d5dc <create_chain+0x64>
}
else { /* Stretch current chain */
cs = get_fat(obj, clst); /* Check the cluster status */
800d5aa: 6839 ldr r1, [r7, #0]
800d5ac: 6878 ldr r0, [r7, #4]
800d5ae: f7ff fdbe bl 800d12e <get_fat>
800d5b2: 60f8 str r0, [r7, #12]
if (cs < 2) return 1; /* Invalid FAT value */
800d5b4: 68fb ldr r3, [r7, #12]
800d5b6: 2b01 cmp r3, #1
800d5b8: d801 bhi.n 800d5be <create_chain+0x46>
800d5ba: 2301 movs r3, #1
800d5bc: e070 b.n 800d6a0 <create_chain+0x128>
if (cs == 0xFFFFFFFF) return cs; /* A disk error occurred */
800d5be: 68fb ldr r3, [r7, #12]
800d5c0: f1b3 3fff cmp.w r3, #4294967295
800d5c4: d101 bne.n 800d5ca <create_chain+0x52>
800d5c6: 68fb ldr r3, [r7, #12]
800d5c8: e06a b.n 800d6a0 <create_chain+0x128>
if (cs < fs->n_fatent) return cs; /* It is already followed by next cluster */
800d5ca: 693b ldr r3, [r7, #16]
800d5cc: 699b ldr r3, [r3, #24]
800d5ce: 68fa ldr r2, [r7, #12]
800d5d0: 429a cmp r2, r3
800d5d2: d201 bcs.n 800d5d8 <create_chain+0x60>
800d5d4: 68fb ldr r3, [r7, #12]
800d5d6: e063 b.n 800d6a0 <create_chain+0x128>
scl = clst;
800d5d8: 683b ldr r3, [r7, #0]
800d5da: 61bb str r3, [r7, #24]
}
}
} else
#endif
{ /* On the FAT12/16/32 volume */
ncl = scl; /* Start cluster */
800d5dc: 69bb ldr r3, [r7, #24]
800d5de: 61fb str r3, [r7, #28]
for (;;) {
ncl++; /* Next cluster */
800d5e0: 69fb ldr r3, [r7, #28]
800d5e2: 3301 adds r3, #1
800d5e4: 61fb str r3, [r7, #28]
if (ncl >= fs->n_fatent) { /* Check wrap-around */
800d5e6: 693b ldr r3, [r7, #16]
800d5e8: 699b ldr r3, [r3, #24]
800d5ea: 69fa ldr r2, [r7, #28]
800d5ec: 429a cmp r2, r3
800d5ee: d307 bcc.n 800d600 <create_chain+0x88>
ncl = 2;
800d5f0: 2302 movs r3, #2
800d5f2: 61fb str r3, [r7, #28]
if (ncl > scl) return 0; /* No free cluster */
800d5f4: 69fa ldr r2, [r7, #28]
800d5f6: 69bb ldr r3, [r7, #24]
800d5f8: 429a cmp r2, r3
800d5fa: d901 bls.n 800d600 <create_chain+0x88>
800d5fc: 2300 movs r3, #0
800d5fe: e04f b.n 800d6a0 <create_chain+0x128>
}
cs = get_fat(obj, ncl); /* Get the cluster status */
800d600: 69f9 ldr r1, [r7, #28]
800d602: 6878 ldr r0, [r7, #4]
800d604: f7ff fd93 bl 800d12e <get_fat>
800d608: 60f8 str r0, [r7, #12]
if (cs == 0) break; /* Found a free cluster */
800d60a: 68fb ldr r3, [r7, #12]
800d60c: 2b00 cmp r3, #0
800d60e: d00e beq.n 800d62e <create_chain+0xb6>
if (cs == 1 || cs == 0xFFFFFFFF) return cs; /* An error occurred */
800d610: 68fb ldr r3, [r7, #12]
800d612: 2b01 cmp r3, #1
800d614: d003 beq.n 800d61e <create_chain+0xa6>
800d616: 68fb ldr r3, [r7, #12]
800d618: f1b3 3fff cmp.w r3, #4294967295
800d61c: d101 bne.n 800d622 <create_chain+0xaa>
800d61e: 68fb ldr r3, [r7, #12]
800d620: e03e b.n 800d6a0 <create_chain+0x128>
if (ncl == scl) return 0; /* No free cluster */
800d622: 69fa ldr r2, [r7, #28]
800d624: 69bb ldr r3, [r7, #24]
800d626: 429a cmp r2, r3
800d628: d1da bne.n 800d5e0 <create_chain+0x68>
800d62a: 2300 movs r3, #0
800d62c: e038 b.n 800d6a0 <create_chain+0x128>
if (cs == 0) break; /* Found a free cluster */
800d62e: bf00 nop
}
res = put_fat(fs, ncl, 0xFFFFFFFF); /* Mark the new cluster 'EOC' */
800d630: f04f 32ff mov.w r2, #4294967295
800d634: 69f9 ldr r1, [r7, #28]
800d636: 6938 ldr r0, [r7, #16]
800d638: f7ff fe20 bl 800d27c <put_fat>
800d63c: 4603 mov r3, r0
800d63e: 75fb strb r3, [r7, #23]
if (res == FR_OK && clst != 0) {
800d640: 7dfb ldrb r3, [r7, #23]
800d642: 2b00 cmp r3, #0
800d644: d109 bne.n 800d65a <create_chain+0xe2>
800d646: 683b ldr r3, [r7, #0]
800d648: 2b00 cmp r3, #0
800d64a: d006 beq.n 800d65a <create_chain+0xe2>
res = put_fat(fs, clst, ncl); /* Link it from the previous one if needed */
800d64c: 69fa ldr r2, [r7, #28]
800d64e: 6839 ldr r1, [r7, #0]
800d650: 6938 ldr r0, [r7, #16]
800d652: f7ff fe13 bl 800d27c <put_fat>
800d656: 4603 mov r3, r0
800d658: 75fb strb r3, [r7, #23]
}
}
if (res == FR_OK) { /* Update FSINFO if function succeeded. */
800d65a: 7dfb ldrb r3, [r7, #23]
800d65c: 2b00 cmp r3, #0
800d65e: d116 bne.n 800d68e <create_chain+0x116>
fs->last_clst = ncl;
800d660: 693b ldr r3, [r7, #16]
800d662: 69fa ldr r2, [r7, #28]
800d664: 611a str r2, [r3, #16]
if (fs->free_clst <= fs->n_fatent - 2) fs->free_clst--;
800d666: 693b ldr r3, [r7, #16]
800d668: 695a ldr r2, [r3, #20]
800d66a: 693b ldr r3, [r7, #16]
800d66c: 699b ldr r3, [r3, #24]
800d66e: 3b02 subs r3, #2
800d670: 429a cmp r2, r3
800d672: d804 bhi.n 800d67e <create_chain+0x106>
800d674: 693b ldr r3, [r7, #16]
800d676: 695b ldr r3, [r3, #20]
800d678: 1e5a subs r2, r3, #1
800d67a: 693b ldr r3, [r7, #16]
800d67c: 615a str r2, [r3, #20]
fs->fsi_flag |= 1;
800d67e: 693b ldr r3, [r7, #16]
800d680: 791b ldrb r3, [r3, #4]
800d682: f043 0301 orr.w r3, r3, #1
800d686: b2da uxtb r2, r3
800d688: 693b ldr r3, [r7, #16]
800d68a: 711a strb r2, [r3, #4]
800d68c: e007 b.n 800d69e <create_chain+0x126>
} else {
ncl = (res == FR_DISK_ERR) ? 0xFFFFFFFF : 1; /* Failed. Generate error status */
800d68e: 7dfb ldrb r3, [r7, #23]
800d690: 2b01 cmp r3, #1
800d692: d102 bne.n 800d69a <create_chain+0x122>
800d694: f04f 33ff mov.w r3, #4294967295
800d698: e000 b.n 800d69c <create_chain+0x124>
800d69a: 2301 movs r3, #1
800d69c: 61fb str r3, [r7, #28]
}
return ncl; /* Return new cluster number or error status */
800d69e: 69fb ldr r3, [r7, #28]
}
800d6a0: 4618 mov r0, r3
800d6a2: 3720 adds r7, #32
800d6a4: 46bd mov sp, r7
800d6a6: bd80 pop {r7, pc}
0800d6a8 <clmt_clust>:
static
DWORD clmt_clust ( /* <2:Error, >=2:Cluster number */
FIL* fp, /* Pointer to the file object */
FSIZE_t ofs /* File offset to be converted to cluster# */
)
{
800d6a8: b480 push {r7}
800d6aa: b087 sub sp, #28
800d6ac: af00 add r7, sp, #0
800d6ae: 6078 str r0, [r7, #4]
800d6b0: 6039 str r1, [r7, #0]
DWORD cl, ncl, *tbl;
FATFS *fs = fp->obj.fs;
800d6b2: 687b ldr r3, [r7, #4]
800d6b4: 681b ldr r3, [r3, #0]
800d6b6: 60fb str r3, [r7, #12]
tbl = fp->cltbl + 1; /* Top of CLMT */
800d6b8: 687b ldr r3, [r7, #4]
800d6ba: 6adb ldr r3, [r3, #44] @ 0x2c
800d6bc: 3304 adds r3, #4
800d6be: 613b str r3, [r7, #16]
cl = (DWORD)(ofs / SS(fs) / fs->csize); /* Cluster order from top of the file */
800d6c0: 683b ldr r3, [r7, #0]
800d6c2: 0a5b lsrs r3, r3, #9
800d6c4: 68fa ldr r2, [r7, #12]
800d6c6: 8952 ldrh r2, [r2, #10]
800d6c8: fbb3 f3f2 udiv r3, r3, r2
800d6cc: 617b str r3, [r7, #20]
for (;;) {
ncl = *tbl++; /* Number of cluters in the fragment */
800d6ce: 693b ldr r3, [r7, #16]
800d6d0: 1d1a adds r2, r3, #4
800d6d2: 613a str r2, [r7, #16]
800d6d4: 681b ldr r3, [r3, #0]
800d6d6: 60bb str r3, [r7, #8]
if (ncl == 0) return 0; /* End of table? (error) */
800d6d8: 68bb ldr r3, [r7, #8]
800d6da: 2b00 cmp r3, #0
800d6dc: d101 bne.n 800d6e2 <clmt_clust+0x3a>
800d6de: 2300 movs r3, #0
800d6e0: e010 b.n 800d704 <clmt_clust+0x5c>
if (cl < ncl) break; /* In this fragment? */
800d6e2: 697a ldr r2, [r7, #20]
800d6e4: 68bb ldr r3, [r7, #8]
800d6e6: 429a cmp r2, r3
800d6e8: d307 bcc.n 800d6fa <clmt_clust+0x52>
cl -= ncl; tbl++; /* Next fragment */
800d6ea: 697a ldr r2, [r7, #20]
800d6ec: 68bb ldr r3, [r7, #8]
800d6ee: 1ad3 subs r3, r2, r3
800d6f0: 617b str r3, [r7, #20]
800d6f2: 693b ldr r3, [r7, #16]
800d6f4: 3304 adds r3, #4
800d6f6: 613b str r3, [r7, #16]
ncl = *tbl++; /* Number of cluters in the fragment */
800d6f8: e7e9 b.n 800d6ce <clmt_clust+0x26>
if (cl < ncl) break; /* In this fragment? */
800d6fa: bf00 nop
}
return cl + *tbl; /* Return the cluster number */
800d6fc: 693b ldr r3, [r7, #16]
800d6fe: 681a ldr r2, [r3, #0]
800d700: 697b ldr r3, [r7, #20]
800d702: 4413 add r3, r2
}
800d704: 4618 mov r0, r3
800d706: 371c adds r7, #28
800d708: 46bd mov sp, r7
800d70a: f85d 7b04 ldr.w r7, [sp], #4
800d70e: 4770 bx lr
0800d710 <dir_sdi>:
static
FRESULT dir_sdi ( /* FR_OK(0):succeeded, !=0:error */
DIR* dp, /* Pointer to directory object */
DWORD ofs /* Offset of directory table */
)
{
800d710: b580 push {r7, lr}
800d712: b086 sub sp, #24
800d714: af00 add r7, sp, #0
800d716: 6078 str r0, [r7, #4]
800d718: 6039 str r1, [r7, #0]
DWORD csz, clst;
FATFS *fs = dp->obj.fs;
800d71a: 687b ldr r3, [r7, #4]
800d71c: 681b ldr r3, [r3, #0]
800d71e: 613b str r3, [r7, #16]
if (ofs >= (DWORD)((_FS_EXFAT && fs->fs_type == FS_EXFAT) ? MAX_DIR_EX : MAX_DIR) || ofs % SZDIRE) { /* Check range of offset and alignment */
800d720: 683b ldr r3, [r7, #0]
800d722: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
800d726: d204 bcs.n 800d732 <dir_sdi+0x22>
800d728: 683b ldr r3, [r7, #0]
800d72a: f003 031f and.w r3, r3, #31
800d72e: 2b00 cmp r3, #0
800d730: d001 beq.n 800d736 <dir_sdi+0x26>
return FR_INT_ERR;
800d732: 2302 movs r3, #2
800d734: e063 b.n 800d7fe <dir_sdi+0xee>
}
dp->dptr = ofs; /* Set current offset */
800d736: 687b ldr r3, [r7, #4]
800d738: 683a ldr r2, [r7, #0]
800d73a: 615a str r2, [r3, #20]
clst = dp->obj.sclust; /* Table start cluster (0:root) */
800d73c: 687b ldr r3, [r7, #4]
800d73e: 689b ldr r3, [r3, #8]
800d740: 617b str r3, [r7, #20]
if (clst == 0 && fs->fs_type >= FS_FAT32) { /* Replace cluster# 0 with root cluster# */
800d742: 697b ldr r3, [r7, #20]
800d744: 2b00 cmp r3, #0
800d746: d106 bne.n 800d756 <dir_sdi+0x46>
800d748: 693b ldr r3, [r7, #16]
800d74a: 781b ldrb r3, [r3, #0]
800d74c: 2b02 cmp r3, #2
800d74e: d902 bls.n 800d756 <dir_sdi+0x46>
clst = fs->dirbase;
800d750: 693b ldr r3, [r7, #16]
800d752: 6a9b ldr r3, [r3, #40] @ 0x28
800d754: 617b str r3, [r7, #20]
if (_FS_EXFAT) dp->obj.stat = 0; /* exFAT: Root dir has an FAT chain */
}
if (clst == 0) { /* Static table (root-directory in FAT12/16) */
800d756: 697b ldr r3, [r7, #20]
800d758: 2b00 cmp r3, #0
800d75a: d10c bne.n 800d776 <dir_sdi+0x66>
if (ofs / SZDIRE >= fs->n_rootdir) return FR_INT_ERR; /* Is index out of range? */
800d75c: 683b ldr r3, [r7, #0]
800d75e: 095b lsrs r3, r3, #5
800d760: 693a ldr r2, [r7, #16]
800d762: 8912 ldrh r2, [r2, #8]
800d764: 4293 cmp r3, r2
800d766: d301 bcc.n 800d76c <dir_sdi+0x5c>
800d768: 2302 movs r3, #2
800d76a: e048 b.n 800d7fe <dir_sdi+0xee>
dp->sect = fs->dirbase;
800d76c: 693b ldr r3, [r7, #16]
800d76e: 6a9a ldr r2, [r3, #40] @ 0x28
800d770: 687b ldr r3, [r7, #4]
800d772: 61da str r2, [r3, #28]
800d774: e029 b.n 800d7ca <dir_sdi+0xba>
} else { /* Dynamic table (sub-directory or root-directory in FAT32+) */
csz = (DWORD)fs->csize * SS(fs); /* Bytes per cluster */
800d776: 693b ldr r3, [r7, #16]
800d778: 895b ldrh r3, [r3, #10]
800d77a: 025b lsls r3, r3, #9
800d77c: 60fb str r3, [r7, #12]
while (ofs >= csz) { /* Follow cluster chain */
800d77e: e019 b.n 800d7b4 <dir_sdi+0xa4>
clst = get_fat(&dp->obj, clst); /* Get next cluster */
800d780: 687b ldr r3, [r7, #4]
800d782: 6979 ldr r1, [r7, #20]
800d784: 4618 mov r0, r3
800d786: f7ff fcd2 bl 800d12e <get_fat>
800d78a: 6178 str r0, [r7, #20]
if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */
800d78c: 697b ldr r3, [r7, #20]
800d78e: f1b3 3fff cmp.w r3, #4294967295
800d792: d101 bne.n 800d798 <dir_sdi+0x88>
800d794: 2301 movs r3, #1
800d796: e032 b.n 800d7fe <dir_sdi+0xee>
if (clst < 2 || clst >= fs->n_fatent) return FR_INT_ERR; /* Reached to end of table or internal error */
800d798: 697b ldr r3, [r7, #20]
800d79a: 2b01 cmp r3, #1
800d79c: d904 bls.n 800d7a8 <dir_sdi+0x98>
800d79e: 693b ldr r3, [r7, #16]
800d7a0: 699b ldr r3, [r3, #24]
800d7a2: 697a ldr r2, [r7, #20]
800d7a4: 429a cmp r2, r3
800d7a6: d301 bcc.n 800d7ac <dir_sdi+0x9c>
800d7a8: 2302 movs r3, #2
800d7aa: e028 b.n 800d7fe <dir_sdi+0xee>
ofs -= csz;
800d7ac: 683a ldr r2, [r7, #0]
800d7ae: 68fb ldr r3, [r7, #12]
800d7b0: 1ad3 subs r3, r2, r3
800d7b2: 603b str r3, [r7, #0]
while (ofs >= csz) { /* Follow cluster chain */
800d7b4: 683a ldr r2, [r7, #0]
800d7b6: 68fb ldr r3, [r7, #12]
800d7b8: 429a cmp r2, r3
800d7ba: d2e1 bcs.n 800d780 <dir_sdi+0x70>
}
dp->sect = clust2sect(fs, clst);
800d7bc: 6979 ldr r1, [r7, #20]
800d7be: 6938 ldr r0, [r7, #16]
800d7c0: f7ff fc96 bl 800d0f0 <clust2sect>
800d7c4: 4602 mov r2, r0
800d7c6: 687b ldr r3, [r7, #4]
800d7c8: 61da str r2, [r3, #28]
}
dp->clust = clst; /* Current cluster# */
800d7ca: 687b ldr r3, [r7, #4]
800d7cc: 697a ldr r2, [r7, #20]
800d7ce: 619a str r2, [r3, #24]
if (!dp->sect) return FR_INT_ERR;
800d7d0: 687b ldr r3, [r7, #4]
800d7d2: 69db ldr r3, [r3, #28]
800d7d4: 2b00 cmp r3, #0
800d7d6: d101 bne.n 800d7dc <dir_sdi+0xcc>
800d7d8: 2302 movs r3, #2
800d7da: e010 b.n 800d7fe <dir_sdi+0xee>
dp->sect += ofs / SS(fs); /* Sector# of the directory entry */
800d7dc: 687b ldr r3, [r7, #4]
800d7de: 69da ldr r2, [r3, #28]
800d7e0: 683b ldr r3, [r7, #0]
800d7e2: 0a5b lsrs r3, r3, #9
800d7e4: 441a add r2, r3
800d7e6: 687b ldr r3, [r7, #4]
800d7e8: 61da str r2, [r3, #28]
dp->dir = fs->win + (ofs % SS(fs)); /* Pointer to the entry in the win[] */
800d7ea: 693b ldr r3, [r7, #16]
800d7ec: f103 0234 add.w r2, r3, #52 @ 0x34
800d7f0: 683b ldr r3, [r7, #0]
800d7f2: f3c3 0308 ubfx r3, r3, #0, #9
800d7f6: 441a add r2, r3
800d7f8: 687b ldr r3, [r7, #4]
800d7fa: 621a str r2, [r3, #32]
return FR_OK;
800d7fc: 2300 movs r3, #0
}
800d7fe: 4618 mov r0, r3
800d800: 3718 adds r7, #24
800d802: 46bd mov sp, r7
800d804: bd80 pop {r7, pc}
0800d806 <dir_next>:
static
FRESULT dir_next ( /* FR_OK(0):succeeded, FR_NO_FILE:End of table, FR_DENIED:Could not stretch */
DIR* dp, /* Pointer to the directory object */
int stretch /* 0: Do not stretch table, 1: Stretch table if needed */
)
{
800d806: b580 push {r7, lr}
800d808: b086 sub sp, #24
800d80a: af00 add r7, sp, #0
800d80c: 6078 str r0, [r7, #4]
800d80e: 6039 str r1, [r7, #0]
DWORD ofs, clst;
FATFS *fs = dp->obj.fs;
800d810: 687b ldr r3, [r7, #4]
800d812: 681b ldr r3, [r3, #0]
800d814: 60fb str r3, [r7, #12]
#if !_FS_READONLY
UINT n;
#endif
ofs = dp->dptr + SZDIRE; /* Next entry */
800d816: 687b ldr r3, [r7, #4]
800d818: 695b ldr r3, [r3, #20]
800d81a: 3320 adds r3, #32
800d81c: 60bb str r3, [r7, #8]
if (!dp->sect || ofs >= (DWORD)((_FS_EXFAT && fs->fs_type == FS_EXFAT) ? MAX_DIR_EX : MAX_DIR)) return FR_NO_FILE; /* Report EOT when offset has reached max value */
800d81e: 687b ldr r3, [r7, #4]
800d820: 69db ldr r3, [r3, #28]
800d822: 2b00 cmp r3, #0
800d824: d003 beq.n 800d82e <dir_next+0x28>
800d826: 68bb ldr r3, [r7, #8]
800d828: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
800d82c: d301 bcc.n 800d832 <dir_next+0x2c>
800d82e: 2304 movs r3, #4
800d830: e0aa b.n 800d988 <dir_next+0x182>
if (ofs % SS(fs) == 0) { /* Sector changed? */
800d832: 68bb ldr r3, [r7, #8]
800d834: f3c3 0308 ubfx r3, r3, #0, #9
800d838: 2b00 cmp r3, #0
800d83a: f040 8098 bne.w 800d96e <dir_next+0x168>
dp->sect++; /* Next sector */
800d83e: 687b ldr r3, [r7, #4]
800d840: 69db ldr r3, [r3, #28]
800d842: 1c5a adds r2, r3, #1
800d844: 687b ldr r3, [r7, #4]
800d846: 61da str r2, [r3, #28]
if (!dp->clust) { /* Static table */
800d848: 687b ldr r3, [r7, #4]
800d84a: 699b ldr r3, [r3, #24]
800d84c: 2b00 cmp r3, #0
800d84e: d10b bne.n 800d868 <dir_next+0x62>
if (ofs / SZDIRE >= fs->n_rootdir) { /* Report EOT if it reached end of static table */
800d850: 68bb ldr r3, [r7, #8]
800d852: 095b lsrs r3, r3, #5
800d854: 68fa ldr r2, [r7, #12]
800d856: 8912 ldrh r2, [r2, #8]
800d858: 4293 cmp r3, r2
800d85a: f0c0 8088 bcc.w 800d96e <dir_next+0x168>
dp->sect = 0; return FR_NO_FILE;
800d85e: 687b ldr r3, [r7, #4]
800d860: 2200 movs r2, #0
800d862: 61da str r2, [r3, #28]
800d864: 2304 movs r3, #4
800d866: e08f b.n 800d988 <dir_next+0x182>
}
}
else { /* Dynamic table */
if ((ofs / SS(fs) & (fs->csize - 1)) == 0) { /* Cluster changed? */
800d868: 68bb ldr r3, [r7, #8]
800d86a: 0a5b lsrs r3, r3, #9
800d86c: 68fa ldr r2, [r7, #12]
800d86e: 8952 ldrh r2, [r2, #10]
800d870: 3a01 subs r2, #1
800d872: 4013 ands r3, r2
800d874: 2b00 cmp r3, #0
800d876: d17a bne.n 800d96e <dir_next+0x168>
clst = get_fat(&dp->obj, dp->clust); /* Get next cluster */
800d878: 687a ldr r2, [r7, #4]
800d87a: 687b ldr r3, [r7, #4]
800d87c: 699b ldr r3, [r3, #24]
800d87e: 4619 mov r1, r3
800d880: 4610 mov r0, r2
800d882: f7ff fc54 bl 800d12e <get_fat>
800d886: 6178 str r0, [r7, #20]
if (clst <= 1) return FR_INT_ERR; /* Internal error */
800d888: 697b ldr r3, [r7, #20]
800d88a: 2b01 cmp r3, #1
800d88c: d801 bhi.n 800d892 <dir_next+0x8c>
800d88e: 2302 movs r3, #2
800d890: e07a b.n 800d988 <dir_next+0x182>
if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */
800d892: 697b ldr r3, [r7, #20]
800d894: f1b3 3fff cmp.w r3, #4294967295
800d898: d101 bne.n 800d89e <dir_next+0x98>
800d89a: 2301 movs r3, #1
800d89c: e074 b.n 800d988 <dir_next+0x182>
if (clst >= fs->n_fatent) { /* Reached end of dynamic table */
800d89e: 68fb ldr r3, [r7, #12]
800d8a0: 699b ldr r3, [r3, #24]
800d8a2: 697a ldr r2, [r7, #20]
800d8a4: 429a cmp r2, r3
800d8a6: d358 bcc.n 800d95a <dir_next+0x154>
#if !_FS_READONLY
if (!stretch) { /* If no stretch, report EOT */
800d8a8: 683b ldr r3, [r7, #0]
800d8aa: 2b00 cmp r3, #0
800d8ac: d104 bne.n 800d8b8 <dir_next+0xb2>
dp->sect = 0; return FR_NO_FILE;
800d8ae: 687b ldr r3, [r7, #4]
800d8b0: 2200 movs r2, #0
800d8b2: 61da str r2, [r3, #28]
800d8b4: 2304 movs r3, #4
800d8b6: e067 b.n 800d988 <dir_next+0x182>
}
clst = create_chain(&dp->obj, dp->clust); /* Allocate a cluster */
800d8b8: 687a ldr r2, [r7, #4]
800d8ba: 687b ldr r3, [r7, #4]
800d8bc: 699b ldr r3, [r3, #24]
800d8be: 4619 mov r1, r3
800d8c0: 4610 mov r0, r2
800d8c2: f7ff fe59 bl 800d578 <create_chain>
800d8c6: 6178 str r0, [r7, #20]
if (clst == 0) return FR_DENIED; /* No free cluster */
800d8c8: 697b ldr r3, [r7, #20]
800d8ca: 2b00 cmp r3, #0
800d8cc: d101 bne.n 800d8d2 <dir_next+0xcc>
800d8ce: 2307 movs r3, #7
800d8d0: e05a b.n 800d988 <dir_next+0x182>
if (clst == 1) return FR_INT_ERR; /* Internal error */
800d8d2: 697b ldr r3, [r7, #20]
800d8d4: 2b01 cmp r3, #1
800d8d6: d101 bne.n 800d8dc <dir_next+0xd6>
800d8d8: 2302 movs r3, #2
800d8da: e055 b.n 800d988 <dir_next+0x182>
if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */
800d8dc: 697b ldr r3, [r7, #20]
800d8de: f1b3 3fff cmp.w r3, #4294967295
800d8e2: d101 bne.n 800d8e8 <dir_next+0xe2>
800d8e4: 2301 movs r3, #1
800d8e6: e04f b.n 800d988 <dir_next+0x182>
/* Clean-up the stretched table */
if (_FS_EXFAT) dp->obj.stat |= 4; /* The directory needs to be updated */
if (sync_window(fs) != FR_OK) return FR_DISK_ERR; /* Flush disk access window */
800d8e8: 68f8 ldr r0, [r7, #12]
800d8ea: f7ff fb21 bl 800cf30 <sync_window>
800d8ee: 4603 mov r3, r0
800d8f0: 2b00 cmp r3, #0
800d8f2: d001 beq.n 800d8f8 <dir_next+0xf2>
800d8f4: 2301 movs r3, #1
800d8f6: e047 b.n 800d988 <dir_next+0x182>
mem_set(fs->win, 0, SS(fs)); /* Clear window buffer */
800d8f8: 68fb ldr r3, [r7, #12]
800d8fa: 3334 adds r3, #52 @ 0x34
800d8fc: f44f 7200 mov.w r2, #512 @ 0x200
800d900: 2100 movs r1, #0
800d902: 4618 mov r0, r3
800d904: f7ff f919 bl 800cb3a <mem_set>
for (n = 0, fs->winsect = clust2sect(fs, clst); n < fs->csize; n++, fs->winsect++) { /* Fill the new cluster with 0 */
800d908: 2300 movs r3, #0
800d90a: 613b str r3, [r7, #16]
800d90c: 6979 ldr r1, [r7, #20]
800d90e: 68f8 ldr r0, [r7, #12]
800d910: f7ff fbee bl 800d0f0 <clust2sect>
800d914: 4602 mov r2, r0
800d916: 68fb ldr r3, [r7, #12]
800d918: 631a str r2, [r3, #48] @ 0x30
800d91a: e012 b.n 800d942 <dir_next+0x13c>
fs->wflag = 1;
800d91c: 68fb ldr r3, [r7, #12]
800d91e: 2201 movs r2, #1
800d920: 70da strb r2, [r3, #3]
if (sync_window(fs) != FR_OK) return FR_DISK_ERR;
800d922: 68f8 ldr r0, [r7, #12]
800d924: f7ff fb04 bl 800cf30 <sync_window>
800d928: 4603 mov r3, r0
800d92a: 2b00 cmp r3, #0
800d92c: d001 beq.n 800d932 <dir_next+0x12c>
800d92e: 2301 movs r3, #1
800d930: e02a b.n 800d988 <dir_next+0x182>
for (n = 0, fs->winsect = clust2sect(fs, clst); n < fs->csize; n++, fs->winsect++) { /* Fill the new cluster with 0 */
800d932: 693b ldr r3, [r7, #16]
800d934: 3301 adds r3, #1
800d936: 613b str r3, [r7, #16]
800d938: 68fb ldr r3, [r7, #12]
800d93a: 6b1b ldr r3, [r3, #48] @ 0x30
800d93c: 1c5a adds r2, r3, #1
800d93e: 68fb ldr r3, [r7, #12]
800d940: 631a str r2, [r3, #48] @ 0x30
800d942: 68fb ldr r3, [r7, #12]
800d944: 895b ldrh r3, [r3, #10]
800d946: 461a mov r2, r3
800d948: 693b ldr r3, [r7, #16]
800d94a: 4293 cmp r3, r2
800d94c: d3e6 bcc.n 800d91c <dir_next+0x116>
}
fs->winsect -= n; /* Restore window offset */
800d94e: 68fb ldr r3, [r7, #12]
800d950: 6b1a ldr r2, [r3, #48] @ 0x30
800d952: 693b ldr r3, [r7, #16]
800d954: 1ad2 subs r2, r2, r3
800d956: 68fb ldr r3, [r7, #12]
800d958: 631a str r2, [r3, #48] @ 0x30
#else
if (!stretch) dp->sect = 0; /* (this line is to suppress compiler warning) */
dp->sect = 0; return FR_NO_FILE; /* Report EOT */
#endif
}
dp->clust = clst; /* Initialize data for new cluster */
800d95a: 687b ldr r3, [r7, #4]
800d95c: 697a ldr r2, [r7, #20]
800d95e: 619a str r2, [r3, #24]
dp->sect = clust2sect(fs, clst);
800d960: 6979 ldr r1, [r7, #20]
800d962: 68f8 ldr r0, [r7, #12]
800d964: f7ff fbc4 bl 800d0f0 <clust2sect>
800d968: 4602 mov r2, r0
800d96a: 687b ldr r3, [r7, #4]
800d96c: 61da str r2, [r3, #28]
}
}
}
dp->dptr = ofs; /* Current entry */
800d96e: 687b ldr r3, [r7, #4]
800d970: 68ba ldr r2, [r7, #8]
800d972: 615a str r2, [r3, #20]
dp->dir = fs->win + ofs % SS(fs); /* Pointer to the entry in the win[] */
800d974: 68fb ldr r3, [r7, #12]
800d976: f103 0234 add.w r2, r3, #52 @ 0x34
800d97a: 68bb ldr r3, [r7, #8]
800d97c: f3c3 0308 ubfx r3, r3, #0, #9
800d980: 441a add r2, r3
800d982: 687b ldr r3, [r7, #4]
800d984: 621a str r2, [r3, #32]
return FR_OK;
800d986: 2300 movs r3, #0
}
800d988: 4618 mov r0, r3
800d98a: 3718 adds r7, #24
800d98c: 46bd mov sp, r7
800d98e: bd80 pop {r7, pc}
0800d990 <dir_alloc>:
static
FRESULT dir_alloc ( /* FR_OK(0):succeeded, !=0:error */
DIR* dp, /* Pointer to the directory object */
UINT nent /* Number of contiguous entries to allocate */
)
{
800d990: b580 push {r7, lr}
800d992: b086 sub sp, #24
800d994: af00 add r7, sp, #0
800d996: 6078 str r0, [r7, #4]
800d998: 6039 str r1, [r7, #0]
FRESULT res;
UINT n;
FATFS *fs = dp->obj.fs;
800d99a: 687b ldr r3, [r7, #4]
800d99c: 681b ldr r3, [r3, #0]
800d99e: 60fb str r3, [r7, #12]
res = dir_sdi(dp, 0);
800d9a0: 2100 movs r1, #0
800d9a2: 6878 ldr r0, [r7, #4]
800d9a4: f7ff feb4 bl 800d710 <dir_sdi>
800d9a8: 4603 mov r3, r0
800d9aa: 75fb strb r3, [r7, #23]
if (res == FR_OK) {
800d9ac: 7dfb ldrb r3, [r7, #23]
800d9ae: 2b00 cmp r3, #0
800d9b0: d12b bne.n 800da0a <dir_alloc+0x7a>
n = 0;
800d9b2: 2300 movs r3, #0
800d9b4: 613b str r3, [r7, #16]
do {
res = move_window(fs, dp->sect);
800d9b6: 687b ldr r3, [r7, #4]
800d9b8: 69db ldr r3, [r3, #28]
800d9ba: 4619 mov r1, r3
800d9bc: 68f8 ldr r0, [r7, #12]
800d9be: f7ff fafb bl 800cfb8 <move_window>
800d9c2: 4603 mov r3, r0
800d9c4: 75fb strb r3, [r7, #23]
if (res != FR_OK) break;
800d9c6: 7dfb ldrb r3, [r7, #23]
800d9c8: 2b00 cmp r3, #0
800d9ca: d11d bne.n 800da08 <dir_alloc+0x78>
#if _FS_EXFAT
if ((fs->fs_type == FS_EXFAT) ? (int)((dp->dir[XDIR_Type] & 0x80) == 0) : (int)(dp->dir[DIR_Name] == DDEM || dp->dir[DIR_Name] == 0)) {
#else
if (dp->dir[DIR_Name] == DDEM || dp->dir[DIR_Name] == 0) {
800d9cc: 687b ldr r3, [r7, #4]
800d9ce: 6a1b ldr r3, [r3, #32]
800d9d0: 781b ldrb r3, [r3, #0]
800d9d2: 2be5 cmp r3, #229 @ 0xe5
800d9d4: d004 beq.n 800d9e0 <dir_alloc+0x50>
800d9d6: 687b ldr r3, [r7, #4]
800d9d8: 6a1b ldr r3, [r3, #32]
800d9da: 781b ldrb r3, [r3, #0]
800d9dc: 2b00 cmp r3, #0
800d9de: d107 bne.n 800d9f0 <dir_alloc+0x60>
#endif
if (++n == nent) break; /* A block of contiguous free entries is found */
800d9e0: 693b ldr r3, [r7, #16]
800d9e2: 3301 adds r3, #1
800d9e4: 613b str r3, [r7, #16]
800d9e6: 693a ldr r2, [r7, #16]
800d9e8: 683b ldr r3, [r7, #0]
800d9ea: 429a cmp r2, r3
800d9ec: d102 bne.n 800d9f4 <dir_alloc+0x64>
800d9ee: e00c b.n 800da0a <dir_alloc+0x7a>
} else {
n = 0; /* Not a blank entry. Restart to search */
800d9f0: 2300 movs r3, #0
800d9f2: 613b str r3, [r7, #16]
}
res = dir_next(dp, 1);
800d9f4: 2101 movs r1, #1
800d9f6: 6878 ldr r0, [r7, #4]
800d9f8: f7ff ff05 bl 800d806 <dir_next>
800d9fc: 4603 mov r3, r0
800d9fe: 75fb strb r3, [r7, #23]
} while (res == FR_OK); /* Next entry with table stretch enabled */
800da00: 7dfb ldrb r3, [r7, #23]
800da02: 2b00 cmp r3, #0
800da04: d0d7 beq.n 800d9b6 <dir_alloc+0x26>
800da06: e000 b.n 800da0a <dir_alloc+0x7a>
if (res != FR_OK) break;
800da08: bf00 nop
}
if (res == FR_NO_FILE) res = FR_DENIED; /* No directory entry to allocate */
800da0a: 7dfb ldrb r3, [r7, #23]
800da0c: 2b04 cmp r3, #4
800da0e: d101 bne.n 800da14 <dir_alloc+0x84>
800da10: 2307 movs r3, #7
800da12: 75fb strb r3, [r7, #23]
return res;
800da14: 7dfb ldrb r3, [r7, #23]
}
800da16: 4618 mov r0, r3
800da18: 3718 adds r7, #24
800da1a: 46bd mov sp, r7
800da1c: bd80 pop {r7, pc}
0800da1e <ld_clust>:
static
DWORD ld_clust ( /* Returns the top cluster value of the SFN entry */
FATFS* fs, /* Pointer to the fs object */
const BYTE* dir /* Pointer to the key entry */
)
{
800da1e: b580 push {r7, lr}
800da20: b084 sub sp, #16
800da22: af00 add r7, sp, #0
800da24: 6078 str r0, [r7, #4]
800da26: 6039 str r1, [r7, #0]
DWORD cl;
cl = ld_word(dir + DIR_FstClusLO);
800da28: 683b ldr r3, [r7, #0]
800da2a: 331a adds r3, #26
800da2c: 4618 mov r0, r3
800da2e: f7fe ffe1 bl 800c9f4 <ld_word>
800da32: 4603 mov r3, r0
800da34: 60fb str r3, [r7, #12]
if (fs->fs_type == FS_FAT32) {
800da36: 687b ldr r3, [r7, #4]
800da38: 781b ldrb r3, [r3, #0]
800da3a: 2b03 cmp r3, #3
800da3c: d109 bne.n 800da52 <ld_clust+0x34>
cl |= (DWORD)ld_word(dir + DIR_FstClusHI) << 16;
800da3e: 683b ldr r3, [r7, #0]
800da40: 3314 adds r3, #20
800da42: 4618 mov r0, r3
800da44: f7fe ffd6 bl 800c9f4 <ld_word>
800da48: 4603 mov r3, r0
800da4a: 041b lsls r3, r3, #16
800da4c: 68fa ldr r2, [r7, #12]
800da4e: 4313 orrs r3, r2
800da50: 60fb str r3, [r7, #12]
}
return cl;
800da52: 68fb ldr r3, [r7, #12]
}
800da54: 4618 mov r0, r3
800da56: 3710 adds r7, #16
800da58: 46bd mov sp, r7
800da5a: bd80 pop {r7, pc}
0800da5c <st_clust>:
void st_clust (
FATFS* fs, /* Pointer to the fs object */
BYTE* dir, /* Pointer to the key entry */
DWORD cl /* Value to be set */
)
{
800da5c: b580 push {r7, lr}
800da5e: b084 sub sp, #16
800da60: af00 add r7, sp, #0
800da62: 60f8 str r0, [r7, #12]
800da64: 60b9 str r1, [r7, #8]
800da66: 607a str r2, [r7, #4]
st_word(dir + DIR_FstClusLO, (WORD)cl);
800da68: 68bb ldr r3, [r7, #8]
800da6a: 331a adds r3, #26
800da6c: 687a ldr r2, [r7, #4]
800da6e: b292 uxth r2, r2
800da70: 4611 mov r1, r2
800da72: 4618 mov r0, r3
800da74: f7fe fff9 bl 800ca6a <st_word>
if (fs->fs_type == FS_FAT32) {
800da78: 68fb ldr r3, [r7, #12]
800da7a: 781b ldrb r3, [r3, #0]
800da7c: 2b03 cmp r3, #3
800da7e: d109 bne.n 800da94 <st_clust+0x38>
st_word(dir + DIR_FstClusHI, (WORD)(cl >> 16));
800da80: 68bb ldr r3, [r7, #8]
800da82: f103 0214 add.w r2, r3, #20
800da86: 687b ldr r3, [r7, #4]
800da88: 0c1b lsrs r3, r3, #16
800da8a: b29b uxth r3, r3
800da8c: 4619 mov r1, r3
800da8e: 4610 mov r0, r2
800da90: f7fe ffeb bl 800ca6a <st_word>
}
}
800da94: bf00 nop
800da96: 3710 adds r7, #16
800da98: 46bd mov sp, r7
800da9a: bd80 pop {r7, pc}
0800da9c <dir_find>:
static
FRESULT dir_find ( /* FR_OK(0):succeeded, !=0:error */
DIR* dp /* Pointer to the directory object with the file name */
)
{
800da9c: b580 push {r7, lr}
800da9e: b086 sub sp, #24
800daa0: af00 add r7, sp, #0
800daa2: 6078 str r0, [r7, #4]
FRESULT res;
FATFS *fs = dp->obj.fs;
800daa4: 687b ldr r3, [r7, #4]
800daa6: 681b ldr r3, [r3, #0]
800daa8: 613b str r3, [r7, #16]
BYTE c;
#if _USE_LFN != 0
BYTE a, ord, sum;
#endif
res = dir_sdi(dp, 0); /* Rewind directory object */
800daaa: 2100 movs r1, #0
800daac: 6878 ldr r0, [r7, #4]
800daae: f7ff fe2f bl 800d710 <dir_sdi>
800dab2: 4603 mov r3, r0
800dab4: 75fb strb r3, [r7, #23]
if (res != FR_OK) return res;
800dab6: 7dfb ldrb r3, [r7, #23]
800dab8: 2b00 cmp r3, #0
800daba: d001 beq.n 800dac0 <dir_find+0x24>
800dabc: 7dfb ldrb r3, [r7, #23]
800dabe: e03e b.n 800db3e <dir_find+0xa2>
/* On the FAT12/16/32 volume */
#if _USE_LFN != 0
ord = sum = 0xFF; dp->blk_ofs = 0xFFFFFFFF; /* Reset LFN sequence */
#endif
do {
res = move_window(fs, dp->sect);
800dac0: 687b ldr r3, [r7, #4]
800dac2: 69db ldr r3, [r3, #28]
800dac4: 4619 mov r1, r3
800dac6: 6938 ldr r0, [r7, #16]
800dac8: f7ff fa76 bl 800cfb8 <move_window>
800dacc: 4603 mov r3, r0
800dace: 75fb strb r3, [r7, #23]
if (res != FR_OK) break;
800dad0: 7dfb ldrb r3, [r7, #23]
800dad2: 2b00 cmp r3, #0
800dad4: d12f bne.n 800db36 <dir_find+0x9a>
c = dp->dir[DIR_Name];
800dad6: 687b ldr r3, [r7, #4]
800dad8: 6a1b ldr r3, [r3, #32]
800dada: 781b ldrb r3, [r3, #0]
800dadc: 73fb strb r3, [r7, #15]
if (c == 0) { res = FR_NO_FILE; break; } /* Reached to end of table */
800dade: 7bfb ldrb r3, [r7, #15]
800dae0: 2b00 cmp r3, #0
800dae2: d102 bne.n 800daea <dir_find+0x4e>
800dae4: 2304 movs r3, #4
800dae6: 75fb strb r3, [r7, #23]
800dae8: e028 b.n 800db3c <dir_find+0xa0>
if (!(dp->fn[NSFLAG] & NS_LOSS) && !mem_cmp(dp->dir, dp->fn, 11)) break; /* SFN matched? */
ord = 0xFF; dp->blk_ofs = 0xFFFFFFFF; /* Reset LFN sequence */
}
}
#else /* Non LFN configuration */
dp->obj.attr = dp->dir[DIR_Attr] & AM_MASK;
800daea: 687b ldr r3, [r7, #4]
800daec: 6a1b ldr r3, [r3, #32]
800daee: 330b adds r3, #11
800daf0: 781b ldrb r3, [r3, #0]
800daf2: f003 033f and.w r3, r3, #63 @ 0x3f
800daf6: b2da uxtb r2, r3
800daf8: 687b ldr r3, [r7, #4]
800dafa: 719a strb r2, [r3, #6]
if (!(dp->dir[DIR_Attr] & AM_VOL) && !mem_cmp(dp->dir, dp->fn, 11)) break; /* Is it a valid entry? */
800dafc: 687b ldr r3, [r7, #4]
800dafe: 6a1b ldr r3, [r3, #32]
800db00: 330b adds r3, #11
800db02: 781b ldrb r3, [r3, #0]
800db04: f003 0308 and.w r3, r3, #8
800db08: 2b00 cmp r3, #0
800db0a: d10a bne.n 800db22 <dir_find+0x86>
800db0c: 687b ldr r3, [r7, #4]
800db0e: 6a18 ldr r0, [r3, #32]
800db10: 687b ldr r3, [r7, #4]
800db12: 3324 adds r3, #36 @ 0x24
800db14: 220b movs r2, #11
800db16: 4619 mov r1, r3
800db18: f7ff f82a bl 800cb70 <mem_cmp>
800db1c: 4603 mov r3, r0
800db1e: 2b00 cmp r3, #0
800db20: d00b beq.n 800db3a <dir_find+0x9e>
#endif
res = dir_next(dp, 0); /* Next entry */
800db22: 2100 movs r1, #0
800db24: 6878 ldr r0, [r7, #4]
800db26: f7ff fe6e bl 800d806 <dir_next>
800db2a: 4603 mov r3, r0
800db2c: 75fb strb r3, [r7, #23]
} while (res == FR_OK);
800db2e: 7dfb ldrb r3, [r7, #23]
800db30: 2b00 cmp r3, #0
800db32: d0c5 beq.n 800dac0 <dir_find+0x24>
800db34: e002 b.n 800db3c <dir_find+0xa0>
if (res != FR_OK) break;
800db36: bf00 nop
800db38: e000 b.n 800db3c <dir_find+0xa0>
if (!(dp->dir[DIR_Attr] & AM_VOL) && !mem_cmp(dp->dir, dp->fn, 11)) break; /* Is it a valid entry? */
800db3a: bf00 nop
return res;
800db3c: 7dfb ldrb r3, [r7, #23]
}
800db3e: 4618 mov r0, r3
800db40: 3718 adds r7, #24
800db42: 46bd mov sp, r7
800db44: bd80 pop {r7, pc}
0800db46 <dir_register>:
static
FRESULT dir_register ( /* FR_OK:succeeded, FR_DENIED:no free entry or too many SFN collision, FR_DISK_ERR:disk error */
DIR* dp /* Target directory with object name to be created */
)
{
800db46: b580 push {r7, lr}
800db48: b084 sub sp, #16
800db4a: af00 add r7, sp, #0
800db4c: 6078 str r0, [r7, #4]
FRESULT res;
FATFS *fs = dp->obj.fs;
800db4e: 687b ldr r3, [r7, #4]
800db50: 681b ldr r3, [r3, #0]
800db52: 60bb str r3, [r7, #8]
} while (res == FR_OK && --nent);
}
}
#else /* Non LFN configuration */
res = dir_alloc(dp, 1); /* Allocate an entry for SFN */
800db54: 2101 movs r1, #1
800db56: 6878 ldr r0, [r7, #4]
800db58: f7ff ff1a bl 800d990 <dir_alloc>
800db5c: 4603 mov r3, r0
800db5e: 73fb strb r3, [r7, #15]
#endif
/* Set SFN entry */
if (res == FR_OK) {
800db60: 7bfb ldrb r3, [r7, #15]
800db62: 2b00 cmp r3, #0
800db64: d11c bne.n 800dba0 <dir_register+0x5a>
res = move_window(fs, dp->sect);
800db66: 687b ldr r3, [r7, #4]
800db68: 69db ldr r3, [r3, #28]
800db6a: 4619 mov r1, r3
800db6c: 68b8 ldr r0, [r7, #8]
800db6e: f7ff fa23 bl 800cfb8 <move_window>
800db72: 4603 mov r3, r0
800db74: 73fb strb r3, [r7, #15]
if (res == FR_OK) {
800db76: 7bfb ldrb r3, [r7, #15]
800db78: 2b00 cmp r3, #0
800db7a: d111 bne.n 800dba0 <dir_register+0x5a>
mem_set(dp->dir, 0, SZDIRE); /* Clean the entry */
800db7c: 687b ldr r3, [r7, #4]
800db7e: 6a1b ldr r3, [r3, #32]
800db80: 2220 movs r2, #32
800db82: 2100 movs r1, #0
800db84: 4618 mov r0, r3
800db86: f7fe ffd8 bl 800cb3a <mem_set>
mem_cpy(dp->dir + DIR_Name, dp->fn, 11); /* Put SFN */
800db8a: 687b ldr r3, [r7, #4]
800db8c: 6a18 ldr r0, [r3, #32]
800db8e: 687b ldr r3, [r7, #4]
800db90: 3324 adds r3, #36 @ 0x24
800db92: 220b movs r2, #11
800db94: 4619 mov r1, r3
800db96: f7fe ffaf bl 800caf8 <mem_cpy>
#if _USE_LFN != 0
dp->dir[DIR_NTres] = dp->fn[NSFLAG] & (NS_BODY | NS_EXT); /* Put NT flag */
#endif
fs->wflag = 1;
800db9a: 68bb ldr r3, [r7, #8]
800db9c: 2201 movs r2, #1
800db9e: 70da strb r2, [r3, #3]
}
}
return res;
800dba0: 7bfb ldrb r3, [r7, #15]
}
800dba2: 4618 mov r0, r3
800dba4: 3710 adds r7, #16
800dba6: 46bd mov sp, r7
800dba8: bd80 pop {r7, pc}
...
0800dbac <create_name>:
static
FRESULT create_name ( /* FR_OK: successful, FR_INVALID_NAME: could not create */
DIR* dp, /* Pointer to the directory object */
const TCHAR** path /* Pointer to pointer to the segment in the path string */
)
{
800dbac: b580 push {r7, lr}
800dbae: b088 sub sp, #32
800dbb0: af00 add r7, sp, #0
800dbb2: 6078 str r0, [r7, #4]
800dbb4: 6039 str r1, [r7, #0]
BYTE c, d, *sfn;
UINT ni, si, i;
const char *p;
/* Create file name in directory form */
p = *path; sfn = dp->fn;
800dbb6: 683b ldr r3, [r7, #0]
800dbb8: 681b ldr r3, [r3, #0]
800dbba: 60fb str r3, [r7, #12]
800dbbc: 687b ldr r3, [r7, #4]
800dbbe: 3324 adds r3, #36 @ 0x24
800dbc0: 60bb str r3, [r7, #8]
mem_set(sfn, ' ', 11);
800dbc2: 220b movs r2, #11
800dbc4: 2120 movs r1, #32
800dbc6: 68b8 ldr r0, [r7, #8]
800dbc8: f7fe ffb7 bl 800cb3a <mem_set>
si = i = 0; ni = 8;
800dbcc: 2300 movs r3, #0
800dbce: 613b str r3, [r7, #16]
800dbd0: 693b ldr r3, [r7, #16]
800dbd2: 61fb str r3, [r7, #28]
800dbd4: 2308 movs r3, #8
800dbd6: 617b str r3, [r7, #20]
sfn[NSFLAG] = (c <= ' ') ? NS_LAST | NS_DOT : NS_DOT; /* Set last segment flag if end of the path */
return FR_OK;
}
#endif
for (;;) {
c = (BYTE)p[si++];
800dbd8: 69fb ldr r3, [r7, #28]
800dbda: 1c5a adds r2, r3, #1
800dbdc: 61fa str r2, [r7, #28]
800dbde: 68fa ldr r2, [r7, #12]
800dbe0: 4413 add r3, r2
800dbe2: 781b ldrb r3, [r3, #0]
800dbe4: 76fb strb r3, [r7, #27]
if (c <= ' ') break; /* Break if end of the path name */
800dbe6: 7efb ldrb r3, [r7, #27]
800dbe8: 2b20 cmp r3, #32
800dbea: d94e bls.n 800dc8a <create_name+0xde>
if (c == '/' || c == '\\') { /* Break if a separator is found */
800dbec: 7efb ldrb r3, [r7, #27]
800dbee: 2b2f cmp r3, #47 @ 0x2f
800dbf0: d006 beq.n 800dc00 <create_name+0x54>
800dbf2: 7efb ldrb r3, [r7, #27]
800dbf4: 2b5c cmp r3, #92 @ 0x5c
800dbf6: d110 bne.n 800dc1a <create_name+0x6e>
while (p[si] == '/' || p[si] == '\\') si++; /* Skip duplicated separator if exist */
800dbf8: e002 b.n 800dc00 <create_name+0x54>
800dbfa: 69fb ldr r3, [r7, #28]
800dbfc: 3301 adds r3, #1
800dbfe: 61fb str r3, [r7, #28]
800dc00: 68fa ldr r2, [r7, #12]
800dc02: 69fb ldr r3, [r7, #28]
800dc04: 4413 add r3, r2
800dc06: 781b ldrb r3, [r3, #0]
800dc08: 2b2f cmp r3, #47 @ 0x2f
800dc0a: d0f6 beq.n 800dbfa <create_name+0x4e>
800dc0c: 68fa ldr r2, [r7, #12]
800dc0e: 69fb ldr r3, [r7, #28]
800dc10: 4413 add r3, r2
800dc12: 781b ldrb r3, [r3, #0]
800dc14: 2b5c cmp r3, #92 @ 0x5c
800dc16: d0f0 beq.n 800dbfa <create_name+0x4e>
break;
800dc18: e038 b.n 800dc8c <create_name+0xe0>
}
if (c == '.' || i >= ni) { /* End of body or over size? */
800dc1a: 7efb ldrb r3, [r7, #27]
800dc1c: 2b2e cmp r3, #46 @ 0x2e
800dc1e: d003 beq.n 800dc28 <create_name+0x7c>
800dc20: 693a ldr r2, [r7, #16]
800dc22: 697b ldr r3, [r7, #20]
800dc24: 429a cmp r2, r3
800dc26: d30c bcc.n 800dc42 <create_name+0x96>
if (ni == 11 || c != '.') return FR_INVALID_NAME; /* Over size or invalid dot */
800dc28: 697b ldr r3, [r7, #20]
800dc2a: 2b0b cmp r3, #11
800dc2c: d002 beq.n 800dc34 <create_name+0x88>
800dc2e: 7efb ldrb r3, [r7, #27]
800dc30: 2b2e cmp r3, #46 @ 0x2e
800dc32: d001 beq.n 800dc38 <create_name+0x8c>
800dc34: 2306 movs r3, #6
800dc36: e044 b.n 800dcc2 <create_name+0x116>
i = 8; ni = 11; /* Goto extension */
800dc38: 2308 movs r3, #8
800dc3a: 613b str r3, [r7, #16]
800dc3c: 230b movs r3, #11
800dc3e: 617b str r3, [r7, #20]
continue;
800dc40: e022 b.n 800dc88 <create_name+0xdc>
}
if (c >= 0x80) { /* Extended character? */
800dc42: f997 301b ldrsb.w r3, [r7, #27]
800dc46: 2b00 cmp r3, #0
800dc48: da04 bge.n 800dc54 <create_name+0xa8>
#ifdef _EXCVT
c = ExCvt[c - 0x80]; /* To upper extended characters (SBCS cfg) */
800dc4a: 7efb ldrb r3, [r7, #27]
800dc4c: 3b80 subs r3, #128 @ 0x80
800dc4e: 4a1f ldr r2, [pc, #124] @ (800dccc <create_name+0x120>)
800dc50: 5cd3 ldrb r3, [r2, r3]
800dc52: 76fb strb r3, [r7, #27]
d = (BYTE)p[si++]; /* Get 2nd byte */
if (!IsDBCS2(d) || i >= ni - 1) return FR_INVALID_NAME; /* Reject invalid DBC */
sfn[i++] = c;
sfn[i++] = d;
} else { /* SBC */
if (chk_chr("\"*+,:;<=>\?[]|\x7F", c)) return FR_INVALID_NAME; /* Reject illegal chrs for SFN */
800dc54: 7efb ldrb r3, [r7, #27]
800dc56: 4619 mov r1, r3
800dc58: 481d ldr r0, [pc, #116] @ (800dcd0 <create_name+0x124>)
800dc5a: f7fe ffb0 bl 800cbbe <chk_chr>
800dc5e: 4603 mov r3, r0
800dc60: 2b00 cmp r3, #0
800dc62: d001 beq.n 800dc68 <create_name+0xbc>
800dc64: 2306 movs r3, #6
800dc66: e02c b.n 800dcc2 <create_name+0x116>
if (IsLower(c)) c -= 0x20; /* To upper */
800dc68: 7efb ldrb r3, [r7, #27]
800dc6a: 2b60 cmp r3, #96 @ 0x60
800dc6c: d905 bls.n 800dc7a <create_name+0xce>
800dc6e: 7efb ldrb r3, [r7, #27]
800dc70: 2b7a cmp r3, #122 @ 0x7a
800dc72: d802 bhi.n 800dc7a <create_name+0xce>
800dc74: 7efb ldrb r3, [r7, #27]
800dc76: 3b20 subs r3, #32
800dc78: 76fb strb r3, [r7, #27]
sfn[i++] = c;
800dc7a: 693b ldr r3, [r7, #16]
800dc7c: 1c5a adds r2, r3, #1
800dc7e: 613a str r2, [r7, #16]
800dc80: 68ba ldr r2, [r7, #8]
800dc82: 4413 add r3, r2
800dc84: 7efa ldrb r2, [r7, #27]
800dc86: 701a strb r2, [r3, #0]
c = (BYTE)p[si++];
800dc88: e7a6 b.n 800dbd8 <create_name+0x2c>
if (c <= ' ') break; /* Break if end of the path name */
800dc8a: bf00 nop
}
}
*path = p + si; /* Return pointer to the next segment */
800dc8c: 68fa ldr r2, [r7, #12]
800dc8e: 69fb ldr r3, [r7, #28]
800dc90: 441a add r2, r3
800dc92: 683b ldr r3, [r7, #0]
800dc94: 601a str r2, [r3, #0]
if (i == 0) return FR_INVALID_NAME; /* Reject nul string */
800dc96: 693b ldr r3, [r7, #16]
800dc98: 2b00 cmp r3, #0
800dc9a: d101 bne.n 800dca0 <create_name+0xf4>
800dc9c: 2306 movs r3, #6
800dc9e: e010 b.n 800dcc2 <create_name+0x116>
if (sfn[0] == DDEM) sfn[0] = RDDEM; /* If the first character collides with DDEM, replace it with RDDEM */
800dca0: 68bb ldr r3, [r7, #8]
800dca2: 781b ldrb r3, [r3, #0]
800dca4: 2be5 cmp r3, #229 @ 0xe5
800dca6: d102 bne.n 800dcae <create_name+0x102>
800dca8: 68bb ldr r3, [r7, #8]
800dcaa: 2205 movs r2, #5
800dcac: 701a strb r2, [r3, #0]
sfn[NSFLAG] = (c <= ' ') ? NS_LAST : 0; /* Set last segment flag if end of the path */
800dcae: 7efb ldrb r3, [r7, #27]
800dcb0: 2b20 cmp r3, #32
800dcb2: d801 bhi.n 800dcb8 <create_name+0x10c>
800dcb4: 2204 movs r2, #4
800dcb6: e000 b.n 800dcba <create_name+0x10e>
800dcb8: 2200 movs r2, #0
800dcba: 68bb ldr r3, [r7, #8]
800dcbc: 330b adds r3, #11
800dcbe: 701a strb r2, [r3, #0]
return FR_OK;
800dcc0: 2300 movs r3, #0
#endif /* _USE_LFN != 0 */
}
800dcc2: 4618 mov r0, r3
800dcc4: 3720 adds r7, #32
800dcc6: 46bd mov sp, r7
800dcc8: bd80 pop {r7, pc}
800dcca: bf00 nop
800dccc: 08013af0 .word 0x08013af0
800dcd0: 08013a40 .word 0x08013a40
0800dcd4 <follow_path>:
static
FRESULT follow_path ( /* FR_OK(0): successful, !=0: error code */
DIR* dp, /* Directory object to return last directory and found object */
const TCHAR* path /* Full-path string to find a file or directory */
)
{
800dcd4: b580 push {r7, lr}
800dcd6: b086 sub sp, #24
800dcd8: af00 add r7, sp, #0
800dcda: 6078 str r0, [r7, #4]
800dcdc: 6039 str r1, [r7, #0]
FRESULT res;
BYTE ns;
_FDID *obj = &dp->obj;
800dcde: 687b ldr r3, [r7, #4]
800dce0: 613b str r3, [r7, #16]
FATFS *fs = obj->fs;
800dce2: 693b ldr r3, [r7, #16]
800dce4: 681b ldr r3, [r3, #0]
800dce6: 60fb str r3, [r7, #12]
if (*path != '/' && *path != '\\') { /* Without heading separator */
obj->sclust = fs->cdir; /* Start from current directory */
} else
#endif
{ /* With heading separator */
while (*path == '/' || *path == '\\') path++; /* Strip heading separator */
800dce8: e002 b.n 800dcf0 <follow_path+0x1c>
800dcea: 683b ldr r3, [r7, #0]
800dcec: 3301 adds r3, #1
800dcee: 603b str r3, [r7, #0]
800dcf0: 683b ldr r3, [r7, #0]
800dcf2: 781b ldrb r3, [r3, #0]
800dcf4: 2b2f cmp r3, #47 @ 0x2f
800dcf6: d0f8 beq.n 800dcea <follow_path+0x16>
800dcf8: 683b ldr r3, [r7, #0]
800dcfa: 781b ldrb r3, [r3, #0]
800dcfc: 2b5c cmp r3, #92 @ 0x5c
800dcfe: d0f4 beq.n 800dcea <follow_path+0x16>
obj->sclust = 0; /* Start from root directory */
800dd00: 693b ldr r3, [r7, #16]
800dd02: 2200 movs r2, #0
800dd04: 609a str r2, [r3, #8]
obj->stat = fs->dirbuf[XDIR_GenFlags] & 2;
}
#endif
#endif
if ((UINT)*path < ' ') { /* Null path name is the origin directory itself */
800dd06: 683b ldr r3, [r7, #0]
800dd08: 781b ldrb r3, [r3, #0]
800dd0a: 2b1f cmp r3, #31
800dd0c: d80a bhi.n 800dd24 <follow_path+0x50>
dp->fn[NSFLAG] = NS_NONAME;
800dd0e: 687b ldr r3, [r7, #4]
800dd10: 2280 movs r2, #128 @ 0x80
800dd12: f883 202f strb.w r2, [r3, #47] @ 0x2f
res = dir_sdi(dp, 0);
800dd16: 2100 movs r1, #0
800dd18: 6878 ldr r0, [r7, #4]
800dd1a: f7ff fcf9 bl 800d710 <dir_sdi>
800dd1e: 4603 mov r3, r0
800dd20: 75fb strb r3, [r7, #23]
800dd22: e043 b.n 800ddac <follow_path+0xd8>
} else { /* Follow path */
for (;;) {
res = create_name(dp, &path); /* Get a segment name of the path */
800dd24: 463b mov r3, r7
800dd26: 4619 mov r1, r3
800dd28: 6878 ldr r0, [r7, #4]
800dd2a: f7ff ff3f bl 800dbac <create_name>
800dd2e: 4603 mov r3, r0
800dd30: 75fb strb r3, [r7, #23]
if (res != FR_OK) break;
800dd32: 7dfb ldrb r3, [r7, #23]
800dd34: 2b00 cmp r3, #0
800dd36: d134 bne.n 800dda2 <follow_path+0xce>
res = dir_find(dp); /* Find an object with the segment name */
800dd38: 6878 ldr r0, [r7, #4]
800dd3a: f7ff feaf bl 800da9c <dir_find>
800dd3e: 4603 mov r3, r0
800dd40: 75fb strb r3, [r7, #23]
ns = dp->fn[NSFLAG];
800dd42: 687b ldr r3, [r7, #4]
800dd44: f893 302f ldrb.w r3, [r3, #47] @ 0x2f
800dd48: 72fb strb r3, [r7, #11]
if (res != FR_OK) { /* Failed to find the object */
800dd4a: 7dfb ldrb r3, [r7, #23]
800dd4c: 2b00 cmp r3, #0
800dd4e: d00a beq.n 800dd66 <follow_path+0x92>
if (res == FR_NO_FILE) { /* Object is not found */
800dd50: 7dfb ldrb r3, [r7, #23]
800dd52: 2b04 cmp r3, #4
800dd54: d127 bne.n 800dda6 <follow_path+0xd2>
if (_FS_RPATH && (ns & NS_DOT)) { /* If dot entry is not exist, stay there */
if (!(ns & NS_LAST)) continue; /* Continue to follow if not last segment */
dp->fn[NSFLAG] = NS_NONAME;
res = FR_OK;
} else { /* Could not find the object */
if (!(ns & NS_LAST)) res = FR_NO_PATH; /* Adjust error code if not last segment */
800dd56: 7afb ldrb r3, [r7, #11]
800dd58: f003 0304 and.w r3, r3, #4
800dd5c: 2b00 cmp r3, #0
800dd5e: d122 bne.n 800dda6 <follow_path+0xd2>
800dd60: 2305 movs r3, #5
800dd62: 75fb strb r3, [r7, #23]
}
}
break;
800dd64: e01f b.n 800dda6 <follow_path+0xd2>
}
if (ns & NS_LAST) break; /* Last segment matched. Function completed. */
800dd66: 7afb ldrb r3, [r7, #11]
800dd68: f003 0304 and.w r3, r3, #4
800dd6c: 2b00 cmp r3, #0
800dd6e: d11c bne.n 800ddaa <follow_path+0xd6>
/* Get into the sub-directory */
if (!(obj->attr & AM_DIR)) { /* It is not a sub-directory and cannot follow */
800dd70: 693b ldr r3, [r7, #16]
800dd72: 799b ldrb r3, [r3, #6]
800dd74: f003 0310 and.w r3, r3, #16
800dd78: 2b00 cmp r3, #0
800dd7a: d102 bne.n 800dd82 <follow_path+0xae>
res = FR_NO_PATH; break;
800dd7c: 2305 movs r3, #5
800dd7e: 75fb strb r3, [r7, #23]
800dd80: e014 b.n 800ddac <follow_path+0xd8>
obj->stat = fs->dirbuf[XDIR_GenFlags] & 2;
obj->objsize = ld_qword(fs->dirbuf + XDIR_FileSize);
} else
#endif
{
obj->sclust = ld_clust(fs, fs->win + dp->dptr % SS(fs)); /* Open next directory */
800dd82: 68fb ldr r3, [r7, #12]
800dd84: f103 0234 add.w r2, r3, #52 @ 0x34
800dd88: 687b ldr r3, [r7, #4]
800dd8a: 695b ldr r3, [r3, #20]
800dd8c: f3c3 0308 ubfx r3, r3, #0, #9
800dd90: 4413 add r3, r2
800dd92: 4619 mov r1, r3
800dd94: 68f8 ldr r0, [r7, #12]
800dd96: f7ff fe42 bl 800da1e <ld_clust>
800dd9a: 4602 mov r2, r0
800dd9c: 693b ldr r3, [r7, #16]
800dd9e: 609a str r2, [r3, #8]
res = create_name(dp, &path); /* Get a segment name of the path */
800dda0: e7c0 b.n 800dd24 <follow_path+0x50>
if (res != FR_OK) break;
800dda2: bf00 nop
800dda4: e002 b.n 800ddac <follow_path+0xd8>
break;
800dda6: bf00 nop
800dda8: e000 b.n 800ddac <follow_path+0xd8>
if (ns & NS_LAST) break; /* Last segment matched. Function completed. */
800ddaa: bf00 nop
}
}
}
return res;
800ddac: 7dfb ldrb r3, [r7, #23]
}
800ddae: 4618 mov r0, r3
800ddb0: 3718 adds r7, #24
800ddb2: 46bd mov sp, r7
800ddb4: bd80 pop {r7, pc}
0800ddb6 <get_ldnumber>:
static
int get_ldnumber ( /* Returns logical drive number (-1:invalid drive) */
const TCHAR** path /* Pointer to pointer to the path name */
)
{
800ddb6: b480 push {r7}
800ddb8: b087 sub sp, #28
800ddba: af00 add r7, sp, #0
800ddbc: 6078 str r0, [r7, #4]
const TCHAR *tp, *tt;
UINT i;
int vol = -1;
800ddbe: f04f 33ff mov.w r3, #4294967295
800ddc2: 613b str r3, [r7, #16]
char c;
TCHAR tc;
#endif
if (*path) { /* If the pointer is not a null */
800ddc4: 687b ldr r3, [r7, #4]
800ddc6: 681b ldr r3, [r3, #0]
800ddc8: 2b00 cmp r3, #0
800ddca: d031 beq.n 800de30 <get_ldnumber+0x7a>
for (tt = *path; (UINT)*tt >= (_USE_LFN ? ' ' : '!') && *tt != ':'; tt++) ; /* Find ':' in the path */
800ddcc: 687b ldr r3, [r7, #4]
800ddce: 681b ldr r3, [r3, #0]
800ddd0: 617b str r3, [r7, #20]
800ddd2: e002 b.n 800ddda <get_ldnumber+0x24>
800ddd4: 697b ldr r3, [r7, #20]
800ddd6: 3301 adds r3, #1
800ddd8: 617b str r3, [r7, #20]
800ddda: 697b ldr r3, [r7, #20]
800dddc: 781b ldrb r3, [r3, #0]
800ddde: 2b20 cmp r3, #32
800dde0: d903 bls.n 800ddea <get_ldnumber+0x34>
800dde2: 697b ldr r3, [r7, #20]
800dde4: 781b ldrb r3, [r3, #0]
800dde6: 2b3a cmp r3, #58 @ 0x3a
800dde8: d1f4 bne.n 800ddd4 <get_ldnumber+0x1e>
if (*tt == ':') { /* If a ':' is exist in the path name */
800ddea: 697b ldr r3, [r7, #20]
800ddec: 781b ldrb r3, [r3, #0]
800ddee: 2b3a cmp r3, #58 @ 0x3a
800ddf0: d11c bne.n 800de2c <get_ldnumber+0x76>
tp = *path;
800ddf2: 687b ldr r3, [r7, #4]
800ddf4: 681b ldr r3, [r3, #0]
800ddf6: 60fb str r3, [r7, #12]
i = *tp++ - '0';
800ddf8: 68fb ldr r3, [r7, #12]
800ddfa: 1c5a adds r2, r3, #1
800ddfc: 60fa str r2, [r7, #12]
800ddfe: 781b ldrb r3, [r3, #0]
800de00: 3b30 subs r3, #48 @ 0x30
800de02: 60bb str r3, [r7, #8]
if (i < 10 && tp == tt) { /* Is there a numeric drive id? */
800de04: 68bb ldr r3, [r7, #8]
800de06: 2b09 cmp r3, #9
800de08: d80e bhi.n 800de28 <get_ldnumber+0x72>
800de0a: 68fa ldr r2, [r7, #12]
800de0c: 697b ldr r3, [r7, #20]
800de0e: 429a cmp r2, r3
800de10: d10a bne.n 800de28 <get_ldnumber+0x72>
if (i < _VOLUMES) { /* If a drive id is found, get the value and strip it */
800de12: 68bb ldr r3, [r7, #8]
800de14: 2b00 cmp r3, #0
800de16: d107 bne.n 800de28 <get_ldnumber+0x72>
vol = (int)i;
800de18: 68bb ldr r3, [r7, #8]
800de1a: 613b str r3, [r7, #16]
*path = ++tt;
800de1c: 697b ldr r3, [r7, #20]
800de1e: 3301 adds r3, #1
800de20: 617b str r3, [r7, #20]
800de22: 687b ldr r3, [r7, #4]
800de24: 697a ldr r2, [r7, #20]
800de26: 601a str r2, [r3, #0]
vol = (int)i;
*path = tt;
}
}
#endif
return vol;
800de28: 693b ldr r3, [r7, #16]
800de2a: e002 b.n 800de32 <get_ldnumber+0x7c>
}
#if _FS_RPATH != 0 && _VOLUMES >= 2
vol = CurrVol; /* Current drive */
#else
vol = 0; /* Drive 0 */
800de2c: 2300 movs r3, #0
800de2e: 613b str r3, [r7, #16]
#endif
}
return vol;
800de30: 693b ldr r3, [r7, #16]
}
800de32: 4618 mov r0, r3
800de34: 371c adds r7, #28
800de36: 46bd mov sp, r7
800de38: f85d 7b04 ldr.w r7, [sp], #4
800de3c: 4770 bx lr
...
0800de40 <check_fs>:
static
BYTE check_fs ( /* 0:FAT, 1:exFAT, 2:Valid BS but not FAT, 3:Not a BS, 4:Disk error */
FATFS* fs, /* File system object */
DWORD sect /* Sector# (lba) to load and check if it is an FAT-VBR or not */
)
{
800de40: b580 push {r7, lr}
800de42: b082 sub sp, #8
800de44: af00 add r7, sp, #0
800de46: 6078 str r0, [r7, #4]
800de48: 6039 str r1, [r7, #0]
fs->wflag = 0; fs->winsect = 0xFFFFFFFF; /* Invaidate window */
800de4a: 687b ldr r3, [r7, #4]
800de4c: 2200 movs r2, #0
800de4e: 70da strb r2, [r3, #3]
800de50: 687b ldr r3, [r7, #4]
800de52: f04f 32ff mov.w r2, #4294967295
800de56: 631a str r2, [r3, #48] @ 0x30
if (move_window(fs, sect) != FR_OK) return 4; /* Load boot record */
800de58: 6839 ldr r1, [r7, #0]
800de5a: 6878 ldr r0, [r7, #4]
800de5c: f7ff f8ac bl 800cfb8 <move_window>
800de60: 4603 mov r3, r0
800de62: 2b00 cmp r3, #0
800de64: d001 beq.n 800de6a <check_fs+0x2a>
800de66: 2304 movs r3, #4
800de68: e038 b.n 800dedc <check_fs+0x9c>
if (ld_word(fs->win + BS_55AA) != 0xAA55) return 3; /* Check boot record signature (always placed here even if the sector size is >512) */
800de6a: 687b ldr r3, [r7, #4]
800de6c: 3334 adds r3, #52 @ 0x34
800de6e: f503 73ff add.w r3, r3, #510 @ 0x1fe
800de72: 4618 mov r0, r3
800de74: f7fe fdbe bl 800c9f4 <ld_word>
800de78: 4603 mov r3, r0
800de7a: 461a mov r2, r3
800de7c: f64a 2355 movw r3, #43605 @ 0xaa55
800de80: 429a cmp r2, r3
800de82: d001 beq.n 800de88 <check_fs+0x48>
800de84: 2303 movs r3, #3
800de86: e029 b.n 800dedc <check_fs+0x9c>
if (fs->win[BS_JmpBoot] == 0xE9 || (fs->win[BS_JmpBoot] == 0xEB && fs->win[BS_JmpBoot + 2] == 0x90)) {
800de88: 687b ldr r3, [r7, #4]
800de8a: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
800de8e: 2be9 cmp r3, #233 @ 0xe9
800de90: d009 beq.n 800dea6 <check_fs+0x66>
800de92: 687b ldr r3, [r7, #4]
800de94: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
800de98: 2beb cmp r3, #235 @ 0xeb
800de9a: d11e bne.n 800deda <check_fs+0x9a>
800de9c: 687b ldr r3, [r7, #4]
800de9e: f893 3036 ldrb.w r3, [r3, #54] @ 0x36
800dea2: 2b90 cmp r3, #144 @ 0x90
800dea4: d119 bne.n 800deda <check_fs+0x9a>
if ((ld_dword(fs->win + BS_FilSysType) & 0xFFFFFF) == 0x544146) return 0; /* Check "FAT" string */
800dea6: 687b ldr r3, [r7, #4]
800dea8: 3334 adds r3, #52 @ 0x34
800deaa: 3336 adds r3, #54 @ 0x36
800deac: 4618 mov r0, r3
800deae: f7fe fdb9 bl 800ca24 <ld_dword>
800deb2: 4603 mov r3, r0
800deb4: f023 437f bic.w r3, r3, #4278190080 @ 0xff000000
800deb8: 4a0a ldr r2, [pc, #40] @ (800dee4 <check_fs+0xa4>)
800deba: 4293 cmp r3, r2
800debc: d101 bne.n 800dec2 <check_fs+0x82>
800debe: 2300 movs r3, #0
800dec0: e00c b.n 800dedc <check_fs+0x9c>
if (ld_dword(fs->win + BS_FilSysType32) == 0x33544146) return 0; /* Check "FAT3" string */
800dec2: 687b ldr r3, [r7, #4]
800dec4: 3334 adds r3, #52 @ 0x34
800dec6: 3352 adds r3, #82 @ 0x52
800dec8: 4618 mov r0, r3
800deca: f7fe fdab bl 800ca24 <ld_dword>
800dece: 4603 mov r3, r0
800ded0: 4a05 ldr r2, [pc, #20] @ (800dee8 <check_fs+0xa8>)
800ded2: 4293 cmp r3, r2
800ded4: d101 bne.n 800deda <check_fs+0x9a>
800ded6: 2300 movs r3, #0
800ded8: e000 b.n 800dedc <check_fs+0x9c>
}
#if _FS_EXFAT
if (!mem_cmp(fs->win + BS_JmpBoot, "\xEB\x76\x90" "EXFAT ", 11)) return 1;
#endif
return 2;
800deda: 2302 movs r3, #2
}
800dedc: 4618 mov r0, r3
800dede: 3708 adds r7, #8
800dee0: 46bd mov sp, r7
800dee2: bd80 pop {r7, pc}
800dee4: 00544146 .word 0x00544146
800dee8: 33544146 .word 0x33544146
0800deec <find_volume>:
FRESULT find_volume ( /* FR_OK(0): successful, !=0: any error occurred */
const TCHAR** path, /* Pointer to pointer to the path name (drive number) */
FATFS** rfs, /* Pointer to pointer to the found file system object */
BYTE mode /* !=0: Check write protection for write access */
)
{
800deec: b580 push {r7, lr}
800deee: b096 sub sp, #88 @ 0x58
800def0: af00 add r7, sp, #0
800def2: 60f8 str r0, [r7, #12]
800def4: 60b9 str r1, [r7, #8]
800def6: 4613 mov r3, r2
800def8: 71fb strb r3, [r7, #7]
FATFS *fs;
UINT i;
/* Get logical drive number */
*rfs = 0;
800defa: 68bb ldr r3, [r7, #8]
800defc: 2200 movs r2, #0
800defe: 601a str r2, [r3, #0]
vol = get_ldnumber(path);
800df00: 68f8 ldr r0, [r7, #12]
800df02: f7ff ff58 bl 800ddb6 <get_ldnumber>
800df06: 63f8 str r0, [r7, #60] @ 0x3c
if (vol < 0) return FR_INVALID_DRIVE;
800df08: 6bfb ldr r3, [r7, #60] @ 0x3c
800df0a: 2b00 cmp r3, #0
800df0c: da01 bge.n 800df12 <find_volume+0x26>
800df0e: 230b movs r3, #11
800df10: e235 b.n 800e37e <find_volume+0x492>
/* Check if the file system object is valid or not */
fs = FatFs[vol]; /* Get pointer to the file system object */
800df12: 4aa5 ldr r2, [pc, #660] @ (800e1a8 <find_volume+0x2bc>)
800df14: 6bfb ldr r3, [r7, #60] @ 0x3c
800df16: f852 3023 ldr.w r3, [r2, r3, lsl #2]
800df1a: 63bb str r3, [r7, #56] @ 0x38
if (!fs) return FR_NOT_ENABLED; /* Is the file system object available? */
800df1c: 6bbb ldr r3, [r7, #56] @ 0x38
800df1e: 2b00 cmp r3, #0
800df20: d101 bne.n 800df26 <find_volume+0x3a>
800df22: 230c movs r3, #12
800df24: e22b b.n 800e37e <find_volume+0x492>
ENTER_FF(fs); /* Lock the volume */
800df26: 6bb8 ldr r0, [r7, #56] @ 0x38
800df28: f7fe fe64 bl 800cbf4 <lock_fs>
800df2c: 4603 mov r3, r0
800df2e: 2b00 cmp r3, #0
800df30: d101 bne.n 800df36 <find_volume+0x4a>
800df32: 230f movs r3, #15
800df34: e223 b.n 800e37e <find_volume+0x492>
*rfs = fs; /* Return pointer to the file system object */
800df36: 68bb ldr r3, [r7, #8]
800df38: 6bba ldr r2, [r7, #56] @ 0x38
800df3a: 601a str r2, [r3, #0]
mode &= (BYTE)~FA_READ; /* Desired access mode, write access or not */
800df3c: 79fb ldrb r3, [r7, #7]
800df3e: f023 0301 bic.w r3, r3, #1
800df42: 71fb strb r3, [r7, #7]
if (fs->fs_type) { /* If the volume has been mounted */
800df44: 6bbb ldr r3, [r7, #56] @ 0x38
800df46: 781b ldrb r3, [r3, #0]
800df48: 2b00 cmp r3, #0
800df4a: d01a beq.n 800df82 <find_volume+0x96>
stat = disk_status(fs->drv);
800df4c: 6bbb ldr r3, [r7, #56] @ 0x38
800df4e: 785b ldrb r3, [r3, #1]
800df50: 4618 mov r0, r3
800df52: f7fe fcaf bl 800c8b4 <disk_status>
800df56: 4603 mov r3, r0
800df58: f887 3037 strb.w r3, [r7, #55] @ 0x37
if (!(stat & STA_NOINIT)) { /* and the physical drive is kept initialized */
800df5c: f897 3037 ldrb.w r3, [r7, #55] @ 0x37
800df60: f003 0301 and.w r3, r3, #1
800df64: 2b00 cmp r3, #0
800df66: d10c bne.n 800df82 <find_volume+0x96>
if (!_FS_READONLY && mode && (stat & STA_PROTECT)) { /* Check write protection if needed */
800df68: 79fb ldrb r3, [r7, #7]
800df6a: 2b00 cmp r3, #0
800df6c: d007 beq.n 800df7e <find_volume+0x92>
800df6e: f897 3037 ldrb.w r3, [r7, #55] @ 0x37
800df72: f003 0304 and.w r3, r3, #4
800df76: 2b00 cmp r3, #0
800df78: d001 beq.n 800df7e <find_volume+0x92>
return FR_WRITE_PROTECTED;
800df7a: 230a movs r3, #10
800df7c: e1ff b.n 800e37e <find_volume+0x492>
}
return FR_OK; /* The file system object is valid */
800df7e: 2300 movs r3, #0
800df80: e1fd b.n 800e37e <find_volume+0x492>
}
/* The file system object is not valid. */
/* Following code attempts to mount the volume. (analyze BPB and initialize the fs object) */
fs->fs_type = 0; /* Clear the file system object */
800df82: 6bbb ldr r3, [r7, #56] @ 0x38
800df84: 2200 movs r2, #0
800df86: 701a strb r2, [r3, #0]
fs->drv = LD2PD(vol); /* Bind the logical drive and a physical drive */
800df88: 6bfb ldr r3, [r7, #60] @ 0x3c
800df8a: b2da uxtb r2, r3
800df8c: 6bbb ldr r3, [r7, #56] @ 0x38
800df8e: 705a strb r2, [r3, #1]
stat = disk_initialize(fs->drv); /* Initialize the physical drive */
800df90: 6bbb ldr r3, [r7, #56] @ 0x38
800df92: 785b ldrb r3, [r3, #1]
800df94: 4618 mov r0, r3
800df96: f7fe fca7 bl 800c8e8 <disk_initialize>
800df9a: 4603 mov r3, r0
800df9c: f887 3037 strb.w r3, [r7, #55] @ 0x37
if (stat & STA_NOINIT) { /* Check if the initialization succeeded */
800dfa0: f897 3037 ldrb.w r3, [r7, #55] @ 0x37
800dfa4: f003 0301 and.w r3, r3, #1
800dfa8: 2b00 cmp r3, #0
800dfaa: d001 beq.n 800dfb0 <find_volume+0xc4>
return FR_NOT_READY; /* Failed to initialize due to no medium or hard error */
800dfac: 2303 movs r3, #3
800dfae: e1e6 b.n 800e37e <find_volume+0x492>
}
if (!_FS_READONLY && mode && (stat & STA_PROTECT)) { /* Check disk write protection if needed */
800dfb0: 79fb ldrb r3, [r7, #7]
800dfb2: 2b00 cmp r3, #0
800dfb4: d007 beq.n 800dfc6 <find_volume+0xda>
800dfb6: f897 3037 ldrb.w r3, [r7, #55] @ 0x37
800dfba: f003 0304 and.w r3, r3, #4
800dfbe: 2b00 cmp r3, #0
800dfc0: d001 beq.n 800dfc6 <find_volume+0xda>
return FR_WRITE_PROTECTED;
800dfc2: 230a movs r3, #10
800dfc4: e1db b.n 800e37e <find_volume+0x492>
if (disk_ioctl(fs->drv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK) return FR_DISK_ERR;
if (SS(fs) > _MAX_SS || SS(fs) < _MIN_SS || (SS(fs) & (SS(fs) - 1))) return FR_DISK_ERR;
#endif
/* Find an FAT partition on the drive. Supports only generic partitioning rules, FDISK and SFD. */
bsect = 0;
800dfc6: 2300 movs r3, #0
800dfc8: 653b str r3, [r7, #80] @ 0x50
fmt = check_fs(fs, bsect); /* Load sector 0 and check if it is an FAT-VBR as SFD */
800dfca: 6d39 ldr r1, [r7, #80] @ 0x50
800dfcc: 6bb8 ldr r0, [r7, #56] @ 0x38
800dfce: f7ff ff37 bl 800de40 <check_fs>
800dfd2: 4603 mov r3, r0
800dfd4: f887 3057 strb.w r3, [r7, #87] @ 0x57
if (fmt == 2 || (fmt < 2 && LD2PT(vol) != 0)) { /* Not an FAT-VBR or forced partition number */
800dfd8: f897 3057 ldrb.w r3, [r7, #87] @ 0x57
800dfdc: 2b02 cmp r3, #2
800dfde: d149 bne.n 800e074 <find_volume+0x188>
for (i = 0; i < 4; i++) { /* Get partition offset */
800dfe0: 2300 movs r3, #0
800dfe2: 643b str r3, [r7, #64] @ 0x40
800dfe4: e01e b.n 800e024 <find_volume+0x138>
pt = fs->win + (MBR_Table + i * SZ_PTE);
800dfe6: 6bbb ldr r3, [r7, #56] @ 0x38
800dfe8: f103 0234 add.w r2, r3, #52 @ 0x34
800dfec: 6c3b ldr r3, [r7, #64] @ 0x40
800dfee: 011b lsls r3, r3, #4
800dff0: f503 73df add.w r3, r3, #446 @ 0x1be
800dff4: 4413 add r3, r2
800dff6: 633b str r3, [r7, #48] @ 0x30
br[i] = pt[PTE_System] ? ld_dword(pt + PTE_StLba) : 0;
800dff8: 6b3b ldr r3, [r7, #48] @ 0x30
800dffa: 3304 adds r3, #4
800dffc: 781b ldrb r3, [r3, #0]
800dffe: 2b00 cmp r3, #0
800e000: d006 beq.n 800e010 <find_volume+0x124>
800e002: 6b3b ldr r3, [r7, #48] @ 0x30
800e004: 3308 adds r3, #8
800e006: 4618 mov r0, r3
800e008: f7fe fd0c bl 800ca24 <ld_dword>
800e00c: 4602 mov r2, r0
800e00e: e000 b.n 800e012 <find_volume+0x126>
800e010: 2200 movs r2, #0
800e012: 6c3b ldr r3, [r7, #64] @ 0x40
800e014: 009b lsls r3, r3, #2
800e016: 3358 adds r3, #88 @ 0x58
800e018: 443b add r3, r7
800e01a: f843 2c44 str.w r2, [r3, #-68]
for (i = 0; i < 4; i++) { /* Get partition offset */
800e01e: 6c3b ldr r3, [r7, #64] @ 0x40
800e020: 3301 adds r3, #1
800e022: 643b str r3, [r7, #64] @ 0x40
800e024: 6c3b ldr r3, [r7, #64] @ 0x40
800e026: 2b03 cmp r3, #3
800e028: d9dd bls.n 800dfe6 <find_volume+0xfa>
}
i = LD2PT(vol); /* Partition number: 0:auto, 1-4:forced */
800e02a: 2300 movs r3, #0
800e02c: 643b str r3, [r7, #64] @ 0x40
if (i) i--;
800e02e: 6c3b ldr r3, [r7, #64] @ 0x40
800e030: 2b00 cmp r3, #0
800e032: d002 beq.n 800e03a <find_volume+0x14e>
800e034: 6c3b ldr r3, [r7, #64] @ 0x40
800e036: 3b01 subs r3, #1
800e038: 643b str r3, [r7, #64] @ 0x40
do { /* Find an FAT volume */
bsect = br[i];
800e03a: 6c3b ldr r3, [r7, #64] @ 0x40
800e03c: 009b lsls r3, r3, #2
800e03e: 3358 adds r3, #88 @ 0x58
800e040: 443b add r3, r7
800e042: f853 3c44 ldr.w r3, [r3, #-68]
800e046: 653b str r3, [r7, #80] @ 0x50
fmt = bsect ? check_fs(fs, bsect) : 3; /* Check the partition */
800e048: 6d3b ldr r3, [r7, #80] @ 0x50
800e04a: 2b00 cmp r3, #0
800e04c: d005 beq.n 800e05a <find_volume+0x16e>
800e04e: 6d39 ldr r1, [r7, #80] @ 0x50
800e050: 6bb8 ldr r0, [r7, #56] @ 0x38
800e052: f7ff fef5 bl 800de40 <check_fs>
800e056: 4603 mov r3, r0
800e058: e000 b.n 800e05c <find_volume+0x170>
800e05a: 2303 movs r3, #3
800e05c: f887 3057 strb.w r3, [r7, #87] @ 0x57
} while (LD2PT(vol) == 0 && fmt >= 2 && ++i < 4);
800e060: f897 3057 ldrb.w r3, [r7, #87] @ 0x57
800e064: 2b01 cmp r3, #1
800e066: d905 bls.n 800e074 <find_volume+0x188>
800e068: 6c3b ldr r3, [r7, #64] @ 0x40
800e06a: 3301 adds r3, #1
800e06c: 643b str r3, [r7, #64] @ 0x40
800e06e: 6c3b ldr r3, [r7, #64] @ 0x40
800e070: 2b03 cmp r3, #3
800e072: d9e2 bls.n 800e03a <find_volume+0x14e>
}
if (fmt == 4) return FR_DISK_ERR; /* An error occured in the disk I/O layer */
800e074: f897 3057 ldrb.w r3, [r7, #87] @ 0x57
800e078: 2b04 cmp r3, #4
800e07a: d101 bne.n 800e080 <find_volume+0x194>
800e07c: 2301 movs r3, #1
800e07e: e17e b.n 800e37e <find_volume+0x492>
if (fmt >= 2) return FR_NO_FILESYSTEM; /* No FAT volume is found */
800e080: f897 3057 ldrb.w r3, [r7, #87] @ 0x57
800e084: 2b01 cmp r3, #1
800e086: d901 bls.n 800e08c <find_volume+0x1a0>
800e088: 230d movs r3, #13
800e08a: e178 b.n 800e37e <find_volume+0x492>
#endif
fmt = FS_EXFAT; /* FAT sub-type */
} else
#endif /* _FS_EXFAT */
{
if (ld_word(fs->win + BPB_BytsPerSec) != SS(fs)) return FR_NO_FILESYSTEM; /* (BPB_BytsPerSec must be equal to the physical sector size) */
800e08c: 6bbb ldr r3, [r7, #56] @ 0x38
800e08e: 3334 adds r3, #52 @ 0x34
800e090: 330b adds r3, #11
800e092: 4618 mov r0, r3
800e094: f7fe fcae bl 800c9f4 <ld_word>
800e098: 4603 mov r3, r0
800e09a: f5b3 7f00 cmp.w r3, #512 @ 0x200
800e09e: d001 beq.n 800e0a4 <find_volume+0x1b8>
800e0a0: 230d movs r3, #13
800e0a2: e16c b.n 800e37e <find_volume+0x492>
fasize = ld_word(fs->win + BPB_FATSz16); /* Number of sectors per FAT */
800e0a4: 6bbb ldr r3, [r7, #56] @ 0x38
800e0a6: 3334 adds r3, #52 @ 0x34
800e0a8: 3316 adds r3, #22
800e0aa: 4618 mov r0, r3
800e0ac: f7fe fca2 bl 800c9f4 <ld_word>
800e0b0: 4603 mov r3, r0
800e0b2: 64fb str r3, [r7, #76] @ 0x4c
if (fasize == 0) fasize = ld_dword(fs->win + BPB_FATSz32);
800e0b4: 6cfb ldr r3, [r7, #76] @ 0x4c
800e0b6: 2b00 cmp r3, #0
800e0b8: d106 bne.n 800e0c8 <find_volume+0x1dc>
800e0ba: 6bbb ldr r3, [r7, #56] @ 0x38
800e0bc: 3334 adds r3, #52 @ 0x34
800e0be: 3324 adds r3, #36 @ 0x24
800e0c0: 4618 mov r0, r3
800e0c2: f7fe fcaf bl 800ca24 <ld_dword>
800e0c6: 64f8 str r0, [r7, #76] @ 0x4c
fs->fsize = fasize;
800e0c8: 6bbb ldr r3, [r7, #56] @ 0x38
800e0ca: 6cfa ldr r2, [r7, #76] @ 0x4c
800e0cc: 61da str r2, [r3, #28]
fs->n_fats = fs->win[BPB_NumFATs]; /* Number of FATs */
800e0ce: 6bbb ldr r3, [r7, #56] @ 0x38
800e0d0: f893 2044 ldrb.w r2, [r3, #68] @ 0x44
800e0d4: 6bbb ldr r3, [r7, #56] @ 0x38
800e0d6: 709a strb r2, [r3, #2]
if (fs->n_fats != 1 && fs->n_fats != 2) return FR_NO_FILESYSTEM; /* (Must be 1 or 2) */
800e0d8: 6bbb ldr r3, [r7, #56] @ 0x38
800e0da: 789b ldrb r3, [r3, #2]
800e0dc: 2b01 cmp r3, #1
800e0de: d005 beq.n 800e0ec <find_volume+0x200>
800e0e0: 6bbb ldr r3, [r7, #56] @ 0x38
800e0e2: 789b ldrb r3, [r3, #2]
800e0e4: 2b02 cmp r3, #2
800e0e6: d001 beq.n 800e0ec <find_volume+0x200>
800e0e8: 230d movs r3, #13
800e0ea: e148 b.n 800e37e <find_volume+0x492>
fasize *= fs->n_fats; /* Number of sectors for FAT area */
800e0ec: 6bbb ldr r3, [r7, #56] @ 0x38
800e0ee: 789b ldrb r3, [r3, #2]
800e0f0: 461a mov r2, r3
800e0f2: 6cfb ldr r3, [r7, #76] @ 0x4c
800e0f4: fb02 f303 mul.w r3, r2, r3
800e0f8: 64fb str r3, [r7, #76] @ 0x4c
fs->csize = fs->win[BPB_SecPerClus]; /* Cluster size */
800e0fa: 6bbb ldr r3, [r7, #56] @ 0x38
800e0fc: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
800e100: 461a mov r2, r3
800e102: 6bbb ldr r3, [r7, #56] @ 0x38
800e104: 815a strh r2, [r3, #10]
if (fs->csize == 0 || (fs->csize & (fs->csize - 1))) return FR_NO_FILESYSTEM; /* (Must be power of 2) */
800e106: 6bbb ldr r3, [r7, #56] @ 0x38
800e108: 895b ldrh r3, [r3, #10]
800e10a: 2b00 cmp r3, #0
800e10c: d008 beq.n 800e120 <find_volume+0x234>
800e10e: 6bbb ldr r3, [r7, #56] @ 0x38
800e110: 895b ldrh r3, [r3, #10]
800e112: 461a mov r2, r3
800e114: 6bbb ldr r3, [r7, #56] @ 0x38
800e116: 895b ldrh r3, [r3, #10]
800e118: 3b01 subs r3, #1
800e11a: 4013 ands r3, r2
800e11c: 2b00 cmp r3, #0
800e11e: d001 beq.n 800e124 <find_volume+0x238>
800e120: 230d movs r3, #13
800e122: e12c b.n 800e37e <find_volume+0x492>
fs->n_rootdir = ld_word(fs->win + BPB_RootEntCnt); /* Number of root directory entries */
800e124: 6bbb ldr r3, [r7, #56] @ 0x38
800e126: 3334 adds r3, #52 @ 0x34
800e128: 3311 adds r3, #17
800e12a: 4618 mov r0, r3
800e12c: f7fe fc62 bl 800c9f4 <ld_word>
800e130: 4603 mov r3, r0
800e132: 461a mov r2, r3
800e134: 6bbb ldr r3, [r7, #56] @ 0x38
800e136: 811a strh r2, [r3, #8]
if (fs->n_rootdir % (SS(fs) / SZDIRE)) return FR_NO_FILESYSTEM; /* (Must be sector aligned) */
800e138: 6bbb ldr r3, [r7, #56] @ 0x38
800e13a: 891b ldrh r3, [r3, #8]
800e13c: f003 030f and.w r3, r3, #15
800e140: b29b uxth r3, r3
800e142: 2b00 cmp r3, #0
800e144: d001 beq.n 800e14a <find_volume+0x25e>
800e146: 230d movs r3, #13
800e148: e119 b.n 800e37e <find_volume+0x492>
tsect = ld_word(fs->win + BPB_TotSec16); /* Number of sectors on the volume */
800e14a: 6bbb ldr r3, [r7, #56] @ 0x38
800e14c: 3334 adds r3, #52 @ 0x34
800e14e: 3313 adds r3, #19
800e150: 4618 mov r0, r3
800e152: f7fe fc4f bl 800c9f4 <ld_word>
800e156: 4603 mov r3, r0
800e158: 64bb str r3, [r7, #72] @ 0x48
if (tsect == 0) tsect = ld_dword(fs->win + BPB_TotSec32);
800e15a: 6cbb ldr r3, [r7, #72] @ 0x48
800e15c: 2b00 cmp r3, #0
800e15e: d106 bne.n 800e16e <find_volume+0x282>
800e160: 6bbb ldr r3, [r7, #56] @ 0x38
800e162: 3334 adds r3, #52 @ 0x34
800e164: 3320 adds r3, #32
800e166: 4618 mov r0, r3
800e168: f7fe fc5c bl 800ca24 <ld_dword>
800e16c: 64b8 str r0, [r7, #72] @ 0x48
nrsv = ld_word(fs->win + BPB_RsvdSecCnt); /* Number of reserved sectors */
800e16e: 6bbb ldr r3, [r7, #56] @ 0x38
800e170: 3334 adds r3, #52 @ 0x34
800e172: 330e adds r3, #14
800e174: 4618 mov r0, r3
800e176: f7fe fc3d bl 800c9f4 <ld_word>
800e17a: 4603 mov r3, r0
800e17c: 85fb strh r3, [r7, #46] @ 0x2e
if (nrsv == 0) return FR_NO_FILESYSTEM; /* (Must not be 0) */
800e17e: 8dfb ldrh r3, [r7, #46] @ 0x2e
800e180: 2b00 cmp r3, #0
800e182: d101 bne.n 800e188 <find_volume+0x29c>
800e184: 230d movs r3, #13
800e186: e0fa b.n 800e37e <find_volume+0x492>
/* Determine the FAT sub type */
sysect = nrsv + fasize + fs->n_rootdir / (SS(fs) / SZDIRE); /* RSV + FAT + DIR */
800e188: 8dfa ldrh r2, [r7, #46] @ 0x2e
800e18a: 6cfb ldr r3, [r7, #76] @ 0x4c
800e18c: 4413 add r3, r2
800e18e: 6bba ldr r2, [r7, #56] @ 0x38
800e190: 8912 ldrh r2, [r2, #8]
800e192: 0912 lsrs r2, r2, #4
800e194: b292 uxth r2, r2
800e196: 4413 add r3, r2
800e198: 62bb str r3, [r7, #40] @ 0x28
if (tsect < sysect) return FR_NO_FILESYSTEM; /* (Invalid volume size) */
800e19a: 6cba ldr r2, [r7, #72] @ 0x48
800e19c: 6abb ldr r3, [r7, #40] @ 0x28
800e19e: 429a cmp r2, r3
800e1a0: d204 bcs.n 800e1ac <find_volume+0x2c0>
800e1a2: 230d movs r3, #13
800e1a4: e0eb b.n 800e37e <find_volume+0x492>
800e1a6: bf00 nop
800e1a8: 20010124 .word 0x20010124
nclst = (tsect - sysect) / fs->csize; /* Number of clusters */
800e1ac: 6cba ldr r2, [r7, #72] @ 0x48
800e1ae: 6abb ldr r3, [r7, #40] @ 0x28
800e1b0: 1ad3 subs r3, r2, r3
800e1b2: 6bba ldr r2, [r7, #56] @ 0x38
800e1b4: 8952 ldrh r2, [r2, #10]
800e1b6: fbb3 f3f2 udiv r3, r3, r2
800e1ba: 627b str r3, [r7, #36] @ 0x24
if (nclst == 0) return FR_NO_FILESYSTEM; /* (Invalid volume size) */
800e1bc: 6a7b ldr r3, [r7, #36] @ 0x24
800e1be: 2b00 cmp r3, #0
800e1c0: d101 bne.n 800e1c6 <find_volume+0x2da>
800e1c2: 230d movs r3, #13
800e1c4: e0db b.n 800e37e <find_volume+0x492>
fmt = FS_FAT32;
800e1c6: 2303 movs r3, #3
800e1c8: f887 3057 strb.w r3, [r7, #87] @ 0x57
if (nclst <= MAX_FAT16) fmt = FS_FAT16;
800e1cc: 6a7b ldr r3, [r7, #36] @ 0x24
800e1ce: f64f 72f5 movw r2, #65525 @ 0xfff5
800e1d2: 4293 cmp r3, r2
800e1d4: d802 bhi.n 800e1dc <find_volume+0x2f0>
800e1d6: 2302 movs r3, #2
800e1d8: f887 3057 strb.w r3, [r7, #87] @ 0x57
if (nclst <= MAX_FAT12) fmt = FS_FAT12;
800e1dc: 6a7b ldr r3, [r7, #36] @ 0x24
800e1de: f640 72f5 movw r2, #4085 @ 0xff5
800e1e2: 4293 cmp r3, r2
800e1e4: d802 bhi.n 800e1ec <find_volume+0x300>
800e1e6: 2301 movs r3, #1
800e1e8: f887 3057 strb.w r3, [r7, #87] @ 0x57
/* Boundaries and Limits */
fs->n_fatent = nclst + 2; /* Number of FAT entries */
800e1ec: 6a7b ldr r3, [r7, #36] @ 0x24
800e1ee: 1c9a adds r2, r3, #2
800e1f0: 6bbb ldr r3, [r7, #56] @ 0x38
800e1f2: 619a str r2, [r3, #24]
fs->volbase = bsect; /* Volume start sector */
800e1f4: 6bbb ldr r3, [r7, #56] @ 0x38
800e1f6: 6d3a ldr r2, [r7, #80] @ 0x50
800e1f8: 621a str r2, [r3, #32]
fs->fatbase = bsect + nrsv; /* FAT start sector */
800e1fa: 8dfa ldrh r2, [r7, #46] @ 0x2e
800e1fc: 6d3b ldr r3, [r7, #80] @ 0x50
800e1fe: 441a add r2, r3
800e200: 6bbb ldr r3, [r7, #56] @ 0x38
800e202: 625a str r2, [r3, #36] @ 0x24
fs->database = bsect + sysect; /* Data start sector */
800e204: 6d3a ldr r2, [r7, #80] @ 0x50
800e206: 6abb ldr r3, [r7, #40] @ 0x28
800e208: 441a add r2, r3
800e20a: 6bbb ldr r3, [r7, #56] @ 0x38
800e20c: 62da str r2, [r3, #44] @ 0x2c
if (fmt == FS_FAT32) {
800e20e: f897 3057 ldrb.w r3, [r7, #87] @ 0x57
800e212: 2b03 cmp r3, #3
800e214: d11e bne.n 800e254 <find_volume+0x368>
if (ld_word(fs->win + BPB_FSVer32) != 0) return FR_NO_FILESYSTEM; /* (Must be FAT32 revision 0.0) */
800e216: 6bbb ldr r3, [r7, #56] @ 0x38
800e218: 3334 adds r3, #52 @ 0x34
800e21a: 332a adds r3, #42 @ 0x2a
800e21c: 4618 mov r0, r3
800e21e: f7fe fbe9 bl 800c9f4 <ld_word>
800e222: 4603 mov r3, r0
800e224: 2b00 cmp r3, #0
800e226: d001 beq.n 800e22c <find_volume+0x340>
800e228: 230d movs r3, #13
800e22a: e0a8 b.n 800e37e <find_volume+0x492>
if (fs->n_rootdir) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must be 0) */
800e22c: 6bbb ldr r3, [r7, #56] @ 0x38
800e22e: 891b ldrh r3, [r3, #8]
800e230: 2b00 cmp r3, #0
800e232: d001 beq.n 800e238 <find_volume+0x34c>
800e234: 230d movs r3, #13
800e236: e0a2 b.n 800e37e <find_volume+0x492>
fs->dirbase = ld_dword(fs->win + BPB_RootClus32); /* Root directory start cluster */
800e238: 6bbb ldr r3, [r7, #56] @ 0x38
800e23a: 3334 adds r3, #52 @ 0x34
800e23c: 332c adds r3, #44 @ 0x2c
800e23e: 4618 mov r0, r3
800e240: f7fe fbf0 bl 800ca24 <ld_dword>
800e244: 4602 mov r2, r0
800e246: 6bbb ldr r3, [r7, #56] @ 0x38
800e248: 629a str r2, [r3, #40] @ 0x28
szbfat = fs->n_fatent * 4; /* (Needed FAT size) */
800e24a: 6bbb ldr r3, [r7, #56] @ 0x38
800e24c: 699b ldr r3, [r3, #24]
800e24e: 009b lsls r3, r3, #2
800e250: 647b str r3, [r7, #68] @ 0x44
800e252: e01f b.n 800e294 <find_volume+0x3a8>
} else {
if (fs->n_rootdir == 0) return FR_NO_FILESYSTEM;/* (BPB_RootEntCnt must not be 0) */
800e254: 6bbb ldr r3, [r7, #56] @ 0x38
800e256: 891b ldrh r3, [r3, #8]
800e258: 2b00 cmp r3, #0
800e25a: d101 bne.n 800e260 <find_volume+0x374>
800e25c: 230d movs r3, #13
800e25e: e08e b.n 800e37e <find_volume+0x492>
fs->dirbase = fs->fatbase + fasize; /* Root directory start sector */
800e260: 6bbb ldr r3, [r7, #56] @ 0x38
800e262: 6a5a ldr r2, [r3, #36] @ 0x24
800e264: 6cfb ldr r3, [r7, #76] @ 0x4c
800e266: 441a add r2, r3
800e268: 6bbb ldr r3, [r7, #56] @ 0x38
800e26a: 629a str r2, [r3, #40] @ 0x28
szbfat = (fmt == FS_FAT16) ? /* (Needed FAT size) */
fs->n_fatent * 2 : fs->n_fatent * 3 / 2 + (fs->n_fatent & 1);
800e26c: f897 3057 ldrb.w r3, [r7, #87] @ 0x57
800e270: 2b02 cmp r3, #2
800e272: d103 bne.n 800e27c <find_volume+0x390>
800e274: 6bbb ldr r3, [r7, #56] @ 0x38
800e276: 699b ldr r3, [r3, #24]
800e278: 005b lsls r3, r3, #1
800e27a: e00a b.n 800e292 <find_volume+0x3a6>
800e27c: 6bbb ldr r3, [r7, #56] @ 0x38
800e27e: 699a ldr r2, [r3, #24]
800e280: 4613 mov r3, r2
800e282: 005b lsls r3, r3, #1
800e284: 4413 add r3, r2
800e286: 085a lsrs r2, r3, #1
800e288: 6bbb ldr r3, [r7, #56] @ 0x38
800e28a: 699b ldr r3, [r3, #24]
800e28c: f003 0301 and.w r3, r3, #1
800e290: 4413 add r3, r2
szbfat = (fmt == FS_FAT16) ? /* (Needed FAT size) */
800e292: 647b str r3, [r7, #68] @ 0x44
}
if (fs->fsize < (szbfat + (SS(fs) - 1)) / SS(fs)) return FR_NO_FILESYSTEM; /* (BPB_FATSz must not be less than the size needed) */
800e294: 6bbb ldr r3, [r7, #56] @ 0x38
800e296: 69da ldr r2, [r3, #28]
800e298: 6c7b ldr r3, [r7, #68] @ 0x44
800e29a: f203 13ff addw r3, r3, #511 @ 0x1ff
800e29e: 0a5b lsrs r3, r3, #9
800e2a0: 429a cmp r2, r3
800e2a2: d201 bcs.n 800e2a8 <find_volume+0x3bc>
800e2a4: 230d movs r3, #13
800e2a6: e06a b.n 800e37e <find_volume+0x492>
#if !_FS_READONLY
/* Get FSINFO if available */
fs->last_clst = fs->free_clst = 0xFFFFFFFF; /* Initialize cluster allocation information */
800e2a8: 6bbb ldr r3, [r7, #56] @ 0x38
800e2aa: f04f 32ff mov.w r2, #4294967295
800e2ae: 615a str r2, [r3, #20]
800e2b0: 6bbb ldr r3, [r7, #56] @ 0x38
800e2b2: 695a ldr r2, [r3, #20]
800e2b4: 6bbb ldr r3, [r7, #56] @ 0x38
800e2b6: 611a str r2, [r3, #16]
fs->fsi_flag = 0x80;
800e2b8: 6bbb ldr r3, [r7, #56] @ 0x38
800e2ba: 2280 movs r2, #128 @ 0x80
800e2bc: 711a strb r2, [r3, #4]
#if (_FS_NOFSINFO & 3) != 3
if (fmt == FS_FAT32 /* Enable FSINFO only if FAT32 and BPB_FSInfo32 == 1 */
800e2be: f897 3057 ldrb.w r3, [r7, #87] @ 0x57
800e2c2: 2b03 cmp r3, #3
800e2c4: d149 bne.n 800e35a <find_volume+0x46e>
&& ld_word(fs->win + BPB_FSInfo32) == 1
800e2c6: 6bbb ldr r3, [r7, #56] @ 0x38
800e2c8: 3334 adds r3, #52 @ 0x34
800e2ca: 3330 adds r3, #48 @ 0x30
800e2cc: 4618 mov r0, r3
800e2ce: f7fe fb91 bl 800c9f4 <ld_word>
800e2d2: 4603 mov r3, r0
800e2d4: 2b01 cmp r3, #1
800e2d6: d140 bne.n 800e35a <find_volume+0x46e>
&& move_window(fs, bsect + 1) == FR_OK)
800e2d8: 6d3b ldr r3, [r7, #80] @ 0x50
800e2da: 3301 adds r3, #1
800e2dc: 4619 mov r1, r3
800e2de: 6bb8 ldr r0, [r7, #56] @ 0x38
800e2e0: f7fe fe6a bl 800cfb8 <move_window>
800e2e4: 4603 mov r3, r0
800e2e6: 2b00 cmp r3, #0
800e2e8: d137 bne.n 800e35a <find_volume+0x46e>
{
fs->fsi_flag = 0;
800e2ea: 6bbb ldr r3, [r7, #56] @ 0x38
800e2ec: 2200 movs r2, #0
800e2ee: 711a strb r2, [r3, #4]
if (ld_word(fs->win + BS_55AA) == 0xAA55 /* Load FSINFO data if available */
800e2f0: 6bbb ldr r3, [r7, #56] @ 0x38
800e2f2: 3334 adds r3, #52 @ 0x34
800e2f4: f503 73ff add.w r3, r3, #510 @ 0x1fe
800e2f8: 4618 mov r0, r3
800e2fa: f7fe fb7b bl 800c9f4 <ld_word>
800e2fe: 4603 mov r3, r0
800e300: 461a mov r2, r3
800e302: f64a 2355 movw r3, #43605 @ 0xaa55
800e306: 429a cmp r2, r3
800e308: d127 bne.n 800e35a <find_volume+0x46e>
&& ld_dword(fs->win + FSI_LeadSig) == 0x41615252
800e30a: 6bbb ldr r3, [r7, #56] @ 0x38
800e30c: 3334 adds r3, #52 @ 0x34
800e30e: 4618 mov r0, r3
800e310: f7fe fb88 bl 800ca24 <ld_dword>
800e314: 4603 mov r3, r0
800e316: 4a1c ldr r2, [pc, #112] @ (800e388 <find_volume+0x49c>)
800e318: 4293 cmp r3, r2
800e31a: d11e bne.n 800e35a <find_volume+0x46e>
&& ld_dword(fs->win + FSI_StrucSig) == 0x61417272)
800e31c: 6bbb ldr r3, [r7, #56] @ 0x38
800e31e: 3334 adds r3, #52 @ 0x34
800e320: f503 73f2 add.w r3, r3, #484 @ 0x1e4
800e324: 4618 mov r0, r3
800e326: f7fe fb7d bl 800ca24 <ld_dword>
800e32a: 4603 mov r3, r0
800e32c: 4a17 ldr r2, [pc, #92] @ (800e38c <find_volume+0x4a0>)
800e32e: 4293 cmp r3, r2
800e330: d113 bne.n 800e35a <find_volume+0x46e>
{
#if (_FS_NOFSINFO & 1) == 0
fs->free_clst = ld_dword(fs->win + FSI_Free_Count);
800e332: 6bbb ldr r3, [r7, #56] @ 0x38
800e334: 3334 adds r3, #52 @ 0x34
800e336: f503 73f4 add.w r3, r3, #488 @ 0x1e8
800e33a: 4618 mov r0, r3
800e33c: f7fe fb72 bl 800ca24 <ld_dword>
800e340: 4602 mov r2, r0
800e342: 6bbb ldr r3, [r7, #56] @ 0x38
800e344: 615a str r2, [r3, #20]
#endif
#if (_FS_NOFSINFO & 2) == 0
fs->last_clst = ld_dword(fs->win + FSI_Nxt_Free);
800e346: 6bbb ldr r3, [r7, #56] @ 0x38
800e348: 3334 adds r3, #52 @ 0x34
800e34a: f503 73f6 add.w r3, r3, #492 @ 0x1ec
800e34e: 4618 mov r0, r3
800e350: f7fe fb68 bl 800ca24 <ld_dword>
800e354: 4602 mov r2, r0
800e356: 6bbb ldr r3, [r7, #56] @ 0x38
800e358: 611a str r2, [r3, #16]
}
#endif /* (_FS_NOFSINFO & 3) != 3 */
#endif /* !_FS_READONLY */
}
fs->fs_type = fmt; /* FAT sub-type */
800e35a: 6bbb ldr r3, [r7, #56] @ 0x38
800e35c: f897 2057 ldrb.w r2, [r7, #87] @ 0x57
800e360: 701a strb r2, [r3, #0]
fs->id = ++Fsid; /* File system mount ID */
800e362: 4b0b ldr r3, [pc, #44] @ (800e390 <find_volume+0x4a4>)
800e364: 881b ldrh r3, [r3, #0]
800e366: 3301 adds r3, #1
800e368: b29a uxth r2, r3
800e36a: 4b09 ldr r3, [pc, #36] @ (800e390 <find_volume+0x4a4>)
800e36c: 801a strh r2, [r3, #0]
800e36e: 4b08 ldr r3, [pc, #32] @ (800e390 <find_volume+0x4a4>)
800e370: 881a ldrh r2, [r3, #0]
800e372: 6bbb ldr r3, [r7, #56] @ 0x38
800e374: 80da strh r2, [r3, #6]
#endif
#if _FS_RPATH != 0
fs->cdir = 0; /* Initialize current directory */
#endif
#if _FS_LOCK != 0 /* Clear file lock semaphores */
clear_lock(fs);
800e376: 6bb8 ldr r0, [r7, #56] @ 0x38
800e378: f7fe fdb6 bl 800cee8 <clear_lock>
#endif
return FR_OK;
800e37c: 2300 movs r3, #0
}
800e37e: 4618 mov r0, r3
800e380: 3758 adds r7, #88 @ 0x58
800e382: 46bd mov sp, r7
800e384: bd80 pop {r7, pc}
800e386: bf00 nop
800e388: 41615252 .word 0x41615252
800e38c: 61417272 .word 0x61417272
800e390: 20010128 .word 0x20010128
0800e394 <validate>:
static
FRESULT validate ( /* Returns FR_OK or FR_INVALID_OBJECT */
_FDID* obj, /* Pointer to the _OBJ, the 1st member in the FIL/DIR object, to check validity */
FATFS** fs /* Pointer to pointer to the owner file system object to return */
)
{
800e394: b580 push {r7, lr}
800e396: b084 sub sp, #16
800e398: af00 add r7, sp, #0
800e39a: 6078 str r0, [r7, #4]
800e39c: 6039 str r1, [r7, #0]
FRESULT res = FR_INVALID_OBJECT;
800e39e: 2309 movs r3, #9
800e3a0: 73fb strb r3, [r7, #15]
if (obj && obj->fs && obj->fs->fs_type && obj->id == obj->fs->id) { /* Test if the object is valid */
800e3a2: 687b ldr r3, [r7, #4]
800e3a4: 2b00 cmp r3, #0
800e3a6: d02e beq.n 800e406 <validate+0x72>
800e3a8: 687b ldr r3, [r7, #4]
800e3aa: 681b ldr r3, [r3, #0]
800e3ac: 2b00 cmp r3, #0
800e3ae: d02a beq.n 800e406 <validate+0x72>
800e3b0: 687b ldr r3, [r7, #4]
800e3b2: 681b ldr r3, [r3, #0]
800e3b4: 781b ldrb r3, [r3, #0]
800e3b6: 2b00 cmp r3, #0
800e3b8: d025 beq.n 800e406 <validate+0x72>
800e3ba: 687b ldr r3, [r7, #4]
800e3bc: 889a ldrh r2, [r3, #4]
800e3be: 687b ldr r3, [r7, #4]
800e3c0: 681b ldr r3, [r3, #0]
800e3c2: 88db ldrh r3, [r3, #6]
800e3c4: 429a cmp r2, r3
800e3c6: d11e bne.n 800e406 <validate+0x72>
#if _FS_REENTRANT
if (lock_fs(obj->fs)) { /* Obtain the filesystem object */
800e3c8: 687b ldr r3, [r7, #4]
800e3ca: 681b ldr r3, [r3, #0]
800e3cc: 4618 mov r0, r3
800e3ce: f7fe fc11 bl 800cbf4 <lock_fs>
800e3d2: 4603 mov r3, r0
800e3d4: 2b00 cmp r3, #0
800e3d6: d014 beq.n 800e402 <validate+0x6e>
if (!(disk_status(obj->fs->drv) & STA_NOINIT)) { /* Test if the phsical drive is kept initialized */
800e3d8: 687b ldr r3, [r7, #4]
800e3da: 681b ldr r3, [r3, #0]
800e3dc: 785b ldrb r3, [r3, #1]
800e3de: 4618 mov r0, r3
800e3e0: f7fe fa68 bl 800c8b4 <disk_status>
800e3e4: 4603 mov r3, r0
800e3e6: f003 0301 and.w r3, r3, #1
800e3ea: 2b00 cmp r3, #0
800e3ec: d102 bne.n 800e3f4 <validate+0x60>
res = FR_OK;
800e3ee: 2300 movs r3, #0
800e3f0: 73fb strb r3, [r7, #15]
800e3f2: e008 b.n 800e406 <validate+0x72>
} else {
unlock_fs(obj->fs, FR_OK);
800e3f4: 687b ldr r3, [r7, #4]
800e3f6: 681b ldr r3, [r3, #0]
800e3f8: 2100 movs r1, #0
800e3fa: 4618 mov r0, r3
800e3fc: f7fe fc10 bl 800cc20 <unlock_fs>
800e400: e001 b.n 800e406 <validate+0x72>
}
} else {
res = FR_TIMEOUT;
800e402: 230f movs r3, #15
800e404: 73fb strb r3, [r7, #15]
if (!(disk_status(obj->fs->drv) & STA_NOINIT)) { /* Test if the phsical drive is kept initialized */
res = FR_OK;
}
#endif
}
*fs = (res == FR_OK) ? obj->fs : 0; /* Corresponding filesystem object */
800e406: 7bfb ldrb r3, [r7, #15]
800e408: 2b00 cmp r3, #0
800e40a: d102 bne.n 800e412 <validate+0x7e>
800e40c: 687b ldr r3, [r7, #4]
800e40e: 681b ldr r3, [r3, #0]
800e410: e000 b.n 800e414 <validate+0x80>
800e412: 2300 movs r3, #0
800e414: 683a ldr r2, [r7, #0]
800e416: 6013 str r3, [r2, #0]
return res;
800e418: 7bfb ldrb r3, [r7, #15]
}
800e41a: 4618 mov r0, r3
800e41c: 3710 adds r7, #16
800e41e: 46bd mov sp, r7
800e420: bd80 pop {r7, pc}
...
0800e424 <f_mount>:
FRESULT f_mount (
FATFS* fs, /* Pointer to the file system object (NULL:unmount)*/
const TCHAR* path, /* Logical drive number to be mounted/unmounted */
BYTE opt /* Mode option 0:Do not mount (delayed mount), 1:Mount immediately */
)
{
800e424: b580 push {r7, lr}
800e426: b088 sub sp, #32
800e428: af00 add r7, sp, #0
800e42a: 60f8 str r0, [r7, #12]
800e42c: 60b9 str r1, [r7, #8]
800e42e: 4613 mov r3, r2
800e430: 71fb strb r3, [r7, #7]
FATFS *cfs;
int vol;
FRESULT res;
const TCHAR *rp = path;
800e432: 68bb ldr r3, [r7, #8]
800e434: 613b str r3, [r7, #16]
/* Get logical drive number */
vol = get_ldnumber(&rp);
800e436: f107 0310 add.w r3, r7, #16
800e43a: 4618 mov r0, r3
800e43c: f7ff fcbb bl 800ddb6 <get_ldnumber>
800e440: 61f8 str r0, [r7, #28]
if (vol < 0) return FR_INVALID_DRIVE;
800e442: 69fb ldr r3, [r7, #28]
800e444: 2b00 cmp r3, #0
800e446: da01 bge.n 800e44c <f_mount+0x28>
800e448: 230b movs r3, #11
800e44a: e048 b.n 800e4de <f_mount+0xba>
cfs = FatFs[vol]; /* Pointer to fs object */
800e44c: 4a26 ldr r2, [pc, #152] @ (800e4e8 <f_mount+0xc4>)
800e44e: 69fb ldr r3, [r7, #28]
800e450: f852 3023 ldr.w r3, [r2, r3, lsl #2]
800e454: 61bb str r3, [r7, #24]
if (cfs) {
800e456: 69bb ldr r3, [r7, #24]
800e458: 2b00 cmp r3, #0
800e45a: d00f beq.n 800e47c <f_mount+0x58>
#if _FS_LOCK != 0
clear_lock(cfs);
800e45c: 69b8 ldr r0, [r7, #24]
800e45e: f7fe fd43 bl 800cee8 <clear_lock>
#endif
#if _FS_REENTRANT /* Discard sync object of the current volume */
if (!ff_del_syncobj(cfs->sobj)) return FR_INT_ERR;
800e462: 69bb ldr r3, [r7, #24]
800e464: 68db ldr r3, [r3, #12]
800e466: 4618 mov r0, r3
800e468: f001 fb79 bl 800fb5e <ff_del_syncobj>
800e46c: 4603 mov r3, r0
800e46e: 2b00 cmp r3, #0
800e470: d101 bne.n 800e476 <f_mount+0x52>
800e472: 2302 movs r3, #2
800e474: e033 b.n 800e4de <f_mount+0xba>
#endif
cfs->fs_type = 0; /* Clear old fs object */
800e476: 69bb ldr r3, [r7, #24]
800e478: 2200 movs r2, #0
800e47a: 701a strb r2, [r3, #0]
}
if (fs) {
800e47c: 68fb ldr r3, [r7, #12]
800e47e: 2b00 cmp r3, #0
800e480: d00f beq.n 800e4a2 <f_mount+0x7e>
fs->fs_type = 0; /* Clear new fs object */
800e482: 68fb ldr r3, [r7, #12]
800e484: 2200 movs r2, #0
800e486: 701a strb r2, [r3, #0]
#if _FS_REENTRANT /* Create sync object for the new volume */
if (!ff_cre_syncobj((BYTE)vol, &fs->sobj)) return FR_INT_ERR;
800e488: 69fb ldr r3, [r7, #28]
800e48a: b2da uxtb r2, r3
800e48c: 68fb ldr r3, [r7, #12]
800e48e: 330c adds r3, #12
800e490: 4619 mov r1, r3
800e492: 4610 mov r0, r2
800e494: f001 fb43 bl 800fb1e <ff_cre_syncobj>
800e498: 4603 mov r3, r0
800e49a: 2b00 cmp r3, #0
800e49c: d101 bne.n 800e4a2 <f_mount+0x7e>
800e49e: 2302 movs r3, #2
800e4a0: e01d b.n 800e4de <f_mount+0xba>
#endif
}
FatFs[vol] = fs; /* Register new fs object */
800e4a2: 68fa ldr r2, [r7, #12]
800e4a4: 4910 ldr r1, [pc, #64] @ (800e4e8 <f_mount+0xc4>)
800e4a6: 69fb ldr r3, [r7, #28]
800e4a8: f841 2023 str.w r2, [r1, r3, lsl #2]
if (!fs || opt != 1) return FR_OK; /* Do not mount now, it will be mounted later */
800e4ac: 68fb ldr r3, [r7, #12]
800e4ae: 2b00 cmp r3, #0
800e4b0: d002 beq.n 800e4b8 <f_mount+0x94>
800e4b2: 79fb ldrb r3, [r7, #7]
800e4b4: 2b01 cmp r3, #1
800e4b6: d001 beq.n 800e4bc <f_mount+0x98>
800e4b8: 2300 movs r3, #0
800e4ba: e010 b.n 800e4de <f_mount+0xba>
res = find_volume(&path, &fs, 0); /* Force mounted the volume */
800e4bc: f107 010c add.w r1, r7, #12
800e4c0: f107 0308 add.w r3, r7, #8
800e4c4: 2200 movs r2, #0
800e4c6: 4618 mov r0, r3
800e4c8: f7ff fd10 bl 800deec <find_volume>
800e4cc: 4603 mov r3, r0
800e4ce: 75fb strb r3, [r7, #23]
LEAVE_FF(fs, res);
800e4d0: 68fb ldr r3, [r7, #12]
800e4d2: 7dfa ldrb r2, [r7, #23]
800e4d4: 4611 mov r1, r2
800e4d6: 4618 mov r0, r3
800e4d8: f7fe fba2 bl 800cc20 <unlock_fs>
800e4dc: 7dfb ldrb r3, [r7, #23]
}
800e4de: 4618 mov r0, r3
800e4e0: 3720 adds r7, #32
800e4e2: 46bd mov sp, r7
800e4e4: bd80 pop {r7, pc}
800e4e6: bf00 nop
800e4e8: 20010124 .word 0x20010124
0800e4ec <f_open>:
FRESULT f_open (
FIL* fp, /* Pointer to the blank file object */
const TCHAR* path, /* Pointer to the file name */
BYTE mode /* Access mode and file open mode flags */
)
{
800e4ec: b580 push {r7, lr}
800e4ee: b098 sub sp, #96 @ 0x60
800e4f0: af00 add r7, sp, #0
800e4f2: 60f8 str r0, [r7, #12]
800e4f4: 60b9 str r1, [r7, #8]
800e4f6: 4613 mov r3, r2
800e4f8: 71fb strb r3, [r7, #7]
FSIZE_t ofs;
#endif
DEF_NAMBUF
if (!fp) return FR_INVALID_OBJECT;
800e4fa: 68fb ldr r3, [r7, #12]
800e4fc: 2b00 cmp r3, #0
800e4fe: d101 bne.n 800e504 <f_open+0x18>
800e500: 2309 movs r3, #9
800e502: e1b0 b.n 800e866 <f_open+0x37a>
/* Get logical drive */
mode &= _FS_READONLY ? FA_READ : FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_CREATE_NEW | FA_OPEN_ALWAYS | FA_OPEN_APPEND | FA_SEEKEND;
800e504: 79fb ldrb r3, [r7, #7]
800e506: f003 033f and.w r3, r3, #63 @ 0x3f
800e50a: 71fb strb r3, [r7, #7]
res = find_volume(&path, &fs, mode);
800e50c: 79fa ldrb r2, [r7, #7]
800e50e: f107 0110 add.w r1, r7, #16
800e512: f107 0308 add.w r3, r7, #8
800e516: 4618 mov r0, r3
800e518: f7ff fce8 bl 800deec <find_volume>
800e51c: 4603 mov r3, r0
800e51e: f887 305f strb.w r3, [r7, #95] @ 0x5f
if (res == FR_OK) {
800e522: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800e526: 2b00 cmp r3, #0
800e528: f040 818d bne.w 800e846 <f_open+0x35a>
dj.obj.fs = fs;
800e52c: 693b ldr r3, [r7, #16]
800e52e: 617b str r3, [r7, #20]
INIT_NAMBUF(fs);
res = follow_path(&dj, path); /* Follow the file path */
800e530: 68ba ldr r2, [r7, #8]
800e532: f107 0314 add.w r3, r7, #20
800e536: 4611 mov r1, r2
800e538: 4618 mov r0, r3
800e53a: f7ff fbcb bl 800dcd4 <follow_path>
800e53e: 4603 mov r3, r0
800e540: f887 305f strb.w r3, [r7, #95] @ 0x5f
#if !_FS_READONLY /* R/W configuration */
if (res == FR_OK) {
800e544: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800e548: 2b00 cmp r3, #0
800e54a: d118 bne.n 800e57e <f_open+0x92>
if (dj.fn[NSFLAG] & NS_NONAME) { /* Origin directory itself? */
800e54c: f897 3043 ldrb.w r3, [r7, #67] @ 0x43
800e550: b25b sxtb r3, r3
800e552: 2b00 cmp r3, #0
800e554: da03 bge.n 800e55e <f_open+0x72>
res = FR_INVALID_NAME;
800e556: 2306 movs r3, #6
800e558: f887 305f strb.w r3, [r7, #95] @ 0x5f
800e55c: e00f b.n 800e57e <f_open+0x92>
}
#if _FS_LOCK != 0
else {
res = chk_lock(&dj, (mode & ~FA_READ) ? 1 : 0);
800e55e: 79fb ldrb r3, [r7, #7]
800e560: 2b01 cmp r3, #1
800e562: bf8c ite hi
800e564: 2301 movhi r3, #1
800e566: 2300 movls r3, #0
800e568: b2db uxtb r3, r3
800e56a: 461a mov r2, r3
800e56c: f107 0314 add.w r3, r7, #20
800e570: 4611 mov r1, r2
800e572: 4618 mov r0, r3
800e574: f7fe fb70 bl 800cc58 <chk_lock>
800e578: 4603 mov r3, r0
800e57a: f887 305f strb.w r3, [r7, #95] @ 0x5f
}
#endif
}
/* Create or Open a file */
if (mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) {
800e57e: 79fb ldrb r3, [r7, #7]
800e580: f003 031c and.w r3, r3, #28
800e584: 2b00 cmp r3, #0
800e586: d07f beq.n 800e688 <f_open+0x19c>
if (res != FR_OK) { /* No file, create new */
800e588: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800e58c: 2b00 cmp r3, #0
800e58e: d017 beq.n 800e5c0 <f_open+0xd4>
if (res == FR_NO_FILE) { /* There is no file to open, create a new entry */
800e590: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800e594: 2b04 cmp r3, #4
800e596: d10e bne.n 800e5b6 <f_open+0xca>
#if _FS_LOCK != 0
res = enq_lock() ? dir_register(&dj) : FR_TOO_MANY_OPEN_FILES;
800e598: f7fe fbba bl 800cd10 <enq_lock>
800e59c: 4603 mov r3, r0
800e59e: 2b00 cmp r3, #0
800e5a0: d006 beq.n 800e5b0 <f_open+0xc4>
800e5a2: f107 0314 add.w r3, r7, #20
800e5a6: 4618 mov r0, r3
800e5a8: f7ff facd bl 800db46 <dir_register>
800e5ac: 4603 mov r3, r0
800e5ae: e000 b.n 800e5b2 <f_open+0xc6>
800e5b0: 2312 movs r3, #18
800e5b2: f887 305f strb.w r3, [r7, #95] @ 0x5f
#else
res = dir_register(&dj);
#endif
}
mode |= FA_CREATE_ALWAYS; /* File is created */
800e5b6: 79fb ldrb r3, [r7, #7]
800e5b8: f043 0308 orr.w r3, r3, #8
800e5bc: 71fb strb r3, [r7, #7]
800e5be: e010 b.n 800e5e2 <f_open+0xf6>
}
else { /* Any object is already existing */
if (dj.obj.attr & (AM_RDO | AM_DIR)) { /* Cannot overwrite it (R/O or DIR) */
800e5c0: 7ebb ldrb r3, [r7, #26]
800e5c2: f003 0311 and.w r3, r3, #17
800e5c6: 2b00 cmp r3, #0
800e5c8: d003 beq.n 800e5d2 <f_open+0xe6>
res = FR_DENIED;
800e5ca: 2307 movs r3, #7
800e5cc: f887 305f strb.w r3, [r7, #95] @ 0x5f
800e5d0: e007 b.n 800e5e2 <f_open+0xf6>
} else {
if (mode & FA_CREATE_NEW) res = FR_EXIST; /* Cannot create as new file */
800e5d2: 79fb ldrb r3, [r7, #7]
800e5d4: f003 0304 and.w r3, r3, #4
800e5d8: 2b00 cmp r3, #0
800e5da: d002 beq.n 800e5e2 <f_open+0xf6>
800e5dc: 2308 movs r3, #8
800e5de: f887 305f strb.w r3, [r7, #95] @ 0x5f
}
}
if (res == FR_OK && (mode & FA_CREATE_ALWAYS)) { /* Truncate it if overwrite mode */
800e5e2: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800e5e6: 2b00 cmp r3, #0
800e5e8: d168 bne.n 800e6bc <f_open+0x1d0>
800e5ea: 79fb ldrb r3, [r7, #7]
800e5ec: f003 0308 and.w r3, r3, #8
800e5f0: 2b00 cmp r3, #0
800e5f2: d063 beq.n 800e6bc <f_open+0x1d0>
dw = GET_FATTIME();
800e5f4: f7fa fc5a bl 8008eac <get_fattime>
800e5f8: 6538 str r0, [r7, #80] @ 0x50
}
} else
#endif
{
/* Clean directory info */
st_dword(dj.dir + DIR_CrtTime, dw); /* Set created time */
800e5fa: 6b7b ldr r3, [r7, #52] @ 0x34
800e5fc: 330e adds r3, #14
800e5fe: 6d39 ldr r1, [r7, #80] @ 0x50
800e600: 4618 mov r0, r3
800e602: f7fe fa4d bl 800caa0 <st_dword>
st_dword(dj.dir + DIR_ModTime, dw); /* Set modified time */
800e606: 6b7b ldr r3, [r7, #52] @ 0x34
800e608: 3316 adds r3, #22
800e60a: 6d39 ldr r1, [r7, #80] @ 0x50
800e60c: 4618 mov r0, r3
800e60e: f7fe fa47 bl 800caa0 <st_dword>
dj.dir[DIR_Attr] = AM_ARC; /* Reset attribute */
800e612: 6b7b ldr r3, [r7, #52] @ 0x34
800e614: 330b adds r3, #11
800e616: 2220 movs r2, #32
800e618: 701a strb r2, [r3, #0]
cl = ld_clust(fs, dj.dir); /* Get cluster chain */
800e61a: 693b ldr r3, [r7, #16]
800e61c: 6b7a ldr r2, [r7, #52] @ 0x34
800e61e: 4611 mov r1, r2
800e620: 4618 mov r0, r3
800e622: f7ff f9fc bl 800da1e <ld_clust>
800e626: 64f8 str r0, [r7, #76] @ 0x4c
st_clust(fs, dj.dir, 0); /* Reset file allocation info */
800e628: 693b ldr r3, [r7, #16]
800e62a: 6b79 ldr r1, [r7, #52] @ 0x34
800e62c: 2200 movs r2, #0
800e62e: 4618 mov r0, r3
800e630: f7ff fa14 bl 800da5c <st_clust>
st_dword(dj.dir + DIR_FileSize, 0);
800e634: 6b7b ldr r3, [r7, #52] @ 0x34
800e636: 331c adds r3, #28
800e638: 2100 movs r1, #0
800e63a: 4618 mov r0, r3
800e63c: f7fe fa30 bl 800caa0 <st_dword>
fs->wflag = 1;
800e640: 693b ldr r3, [r7, #16]
800e642: 2201 movs r2, #1
800e644: 70da strb r2, [r3, #3]
if (cl) { /* Remove the cluster chain if exist */
800e646: 6cfb ldr r3, [r7, #76] @ 0x4c
800e648: 2b00 cmp r3, #0
800e64a: d037 beq.n 800e6bc <f_open+0x1d0>
dw = fs->winsect;
800e64c: 693b ldr r3, [r7, #16]
800e64e: 6b1b ldr r3, [r3, #48] @ 0x30
800e650: 653b str r3, [r7, #80] @ 0x50
res = remove_chain(&dj.obj, cl, 0);
800e652: f107 0314 add.w r3, r7, #20
800e656: 2200 movs r2, #0
800e658: 6cf9 ldr r1, [r7, #76] @ 0x4c
800e65a: 4618 mov r0, r3
800e65c: f7fe fef8 bl 800d450 <remove_chain>
800e660: 4603 mov r3, r0
800e662: f887 305f strb.w r3, [r7, #95] @ 0x5f
if (res == FR_OK) {
800e666: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800e66a: 2b00 cmp r3, #0
800e66c: d126 bne.n 800e6bc <f_open+0x1d0>
res = move_window(fs, dw);
800e66e: 693b ldr r3, [r7, #16]
800e670: 6d39 ldr r1, [r7, #80] @ 0x50
800e672: 4618 mov r0, r3
800e674: f7fe fca0 bl 800cfb8 <move_window>
800e678: 4603 mov r3, r0
800e67a: f887 305f strb.w r3, [r7, #95] @ 0x5f
fs->last_clst = cl - 1; /* Reuse the cluster hole */
800e67e: 693b ldr r3, [r7, #16]
800e680: 6cfa ldr r2, [r7, #76] @ 0x4c
800e682: 3a01 subs r2, #1
800e684: 611a str r2, [r3, #16]
800e686: e019 b.n 800e6bc <f_open+0x1d0>
}
}
}
}
else { /* Open an existing file */
if (res == FR_OK) { /* Following succeeded */
800e688: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800e68c: 2b00 cmp r3, #0
800e68e: d115 bne.n 800e6bc <f_open+0x1d0>
if (dj.obj.attr & AM_DIR) { /* It is a directory */
800e690: 7ebb ldrb r3, [r7, #26]
800e692: f003 0310 and.w r3, r3, #16
800e696: 2b00 cmp r3, #0
800e698: d003 beq.n 800e6a2 <f_open+0x1b6>
res = FR_NO_FILE;
800e69a: 2304 movs r3, #4
800e69c: f887 305f strb.w r3, [r7, #95] @ 0x5f
800e6a0: e00c b.n 800e6bc <f_open+0x1d0>
} else {
if ((mode & FA_WRITE) && (dj.obj.attr & AM_RDO)) { /* R/O violation */
800e6a2: 79fb ldrb r3, [r7, #7]
800e6a4: f003 0302 and.w r3, r3, #2
800e6a8: 2b00 cmp r3, #0
800e6aa: d007 beq.n 800e6bc <f_open+0x1d0>
800e6ac: 7ebb ldrb r3, [r7, #26]
800e6ae: f003 0301 and.w r3, r3, #1
800e6b2: 2b00 cmp r3, #0
800e6b4: d002 beq.n 800e6bc <f_open+0x1d0>
res = FR_DENIED;
800e6b6: 2307 movs r3, #7
800e6b8: f887 305f strb.w r3, [r7, #95] @ 0x5f
}
}
}
}
if (res == FR_OK) {
800e6bc: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800e6c0: 2b00 cmp r3, #0
800e6c2: d126 bne.n 800e712 <f_open+0x226>
if (mode & FA_CREATE_ALWAYS) /* Set file change flag if created or overwritten */
800e6c4: 79fb ldrb r3, [r7, #7]
800e6c6: f003 0308 and.w r3, r3, #8
800e6ca: 2b00 cmp r3, #0
800e6cc: d003 beq.n 800e6d6 <f_open+0x1ea>
mode |= FA_MODIFIED;
800e6ce: 79fb ldrb r3, [r7, #7]
800e6d0: f043 0340 orr.w r3, r3, #64 @ 0x40
800e6d4: 71fb strb r3, [r7, #7]
fp->dir_sect = fs->winsect; /* Pointer to the directory entry */
800e6d6: 693b ldr r3, [r7, #16]
800e6d8: 6b1a ldr r2, [r3, #48] @ 0x30
800e6da: 68fb ldr r3, [r7, #12]
800e6dc: 625a str r2, [r3, #36] @ 0x24
fp->dir_ptr = dj.dir;
800e6de: 6b7a ldr r2, [r7, #52] @ 0x34
800e6e0: 68fb ldr r3, [r7, #12]
800e6e2: 629a str r2, [r3, #40] @ 0x28
#if _FS_LOCK != 0
fp->obj.lockid = inc_lock(&dj, (mode & ~FA_READ) ? 1 : 0);
800e6e4: 79fb ldrb r3, [r7, #7]
800e6e6: 2b01 cmp r3, #1
800e6e8: bf8c ite hi
800e6ea: 2301 movhi r3, #1
800e6ec: 2300 movls r3, #0
800e6ee: b2db uxtb r3, r3
800e6f0: 461a mov r2, r3
800e6f2: f107 0314 add.w r3, r7, #20
800e6f6: 4611 mov r1, r2
800e6f8: 4618 mov r0, r3
800e6fa: f7fe fb2b bl 800cd54 <inc_lock>
800e6fe: 4602 mov r2, r0
800e700: 68fb ldr r3, [r7, #12]
800e702: 611a str r2, [r3, #16]
if (!fp->obj.lockid) res = FR_INT_ERR;
800e704: 68fb ldr r3, [r7, #12]
800e706: 691b ldr r3, [r3, #16]
800e708: 2b00 cmp r3, #0
800e70a: d102 bne.n 800e712 <f_open+0x226>
800e70c: 2302 movs r3, #2
800e70e: f887 305f strb.w r3, [r7, #95] @ 0x5f
}
}
}
#endif
if (res == FR_OK) {
800e712: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800e716: 2b00 cmp r3, #0
800e718: f040 8095 bne.w 800e846 <f_open+0x35a>
fp->obj.objsize = ld_qword(fs->dirbuf + XDIR_FileSize);
fp->obj.stat = fs->dirbuf[XDIR_GenFlags] & 2;
} else
#endif
{
fp->obj.sclust = ld_clust(fs, dj.dir); /* Get object allocation info */
800e71c: 693b ldr r3, [r7, #16]
800e71e: 6b7a ldr r2, [r7, #52] @ 0x34
800e720: 4611 mov r1, r2
800e722: 4618 mov r0, r3
800e724: f7ff f97b bl 800da1e <ld_clust>
800e728: 4602 mov r2, r0
800e72a: 68fb ldr r3, [r7, #12]
800e72c: 609a str r2, [r3, #8]
fp->obj.objsize = ld_dword(dj.dir + DIR_FileSize);
800e72e: 6b7b ldr r3, [r7, #52] @ 0x34
800e730: 331c adds r3, #28
800e732: 4618 mov r0, r3
800e734: f7fe f976 bl 800ca24 <ld_dword>
800e738: 4602 mov r2, r0
800e73a: 68fb ldr r3, [r7, #12]
800e73c: 60da str r2, [r3, #12]
}
#if _USE_FASTSEEK
fp->cltbl = 0; /* Disable fast seek mode */
800e73e: 68fb ldr r3, [r7, #12]
800e740: 2200 movs r2, #0
800e742: 62da str r2, [r3, #44] @ 0x2c
#endif
fp->obj.fs = fs; /* Validate the file object */
800e744: 693a ldr r2, [r7, #16]
800e746: 68fb ldr r3, [r7, #12]
800e748: 601a str r2, [r3, #0]
fp->obj.id = fs->id;
800e74a: 693b ldr r3, [r7, #16]
800e74c: 88da ldrh r2, [r3, #6]
800e74e: 68fb ldr r3, [r7, #12]
800e750: 809a strh r2, [r3, #4]
fp->flag = mode; /* Set file access mode */
800e752: 68fb ldr r3, [r7, #12]
800e754: 79fa ldrb r2, [r7, #7]
800e756: 751a strb r2, [r3, #20]
fp->err = 0; /* Clear error flag */
800e758: 68fb ldr r3, [r7, #12]
800e75a: 2200 movs r2, #0
800e75c: 755a strb r2, [r3, #21]
fp->sect = 0; /* Invalidate current data sector */
800e75e: 68fb ldr r3, [r7, #12]
800e760: 2200 movs r2, #0
800e762: 621a str r2, [r3, #32]
fp->fptr = 0; /* Set file pointer top of the file */
800e764: 68fb ldr r3, [r7, #12]
800e766: 2200 movs r2, #0
800e768: 619a str r2, [r3, #24]
#if !_FS_READONLY
#if !_FS_TINY
mem_set(fp->buf, 0, _MAX_SS); /* Clear sector buffer */
800e76a: 68fb ldr r3, [r7, #12]
800e76c: 3330 adds r3, #48 @ 0x30
800e76e: f44f 7200 mov.w r2, #512 @ 0x200
800e772: 2100 movs r1, #0
800e774: 4618 mov r0, r3
800e776: f7fe f9e0 bl 800cb3a <mem_set>
#endif
if ((mode & FA_SEEKEND) && fp->obj.objsize > 0) { /* Seek to end of file if FA_OPEN_APPEND is specified */
800e77a: 79fb ldrb r3, [r7, #7]
800e77c: f003 0320 and.w r3, r3, #32
800e780: 2b00 cmp r3, #0
800e782: d060 beq.n 800e846 <f_open+0x35a>
800e784: 68fb ldr r3, [r7, #12]
800e786: 68db ldr r3, [r3, #12]
800e788: 2b00 cmp r3, #0
800e78a: d05c beq.n 800e846 <f_open+0x35a>
fp->fptr = fp->obj.objsize; /* Offset to seek */
800e78c: 68fb ldr r3, [r7, #12]
800e78e: 68da ldr r2, [r3, #12]
800e790: 68fb ldr r3, [r7, #12]
800e792: 619a str r2, [r3, #24]
bcs = (DWORD)fs->csize * SS(fs); /* Cluster size in byte */
800e794: 693b ldr r3, [r7, #16]
800e796: 895b ldrh r3, [r3, #10]
800e798: 025b lsls r3, r3, #9
800e79a: 64bb str r3, [r7, #72] @ 0x48
clst = fp->obj.sclust; /* Follow the cluster chain */
800e79c: 68fb ldr r3, [r7, #12]
800e79e: 689b ldr r3, [r3, #8]
800e7a0: 65bb str r3, [r7, #88] @ 0x58
for (ofs = fp->obj.objsize; res == FR_OK && ofs > bcs; ofs -= bcs) {
800e7a2: 68fb ldr r3, [r7, #12]
800e7a4: 68db ldr r3, [r3, #12]
800e7a6: 657b str r3, [r7, #84] @ 0x54
800e7a8: e016 b.n 800e7d8 <f_open+0x2ec>
clst = get_fat(&fp->obj, clst);
800e7aa: 68fb ldr r3, [r7, #12]
800e7ac: 6db9 ldr r1, [r7, #88] @ 0x58
800e7ae: 4618 mov r0, r3
800e7b0: f7fe fcbd bl 800d12e <get_fat>
800e7b4: 65b8 str r0, [r7, #88] @ 0x58
if (clst <= 1) res = FR_INT_ERR;
800e7b6: 6dbb ldr r3, [r7, #88] @ 0x58
800e7b8: 2b01 cmp r3, #1
800e7ba: d802 bhi.n 800e7c2 <f_open+0x2d6>
800e7bc: 2302 movs r3, #2
800e7be: f887 305f strb.w r3, [r7, #95] @ 0x5f
if (clst == 0xFFFFFFFF) res = FR_DISK_ERR;
800e7c2: 6dbb ldr r3, [r7, #88] @ 0x58
800e7c4: f1b3 3fff cmp.w r3, #4294967295
800e7c8: d102 bne.n 800e7d0 <f_open+0x2e4>
800e7ca: 2301 movs r3, #1
800e7cc: f887 305f strb.w r3, [r7, #95] @ 0x5f
for (ofs = fp->obj.objsize; res == FR_OK && ofs > bcs; ofs -= bcs) {
800e7d0: 6d7a ldr r2, [r7, #84] @ 0x54
800e7d2: 6cbb ldr r3, [r7, #72] @ 0x48
800e7d4: 1ad3 subs r3, r2, r3
800e7d6: 657b str r3, [r7, #84] @ 0x54
800e7d8: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800e7dc: 2b00 cmp r3, #0
800e7de: d103 bne.n 800e7e8 <f_open+0x2fc>
800e7e0: 6d7a ldr r2, [r7, #84] @ 0x54
800e7e2: 6cbb ldr r3, [r7, #72] @ 0x48
800e7e4: 429a cmp r2, r3
800e7e6: d8e0 bhi.n 800e7aa <f_open+0x2be>
}
fp->clust = clst;
800e7e8: 68fb ldr r3, [r7, #12]
800e7ea: 6dba ldr r2, [r7, #88] @ 0x58
800e7ec: 61da str r2, [r3, #28]
if (res == FR_OK && ofs % SS(fs)) { /* Fill sector buffer if not on the sector boundary */
800e7ee: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800e7f2: 2b00 cmp r3, #0
800e7f4: d127 bne.n 800e846 <f_open+0x35a>
800e7f6: 6d7b ldr r3, [r7, #84] @ 0x54
800e7f8: f3c3 0308 ubfx r3, r3, #0, #9
800e7fc: 2b00 cmp r3, #0
800e7fe: d022 beq.n 800e846 <f_open+0x35a>
if ((sc = clust2sect(fs, clst)) == 0) {
800e800: 693b ldr r3, [r7, #16]
800e802: 6db9 ldr r1, [r7, #88] @ 0x58
800e804: 4618 mov r0, r3
800e806: f7fe fc73 bl 800d0f0 <clust2sect>
800e80a: 6478 str r0, [r7, #68] @ 0x44
800e80c: 6c7b ldr r3, [r7, #68] @ 0x44
800e80e: 2b00 cmp r3, #0
800e810: d103 bne.n 800e81a <f_open+0x32e>
res = FR_INT_ERR;
800e812: 2302 movs r3, #2
800e814: f887 305f strb.w r3, [r7, #95] @ 0x5f
800e818: e015 b.n 800e846 <f_open+0x35a>
} else {
fp->sect = sc + (DWORD)(ofs / SS(fs));
800e81a: 6d7b ldr r3, [r7, #84] @ 0x54
800e81c: 0a5a lsrs r2, r3, #9
800e81e: 6c7b ldr r3, [r7, #68] @ 0x44
800e820: 441a add r2, r3
800e822: 68fb ldr r3, [r7, #12]
800e824: 621a str r2, [r3, #32]
#if !_FS_TINY
if (disk_read(fs->drv, fp->buf, fp->sect, 1) != RES_OK) res = FR_DISK_ERR;
800e826: 693b ldr r3, [r7, #16]
800e828: 7858 ldrb r0, [r3, #1]
800e82a: 68fb ldr r3, [r7, #12]
800e82c: f103 0130 add.w r1, r3, #48 @ 0x30
800e830: 68fb ldr r3, [r7, #12]
800e832: 6a1a ldr r2, [r3, #32]
800e834: 2301 movs r3, #1
800e836: f7fe f87f bl 800c938 <disk_read>
800e83a: 4603 mov r3, r0
800e83c: 2b00 cmp r3, #0
800e83e: d002 beq.n 800e846 <f_open+0x35a>
800e840: 2301 movs r3, #1
800e842: f887 305f strb.w r3, [r7, #95] @ 0x5f
}
FREE_NAMBUF();
}
if (res != FR_OK) fp->obj.fs = 0; /* Invalidate file object on error */
800e846: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800e84a: 2b00 cmp r3, #0
800e84c: d002 beq.n 800e854 <f_open+0x368>
800e84e: 68fb ldr r3, [r7, #12]
800e850: 2200 movs r2, #0
800e852: 601a str r2, [r3, #0]
LEAVE_FF(fs, res);
800e854: 693b ldr r3, [r7, #16]
800e856: f897 205f ldrb.w r2, [r7, #95] @ 0x5f
800e85a: 4611 mov r1, r2
800e85c: 4618 mov r0, r3
800e85e: f7fe f9df bl 800cc20 <unlock_fs>
800e862: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
}
800e866: 4618 mov r0, r3
800e868: 3760 adds r7, #96 @ 0x60
800e86a: 46bd mov sp, r7
800e86c: bd80 pop {r7, pc}
0800e86e <f_write>:
FIL* fp, /* Pointer to the file object */
const void* buff, /* Pointer to the data to be written */
UINT btw, /* Number of bytes to write */
UINT* bw /* Pointer to number of bytes written */
)
{
800e86e: b580 push {r7, lr}
800e870: b08c sub sp, #48 @ 0x30
800e872: af00 add r7, sp, #0
800e874: 60f8 str r0, [r7, #12]
800e876: 60b9 str r1, [r7, #8]
800e878: 607a str r2, [r7, #4]
800e87a: 603b str r3, [r7, #0]
FRESULT res;
FATFS *fs;
DWORD clst, sect;
UINT wcnt, cc, csect;
const BYTE *wbuff = (const BYTE*)buff;
800e87c: 68bb ldr r3, [r7, #8]
800e87e: 61fb str r3, [r7, #28]
*bw = 0; /* Clear write byte counter */
800e880: 683b ldr r3, [r7, #0]
800e882: 2200 movs r2, #0
800e884: 601a str r2, [r3, #0]
res = validate(&fp->obj, &fs); /* Check validity of the file object */
800e886: 68fb ldr r3, [r7, #12]
800e888: f107 0210 add.w r2, r7, #16
800e88c: 4611 mov r1, r2
800e88e: 4618 mov r0, r3
800e890: f7ff fd80 bl 800e394 <validate>
800e894: 4603 mov r3, r0
800e896: f887 302f strb.w r3, [r7, #47] @ 0x2f
if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); /* Check validity */
800e89a: f897 302f ldrb.w r3, [r7, #47] @ 0x2f
800e89e: 2b00 cmp r3, #0
800e8a0: d107 bne.n 800e8b2 <f_write+0x44>
800e8a2: 68fb ldr r3, [r7, #12]
800e8a4: 7d5b ldrb r3, [r3, #21]
800e8a6: f887 302f strb.w r3, [r7, #47] @ 0x2f
800e8aa: f897 302f ldrb.w r3, [r7, #47] @ 0x2f
800e8ae: 2b00 cmp r3, #0
800e8b0: d009 beq.n 800e8c6 <f_write+0x58>
800e8b2: 693b ldr r3, [r7, #16]
800e8b4: f897 202f ldrb.w r2, [r7, #47] @ 0x2f
800e8b8: 4611 mov r1, r2
800e8ba: 4618 mov r0, r3
800e8bc: f7fe f9b0 bl 800cc20 <unlock_fs>
800e8c0: f897 302f ldrb.w r3, [r7, #47] @ 0x2f
800e8c4: e173 b.n 800ebae <f_write+0x340>
if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */
800e8c6: 68fb ldr r3, [r7, #12]
800e8c8: 7d1b ldrb r3, [r3, #20]
800e8ca: f003 0302 and.w r3, r3, #2
800e8ce: 2b00 cmp r3, #0
800e8d0: d106 bne.n 800e8e0 <f_write+0x72>
800e8d2: 693b ldr r3, [r7, #16]
800e8d4: 2107 movs r1, #7
800e8d6: 4618 mov r0, r3
800e8d8: f7fe f9a2 bl 800cc20 <unlock_fs>
800e8dc: 2307 movs r3, #7
800e8de: e166 b.n 800ebae <f_write+0x340>
/* Check fptr wrap-around (file size cannot reach 4GiB on FATxx) */
if ((!_FS_EXFAT || fs->fs_type != FS_EXFAT) && (DWORD)(fp->fptr + btw) < (DWORD)fp->fptr) {
800e8e0: 68fb ldr r3, [r7, #12]
800e8e2: 699a ldr r2, [r3, #24]
800e8e4: 687b ldr r3, [r7, #4]
800e8e6: 441a add r2, r3
800e8e8: 68fb ldr r3, [r7, #12]
800e8ea: 699b ldr r3, [r3, #24]
800e8ec: 429a cmp r2, r3
800e8ee: f080 814b bcs.w 800eb88 <f_write+0x31a>
btw = (UINT)(0xFFFFFFFF - (DWORD)fp->fptr);
800e8f2: 68fb ldr r3, [r7, #12]
800e8f4: 699b ldr r3, [r3, #24]
800e8f6: 43db mvns r3, r3
800e8f8: 607b str r3, [r7, #4]
}
for ( ; btw; /* Repeat until all data written */
800e8fa: e145 b.n 800eb88 <f_write+0x31a>
wbuff += wcnt, fp->fptr += wcnt, fp->obj.objsize = (fp->fptr > fp->obj.objsize) ? fp->fptr : fp->obj.objsize, *bw += wcnt, btw -= wcnt) {
if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */
800e8fc: 68fb ldr r3, [r7, #12]
800e8fe: 699b ldr r3, [r3, #24]
800e900: f3c3 0308 ubfx r3, r3, #0, #9
800e904: 2b00 cmp r3, #0
800e906: f040 8101 bne.w 800eb0c <f_write+0x29e>
csect = (UINT)(fp->fptr / SS(fs)) & (fs->csize - 1); /* Sector offset in the cluster */
800e90a: 68fb ldr r3, [r7, #12]
800e90c: 699b ldr r3, [r3, #24]
800e90e: 0a5b lsrs r3, r3, #9
800e910: 693a ldr r2, [r7, #16]
800e912: 8952 ldrh r2, [r2, #10]
800e914: 3a01 subs r2, #1
800e916: 4013 ands r3, r2
800e918: 61bb str r3, [r7, #24]
if (csect == 0) { /* On the cluster boundary? */
800e91a: 69bb ldr r3, [r7, #24]
800e91c: 2b00 cmp r3, #0
800e91e: d14d bne.n 800e9bc <f_write+0x14e>
if (fp->fptr == 0) { /* On the top of the file? */
800e920: 68fb ldr r3, [r7, #12]
800e922: 699b ldr r3, [r3, #24]
800e924: 2b00 cmp r3, #0
800e926: d10c bne.n 800e942 <f_write+0xd4>
clst = fp->obj.sclust; /* Follow from the origin */
800e928: 68fb ldr r3, [r7, #12]
800e92a: 689b ldr r3, [r3, #8]
800e92c: 62bb str r3, [r7, #40] @ 0x28
if (clst == 0) { /* If no cluster is allocated, */
800e92e: 6abb ldr r3, [r7, #40] @ 0x28
800e930: 2b00 cmp r3, #0
800e932: d11a bne.n 800e96a <f_write+0xfc>
clst = create_chain(&fp->obj, 0); /* create a new cluster chain */
800e934: 68fb ldr r3, [r7, #12]
800e936: 2100 movs r1, #0
800e938: 4618 mov r0, r3
800e93a: f7fe fe1d bl 800d578 <create_chain>
800e93e: 62b8 str r0, [r7, #40] @ 0x28
800e940: e013 b.n 800e96a <f_write+0xfc>
}
} else { /* On the middle or end of the file */
#if _USE_FASTSEEK
if (fp->cltbl) {
800e942: 68fb ldr r3, [r7, #12]
800e944: 6adb ldr r3, [r3, #44] @ 0x2c
800e946: 2b00 cmp r3, #0
800e948: d007 beq.n 800e95a <f_write+0xec>
clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */
800e94a: 68fb ldr r3, [r7, #12]
800e94c: 699b ldr r3, [r3, #24]
800e94e: 4619 mov r1, r3
800e950: 68f8 ldr r0, [r7, #12]
800e952: f7fe fea9 bl 800d6a8 <clmt_clust>
800e956: 62b8 str r0, [r7, #40] @ 0x28
800e958: e007 b.n 800e96a <f_write+0xfc>
} else
#endif
{
clst = create_chain(&fp->obj, fp->clust); /* Follow or stretch cluster chain on the FAT */
800e95a: 68fa ldr r2, [r7, #12]
800e95c: 68fb ldr r3, [r7, #12]
800e95e: 69db ldr r3, [r3, #28]
800e960: 4619 mov r1, r3
800e962: 4610 mov r0, r2
800e964: f7fe fe08 bl 800d578 <create_chain>
800e968: 62b8 str r0, [r7, #40] @ 0x28
}
}
if (clst == 0) break; /* Could not allocate a new cluster (disk full) */
800e96a: 6abb ldr r3, [r7, #40] @ 0x28
800e96c: 2b00 cmp r3, #0
800e96e: f000 8110 beq.w 800eb92 <f_write+0x324>
if (clst == 1) ABORT(fs, FR_INT_ERR);
800e972: 6abb ldr r3, [r7, #40] @ 0x28
800e974: 2b01 cmp r3, #1
800e976: d109 bne.n 800e98c <f_write+0x11e>
800e978: 68fb ldr r3, [r7, #12]
800e97a: 2202 movs r2, #2
800e97c: 755a strb r2, [r3, #21]
800e97e: 693b ldr r3, [r7, #16]
800e980: 2102 movs r1, #2
800e982: 4618 mov r0, r3
800e984: f7fe f94c bl 800cc20 <unlock_fs>
800e988: 2302 movs r3, #2
800e98a: e110 b.n 800ebae <f_write+0x340>
if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR);
800e98c: 6abb ldr r3, [r7, #40] @ 0x28
800e98e: f1b3 3fff cmp.w r3, #4294967295
800e992: d109 bne.n 800e9a8 <f_write+0x13a>
800e994: 68fb ldr r3, [r7, #12]
800e996: 2201 movs r2, #1
800e998: 755a strb r2, [r3, #21]
800e99a: 693b ldr r3, [r7, #16]
800e99c: 2101 movs r1, #1
800e99e: 4618 mov r0, r3
800e9a0: f7fe f93e bl 800cc20 <unlock_fs>
800e9a4: 2301 movs r3, #1
800e9a6: e102 b.n 800ebae <f_write+0x340>
fp->clust = clst; /* Update current cluster */
800e9a8: 68fb ldr r3, [r7, #12]
800e9aa: 6aba ldr r2, [r7, #40] @ 0x28
800e9ac: 61da str r2, [r3, #28]
if (fp->obj.sclust == 0) fp->obj.sclust = clst; /* Set start cluster if the first write */
800e9ae: 68fb ldr r3, [r7, #12]
800e9b0: 689b ldr r3, [r3, #8]
800e9b2: 2b00 cmp r3, #0
800e9b4: d102 bne.n 800e9bc <f_write+0x14e>
800e9b6: 68fb ldr r3, [r7, #12]
800e9b8: 6aba ldr r2, [r7, #40] @ 0x28
800e9ba: 609a str r2, [r3, #8]
}
#if _FS_TINY
if (fs->winsect == fp->sect && sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Write-back sector cache */
#else
if (fp->flag & FA_DIRTY) { /* Write-back sector cache */
800e9bc: 68fb ldr r3, [r7, #12]
800e9be: 7d1b ldrb r3, [r3, #20]
800e9c0: b25b sxtb r3, r3
800e9c2: 2b00 cmp r3, #0
800e9c4: da1d bge.n 800ea02 <f_write+0x194>
if (disk_write(fs->drv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR);
800e9c6: 693b ldr r3, [r7, #16]
800e9c8: 7858 ldrb r0, [r3, #1]
800e9ca: 68fb ldr r3, [r7, #12]
800e9cc: f103 0130 add.w r1, r3, #48 @ 0x30
800e9d0: 68fb ldr r3, [r7, #12]
800e9d2: 6a1a ldr r2, [r3, #32]
800e9d4: 2301 movs r3, #1
800e9d6: f7fd ffcf bl 800c978 <disk_write>
800e9da: 4603 mov r3, r0
800e9dc: 2b00 cmp r3, #0
800e9de: d009 beq.n 800e9f4 <f_write+0x186>
800e9e0: 68fb ldr r3, [r7, #12]
800e9e2: 2201 movs r2, #1
800e9e4: 755a strb r2, [r3, #21]
800e9e6: 693b ldr r3, [r7, #16]
800e9e8: 2101 movs r1, #1
800e9ea: 4618 mov r0, r3
800e9ec: f7fe f918 bl 800cc20 <unlock_fs>
800e9f0: 2301 movs r3, #1
800e9f2: e0dc b.n 800ebae <f_write+0x340>
fp->flag &= (BYTE)~FA_DIRTY;
800e9f4: 68fb ldr r3, [r7, #12]
800e9f6: 7d1b ldrb r3, [r3, #20]
800e9f8: f003 037f and.w r3, r3, #127 @ 0x7f
800e9fc: b2da uxtb r2, r3
800e9fe: 68fb ldr r3, [r7, #12]
800ea00: 751a strb r2, [r3, #20]
}
#endif
sect = clust2sect(fs, fp->clust); /* Get current sector */
800ea02: 693a ldr r2, [r7, #16]
800ea04: 68fb ldr r3, [r7, #12]
800ea06: 69db ldr r3, [r3, #28]
800ea08: 4619 mov r1, r3
800ea0a: 4610 mov r0, r2
800ea0c: f7fe fb70 bl 800d0f0 <clust2sect>
800ea10: 6178 str r0, [r7, #20]
if (!sect) ABORT(fs, FR_INT_ERR);
800ea12: 697b ldr r3, [r7, #20]
800ea14: 2b00 cmp r3, #0
800ea16: d109 bne.n 800ea2c <f_write+0x1be>
800ea18: 68fb ldr r3, [r7, #12]
800ea1a: 2202 movs r2, #2
800ea1c: 755a strb r2, [r3, #21]
800ea1e: 693b ldr r3, [r7, #16]
800ea20: 2102 movs r1, #2
800ea22: 4618 mov r0, r3
800ea24: f7fe f8fc bl 800cc20 <unlock_fs>
800ea28: 2302 movs r3, #2
800ea2a: e0c0 b.n 800ebae <f_write+0x340>
sect += csect;
800ea2c: 697a ldr r2, [r7, #20]
800ea2e: 69bb ldr r3, [r7, #24]
800ea30: 4413 add r3, r2
800ea32: 617b str r3, [r7, #20]
cc = btw / SS(fs); /* When remaining bytes >= sector size, */
800ea34: 687b ldr r3, [r7, #4]
800ea36: 0a5b lsrs r3, r3, #9
800ea38: 623b str r3, [r7, #32]
if (cc) { /* Write maximum contiguous sectors directly */
800ea3a: 6a3b ldr r3, [r7, #32]
800ea3c: 2b00 cmp r3, #0
800ea3e: d041 beq.n 800eac4 <f_write+0x256>
if (csect + cc > fs->csize) { /* Clip at cluster boundary */
800ea40: 69ba ldr r2, [r7, #24]
800ea42: 6a3b ldr r3, [r7, #32]
800ea44: 4413 add r3, r2
800ea46: 693a ldr r2, [r7, #16]
800ea48: 8952 ldrh r2, [r2, #10]
800ea4a: 4293 cmp r3, r2
800ea4c: d905 bls.n 800ea5a <f_write+0x1ec>
cc = fs->csize - csect;
800ea4e: 693b ldr r3, [r7, #16]
800ea50: 895b ldrh r3, [r3, #10]
800ea52: 461a mov r2, r3
800ea54: 69bb ldr r3, [r7, #24]
800ea56: 1ad3 subs r3, r2, r3
800ea58: 623b str r3, [r7, #32]
}
if (disk_write(fs->drv, wbuff, sect, cc) != RES_OK) ABORT(fs, FR_DISK_ERR);
800ea5a: 693b ldr r3, [r7, #16]
800ea5c: 7858 ldrb r0, [r3, #1]
800ea5e: 6a3b ldr r3, [r7, #32]
800ea60: 697a ldr r2, [r7, #20]
800ea62: 69f9 ldr r1, [r7, #28]
800ea64: f7fd ff88 bl 800c978 <disk_write>
800ea68: 4603 mov r3, r0
800ea6a: 2b00 cmp r3, #0
800ea6c: d009 beq.n 800ea82 <f_write+0x214>
800ea6e: 68fb ldr r3, [r7, #12]
800ea70: 2201 movs r2, #1
800ea72: 755a strb r2, [r3, #21]
800ea74: 693b ldr r3, [r7, #16]
800ea76: 2101 movs r1, #1
800ea78: 4618 mov r0, r3
800ea7a: f7fe f8d1 bl 800cc20 <unlock_fs>
800ea7e: 2301 movs r3, #1
800ea80: e095 b.n 800ebae <f_write+0x340>
if (fs->winsect - sect < cc) { /* Refill sector cache if it gets invalidated by the direct write */
mem_cpy(fs->win, wbuff + ((fs->winsect - sect) * SS(fs)), SS(fs));
fs->wflag = 0;
}
#else
if (fp->sect - sect < cc) { /* Refill sector cache if it gets invalidated by the direct write */
800ea82: 68fb ldr r3, [r7, #12]
800ea84: 6a1a ldr r2, [r3, #32]
800ea86: 697b ldr r3, [r7, #20]
800ea88: 1ad3 subs r3, r2, r3
800ea8a: 6a3a ldr r2, [r7, #32]
800ea8c: 429a cmp r2, r3
800ea8e: d915 bls.n 800eabc <f_write+0x24e>
mem_cpy(fp->buf, wbuff + ((fp->sect - sect) * SS(fs)), SS(fs));
800ea90: 68fb ldr r3, [r7, #12]
800ea92: f103 0030 add.w r0, r3, #48 @ 0x30
800ea96: 68fb ldr r3, [r7, #12]
800ea98: 6a1a ldr r2, [r3, #32]
800ea9a: 697b ldr r3, [r7, #20]
800ea9c: 1ad3 subs r3, r2, r3
800ea9e: 025b lsls r3, r3, #9
800eaa0: 69fa ldr r2, [r7, #28]
800eaa2: 4413 add r3, r2
800eaa4: f44f 7200 mov.w r2, #512 @ 0x200
800eaa8: 4619 mov r1, r3
800eaaa: f7fe f825 bl 800caf8 <mem_cpy>
fp->flag &= (BYTE)~FA_DIRTY;
800eaae: 68fb ldr r3, [r7, #12]
800eab0: 7d1b ldrb r3, [r3, #20]
800eab2: f003 037f and.w r3, r3, #127 @ 0x7f
800eab6: b2da uxtb r2, r3
800eab8: 68fb ldr r3, [r7, #12]
800eaba: 751a strb r2, [r3, #20]
}
#endif
#endif
wcnt = SS(fs) * cc; /* Number of bytes transferred */
800eabc: 6a3b ldr r3, [r7, #32]
800eabe: 025b lsls r3, r3, #9
800eac0: 627b str r3, [r7, #36] @ 0x24
continue;
800eac2: e044 b.n 800eb4e <f_write+0x2e0>
if (fp->fptr >= fp->obj.objsize) { /* Avoid silly cache filling on the growing edge */
if (sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR);
fs->winsect = sect;
}
#else
if (fp->sect != sect && /* Fill sector cache with file data */
800eac4: 68fb ldr r3, [r7, #12]
800eac6: 6a1b ldr r3, [r3, #32]
800eac8: 697a ldr r2, [r7, #20]
800eaca: 429a cmp r2, r3
800eacc: d01b beq.n 800eb06 <f_write+0x298>
fp->fptr < fp->obj.objsize &&
800eace: 68fb ldr r3, [r7, #12]
800ead0: 699a ldr r2, [r3, #24]
800ead2: 68fb ldr r3, [r7, #12]
800ead4: 68db ldr r3, [r3, #12]
if (fp->sect != sect && /* Fill sector cache with file data */
800ead6: 429a cmp r2, r3
800ead8: d215 bcs.n 800eb06 <f_write+0x298>
disk_read(fs->drv, fp->buf, sect, 1) != RES_OK) {
800eada: 693b ldr r3, [r7, #16]
800eadc: 7858 ldrb r0, [r3, #1]
800eade: 68fb ldr r3, [r7, #12]
800eae0: f103 0130 add.w r1, r3, #48 @ 0x30
800eae4: 2301 movs r3, #1
800eae6: 697a ldr r2, [r7, #20]
800eae8: f7fd ff26 bl 800c938 <disk_read>
800eaec: 4603 mov r3, r0
fp->fptr < fp->obj.objsize &&
800eaee: 2b00 cmp r3, #0
800eaf0: d009 beq.n 800eb06 <f_write+0x298>
ABORT(fs, FR_DISK_ERR);
800eaf2: 68fb ldr r3, [r7, #12]
800eaf4: 2201 movs r2, #1
800eaf6: 755a strb r2, [r3, #21]
800eaf8: 693b ldr r3, [r7, #16]
800eafa: 2101 movs r1, #1
800eafc: 4618 mov r0, r3
800eafe: f7fe f88f bl 800cc20 <unlock_fs>
800eb02: 2301 movs r3, #1
800eb04: e053 b.n 800ebae <f_write+0x340>
}
#endif
fp->sect = sect;
800eb06: 68fb ldr r3, [r7, #12]
800eb08: 697a ldr r2, [r7, #20]
800eb0a: 621a str r2, [r3, #32]
}
wcnt = SS(fs) - (UINT)fp->fptr % SS(fs); /* Number of bytes left in the sector */
800eb0c: 68fb ldr r3, [r7, #12]
800eb0e: 699b ldr r3, [r3, #24]
800eb10: f3c3 0308 ubfx r3, r3, #0, #9
800eb14: f5c3 7300 rsb r3, r3, #512 @ 0x200
800eb18: 627b str r3, [r7, #36] @ 0x24
if (wcnt > btw) wcnt = btw; /* Clip it by btw if needed */
800eb1a: 6a7a ldr r2, [r7, #36] @ 0x24
800eb1c: 687b ldr r3, [r7, #4]
800eb1e: 429a cmp r2, r3
800eb20: d901 bls.n 800eb26 <f_write+0x2b8>
800eb22: 687b ldr r3, [r7, #4]
800eb24: 627b str r3, [r7, #36] @ 0x24
#if _FS_TINY
if (move_window(fs, fp->sect) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Move sector window */
mem_cpy(fs->win + fp->fptr % SS(fs), wbuff, wcnt); /* Fit data to the sector */
fs->wflag = 1;
#else
mem_cpy(fp->buf + fp->fptr % SS(fs), wbuff, wcnt); /* Fit data to the sector */
800eb26: 68fb ldr r3, [r7, #12]
800eb28: f103 0230 add.w r2, r3, #48 @ 0x30
800eb2c: 68fb ldr r3, [r7, #12]
800eb2e: 699b ldr r3, [r3, #24]
800eb30: f3c3 0308 ubfx r3, r3, #0, #9
800eb34: 4413 add r3, r2
800eb36: 6a7a ldr r2, [r7, #36] @ 0x24
800eb38: 69f9 ldr r1, [r7, #28]
800eb3a: 4618 mov r0, r3
800eb3c: f7fd ffdc bl 800caf8 <mem_cpy>
fp->flag |= FA_DIRTY;
800eb40: 68fb ldr r3, [r7, #12]
800eb42: 7d1b ldrb r3, [r3, #20]
800eb44: f063 037f orn r3, r3, #127 @ 0x7f
800eb48: b2da uxtb r2, r3
800eb4a: 68fb ldr r3, [r7, #12]
800eb4c: 751a strb r2, [r3, #20]
wbuff += wcnt, fp->fptr += wcnt, fp->obj.objsize = (fp->fptr > fp->obj.objsize) ? fp->fptr : fp->obj.objsize, *bw += wcnt, btw -= wcnt) {
800eb4e: 69fa ldr r2, [r7, #28]
800eb50: 6a7b ldr r3, [r7, #36] @ 0x24
800eb52: 4413 add r3, r2
800eb54: 61fb str r3, [r7, #28]
800eb56: 68fb ldr r3, [r7, #12]
800eb58: 699a ldr r2, [r3, #24]
800eb5a: 6a7b ldr r3, [r7, #36] @ 0x24
800eb5c: 441a add r2, r3
800eb5e: 68fb ldr r3, [r7, #12]
800eb60: 619a str r2, [r3, #24]
800eb62: 68fb ldr r3, [r7, #12]
800eb64: 68da ldr r2, [r3, #12]
800eb66: 68fb ldr r3, [r7, #12]
800eb68: 699b ldr r3, [r3, #24]
800eb6a: 429a cmp r2, r3
800eb6c: bf38 it cc
800eb6e: 461a movcc r2, r3
800eb70: 68fb ldr r3, [r7, #12]
800eb72: 60da str r2, [r3, #12]
800eb74: 683b ldr r3, [r7, #0]
800eb76: 681a ldr r2, [r3, #0]
800eb78: 6a7b ldr r3, [r7, #36] @ 0x24
800eb7a: 441a add r2, r3
800eb7c: 683b ldr r3, [r7, #0]
800eb7e: 601a str r2, [r3, #0]
800eb80: 687a ldr r2, [r7, #4]
800eb82: 6a7b ldr r3, [r7, #36] @ 0x24
800eb84: 1ad3 subs r3, r2, r3
800eb86: 607b str r3, [r7, #4]
for ( ; btw; /* Repeat until all data written */
800eb88: 687b ldr r3, [r7, #4]
800eb8a: 2b00 cmp r3, #0
800eb8c: f47f aeb6 bne.w 800e8fc <f_write+0x8e>
800eb90: e000 b.n 800eb94 <f_write+0x326>
if (clst == 0) break; /* Could not allocate a new cluster (disk full) */
800eb92: bf00 nop
#endif
}
fp->flag |= FA_MODIFIED; /* Set file change flag */
800eb94: 68fb ldr r3, [r7, #12]
800eb96: 7d1b ldrb r3, [r3, #20]
800eb98: f043 0340 orr.w r3, r3, #64 @ 0x40
800eb9c: b2da uxtb r2, r3
800eb9e: 68fb ldr r3, [r7, #12]
800eba0: 751a strb r2, [r3, #20]
LEAVE_FF(fs, FR_OK);
800eba2: 693b ldr r3, [r7, #16]
800eba4: 2100 movs r1, #0
800eba6: 4618 mov r0, r3
800eba8: f7fe f83a bl 800cc20 <unlock_fs>
800ebac: 2300 movs r3, #0
}
800ebae: 4618 mov r0, r3
800ebb0: 3730 adds r7, #48 @ 0x30
800ebb2: 46bd mov sp, r7
800ebb4: bd80 pop {r7, pc}
0800ebb6 <f_sync>:
/*-----------------------------------------------------------------------*/
FRESULT f_sync (
FIL* fp /* Pointer to the file object */
)
{
800ebb6: b580 push {r7, lr}
800ebb8: b086 sub sp, #24
800ebba: af00 add r7, sp, #0
800ebbc: 6078 str r0, [r7, #4]
#if _FS_EXFAT
DIR dj;
DEF_NAMBUF
#endif
res = validate(&fp->obj, &fs); /* Check validity of the file object */
800ebbe: 687b ldr r3, [r7, #4]
800ebc0: f107 0208 add.w r2, r7, #8
800ebc4: 4611 mov r1, r2
800ebc6: 4618 mov r0, r3
800ebc8: f7ff fbe4 bl 800e394 <validate>
800ebcc: 4603 mov r3, r0
800ebce: 75fb strb r3, [r7, #23]
if (res == FR_OK) {
800ebd0: 7dfb ldrb r3, [r7, #23]
800ebd2: 2b00 cmp r3, #0
800ebd4: d16d bne.n 800ecb2 <f_sync+0xfc>
if (fp->flag & FA_MODIFIED) { /* Is there any change to the file? */
800ebd6: 687b ldr r3, [r7, #4]
800ebd8: 7d1b ldrb r3, [r3, #20]
800ebda: f003 0340 and.w r3, r3, #64 @ 0x40
800ebde: 2b00 cmp r3, #0
800ebe0: d067 beq.n 800ecb2 <f_sync+0xfc>
#if !_FS_TINY
if (fp->flag & FA_DIRTY) { /* Write-back cached data if needed */
800ebe2: 687b ldr r3, [r7, #4]
800ebe4: 7d1b ldrb r3, [r3, #20]
800ebe6: b25b sxtb r3, r3
800ebe8: 2b00 cmp r3, #0
800ebea: da1a bge.n 800ec22 <f_sync+0x6c>
if (disk_write(fs->drv, fp->buf, fp->sect, 1) != RES_OK) LEAVE_FF(fs, FR_DISK_ERR);
800ebec: 68bb ldr r3, [r7, #8]
800ebee: 7858 ldrb r0, [r3, #1]
800ebf0: 687b ldr r3, [r7, #4]
800ebf2: f103 0130 add.w r1, r3, #48 @ 0x30
800ebf6: 687b ldr r3, [r7, #4]
800ebf8: 6a1a ldr r2, [r3, #32]
800ebfa: 2301 movs r3, #1
800ebfc: f7fd febc bl 800c978 <disk_write>
800ec00: 4603 mov r3, r0
800ec02: 2b00 cmp r3, #0
800ec04: d006 beq.n 800ec14 <f_sync+0x5e>
800ec06: 68bb ldr r3, [r7, #8]
800ec08: 2101 movs r1, #1
800ec0a: 4618 mov r0, r3
800ec0c: f7fe f808 bl 800cc20 <unlock_fs>
800ec10: 2301 movs r3, #1
800ec12: e055 b.n 800ecc0 <f_sync+0x10a>
fp->flag &= (BYTE)~FA_DIRTY;
800ec14: 687b ldr r3, [r7, #4]
800ec16: 7d1b ldrb r3, [r3, #20]
800ec18: f003 037f and.w r3, r3, #127 @ 0x7f
800ec1c: b2da uxtb r2, r3
800ec1e: 687b ldr r3, [r7, #4]
800ec20: 751a strb r2, [r3, #20]
}
#endif
/* Update the directory entry */
tm = GET_FATTIME(); /* Modified time */
800ec22: f7fa f943 bl 8008eac <get_fattime>
800ec26: 6138 str r0, [r7, #16]
FREE_NAMBUF();
}
} else
#endif
{
res = move_window(fs, fp->dir_sect);
800ec28: 68ba ldr r2, [r7, #8]
800ec2a: 687b ldr r3, [r7, #4]
800ec2c: 6a5b ldr r3, [r3, #36] @ 0x24
800ec2e: 4619 mov r1, r3
800ec30: 4610 mov r0, r2
800ec32: f7fe f9c1 bl 800cfb8 <move_window>
800ec36: 4603 mov r3, r0
800ec38: 75fb strb r3, [r7, #23]
if (res == FR_OK) {
800ec3a: 7dfb ldrb r3, [r7, #23]
800ec3c: 2b00 cmp r3, #0
800ec3e: d138 bne.n 800ecb2 <f_sync+0xfc>
dir = fp->dir_ptr;
800ec40: 687b ldr r3, [r7, #4]
800ec42: 6a9b ldr r3, [r3, #40] @ 0x28
800ec44: 60fb str r3, [r7, #12]
dir[DIR_Attr] |= AM_ARC; /* Set archive bit */
800ec46: 68fb ldr r3, [r7, #12]
800ec48: 330b adds r3, #11
800ec4a: 781a ldrb r2, [r3, #0]
800ec4c: 68fb ldr r3, [r7, #12]
800ec4e: 330b adds r3, #11
800ec50: f042 0220 orr.w r2, r2, #32
800ec54: b2d2 uxtb r2, r2
800ec56: 701a strb r2, [r3, #0]
st_clust(fp->obj.fs, dir, fp->obj.sclust); /* Update file allocation info */
800ec58: 687b ldr r3, [r7, #4]
800ec5a: 6818 ldr r0, [r3, #0]
800ec5c: 687b ldr r3, [r7, #4]
800ec5e: 689b ldr r3, [r3, #8]
800ec60: 461a mov r2, r3
800ec62: 68f9 ldr r1, [r7, #12]
800ec64: f7fe fefa bl 800da5c <st_clust>
st_dword(dir + DIR_FileSize, (DWORD)fp->obj.objsize); /* Update file size */
800ec68: 68fb ldr r3, [r7, #12]
800ec6a: f103 021c add.w r2, r3, #28
800ec6e: 687b ldr r3, [r7, #4]
800ec70: 68db ldr r3, [r3, #12]
800ec72: 4619 mov r1, r3
800ec74: 4610 mov r0, r2
800ec76: f7fd ff13 bl 800caa0 <st_dword>
st_dword(dir + DIR_ModTime, tm); /* Update modified time */
800ec7a: 68fb ldr r3, [r7, #12]
800ec7c: 3316 adds r3, #22
800ec7e: 6939 ldr r1, [r7, #16]
800ec80: 4618 mov r0, r3
800ec82: f7fd ff0d bl 800caa0 <st_dword>
st_word(dir + DIR_LstAccDate, 0);
800ec86: 68fb ldr r3, [r7, #12]
800ec88: 3312 adds r3, #18
800ec8a: 2100 movs r1, #0
800ec8c: 4618 mov r0, r3
800ec8e: f7fd feec bl 800ca6a <st_word>
fs->wflag = 1;
800ec92: 68bb ldr r3, [r7, #8]
800ec94: 2201 movs r2, #1
800ec96: 70da strb r2, [r3, #3]
res = sync_fs(fs); /* Restore it to the directory */
800ec98: 68bb ldr r3, [r7, #8]
800ec9a: 4618 mov r0, r3
800ec9c: f7fe f9ba bl 800d014 <sync_fs>
800eca0: 4603 mov r3, r0
800eca2: 75fb strb r3, [r7, #23]
fp->flag &= (BYTE)~FA_MODIFIED;
800eca4: 687b ldr r3, [r7, #4]
800eca6: 7d1b ldrb r3, [r3, #20]
800eca8: f023 0340 bic.w r3, r3, #64 @ 0x40
800ecac: b2da uxtb r2, r3
800ecae: 687b ldr r3, [r7, #4]
800ecb0: 751a strb r2, [r3, #20]
}
}
}
}
LEAVE_FF(fs, res);
800ecb2: 68bb ldr r3, [r7, #8]
800ecb4: 7dfa ldrb r2, [r7, #23]
800ecb6: 4611 mov r1, r2
800ecb8: 4618 mov r0, r3
800ecba: f7fd ffb1 bl 800cc20 <unlock_fs>
800ecbe: 7dfb ldrb r3, [r7, #23]
}
800ecc0: 4618 mov r0, r3
800ecc2: 3718 adds r7, #24
800ecc4: 46bd mov sp, r7
800ecc6: bd80 pop {r7, pc}
0800ecc8 <f_close>:
/*-----------------------------------------------------------------------*/
FRESULT f_close (
FIL* fp /* Pointer to the file object to be closed */
)
{
800ecc8: b580 push {r7, lr}
800ecca: b084 sub sp, #16
800eccc: af00 add r7, sp, #0
800ecce: 6078 str r0, [r7, #4]
FRESULT res;
FATFS *fs;
#if !_FS_READONLY
res = f_sync(fp); /* Flush cached data */
800ecd0: 6878 ldr r0, [r7, #4]
800ecd2: f7ff ff70 bl 800ebb6 <f_sync>
800ecd6: 4603 mov r3, r0
800ecd8: 73fb strb r3, [r7, #15]
if (res == FR_OK)
800ecda: 7bfb ldrb r3, [r7, #15]
800ecdc: 2b00 cmp r3, #0
800ecde: d11d bne.n 800ed1c <f_close+0x54>
#endif
{
res = validate(&fp->obj, &fs); /* Lock volume */
800ece0: 687b ldr r3, [r7, #4]
800ece2: f107 0208 add.w r2, r7, #8
800ece6: 4611 mov r1, r2
800ece8: 4618 mov r0, r3
800ecea: f7ff fb53 bl 800e394 <validate>
800ecee: 4603 mov r3, r0
800ecf0: 73fb strb r3, [r7, #15]
if (res == FR_OK) {
800ecf2: 7bfb ldrb r3, [r7, #15]
800ecf4: 2b00 cmp r3, #0
800ecf6: d111 bne.n 800ed1c <f_close+0x54>
#if _FS_LOCK != 0
res = dec_lock(fp->obj.lockid); /* Decrement file open counter */
800ecf8: 687b ldr r3, [r7, #4]
800ecfa: 691b ldr r3, [r3, #16]
800ecfc: 4618 mov r0, r3
800ecfe: f7fe f8b7 bl 800ce70 <dec_lock>
800ed02: 4603 mov r3, r0
800ed04: 73fb strb r3, [r7, #15]
if (res == FR_OK)
800ed06: 7bfb ldrb r3, [r7, #15]
800ed08: 2b00 cmp r3, #0
800ed0a: d102 bne.n 800ed12 <f_close+0x4a>
#endif
{
fp->obj.fs = 0; /* Invalidate file object */
800ed0c: 687b ldr r3, [r7, #4]
800ed0e: 2200 movs r2, #0
800ed10: 601a str r2, [r3, #0]
}
#if _FS_REENTRANT
unlock_fs(fs, FR_OK); /* Unlock volume */
800ed12: 68bb ldr r3, [r7, #8]
800ed14: 2100 movs r1, #0
800ed16: 4618 mov r0, r3
800ed18: f7fd ff82 bl 800cc20 <unlock_fs>
#endif
}
}
return res;
800ed1c: 7bfb ldrb r3, [r7, #15]
}
800ed1e: 4618 mov r0, r3
800ed20: 3710 adds r7, #16
800ed22: 46bd mov sp, r7
800ed24: bd80 pop {r7, pc}
0800ed26 <f_lseek>:
FRESULT f_lseek (
FIL* fp, /* Pointer to the file object */
FSIZE_t ofs /* File pointer from top of file */
)
{
800ed26: b580 push {r7, lr}
800ed28: b090 sub sp, #64 @ 0x40
800ed2a: af00 add r7, sp, #0
800ed2c: 6078 str r0, [r7, #4]
800ed2e: 6039 str r1, [r7, #0]
FSIZE_t ifptr;
#if _USE_FASTSEEK
DWORD cl, pcl, ncl, tcl, dsc, tlen, ulen, *tbl;
#endif
res = validate(&fp->obj, &fs); /* Check validity of the file object */
800ed30: 687b ldr r3, [r7, #4]
800ed32: f107 0208 add.w r2, r7, #8
800ed36: 4611 mov r1, r2
800ed38: 4618 mov r0, r3
800ed3a: f7ff fb2b bl 800e394 <validate>
800ed3e: 4603 mov r3, r0
800ed40: f887 303f strb.w r3, [r7, #63] @ 0x3f
if (res == FR_OK) res = (FRESULT)fp->err;
800ed44: f897 303f ldrb.w r3, [r7, #63] @ 0x3f
800ed48: 2b00 cmp r3, #0
800ed4a: d103 bne.n 800ed54 <f_lseek+0x2e>
800ed4c: 687b ldr r3, [r7, #4]
800ed4e: 7d5b ldrb r3, [r3, #21]
800ed50: f887 303f strb.w r3, [r7, #63] @ 0x3f
#if _FS_EXFAT && !_FS_READONLY
if (res == FR_OK && fs->fs_type == FS_EXFAT) {
res = fill_last_frag(&fp->obj, fp->clust, 0xFFFFFFFF); /* Fill last fragment on the FAT if needed */
}
#endif
if (res != FR_OK) LEAVE_FF(fs, res);
800ed54: f897 303f ldrb.w r3, [r7, #63] @ 0x3f
800ed58: 2b00 cmp r3, #0
800ed5a: d009 beq.n 800ed70 <f_lseek+0x4a>
800ed5c: 68bb ldr r3, [r7, #8]
800ed5e: f897 203f ldrb.w r2, [r7, #63] @ 0x3f
800ed62: 4611 mov r1, r2
800ed64: 4618 mov r0, r3
800ed66: f7fd ff5b bl 800cc20 <unlock_fs>
800ed6a: f897 303f ldrb.w r3, [r7, #63] @ 0x3f
800ed6e: e229 b.n 800f1c4 <f_lseek+0x49e>
#if _USE_FASTSEEK
if (fp->cltbl) { /* Fast seek */
800ed70: 687b ldr r3, [r7, #4]
800ed72: 6adb ldr r3, [r3, #44] @ 0x2c
800ed74: 2b00 cmp r3, #0
800ed76: f000 80ea beq.w 800ef4e <f_lseek+0x228>
if (ofs == CREATE_LINKMAP) { /* Create CLMT */
800ed7a: 683b ldr r3, [r7, #0]
800ed7c: f1b3 3fff cmp.w r3, #4294967295
800ed80: d164 bne.n 800ee4c <f_lseek+0x126>
tbl = fp->cltbl;
800ed82: 687b ldr r3, [r7, #4]
800ed84: 6adb ldr r3, [r3, #44] @ 0x2c
800ed86: 627b str r3, [r7, #36] @ 0x24
tlen = *tbl++; ulen = 2; /* Given table size and required table size */
800ed88: 6a7b ldr r3, [r7, #36] @ 0x24
800ed8a: 1d1a adds r2, r3, #4
800ed8c: 627a str r2, [r7, #36] @ 0x24
800ed8e: 681b ldr r3, [r3, #0]
800ed90: 617b str r3, [r7, #20]
800ed92: 2302 movs r3, #2
800ed94: 62bb str r3, [r7, #40] @ 0x28
cl = fp->obj.sclust; /* Origin of the chain */
800ed96: 687b ldr r3, [r7, #4]
800ed98: 689b ldr r3, [r3, #8]
800ed9a: 633b str r3, [r7, #48] @ 0x30
if (cl) {
800ed9c: 6b3b ldr r3, [r7, #48] @ 0x30
800ed9e: 2b00 cmp r3, #0
800eda0: d044 beq.n 800ee2c <f_lseek+0x106>
do {
/* Get a fragment */
tcl = cl; ncl = 0; ulen += 2; /* Top, length and used items */
800eda2: 6b3b ldr r3, [r7, #48] @ 0x30
800eda4: 613b str r3, [r7, #16]
800eda6: 2300 movs r3, #0
800eda8: 62fb str r3, [r7, #44] @ 0x2c
800edaa: 6abb ldr r3, [r7, #40] @ 0x28
800edac: 3302 adds r3, #2
800edae: 62bb str r3, [r7, #40] @ 0x28
do {
pcl = cl; ncl++;
800edb0: 6b3b ldr r3, [r7, #48] @ 0x30
800edb2: 60fb str r3, [r7, #12]
800edb4: 6afb ldr r3, [r7, #44] @ 0x2c
800edb6: 3301 adds r3, #1
800edb8: 62fb str r3, [r7, #44] @ 0x2c
cl = get_fat(&fp->obj, cl);
800edba: 687b ldr r3, [r7, #4]
800edbc: 6b39 ldr r1, [r7, #48] @ 0x30
800edbe: 4618 mov r0, r3
800edc0: f7fe f9b5 bl 800d12e <get_fat>
800edc4: 6338 str r0, [r7, #48] @ 0x30
if (cl <= 1) ABORT(fs, FR_INT_ERR);
800edc6: 6b3b ldr r3, [r7, #48] @ 0x30
800edc8: 2b01 cmp r3, #1
800edca: d809 bhi.n 800ede0 <f_lseek+0xba>
800edcc: 687b ldr r3, [r7, #4]
800edce: 2202 movs r2, #2
800edd0: 755a strb r2, [r3, #21]
800edd2: 68bb ldr r3, [r7, #8]
800edd4: 2102 movs r1, #2
800edd6: 4618 mov r0, r3
800edd8: f7fd ff22 bl 800cc20 <unlock_fs>
800eddc: 2302 movs r3, #2
800edde: e1f1 b.n 800f1c4 <f_lseek+0x49e>
if (cl == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR);
800ede0: 6b3b ldr r3, [r7, #48] @ 0x30
800ede2: f1b3 3fff cmp.w r3, #4294967295
800ede6: d109 bne.n 800edfc <f_lseek+0xd6>
800ede8: 687b ldr r3, [r7, #4]
800edea: 2201 movs r2, #1
800edec: 755a strb r2, [r3, #21]
800edee: 68bb ldr r3, [r7, #8]
800edf0: 2101 movs r1, #1
800edf2: 4618 mov r0, r3
800edf4: f7fd ff14 bl 800cc20 <unlock_fs>
800edf8: 2301 movs r3, #1
800edfa: e1e3 b.n 800f1c4 <f_lseek+0x49e>
} while (cl == pcl + 1);
800edfc: 68fb ldr r3, [r7, #12]
800edfe: 3301 adds r3, #1
800ee00: 6b3a ldr r2, [r7, #48] @ 0x30
800ee02: 429a cmp r2, r3
800ee04: d0d4 beq.n 800edb0 <f_lseek+0x8a>
if (ulen <= tlen) { /* Store the length and top of the fragment */
800ee06: 6aba ldr r2, [r7, #40] @ 0x28
800ee08: 697b ldr r3, [r7, #20]
800ee0a: 429a cmp r2, r3
800ee0c: d809 bhi.n 800ee22 <f_lseek+0xfc>
*tbl++ = ncl; *tbl++ = tcl;
800ee0e: 6a7b ldr r3, [r7, #36] @ 0x24
800ee10: 1d1a adds r2, r3, #4
800ee12: 627a str r2, [r7, #36] @ 0x24
800ee14: 6afa ldr r2, [r7, #44] @ 0x2c
800ee16: 601a str r2, [r3, #0]
800ee18: 6a7b ldr r3, [r7, #36] @ 0x24
800ee1a: 1d1a adds r2, r3, #4
800ee1c: 627a str r2, [r7, #36] @ 0x24
800ee1e: 693a ldr r2, [r7, #16]
800ee20: 601a str r2, [r3, #0]
}
} while (cl < fs->n_fatent); /* Repeat until end of chain */
800ee22: 68bb ldr r3, [r7, #8]
800ee24: 699b ldr r3, [r3, #24]
800ee26: 6b3a ldr r2, [r7, #48] @ 0x30
800ee28: 429a cmp r2, r3
800ee2a: d3ba bcc.n 800eda2 <f_lseek+0x7c>
}
*fp->cltbl = ulen; /* Number of items used */
800ee2c: 687b ldr r3, [r7, #4]
800ee2e: 6adb ldr r3, [r3, #44] @ 0x2c
800ee30: 6aba ldr r2, [r7, #40] @ 0x28
800ee32: 601a str r2, [r3, #0]
if (ulen <= tlen) {
800ee34: 6aba ldr r2, [r7, #40] @ 0x28
800ee36: 697b ldr r3, [r7, #20]
800ee38: 429a cmp r2, r3
800ee3a: d803 bhi.n 800ee44 <f_lseek+0x11e>
*tbl = 0; /* Terminate table */
800ee3c: 6a7b ldr r3, [r7, #36] @ 0x24
800ee3e: 2200 movs r2, #0
800ee40: 601a str r2, [r3, #0]
800ee42: e1b6 b.n 800f1b2 <f_lseek+0x48c>
} else {
res = FR_NOT_ENOUGH_CORE; /* Given table size is smaller than required */
800ee44: 2311 movs r3, #17
800ee46: f887 303f strb.w r3, [r7, #63] @ 0x3f
800ee4a: e1b2 b.n 800f1b2 <f_lseek+0x48c>
}
} else { /* Fast seek */
if (ofs > fp->obj.objsize) ofs = fp->obj.objsize; /* Clip offset at the file size */
800ee4c: 687b ldr r3, [r7, #4]
800ee4e: 68db ldr r3, [r3, #12]
800ee50: 683a ldr r2, [r7, #0]
800ee52: 429a cmp r2, r3
800ee54: d902 bls.n 800ee5c <f_lseek+0x136>
800ee56: 687b ldr r3, [r7, #4]
800ee58: 68db ldr r3, [r3, #12]
800ee5a: 603b str r3, [r7, #0]
fp->fptr = ofs; /* Set file pointer */
800ee5c: 687b ldr r3, [r7, #4]
800ee5e: 683a ldr r2, [r7, #0]
800ee60: 619a str r2, [r3, #24]
if (ofs) {
800ee62: 683b ldr r3, [r7, #0]
800ee64: 2b00 cmp r3, #0
800ee66: f000 81a4 beq.w 800f1b2 <f_lseek+0x48c>
fp->clust = clmt_clust(fp, ofs - 1);
800ee6a: 683b ldr r3, [r7, #0]
800ee6c: 3b01 subs r3, #1
800ee6e: 4619 mov r1, r3
800ee70: 6878 ldr r0, [r7, #4]
800ee72: f7fe fc19 bl 800d6a8 <clmt_clust>
800ee76: 4602 mov r2, r0
800ee78: 687b ldr r3, [r7, #4]
800ee7a: 61da str r2, [r3, #28]
dsc = clust2sect(fs, fp->clust);
800ee7c: 68ba ldr r2, [r7, #8]
800ee7e: 687b ldr r3, [r7, #4]
800ee80: 69db ldr r3, [r3, #28]
800ee82: 4619 mov r1, r3
800ee84: 4610 mov r0, r2
800ee86: f7fe f933 bl 800d0f0 <clust2sect>
800ee8a: 61b8 str r0, [r7, #24]
if (!dsc) ABORT(fs, FR_INT_ERR);
800ee8c: 69bb ldr r3, [r7, #24]
800ee8e: 2b00 cmp r3, #0
800ee90: d109 bne.n 800eea6 <f_lseek+0x180>
800ee92: 687b ldr r3, [r7, #4]
800ee94: 2202 movs r2, #2
800ee96: 755a strb r2, [r3, #21]
800ee98: 68bb ldr r3, [r7, #8]
800ee9a: 2102 movs r1, #2
800ee9c: 4618 mov r0, r3
800ee9e: f7fd febf bl 800cc20 <unlock_fs>
800eea2: 2302 movs r3, #2
800eea4: e18e b.n 800f1c4 <f_lseek+0x49e>
dsc += (DWORD)((ofs - 1) / SS(fs)) & (fs->csize - 1);
800eea6: 683b ldr r3, [r7, #0]
800eea8: 3b01 subs r3, #1
800eeaa: 0a5b lsrs r3, r3, #9
800eeac: 68ba ldr r2, [r7, #8]
800eeae: 8952 ldrh r2, [r2, #10]
800eeb0: 3a01 subs r2, #1
800eeb2: 4013 ands r3, r2
800eeb4: 69ba ldr r2, [r7, #24]
800eeb6: 4413 add r3, r2
800eeb8: 61bb str r3, [r7, #24]
if (fp->fptr % SS(fs) && dsc != fp->sect) { /* Refill sector cache if needed */
800eeba: 687b ldr r3, [r7, #4]
800eebc: 699b ldr r3, [r3, #24]
800eebe: f3c3 0308 ubfx r3, r3, #0, #9
800eec2: 2b00 cmp r3, #0
800eec4: f000 8175 beq.w 800f1b2 <f_lseek+0x48c>
800eec8: 687b ldr r3, [r7, #4]
800eeca: 6a1b ldr r3, [r3, #32]
800eecc: 69ba ldr r2, [r7, #24]
800eece: 429a cmp r2, r3
800eed0: f000 816f beq.w 800f1b2 <f_lseek+0x48c>
#if !_FS_TINY
#if !_FS_READONLY
if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */
800eed4: 687b ldr r3, [r7, #4]
800eed6: 7d1b ldrb r3, [r3, #20]
800eed8: b25b sxtb r3, r3
800eeda: 2b00 cmp r3, #0
800eedc: da1d bge.n 800ef1a <f_lseek+0x1f4>
if (disk_write(fs->drv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR);
800eede: 68bb ldr r3, [r7, #8]
800eee0: 7858 ldrb r0, [r3, #1]
800eee2: 687b ldr r3, [r7, #4]
800eee4: f103 0130 add.w r1, r3, #48 @ 0x30
800eee8: 687b ldr r3, [r7, #4]
800eeea: 6a1a ldr r2, [r3, #32]
800eeec: 2301 movs r3, #1
800eeee: f7fd fd43 bl 800c978 <disk_write>
800eef2: 4603 mov r3, r0
800eef4: 2b00 cmp r3, #0
800eef6: d009 beq.n 800ef0c <f_lseek+0x1e6>
800eef8: 687b ldr r3, [r7, #4]
800eefa: 2201 movs r2, #1
800eefc: 755a strb r2, [r3, #21]
800eefe: 68bb ldr r3, [r7, #8]
800ef00: 2101 movs r1, #1
800ef02: 4618 mov r0, r3
800ef04: f7fd fe8c bl 800cc20 <unlock_fs>
800ef08: 2301 movs r3, #1
800ef0a: e15b b.n 800f1c4 <f_lseek+0x49e>
fp->flag &= (BYTE)~FA_DIRTY;
800ef0c: 687b ldr r3, [r7, #4]
800ef0e: 7d1b ldrb r3, [r3, #20]
800ef10: f003 037f and.w r3, r3, #127 @ 0x7f
800ef14: b2da uxtb r2, r3
800ef16: 687b ldr r3, [r7, #4]
800ef18: 751a strb r2, [r3, #20]
}
#endif
if (disk_read(fs->drv, fp->buf, dsc, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); /* Load current sector */
800ef1a: 68bb ldr r3, [r7, #8]
800ef1c: 7858 ldrb r0, [r3, #1]
800ef1e: 687b ldr r3, [r7, #4]
800ef20: f103 0130 add.w r1, r3, #48 @ 0x30
800ef24: 2301 movs r3, #1
800ef26: 69ba ldr r2, [r7, #24]
800ef28: f7fd fd06 bl 800c938 <disk_read>
800ef2c: 4603 mov r3, r0
800ef2e: 2b00 cmp r3, #0
800ef30: d009 beq.n 800ef46 <f_lseek+0x220>
800ef32: 687b ldr r3, [r7, #4]
800ef34: 2201 movs r2, #1
800ef36: 755a strb r2, [r3, #21]
800ef38: 68bb ldr r3, [r7, #8]
800ef3a: 2101 movs r1, #1
800ef3c: 4618 mov r0, r3
800ef3e: f7fd fe6f bl 800cc20 <unlock_fs>
800ef42: 2301 movs r3, #1
800ef44: e13e b.n 800f1c4 <f_lseek+0x49e>
#endif
fp->sect = dsc;
800ef46: 687b ldr r3, [r7, #4]
800ef48: 69ba ldr r2, [r7, #24]
800ef4a: 621a str r2, [r3, #32]
800ef4c: e131 b.n 800f1b2 <f_lseek+0x48c>
/* Normal Seek */
{
#if _FS_EXFAT
if (fs->fs_type != FS_EXFAT && ofs >= 0x100000000) ofs = 0xFFFFFFFF; /* Clip at 4GiB-1 if at FATxx */
#endif
if (ofs > fp->obj.objsize && (_FS_READONLY || !(fp->flag & FA_WRITE))) { /* In read-only mode, clip offset with the file size */
800ef4e: 687b ldr r3, [r7, #4]
800ef50: 68db ldr r3, [r3, #12]
800ef52: 683a ldr r2, [r7, #0]
800ef54: 429a cmp r2, r3
800ef56: d908 bls.n 800ef6a <f_lseek+0x244>
800ef58: 687b ldr r3, [r7, #4]
800ef5a: 7d1b ldrb r3, [r3, #20]
800ef5c: f003 0302 and.w r3, r3, #2
800ef60: 2b00 cmp r3, #0
800ef62: d102 bne.n 800ef6a <f_lseek+0x244>
ofs = fp->obj.objsize;
800ef64: 687b ldr r3, [r7, #4]
800ef66: 68db ldr r3, [r3, #12]
800ef68: 603b str r3, [r7, #0]
}
ifptr = fp->fptr;
800ef6a: 687b ldr r3, [r7, #4]
800ef6c: 699b ldr r3, [r3, #24]
800ef6e: 623b str r3, [r7, #32]
fp->fptr = nsect = 0;
800ef70: 2300 movs r3, #0
800ef72: 637b str r3, [r7, #52] @ 0x34
800ef74: 687b ldr r3, [r7, #4]
800ef76: 6b7a ldr r2, [r7, #52] @ 0x34
800ef78: 619a str r2, [r3, #24]
if (ofs) {
800ef7a: 683b ldr r3, [r7, #0]
800ef7c: 2b00 cmp r3, #0
800ef7e: f000 80c0 beq.w 800f102 <f_lseek+0x3dc>
bcs = (DWORD)fs->csize * SS(fs); /* Cluster size (byte) */
800ef82: 68bb ldr r3, [r7, #8]
800ef84: 895b ldrh r3, [r3, #10]
800ef86: 025b lsls r3, r3, #9
800ef88: 61fb str r3, [r7, #28]
if (ifptr > 0 &&
800ef8a: 6a3b ldr r3, [r7, #32]
800ef8c: 2b00 cmp r3, #0
800ef8e: d01b beq.n 800efc8 <f_lseek+0x2a2>
(ofs - 1) / bcs >= (ifptr - 1) / bcs) { /* When seek to same or following cluster, */
800ef90: 683b ldr r3, [r7, #0]
800ef92: 1e5a subs r2, r3, #1
800ef94: 69fb ldr r3, [r7, #28]
800ef96: fbb2 f2f3 udiv r2, r2, r3
800ef9a: 6a3b ldr r3, [r7, #32]
800ef9c: 1e59 subs r1, r3, #1
800ef9e: 69fb ldr r3, [r7, #28]
800efa0: fbb1 f3f3 udiv r3, r1, r3
if (ifptr > 0 &&
800efa4: 429a cmp r2, r3
800efa6: d30f bcc.n 800efc8 <f_lseek+0x2a2>
fp->fptr = (ifptr - 1) & ~(FSIZE_t)(bcs - 1); /* start from the current cluster */
800efa8: 6a3b ldr r3, [r7, #32]
800efaa: 1e5a subs r2, r3, #1
800efac: 69fb ldr r3, [r7, #28]
800efae: 425b negs r3, r3
800efb0: 401a ands r2, r3
800efb2: 687b ldr r3, [r7, #4]
800efb4: 619a str r2, [r3, #24]
ofs -= fp->fptr;
800efb6: 687b ldr r3, [r7, #4]
800efb8: 699b ldr r3, [r3, #24]
800efba: 683a ldr r2, [r7, #0]
800efbc: 1ad3 subs r3, r2, r3
800efbe: 603b str r3, [r7, #0]
clst = fp->clust;
800efc0: 687b ldr r3, [r7, #4]
800efc2: 69db ldr r3, [r3, #28]
800efc4: 63bb str r3, [r7, #56] @ 0x38
800efc6: e02c b.n 800f022 <f_lseek+0x2fc>
} else { /* When seek to back cluster, */
clst = fp->obj.sclust; /* start from the first cluster */
800efc8: 687b ldr r3, [r7, #4]
800efca: 689b ldr r3, [r3, #8]
800efcc: 63bb str r3, [r7, #56] @ 0x38
#if !_FS_READONLY
if (clst == 0) { /* If no cluster chain, create a new chain */
800efce: 6bbb ldr r3, [r7, #56] @ 0x38
800efd0: 2b00 cmp r3, #0
800efd2: d123 bne.n 800f01c <f_lseek+0x2f6>
clst = create_chain(&fp->obj, 0);
800efd4: 687b ldr r3, [r7, #4]
800efd6: 2100 movs r1, #0
800efd8: 4618 mov r0, r3
800efda: f7fe facd bl 800d578 <create_chain>
800efde: 63b8 str r0, [r7, #56] @ 0x38
if (clst == 1) ABORT(fs, FR_INT_ERR);
800efe0: 6bbb ldr r3, [r7, #56] @ 0x38
800efe2: 2b01 cmp r3, #1
800efe4: d109 bne.n 800effa <f_lseek+0x2d4>
800efe6: 687b ldr r3, [r7, #4]
800efe8: 2202 movs r2, #2
800efea: 755a strb r2, [r3, #21]
800efec: 68bb ldr r3, [r7, #8]
800efee: 2102 movs r1, #2
800eff0: 4618 mov r0, r3
800eff2: f7fd fe15 bl 800cc20 <unlock_fs>
800eff6: 2302 movs r3, #2
800eff8: e0e4 b.n 800f1c4 <f_lseek+0x49e>
if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR);
800effa: 6bbb ldr r3, [r7, #56] @ 0x38
800effc: f1b3 3fff cmp.w r3, #4294967295
800f000: d109 bne.n 800f016 <f_lseek+0x2f0>
800f002: 687b ldr r3, [r7, #4]
800f004: 2201 movs r2, #1
800f006: 755a strb r2, [r3, #21]
800f008: 68bb ldr r3, [r7, #8]
800f00a: 2101 movs r1, #1
800f00c: 4618 mov r0, r3
800f00e: f7fd fe07 bl 800cc20 <unlock_fs>
800f012: 2301 movs r3, #1
800f014: e0d6 b.n 800f1c4 <f_lseek+0x49e>
fp->obj.sclust = clst;
800f016: 687b ldr r3, [r7, #4]
800f018: 6bba ldr r2, [r7, #56] @ 0x38
800f01a: 609a str r2, [r3, #8]
}
#endif
fp->clust = clst;
800f01c: 687b ldr r3, [r7, #4]
800f01e: 6bba ldr r2, [r7, #56] @ 0x38
800f020: 61da str r2, [r3, #28]
}
if (clst != 0) {
800f022: 6bbb ldr r3, [r7, #56] @ 0x38
800f024: 2b00 cmp r3, #0
800f026: d06c beq.n 800f102 <f_lseek+0x3dc>
while (ofs > bcs) { /* Cluster following loop */
800f028: e044 b.n 800f0b4 <f_lseek+0x38e>
ofs -= bcs; fp->fptr += bcs;
800f02a: 683a ldr r2, [r7, #0]
800f02c: 69fb ldr r3, [r7, #28]
800f02e: 1ad3 subs r3, r2, r3
800f030: 603b str r3, [r7, #0]
800f032: 687b ldr r3, [r7, #4]
800f034: 699a ldr r2, [r3, #24]
800f036: 69fb ldr r3, [r7, #28]
800f038: 441a add r2, r3
800f03a: 687b ldr r3, [r7, #4]
800f03c: 619a str r2, [r3, #24]
#if !_FS_READONLY
if (fp->flag & FA_WRITE) { /* Check if in write mode or not */
800f03e: 687b ldr r3, [r7, #4]
800f040: 7d1b ldrb r3, [r3, #20]
800f042: f003 0302 and.w r3, r3, #2
800f046: 2b00 cmp r3, #0
800f048: d00b beq.n 800f062 <f_lseek+0x33c>
if (_FS_EXFAT && fp->fptr > fp->obj.objsize) { /* No FAT chain object needs correct objsize to generate FAT value */
fp->obj.objsize = fp->fptr;
fp->flag |= FA_MODIFIED;
}
clst = create_chain(&fp->obj, clst); /* Follow chain with forceed stretch */
800f04a: 687b ldr r3, [r7, #4]
800f04c: 6bb9 ldr r1, [r7, #56] @ 0x38
800f04e: 4618 mov r0, r3
800f050: f7fe fa92 bl 800d578 <create_chain>
800f054: 63b8 str r0, [r7, #56] @ 0x38
if (clst == 0) { /* Clip file size in case of disk full */
800f056: 6bbb ldr r3, [r7, #56] @ 0x38
800f058: 2b00 cmp r3, #0
800f05a: d108 bne.n 800f06e <f_lseek+0x348>
ofs = 0; break;
800f05c: 2300 movs r3, #0
800f05e: 603b str r3, [r7, #0]
800f060: e02c b.n 800f0bc <f_lseek+0x396>
}
} else
#endif
{
clst = get_fat(&fp->obj, clst); /* Follow cluster chain if not in write mode */
800f062: 687b ldr r3, [r7, #4]
800f064: 6bb9 ldr r1, [r7, #56] @ 0x38
800f066: 4618 mov r0, r3
800f068: f7fe f861 bl 800d12e <get_fat>
800f06c: 63b8 str r0, [r7, #56] @ 0x38
}
if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR);
800f06e: 6bbb ldr r3, [r7, #56] @ 0x38
800f070: f1b3 3fff cmp.w r3, #4294967295
800f074: d109 bne.n 800f08a <f_lseek+0x364>
800f076: 687b ldr r3, [r7, #4]
800f078: 2201 movs r2, #1
800f07a: 755a strb r2, [r3, #21]
800f07c: 68bb ldr r3, [r7, #8]
800f07e: 2101 movs r1, #1
800f080: 4618 mov r0, r3
800f082: f7fd fdcd bl 800cc20 <unlock_fs>
800f086: 2301 movs r3, #1
800f088: e09c b.n 800f1c4 <f_lseek+0x49e>
if (clst <= 1 || clst >= fs->n_fatent) ABORT(fs, FR_INT_ERR);
800f08a: 6bbb ldr r3, [r7, #56] @ 0x38
800f08c: 2b01 cmp r3, #1
800f08e: d904 bls.n 800f09a <f_lseek+0x374>
800f090: 68bb ldr r3, [r7, #8]
800f092: 699b ldr r3, [r3, #24]
800f094: 6bba ldr r2, [r7, #56] @ 0x38
800f096: 429a cmp r2, r3
800f098: d309 bcc.n 800f0ae <f_lseek+0x388>
800f09a: 687b ldr r3, [r7, #4]
800f09c: 2202 movs r2, #2
800f09e: 755a strb r2, [r3, #21]
800f0a0: 68bb ldr r3, [r7, #8]
800f0a2: 2102 movs r1, #2
800f0a4: 4618 mov r0, r3
800f0a6: f7fd fdbb bl 800cc20 <unlock_fs>
800f0aa: 2302 movs r3, #2
800f0ac: e08a b.n 800f1c4 <f_lseek+0x49e>
fp->clust = clst;
800f0ae: 687b ldr r3, [r7, #4]
800f0b0: 6bba ldr r2, [r7, #56] @ 0x38
800f0b2: 61da str r2, [r3, #28]
while (ofs > bcs) { /* Cluster following loop */
800f0b4: 683a ldr r2, [r7, #0]
800f0b6: 69fb ldr r3, [r7, #28]
800f0b8: 429a cmp r2, r3
800f0ba: d8b6 bhi.n 800f02a <f_lseek+0x304>
}
fp->fptr += ofs;
800f0bc: 687b ldr r3, [r7, #4]
800f0be: 699a ldr r2, [r3, #24]
800f0c0: 683b ldr r3, [r7, #0]
800f0c2: 441a add r2, r3
800f0c4: 687b ldr r3, [r7, #4]
800f0c6: 619a str r2, [r3, #24]
if (ofs % SS(fs)) {
800f0c8: 683b ldr r3, [r7, #0]
800f0ca: f3c3 0308 ubfx r3, r3, #0, #9
800f0ce: 2b00 cmp r3, #0
800f0d0: d017 beq.n 800f102 <f_lseek+0x3dc>
nsect = clust2sect(fs, clst); /* Current sector */
800f0d2: 68bb ldr r3, [r7, #8]
800f0d4: 6bb9 ldr r1, [r7, #56] @ 0x38
800f0d6: 4618 mov r0, r3
800f0d8: f7fe f80a bl 800d0f0 <clust2sect>
800f0dc: 6378 str r0, [r7, #52] @ 0x34
if (!nsect) ABORT(fs, FR_INT_ERR);
800f0de: 6b7b ldr r3, [r7, #52] @ 0x34
800f0e0: 2b00 cmp r3, #0
800f0e2: d109 bne.n 800f0f8 <f_lseek+0x3d2>
800f0e4: 687b ldr r3, [r7, #4]
800f0e6: 2202 movs r2, #2
800f0e8: 755a strb r2, [r3, #21]
800f0ea: 68bb ldr r3, [r7, #8]
800f0ec: 2102 movs r1, #2
800f0ee: 4618 mov r0, r3
800f0f0: f7fd fd96 bl 800cc20 <unlock_fs>
800f0f4: 2302 movs r3, #2
800f0f6: e065 b.n 800f1c4 <f_lseek+0x49e>
nsect += (DWORD)(ofs / SS(fs));
800f0f8: 683b ldr r3, [r7, #0]
800f0fa: 0a5b lsrs r3, r3, #9
800f0fc: 6b7a ldr r2, [r7, #52] @ 0x34
800f0fe: 4413 add r3, r2
800f100: 637b str r3, [r7, #52] @ 0x34
}
}
}
if (!_FS_READONLY && fp->fptr > fp->obj.objsize) { /* Set file change flag if the file size is extended */
800f102: 687b ldr r3, [r7, #4]
800f104: 699a ldr r2, [r3, #24]
800f106: 687b ldr r3, [r7, #4]
800f108: 68db ldr r3, [r3, #12]
800f10a: 429a cmp r2, r3
800f10c: d90a bls.n 800f124 <f_lseek+0x3fe>
fp->obj.objsize = fp->fptr;
800f10e: 687b ldr r3, [r7, #4]
800f110: 699a ldr r2, [r3, #24]
800f112: 687b ldr r3, [r7, #4]
800f114: 60da str r2, [r3, #12]
fp->flag |= FA_MODIFIED;
800f116: 687b ldr r3, [r7, #4]
800f118: 7d1b ldrb r3, [r3, #20]
800f11a: f043 0340 orr.w r3, r3, #64 @ 0x40
800f11e: b2da uxtb r2, r3
800f120: 687b ldr r3, [r7, #4]
800f122: 751a strb r2, [r3, #20]
}
if (fp->fptr % SS(fs) && nsect != fp->sect) { /* Fill sector cache if needed */
800f124: 687b ldr r3, [r7, #4]
800f126: 699b ldr r3, [r3, #24]
800f128: f3c3 0308 ubfx r3, r3, #0, #9
800f12c: 2b00 cmp r3, #0
800f12e: d040 beq.n 800f1b2 <f_lseek+0x48c>
800f130: 687b ldr r3, [r7, #4]
800f132: 6a1b ldr r3, [r3, #32]
800f134: 6b7a ldr r2, [r7, #52] @ 0x34
800f136: 429a cmp r2, r3
800f138: d03b beq.n 800f1b2 <f_lseek+0x48c>
#if !_FS_TINY
#if !_FS_READONLY
if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */
800f13a: 687b ldr r3, [r7, #4]
800f13c: 7d1b ldrb r3, [r3, #20]
800f13e: b25b sxtb r3, r3
800f140: 2b00 cmp r3, #0
800f142: da1d bge.n 800f180 <f_lseek+0x45a>
if (disk_write(fs->drv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR);
800f144: 68bb ldr r3, [r7, #8]
800f146: 7858 ldrb r0, [r3, #1]
800f148: 687b ldr r3, [r7, #4]
800f14a: f103 0130 add.w r1, r3, #48 @ 0x30
800f14e: 687b ldr r3, [r7, #4]
800f150: 6a1a ldr r2, [r3, #32]
800f152: 2301 movs r3, #1
800f154: f7fd fc10 bl 800c978 <disk_write>
800f158: 4603 mov r3, r0
800f15a: 2b00 cmp r3, #0
800f15c: d009 beq.n 800f172 <f_lseek+0x44c>
800f15e: 687b ldr r3, [r7, #4]
800f160: 2201 movs r2, #1
800f162: 755a strb r2, [r3, #21]
800f164: 68bb ldr r3, [r7, #8]
800f166: 2101 movs r1, #1
800f168: 4618 mov r0, r3
800f16a: f7fd fd59 bl 800cc20 <unlock_fs>
800f16e: 2301 movs r3, #1
800f170: e028 b.n 800f1c4 <f_lseek+0x49e>
fp->flag &= (BYTE)~FA_DIRTY;
800f172: 687b ldr r3, [r7, #4]
800f174: 7d1b ldrb r3, [r3, #20]
800f176: f003 037f and.w r3, r3, #127 @ 0x7f
800f17a: b2da uxtb r2, r3
800f17c: 687b ldr r3, [r7, #4]
800f17e: 751a strb r2, [r3, #20]
}
#endif
if (disk_read(fs->drv, fp->buf, nsect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); /* Fill sector cache */
800f180: 68bb ldr r3, [r7, #8]
800f182: 7858 ldrb r0, [r3, #1]
800f184: 687b ldr r3, [r7, #4]
800f186: f103 0130 add.w r1, r3, #48 @ 0x30
800f18a: 2301 movs r3, #1
800f18c: 6b7a ldr r2, [r7, #52] @ 0x34
800f18e: f7fd fbd3 bl 800c938 <disk_read>
800f192: 4603 mov r3, r0
800f194: 2b00 cmp r3, #0
800f196: d009 beq.n 800f1ac <f_lseek+0x486>
800f198: 687b ldr r3, [r7, #4]
800f19a: 2201 movs r2, #1
800f19c: 755a strb r2, [r3, #21]
800f19e: 68bb ldr r3, [r7, #8]
800f1a0: 2101 movs r1, #1
800f1a2: 4618 mov r0, r3
800f1a4: f7fd fd3c bl 800cc20 <unlock_fs>
800f1a8: 2301 movs r3, #1
800f1aa: e00b b.n 800f1c4 <f_lseek+0x49e>
#endif
fp->sect = nsect;
800f1ac: 687b ldr r3, [r7, #4]
800f1ae: 6b7a ldr r2, [r7, #52] @ 0x34
800f1b0: 621a str r2, [r3, #32]
}
}
LEAVE_FF(fs, res);
800f1b2: 68bb ldr r3, [r7, #8]
800f1b4: f897 203f ldrb.w r2, [r7, #63] @ 0x3f
800f1b8: 4611 mov r1, r2
800f1ba: 4618 mov r0, r3
800f1bc: f7fd fd30 bl 800cc20 <unlock_fs>
800f1c0: f897 303f ldrb.w r3, [r7, #63] @ 0x3f
}
800f1c4: 4618 mov r0, r3
800f1c6: 3740 adds r7, #64 @ 0x40
800f1c8: 46bd mov sp, r7
800f1ca: bd80 pop {r7, pc}
0800f1cc <f_mkfs>:
BYTE opt, /* Format option */
DWORD au, /* Size of allocation unit (cluster) [byte] */
void* work, /* Pointer to working buffer */
UINT len /* Size of working buffer */
)
{
800f1cc: b590 push {r4, r7, lr}
800f1ce: b0a1 sub sp, #132 @ 0x84
800f1d0: af00 add r7, sp, #0
800f1d2: 60f8 str r0, [r7, #12]
800f1d4: 607a str r2, [r7, #4]
800f1d6: 603b str r3, [r7, #0]
800f1d8: 460b mov r3, r1
800f1da: 72fb strb r3, [r7, #11]
const UINT n_fats = 1; /* Number of FATs for FAT12/16/32 volume (1 or 2) */
800f1dc: 2301 movs r3, #1
800f1de: 657b str r3, [r7, #84] @ 0x54
const UINT n_rootdir = 512; /* Number of root directory entries for FAT12/16 volume */
800f1e0: f44f 7300 mov.w r3, #512 @ 0x200
800f1e4: 653b str r3, [r7, #80] @ 0x50
DWORD tbl[3];
#endif
/* Check mounted drive and clear work area */
vol = get_ldnumber(&path); /* Get target logical drive */
800f1e6: f107 030c add.w r3, r7, #12
800f1ea: 4618 mov r0, r3
800f1ec: f7fe fde3 bl 800ddb6 <get_ldnumber>
800f1f0: 64f8 str r0, [r7, #76] @ 0x4c
if (vol < 0) return FR_INVALID_DRIVE;
800f1f2: 6cfb ldr r3, [r7, #76] @ 0x4c
800f1f4: 2b00 cmp r3, #0
800f1f6: da02 bge.n 800f1fe <f_mkfs+0x32>
800f1f8: 230b movs r3, #11
800f1fa: f000 bc2e b.w 800fa5a <f_mkfs+0x88e>
if (FatFs[vol]) FatFs[vol]->fs_type = 0; /* Clear the volume */
800f1fe: 4a99 ldr r2, [pc, #612] @ (800f464 <f_mkfs+0x298>)
800f200: 6cfb ldr r3, [r7, #76] @ 0x4c
800f202: f852 3023 ldr.w r3, [r2, r3, lsl #2]
800f206: 2b00 cmp r3, #0
800f208: d005 beq.n 800f216 <f_mkfs+0x4a>
800f20a: 4a96 ldr r2, [pc, #600] @ (800f464 <f_mkfs+0x298>)
800f20c: 6cfb ldr r3, [r7, #76] @ 0x4c
800f20e: f852 3023 ldr.w r3, [r2, r3, lsl #2]
800f212: 2200 movs r2, #0
800f214: 701a strb r2, [r3, #0]
pdrv = LD2PD(vol); /* Physical drive */
800f216: 6cfb ldr r3, [r7, #76] @ 0x4c
800f218: f887 304b strb.w r3, [r7, #75] @ 0x4b
part = LD2PT(vol); /* Partition (0:create as new, 1-4:get from partition table) */
800f21c: 2300 movs r3, #0
800f21e: f887 304a strb.w r3, [r7, #74] @ 0x4a
/* Check physical drive status */
stat = disk_initialize(pdrv);
800f222: f897 304b ldrb.w r3, [r7, #75] @ 0x4b
800f226: 4618 mov r0, r3
800f228: f7fd fb5e bl 800c8e8 <disk_initialize>
800f22c: 4603 mov r3, r0
800f22e: f887 3049 strb.w r3, [r7, #73] @ 0x49
if (stat & STA_NOINIT) return FR_NOT_READY;
800f232: f897 3049 ldrb.w r3, [r7, #73] @ 0x49
800f236: f003 0301 and.w r3, r3, #1
800f23a: 2b00 cmp r3, #0
800f23c: d002 beq.n 800f244 <f_mkfs+0x78>
800f23e: 2303 movs r3, #3
800f240: f000 bc0b b.w 800fa5a <f_mkfs+0x88e>
if (stat & STA_PROTECT) return FR_WRITE_PROTECTED;
800f244: f897 3049 ldrb.w r3, [r7, #73] @ 0x49
800f248: f003 0304 and.w r3, r3, #4
800f24c: 2b00 cmp r3, #0
800f24e: d002 beq.n 800f256 <f_mkfs+0x8a>
800f250: 230a movs r3, #10
800f252: f000 bc02 b.w 800fa5a <f_mkfs+0x88e>
if (disk_ioctl(pdrv, GET_BLOCK_SIZE, &sz_blk) != RES_OK || !sz_blk || sz_blk > 32768 || (sz_blk & (sz_blk - 1))) sz_blk = 1; /* Erase block to align data area */
800f256: f107 0224 add.w r2, r7, #36 @ 0x24
800f25a: f897 304b ldrb.w r3, [r7, #75] @ 0x4b
800f25e: 2103 movs r1, #3
800f260: 4618 mov r0, r3
800f262: f7fd fba9 bl 800c9b8 <disk_ioctl>
800f266: 4603 mov r3, r0
800f268: 2b00 cmp r3, #0
800f26a: d10c bne.n 800f286 <f_mkfs+0xba>
800f26c: 6a7b ldr r3, [r7, #36] @ 0x24
800f26e: 2b00 cmp r3, #0
800f270: d009 beq.n 800f286 <f_mkfs+0xba>
800f272: 6a7b ldr r3, [r7, #36] @ 0x24
800f274: f5b3 4f00 cmp.w r3, #32768 @ 0x8000
800f278: d805 bhi.n 800f286 <f_mkfs+0xba>
800f27a: 6a7b ldr r3, [r7, #36] @ 0x24
800f27c: 1e5a subs r2, r3, #1
800f27e: 6a7b ldr r3, [r7, #36] @ 0x24
800f280: 4013 ands r3, r2
800f282: 2b00 cmp r3, #0
800f284: d001 beq.n 800f28a <f_mkfs+0xbe>
800f286: 2301 movs r3, #1
800f288: 627b str r3, [r7, #36] @ 0x24
#if _MAX_SS != _MIN_SS /* Get sector size of the medium if variable sector size cfg. */
if (disk_ioctl(pdrv, GET_SECTOR_SIZE, &ss) != RES_OK) return FR_DISK_ERR;
if (ss > _MAX_SS || ss < _MIN_SS || (ss & (ss - 1))) return FR_DISK_ERR;
#else
ss = _MAX_SS;
800f28a: f44f 7300 mov.w r3, #512 @ 0x200
800f28e: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
#endif
if ((au != 0 && au < ss) || au > 0x1000000 || (au & (au - 1))) return FR_INVALID_PARAMETER; /* Check if au is valid */
800f292: 687b ldr r3, [r7, #4]
800f294: 2b00 cmp r3, #0
800f296: d004 beq.n 800f2a2 <f_mkfs+0xd6>
800f298: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800f29c: 687a ldr r2, [r7, #4]
800f29e: 429a cmp r2, r3
800f2a0: d309 bcc.n 800f2b6 <f_mkfs+0xea>
800f2a2: 687b ldr r3, [r7, #4]
800f2a4: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
800f2a8: d805 bhi.n 800f2b6 <f_mkfs+0xea>
800f2aa: 687b ldr r3, [r7, #4]
800f2ac: 1e5a subs r2, r3, #1
800f2ae: 687b ldr r3, [r7, #4]
800f2b0: 4013 ands r3, r2
800f2b2: 2b00 cmp r3, #0
800f2b4: d001 beq.n 800f2ba <f_mkfs+0xee>
800f2b6: 2313 movs r3, #19
800f2b8: e3cf b.n 800fa5a <f_mkfs+0x88e>
au /= ss; /* Cluster size in unit of sector */
800f2ba: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800f2be: 687a ldr r2, [r7, #4]
800f2c0: fbb2 f3f3 udiv r3, r2, r3
800f2c4: 607b str r3, [r7, #4]
/* Get working buffer */
buf = (BYTE*)work; /* Working buffer */
800f2c6: 683b ldr r3, [r7, #0]
800f2c8: 643b str r3, [r7, #64] @ 0x40
sz_buf = len / ss; /* Size of working buffer (sector) */
800f2ca: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800f2ce: f8d7 2090 ldr.w r2, [r7, #144] @ 0x90
800f2d2: fbb2 f3f3 udiv r3, r2, r3
800f2d6: 63fb str r3, [r7, #60] @ 0x3c
szb_buf = sz_buf * ss; /* Size of working buffer (byte) */
800f2d8: f8b7 2046 ldrh.w r2, [r7, #70] @ 0x46
800f2dc: 6bfb ldr r3, [r7, #60] @ 0x3c
800f2de: fb02 f303 mul.w r3, r2, r3
800f2e2: 63bb str r3, [r7, #56] @ 0x38
if (!szb_buf) return FR_MKFS_ABORTED;
800f2e4: 6bbb ldr r3, [r7, #56] @ 0x38
800f2e6: 2b00 cmp r3, #0
800f2e8: d101 bne.n 800f2ee <f_mkfs+0x122>
800f2ea: 230e movs r3, #14
800f2ec: e3b5 b.n 800fa5a <f_mkfs+0x88e>
if (!pte[PTE_System]) return FR_MKFS_ABORTED; /* No partition? */
b_vol = ld_dword(pte + PTE_StLba); /* Get volume start sector */
sz_vol = ld_dword(pte + PTE_SizLba); /* Get volume size */
} else {
/* Create a single-partition in this function */
if (disk_ioctl(pdrv, GET_SECTOR_COUNT, &sz_vol) != RES_OK) return FR_DISK_ERR;
800f2ee: f107 0220 add.w r2, r7, #32
800f2f2: f897 304b ldrb.w r3, [r7, #75] @ 0x4b
800f2f6: 2101 movs r1, #1
800f2f8: 4618 mov r0, r3
800f2fa: f7fd fb5d bl 800c9b8 <disk_ioctl>
800f2fe: 4603 mov r3, r0
800f300: 2b00 cmp r3, #0
800f302: d001 beq.n 800f308 <f_mkfs+0x13c>
800f304: 2301 movs r3, #1
800f306: e3a8 b.n 800fa5a <f_mkfs+0x88e>
b_vol = (opt & FM_SFD) ? 0 : 63; /* Volume start sector */
800f308: 7afb ldrb r3, [r7, #11]
800f30a: f003 0308 and.w r3, r3, #8
800f30e: 2b00 cmp r3, #0
800f310: d001 beq.n 800f316 <f_mkfs+0x14a>
800f312: 2300 movs r3, #0
800f314: e000 b.n 800f318 <f_mkfs+0x14c>
800f316: 233f movs r3, #63 @ 0x3f
800f318: 637b str r3, [r7, #52] @ 0x34
if (sz_vol < b_vol) return FR_MKFS_ABORTED;
800f31a: 6a3b ldr r3, [r7, #32]
800f31c: 6b7a ldr r2, [r7, #52] @ 0x34
800f31e: 429a cmp r2, r3
800f320: d901 bls.n 800f326 <f_mkfs+0x15a>
800f322: 230e movs r3, #14
800f324: e399 b.n 800fa5a <f_mkfs+0x88e>
sz_vol -= b_vol; /* Volume size */
800f326: 6a3a ldr r2, [r7, #32]
800f328: 6b7b ldr r3, [r7, #52] @ 0x34
800f32a: 1ad3 subs r3, r2, r3
800f32c: 623b str r3, [r7, #32]
}
if (sz_vol < 128) return FR_MKFS_ABORTED; /* Check if volume size is >=128s */
800f32e: 6a3b ldr r3, [r7, #32]
800f330: 2b7f cmp r3, #127 @ 0x7f
800f332: d801 bhi.n 800f338 <f_mkfs+0x16c>
800f334: 230e movs r3, #14
800f336: e390 b.n 800fa5a <f_mkfs+0x88e>
if (_FS_EXFAT && (opt & FM_EXFAT)) { /* exFAT possible? */
if ((opt & FM_ANY) == FM_EXFAT || sz_vol >= 0x4000000 || au > 128) { /* exFAT only, vol >= 64Ms or au > 128s ? */
fmt = FS_EXFAT; break;
}
}
if (au > 128) return FR_INVALID_PARAMETER; /* Too large au for FAT/FAT32 */
800f338: 687b ldr r3, [r7, #4]
800f33a: 2b80 cmp r3, #128 @ 0x80
800f33c: d901 bls.n 800f342 <f_mkfs+0x176>
800f33e: 2313 movs r3, #19
800f340: e38b b.n 800fa5a <f_mkfs+0x88e>
if (opt & FM_FAT32) { /* FAT32 possible? */
800f342: 7afb ldrb r3, [r7, #11]
800f344: f003 0302 and.w r3, r3, #2
800f348: 2b00 cmp r3, #0
800f34a: d00d beq.n 800f368 <f_mkfs+0x19c>
if ((opt & FM_ANY) == FM_FAT32 || !(opt & FM_FAT)) { /* FAT32 only or no-FAT? */
800f34c: 7afb ldrb r3, [r7, #11]
800f34e: f003 0307 and.w r3, r3, #7
800f352: 2b02 cmp r3, #2
800f354: d004 beq.n 800f360 <f_mkfs+0x194>
800f356: 7afb ldrb r3, [r7, #11]
800f358: f003 0301 and.w r3, r3, #1
800f35c: 2b00 cmp r3, #0
800f35e: d103 bne.n 800f368 <f_mkfs+0x19c>
fmt = FS_FAT32; break;
800f360: 2303 movs r3, #3
800f362: f887 305f strb.w r3, [r7, #95] @ 0x5f
800f366: e009 b.n 800f37c <f_mkfs+0x1b0>
}
}
if (!(opt & FM_FAT)) return FR_INVALID_PARAMETER; /* no-FAT? */
800f368: 7afb ldrb r3, [r7, #11]
800f36a: f003 0301 and.w r3, r3, #1
800f36e: 2b00 cmp r3, #0
800f370: d101 bne.n 800f376 <f_mkfs+0x1aa>
800f372: 2313 movs r3, #19
800f374: e371 b.n 800fa5a <f_mkfs+0x88e>
fmt = FS_FAT16;
800f376: 2302 movs r3, #2
800f378: f887 305f strb.w r3, [r7, #95] @ 0x5f
} else
#endif /* _FS_EXFAT */
{ /* Create an FAT12/16/32 volume */
do {
pau = au;
800f37c: 687b ldr r3, [r7, #4]
800f37e: 663b str r3, [r7, #96] @ 0x60
/* Pre-determine number of clusters and FAT sub-type */
if (fmt == FS_FAT32) { /* FAT32 volume */
800f380: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800f384: 2b03 cmp r3, #3
800f386: d13e bne.n 800f406 <f_mkfs+0x23a>
if (!pau) { /* au auto-selection */
800f388: 6e3b ldr r3, [r7, #96] @ 0x60
800f38a: 2b00 cmp r3, #0
800f38c: d11b bne.n 800f3c6 <f_mkfs+0x1fa>
n = sz_vol / 0x20000; /* Volume size in unit of 128KS */
800f38e: 6a3b ldr r3, [r7, #32]
800f390: 0c5b lsrs r3, r3, #17
800f392: 66fb str r3, [r7, #108] @ 0x6c
for (i = 0, pau = 1; cst32[i] && cst32[i] <= n; i++, pau <<= 1) ; /* Get from table */
800f394: 2300 movs r3, #0
800f396: 65bb str r3, [r7, #88] @ 0x58
800f398: 2301 movs r3, #1
800f39a: 663b str r3, [r7, #96] @ 0x60
800f39c: e005 b.n 800f3aa <f_mkfs+0x1de>
800f39e: 6dbb ldr r3, [r7, #88] @ 0x58
800f3a0: 3301 adds r3, #1
800f3a2: 65bb str r3, [r7, #88] @ 0x58
800f3a4: 6e3b ldr r3, [r7, #96] @ 0x60
800f3a6: 005b lsls r3, r3, #1
800f3a8: 663b str r3, [r7, #96] @ 0x60
800f3aa: 4a2f ldr r2, [pc, #188] @ (800f468 <f_mkfs+0x29c>)
800f3ac: 6dbb ldr r3, [r7, #88] @ 0x58
800f3ae: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
800f3b2: 2b00 cmp r3, #0
800f3b4: d007 beq.n 800f3c6 <f_mkfs+0x1fa>
800f3b6: 4a2c ldr r2, [pc, #176] @ (800f468 <f_mkfs+0x29c>)
800f3b8: 6dbb ldr r3, [r7, #88] @ 0x58
800f3ba: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
800f3be: 461a mov r2, r3
800f3c0: 6efb ldr r3, [r7, #108] @ 0x6c
800f3c2: 4293 cmp r3, r2
800f3c4: d2eb bcs.n 800f39e <f_mkfs+0x1d2>
}
n_clst = sz_vol / pau; /* Number of clusters */
800f3c6: 6a3a ldr r2, [r7, #32]
800f3c8: 6e3b ldr r3, [r7, #96] @ 0x60
800f3ca: fbb2 f3f3 udiv r3, r2, r3
800f3ce: 633b str r3, [r7, #48] @ 0x30
sz_fat = (n_clst * 4 + 8 + ss - 1) / ss; /* FAT size [sector] */
800f3d0: 6b3b ldr r3, [r7, #48] @ 0x30
800f3d2: 3302 adds r3, #2
800f3d4: 009a lsls r2, r3, #2
800f3d6: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800f3da: 4413 add r3, r2
800f3dc: 1e5a subs r2, r3, #1
800f3de: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800f3e2: fbb2 f3f3 udiv r3, r2, r3
800f3e6: 67bb str r3, [r7, #120] @ 0x78
sz_rsv = 32; /* Number of reserved sectors */
800f3e8: 2320 movs r3, #32
800f3ea: 667b str r3, [r7, #100] @ 0x64
sz_dir = 0; /* No static directory */
800f3ec: 2300 movs r3, #0
800f3ee: 67fb str r3, [r7, #124] @ 0x7c
if (n_clst <= MAX_FAT16 || n_clst > MAX_FAT32) return FR_MKFS_ABORTED;
800f3f0: 6b3b ldr r3, [r7, #48] @ 0x30
800f3f2: f64f 72f5 movw r2, #65525 @ 0xfff5
800f3f6: 4293 cmp r3, r2
800f3f8: d903 bls.n 800f402 <f_mkfs+0x236>
800f3fa: 6b3b ldr r3, [r7, #48] @ 0x30
800f3fc: 4a1b ldr r2, [pc, #108] @ (800f46c <f_mkfs+0x2a0>)
800f3fe: 4293 cmp r3, r2
800f400: d956 bls.n 800f4b0 <f_mkfs+0x2e4>
800f402: 230e movs r3, #14
800f404: e329 b.n 800fa5a <f_mkfs+0x88e>
} else { /* FAT12/16 volume */
if (!pau) { /* au auto-selection */
800f406: 6e3b ldr r3, [r7, #96] @ 0x60
800f408: 2b00 cmp r3, #0
800f40a: d11b bne.n 800f444 <f_mkfs+0x278>
n = sz_vol / 0x1000; /* Volume size in unit of 4KS */
800f40c: 6a3b ldr r3, [r7, #32]
800f40e: 0b1b lsrs r3, r3, #12
800f410: 66fb str r3, [r7, #108] @ 0x6c
for (i = 0, pau = 1; cst[i] && cst[i] <= n; i++, pau <<= 1) ; /* Get from table */
800f412: 2300 movs r3, #0
800f414: 65bb str r3, [r7, #88] @ 0x58
800f416: 2301 movs r3, #1
800f418: 663b str r3, [r7, #96] @ 0x60
800f41a: e005 b.n 800f428 <f_mkfs+0x25c>
800f41c: 6dbb ldr r3, [r7, #88] @ 0x58
800f41e: 3301 adds r3, #1
800f420: 65bb str r3, [r7, #88] @ 0x58
800f422: 6e3b ldr r3, [r7, #96] @ 0x60
800f424: 005b lsls r3, r3, #1
800f426: 663b str r3, [r7, #96] @ 0x60
800f428: 4a11 ldr r2, [pc, #68] @ (800f470 <f_mkfs+0x2a4>)
800f42a: 6dbb ldr r3, [r7, #88] @ 0x58
800f42c: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
800f430: 2b00 cmp r3, #0
800f432: d007 beq.n 800f444 <f_mkfs+0x278>
800f434: 4a0e ldr r2, [pc, #56] @ (800f470 <f_mkfs+0x2a4>)
800f436: 6dbb ldr r3, [r7, #88] @ 0x58
800f438: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
800f43c: 461a mov r2, r3
800f43e: 6efb ldr r3, [r7, #108] @ 0x6c
800f440: 4293 cmp r3, r2
800f442: d2eb bcs.n 800f41c <f_mkfs+0x250>
}
n_clst = sz_vol / pau;
800f444: 6a3a ldr r2, [r7, #32]
800f446: 6e3b ldr r3, [r7, #96] @ 0x60
800f448: fbb2 f3f3 udiv r3, r2, r3
800f44c: 633b str r3, [r7, #48] @ 0x30
if (n_clst > MAX_FAT12) {
800f44e: 6b3b ldr r3, [r7, #48] @ 0x30
800f450: f640 72f5 movw r2, #4085 @ 0xff5
800f454: 4293 cmp r3, r2
800f456: d90d bls.n 800f474 <f_mkfs+0x2a8>
n = n_clst * 2 + 4; /* FAT size [byte] */
800f458: 6b3b ldr r3, [r7, #48] @ 0x30
800f45a: 3302 adds r3, #2
800f45c: 005b lsls r3, r3, #1
800f45e: 66fb str r3, [r7, #108] @ 0x6c
800f460: e013 b.n 800f48a <f_mkfs+0x2be>
800f462: bf00 nop
800f464: 20010124 .word 0x20010124
800f468: 08013b70 .word 0x08013b70
800f46c: 0ffffff5 .word 0x0ffffff5
800f470: 08013b80 .word 0x08013b80
} else {
fmt = FS_FAT12;
800f474: 2301 movs r3, #1
800f476: f887 305f strb.w r3, [r7, #95] @ 0x5f
n = (n_clst * 3 + 1) / 2 + 3; /* FAT size [byte] */
800f47a: 6b3a ldr r2, [r7, #48] @ 0x30
800f47c: 4613 mov r3, r2
800f47e: 005b lsls r3, r3, #1
800f480: 4413 add r3, r2
800f482: 3301 adds r3, #1
800f484: 085b lsrs r3, r3, #1
800f486: 3303 adds r3, #3
800f488: 66fb str r3, [r7, #108] @ 0x6c
}
sz_fat = (n + ss - 1) / ss; /* FAT size [sector] */
800f48a: f8b7 2046 ldrh.w r2, [r7, #70] @ 0x46
800f48e: 6efb ldr r3, [r7, #108] @ 0x6c
800f490: 4413 add r3, r2
800f492: 1e5a subs r2, r3, #1
800f494: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800f498: fbb2 f3f3 udiv r3, r2, r3
800f49c: 67bb str r3, [r7, #120] @ 0x78
sz_rsv = 1; /* Number of reserved sectors */
800f49e: 2301 movs r3, #1
800f4a0: 667b str r3, [r7, #100] @ 0x64
sz_dir = (DWORD)n_rootdir * SZDIRE / ss; /* Rootdir size [sector] */
800f4a2: 6d3b ldr r3, [r7, #80] @ 0x50
800f4a4: 015a lsls r2, r3, #5
800f4a6: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800f4aa: fbb2 f3f3 udiv r3, r2, r3
800f4ae: 67fb str r3, [r7, #124] @ 0x7c
}
b_fat = b_vol + sz_rsv; /* FAT base */
800f4b0: 6b7a ldr r2, [r7, #52] @ 0x34
800f4b2: 6e7b ldr r3, [r7, #100] @ 0x64
800f4b4: 4413 add r3, r2
800f4b6: 66bb str r3, [r7, #104] @ 0x68
b_data = b_fat + sz_fat * n_fats + sz_dir; /* Data base */
800f4b8: 6fbb ldr r3, [r7, #120] @ 0x78
800f4ba: 6d7a ldr r2, [r7, #84] @ 0x54
800f4bc: fb03 f202 mul.w r2, r3, r2
800f4c0: 6ebb ldr r3, [r7, #104] @ 0x68
800f4c2: 4413 add r3, r2
800f4c4: 6ffa ldr r2, [r7, #124] @ 0x7c
800f4c6: 4413 add r3, r2
800f4c8: 62fb str r3, [r7, #44] @ 0x2c
/* Align data base to erase block boundary (for flash memory media) */
n = ((b_data + sz_blk - 1) & ~(sz_blk - 1)) - b_data; /* Next nearest erase block from current data base */
800f4ca: 6a7a ldr r2, [r7, #36] @ 0x24
800f4cc: 6afb ldr r3, [r7, #44] @ 0x2c
800f4ce: 4413 add r3, r2
800f4d0: 1e5a subs r2, r3, #1
800f4d2: 6a7b ldr r3, [r7, #36] @ 0x24
800f4d4: 425b negs r3, r3
800f4d6: 401a ands r2, r3
800f4d8: 6afb ldr r3, [r7, #44] @ 0x2c
800f4da: 1ad3 subs r3, r2, r3
800f4dc: 66fb str r3, [r7, #108] @ 0x6c
if (fmt == FS_FAT32) { /* FAT32: Move FAT base */
800f4de: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800f4e2: 2b03 cmp r3, #3
800f4e4: d108 bne.n 800f4f8 <f_mkfs+0x32c>
sz_rsv += n; b_fat += n;
800f4e6: 6e7a ldr r2, [r7, #100] @ 0x64
800f4e8: 6efb ldr r3, [r7, #108] @ 0x6c
800f4ea: 4413 add r3, r2
800f4ec: 667b str r3, [r7, #100] @ 0x64
800f4ee: 6eba ldr r2, [r7, #104] @ 0x68
800f4f0: 6efb ldr r3, [r7, #108] @ 0x6c
800f4f2: 4413 add r3, r2
800f4f4: 66bb str r3, [r7, #104] @ 0x68
800f4f6: e006 b.n 800f506 <f_mkfs+0x33a>
} else { /* FAT12/16: Expand FAT size */
sz_fat += n / n_fats;
800f4f8: 6efa ldr r2, [r7, #108] @ 0x6c
800f4fa: 6d7b ldr r3, [r7, #84] @ 0x54
800f4fc: fbb2 f3f3 udiv r3, r2, r3
800f500: 6fba ldr r2, [r7, #120] @ 0x78
800f502: 4413 add r3, r2
800f504: 67bb str r3, [r7, #120] @ 0x78
}
/* Determine number of clusters and final check of validity of the FAT sub-type */
if (sz_vol < b_data + pau * 16 - b_vol) return FR_MKFS_ABORTED; /* Too small volume */
800f506: 6e3b ldr r3, [r7, #96] @ 0x60
800f508: 011a lsls r2, r3, #4
800f50a: 6afb ldr r3, [r7, #44] @ 0x2c
800f50c: 441a add r2, r3
800f50e: 6b7b ldr r3, [r7, #52] @ 0x34
800f510: 1ad2 subs r2, r2, r3
800f512: 6a3b ldr r3, [r7, #32]
800f514: 429a cmp r2, r3
800f516: d901 bls.n 800f51c <f_mkfs+0x350>
800f518: 230e movs r3, #14
800f51a: e29e b.n 800fa5a <f_mkfs+0x88e>
n_clst = (sz_vol - sz_rsv - sz_fat * n_fats - sz_dir) / pau;
800f51c: 6a3a ldr r2, [r7, #32]
800f51e: 6e7b ldr r3, [r7, #100] @ 0x64
800f520: 1ad2 subs r2, r2, r3
800f522: 6fbb ldr r3, [r7, #120] @ 0x78
800f524: 6d79 ldr r1, [r7, #84] @ 0x54
800f526: fb01 f303 mul.w r3, r1, r3
800f52a: 1ad2 subs r2, r2, r3
800f52c: 6ffb ldr r3, [r7, #124] @ 0x7c
800f52e: 1ad2 subs r2, r2, r3
800f530: 6e3b ldr r3, [r7, #96] @ 0x60
800f532: fbb2 f3f3 udiv r3, r2, r3
800f536: 633b str r3, [r7, #48] @ 0x30
if (fmt == FS_FAT32) {
800f538: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800f53c: 2b03 cmp r3, #3
800f53e: d10f bne.n 800f560 <f_mkfs+0x394>
if (n_clst <= MAX_FAT16) { /* Too few clusters for FAT32 */
800f540: 6b3b ldr r3, [r7, #48] @ 0x30
800f542: f64f 72f5 movw r2, #65525 @ 0xfff5
800f546: 4293 cmp r3, r2
800f548: d80a bhi.n 800f560 <f_mkfs+0x394>
if (!au && (au = pau / 2) != 0) continue; /* Adjust cluster size and retry */
800f54a: 687b ldr r3, [r7, #4]
800f54c: 2b00 cmp r3, #0
800f54e: d105 bne.n 800f55c <f_mkfs+0x390>
800f550: 6e3b ldr r3, [r7, #96] @ 0x60
800f552: 085b lsrs r3, r3, #1
800f554: 607b str r3, [r7, #4]
800f556: 687b ldr r3, [r7, #4]
800f558: 2b00 cmp r3, #0
800f55a: d144 bne.n 800f5e6 <f_mkfs+0x41a>
return FR_MKFS_ABORTED;
800f55c: 230e movs r3, #14
800f55e: e27c b.n 800fa5a <f_mkfs+0x88e>
}
}
if (fmt == FS_FAT16) {
800f560: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800f564: 2b02 cmp r3, #2
800f566: d133 bne.n 800f5d0 <f_mkfs+0x404>
if (n_clst > MAX_FAT16) { /* Too many clusters for FAT16 */
800f568: 6b3b ldr r3, [r7, #48] @ 0x30
800f56a: f64f 72f5 movw r2, #65525 @ 0xfff5
800f56e: 4293 cmp r3, r2
800f570: d91e bls.n 800f5b0 <f_mkfs+0x3e4>
if (!au && (pau * 2) <= 64) {
800f572: 687b ldr r3, [r7, #4]
800f574: 2b00 cmp r3, #0
800f576: d107 bne.n 800f588 <f_mkfs+0x3bc>
800f578: 6e3b ldr r3, [r7, #96] @ 0x60
800f57a: 005b lsls r3, r3, #1
800f57c: 2b40 cmp r3, #64 @ 0x40
800f57e: d803 bhi.n 800f588 <f_mkfs+0x3bc>
au = pau * 2; continue; /* Adjust cluster size and retry */
800f580: 6e3b ldr r3, [r7, #96] @ 0x60
800f582: 005b lsls r3, r3, #1
800f584: 607b str r3, [r7, #4]
800f586: e033 b.n 800f5f0 <f_mkfs+0x424>
}
if ((opt & FM_FAT32)) {
800f588: 7afb ldrb r3, [r7, #11]
800f58a: f003 0302 and.w r3, r3, #2
800f58e: 2b00 cmp r3, #0
800f590: d003 beq.n 800f59a <f_mkfs+0x3ce>
fmt = FS_FAT32; continue; /* Switch type to FAT32 and retry */
800f592: 2303 movs r3, #3
800f594: f887 305f strb.w r3, [r7, #95] @ 0x5f
800f598: e02a b.n 800f5f0 <f_mkfs+0x424>
}
if (!au && (au = pau * 2) <= 128) continue; /* Adjust cluster size and retry */
800f59a: 687b ldr r3, [r7, #4]
800f59c: 2b00 cmp r3, #0
800f59e: d105 bne.n 800f5ac <f_mkfs+0x3e0>
800f5a0: 6e3b ldr r3, [r7, #96] @ 0x60
800f5a2: 005b lsls r3, r3, #1
800f5a4: 607b str r3, [r7, #4]
800f5a6: 687b ldr r3, [r7, #4]
800f5a8: 2b80 cmp r3, #128 @ 0x80
800f5aa: d91e bls.n 800f5ea <f_mkfs+0x41e>
return FR_MKFS_ABORTED;
800f5ac: 230e movs r3, #14
800f5ae: e254 b.n 800fa5a <f_mkfs+0x88e>
}
if (n_clst <= MAX_FAT12) { /* Too few clusters for FAT16 */
800f5b0: 6b3b ldr r3, [r7, #48] @ 0x30
800f5b2: f640 72f5 movw r2, #4085 @ 0xff5
800f5b6: 4293 cmp r3, r2
800f5b8: d80a bhi.n 800f5d0 <f_mkfs+0x404>
if (!au && (au = pau * 2) <= 128) continue; /* Adjust cluster size and retry */
800f5ba: 687b ldr r3, [r7, #4]
800f5bc: 2b00 cmp r3, #0
800f5be: d105 bne.n 800f5cc <f_mkfs+0x400>
800f5c0: 6e3b ldr r3, [r7, #96] @ 0x60
800f5c2: 005b lsls r3, r3, #1
800f5c4: 607b str r3, [r7, #4]
800f5c6: 687b ldr r3, [r7, #4]
800f5c8: 2b80 cmp r3, #128 @ 0x80
800f5ca: d910 bls.n 800f5ee <f_mkfs+0x422>
return FR_MKFS_ABORTED;
800f5cc: 230e movs r3, #14
800f5ce: e244 b.n 800fa5a <f_mkfs+0x88e>
}
}
if (fmt == FS_FAT12 && n_clst > MAX_FAT12) return FR_MKFS_ABORTED; /* Too many clusters for FAT12 */
800f5d0: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800f5d4: 2b01 cmp r3, #1
800f5d6: d10c bne.n 800f5f2 <f_mkfs+0x426>
800f5d8: 6b3b ldr r3, [r7, #48] @ 0x30
800f5da: f640 72f5 movw r2, #4085 @ 0xff5
800f5de: 4293 cmp r3, r2
800f5e0: d907 bls.n 800f5f2 <f_mkfs+0x426>
800f5e2: 230e movs r3, #14
800f5e4: e239 b.n 800fa5a <f_mkfs+0x88e>
if (!au && (au = pau / 2) != 0) continue; /* Adjust cluster size and retry */
800f5e6: bf00 nop
800f5e8: e6c8 b.n 800f37c <f_mkfs+0x1b0>
if (!au && (au = pau * 2) <= 128) continue; /* Adjust cluster size and retry */
800f5ea: bf00 nop
800f5ec: e6c6 b.n 800f37c <f_mkfs+0x1b0>
if (!au && (au = pau * 2) <= 128) continue; /* Adjust cluster size and retry */
800f5ee: bf00 nop
pau = au;
800f5f0: e6c4 b.n 800f37c <f_mkfs+0x1b0>
/* Ok, it is the valid cluster configuration */
break;
800f5f2: bf00 nop
} while (1);
#if _USE_TRIM
tbl[0] = b_vol; tbl[1] = b_vol + sz_vol - 1; /* Inform the device the volume area can be erased */
800f5f4: 6b7b ldr r3, [r7, #52] @ 0x34
800f5f6: 617b str r3, [r7, #20]
800f5f8: 6a3a ldr r2, [r7, #32]
800f5fa: 6b7b ldr r3, [r7, #52] @ 0x34
800f5fc: 4413 add r3, r2
800f5fe: 3b01 subs r3, #1
800f600: 61bb str r3, [r7, #24]
disk_ioctl(pdrv, CTRL_TRIM, tbl);
800f602: f107 0214 add.w r2, r7, #20
800f606: f897 304b ldrb.w r3, [r7, #75] @ 0x4b
800f60a: 2104 movs r1, #4
800f60c: 4618 mov r0, r3
800f60e: f7fd f9d3 bl 800c9b8 <disk_ioctl>
#endif
/* Create FAT VBR */
mem_set(buf, 0, ss);
800f612: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800f616: 461a mov r2, r3
800f618: 2100 movs r1, #0
800f61a: 6c38 ldr r0, [r7, #64] @ 0x40
800f61c: f7fd fa8d bl 800cb3a <mem_set>
mem_cpy(buf + BS_JmpBoot, "\xEB\xFE\x90" "MSDOS5.0", 11);/* Boot jump code (x86), OEM name */
800f620: 220b movs r2, #11
800f622: 49b4 ldr r1, [pc, #720] @ (800f8f4 <f_mkfs+0x728>)
800f624: 6c38 ldr r0, [r7, #64] @ 0x40
800f626: f7fd fa67 bl 800caf8 <mem_cpy>
st_word(buf + BPB_BytsPerSec, ss); /* Sector size [byte] */
800f62a: 6c3b ldr r3, [r7, #64] @ 0x40
800f62c: 330b adds r3, #11
800f62e: f8b7 2046 ldrh.w r2, [r7, #70] @ 0x46
800f632: 4611 mov r1, r2
800f634: 4618 mov r0, r3
800f636: f7fd fa18 bl 800ca6a <st_word>
buf[BPB_SecPerClus] = (BYTE)pau; /* Cluster size [sector] */
800f63a: 6c3b ldr r3, [r7, #64] @ 0x40
800f63c: 330d adds r3, #13
800f63e: 6e3a ldr r2, [r7, #96] @ 0x60
800f640: b2d2 uxtb r2, r2
800f642: 701a strb r2, [r3, #0]
st_word(buf + BPB_RsvdSecCnt, (WORD)sz_rsv); /* Size of reserved area */
800f644: 6c3b ldr r3, [r7, #64] @ 0x40
800f646: 330e adds r3, #14
800f648: 6e7a ldr r2, [r7, #100] @ 0x64
800f64a: b292 uxth r2, r2
800f64c: 4611 mov r1, r2
800f64e: 4618 mov r0, r3
800f650: f7fd fa0b bl 800ca6a <st_word>
buf[BPB_NumFATs] = (BYTE)n_fats; /* Number of FATs */
800f654: 6c3b ldr r3, [r7, #64] @ 0x40
800f656: 3310 adds r3, #16
800f658: 6d7a ldr r2, [r7, #84] @ 0x54
800f65a: b2d2 uxtb r2, r2
800f65c: 701a strb r2, [r3, #0]
st_word(buf + BPB_RootEntCnt, (WORD)((fmt == FS_FAT32) ? 0 : n_rootdir)); /* Number of root directory entries */
800f65e: 6c3b ldr r3, [r7, #64] @ 0x40
800f660: f103 0211 add.w r2, r3, #17
800f664: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800f668: 2b03 cmp r3, #3
800f66a: d002 beq.n 800f672 <f_mkfs+0x4a6>
800f66c: 6d3b ldr r3, [r7, #80] @ 0x50
800f66e: b29b uxth r3, r3
800f670: e000 b.n 800f674 <f_mkfs+0x4a8>
800f672: 2300 movs r3, #0
800f674: 4619 mov r1, r3
800f676: 4610 mov r0, r2
800f678: f7fd f9f7 bl 800ca6a <st_word>
if (sz_vol < 0x10000) {
800f67c: 6a3b ldr r3, [r7, #32]
800f67e: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
800f682: d208 bcs.n 800f696 <f_mkfs+0x4ca>
st_word(buf + BPB_TotSec16, (WORD)sz_vol); /* Volume size in 16-bit LBA */
800f684: 6c3b ldr r3, [r7, #64] @ 0x40
800f686: 3313 adds r3, #19
800f688: 6a3a ldr r2, [r7, #32]
800f68a: b292 uxth r2, r2
800f68c: 4611 mov r1, r2
800f68e: 4618 mov r0, r3
800f690: f7fd f9eb bl 800ca6a <st_word>
800f694: e006 b.n 800f6a4 <f_mkfs+0x4d8>
} else {
st_dword(buf + BPB_TotSec32, sz_vol); /* Volume size in 32-bit LBA */
800f696: 6c3b ldr r3, [r7, #64] @ 0x40
800f698: 3320 adds r3, #32
800f69a: 6a3a ldr r2, [r7, #32]
800f69c: 4611 mov r1, r2
800f69e: 4618 mov r0, r3
800f6a0: f7fd f9fe bl 800caa0 <st_dword>
}
buf[BPB_Media] = 0xF8; /* Media descriptor byte */
800f6a4: 6c3b ldr r3, [r7, #64] @ 0x40
800f6a6: 3315 adds r3, #21
800f6a8: 22f8 movs r2, #248 @ 0xf8
800f6aa: 701a strb r2, [r3, #0]
st_word(buf + BPB_SecPerTrk, 63); /* Number of sectors per track (for int13) */
800f6ac: 6c3b ldr r3, [r7, #64] @ 0x40
800f6ae: 3318 adds r3, #24
800f6b0: 213f movs r1, #63 @ 0x3f
800f6b2: 4618 mov r0, r3
800f6b4: f7fd f9d9 bl 800ca6a <st_word>
st_word(buf + BPB_NumHeads, 255); /* Number of heads (for int13) */
800f6b8: 6c3b ldr r3, [r7, #64] @ 0x40
800f6ba: 331a adds r3, #26
800f6bc: 21ff movs r1, #255 @ 0xff
800f6be: 4618 mov r0, r3
800f6c0: f7fd f9d3 bl 800ca6a <st_word>
st_dword(buf + BPB_HiddSec, b_vol); /* Volume offset in the physical drive [sector] */
800f6c4: 6c3b ldr r3, [r7, #64] @ 0x40
800f6c6: 331c adds r3, #28
800f6c8: 6b79 ldr r1, [r7, #52] @ 0x34
800f6ca: 4618 mov r0, r3
800f6cc: f7fd f9e8 bl 800caa0 <st_dword>
if (fmt == FS_FAT32) {
800f6d0: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800f6d4: 2b03 cmp r3, #3
800f6d6: d131 bne.n 800f73c <f_mkfs+0x570>
st_dword(buf + BS_VolID32, GET_FATTIME()); /* VSN */
800f6d8: 6c3b ldr r3, [r7, #64] @ 0x40
800f6da: f103 0443 add.w r4, r3, #67 @ 0x43
800f6de: f7f9 fbe5 bl 8008eac <get_fattime>
800f6e2: 4603 mov r3, r0
800f6e4: 4619 mov r1, r3
800f6e6: 4620 mov r0, r4
800f6e8: f7fd f9da bl 800caa0 <st_dword>
st_dword(buf + BPB_FATSz32, sz_fat); /* FAT size [sector] */
800f6ec: 6c3b ldr r3, [r7, #64] @ 0x40
800f6ee: 3324 adds r3, #36 @ 0x24
800f6f0: 6fb9 ldr r1, [r7, #120] @ 0x78
800f6f2: 4618 mov r0, r3
800f6f4: f7fd f9d4 bl 800caa0 <st_dword>
st_dword(buf + BPB_RootClus32, 2); /* Root directory cluster # (2) */
800f6f8: 6c3b ldr r3, [r7, #64] @ 0x40
800f6fa: 332c adds r3, #44 @ 0x2c
800f6fc: 2102 movs r1, #2
800f6fe: 4618 mov r0, r3
800f700: f7fd f9ce bl 800caa0 <st_dword>
st_word(buf + BPB_FSInfo32, 1); /* Offset of FSINFO sector (VBR + 1) */
800f704: 6c3b ldr r3, [r7, #64] @ 0x40
800f706: 3330 adds r3, #48 @ 0x30
800f708: 2101 movs r1, #1
800f70a: 4618 mov r0, r3
800f70c: f7fd f9ad bl 800ca6a <st_word>
st_word(buf + BPB_BkBootSec32, 6); /* Offset of backup VBR (VBR + 6) */
800f710: 6c3b ldr r3, [r7, #64] @ 0x40
800f712: 3332 adds r3, #50 @ 0x32
800f714: 2106 movs r1, #6
800f716: 4618 mov r0, r3
800f718: f7fd f9a7 bl 800ca6a <st_word>
buf[BS_DrvNum32] = 0x80; /* Drive number (for int13) */
800f71c: 6c3b ldr r3, [r7, #64] @ 0x40
800f71e: 3340 adds r3, #64 @ 0x40
800f720: 2280 movs r2, #128 @ 0x80
800f722: 701a strb r2, [r3, #0]
buf[BS_BootSig32] = 0x29; /* Extended boot signature */
800f724: 6c3b ldr r3, [r7, #64] @ 0x40
800f726: 3342 adds r3, #66 @ 0x42
800f728: 2229 movs r2, #41 @ 0x29
800f72a: 701a strb r2, [r3, #0]
mem_cpy(buf + BS_VolLab32, "NO NAME " "FAT32 ", 19); /* Volume label, FAT signature */
800f72c: 6c3b ldr r3, [r7, #64] @ 0x40
800f72e: 3347 adds r3, #71 @ 0x47
800f730: 2213 movs r2, #19
800f732: 4971 ldr r1, [pc, #452] @ (800f8f8 <f_mkfs+0x72c>)
800f734: 4618 mov r0, r3
800f736: f7fd f9df bl 800caf8 <mem_cpy>
800f73a: e020 b.n 800f77e <f_mkfs+0x5b2>
} else {
st_dword(buf + BS_VolID, GET_FATTIME()); /* VSN */
800f73c: 6c3b ldr r3, [r7, #64] @ 0x40
800f73e: f103 0427 add.w r4, r3, #39 @ 0x27
800f742: f7f9 fbb3 bl 8008eac <get_fattime>
800f746: 4603 mov r3, r0
800f748: 4619 mov r1, r3
800f74a: 4620 mov r0, r4
800f74c: f7fd f9a8 bl 800caa0 <st_dword>
st_word(buf + BPB_FATSz16, (WORD)sz_fat); /* FAT size [sector] */
800f750: 6c3b ldr r3, [r7, #64] @ 0x40
800f752: 3316 adds r3, #22
800f754: 6fba ldr r2, [r7, #120] @ 0x78
800f756: b292 uxth r2, r2
800f758: 4611 mov r1, r2
800f75a: 4618 mov r0, r3
800f75c: f7fd f985 bl 800ca6a <st_word>
buf[BS_DrvNum] = 0x80; /* Drive number (for int13) */
800f760: 6c3b ldr r3, [r7, #64] @ 0x40
800f762: 3324 adds r3, #36 @ 0x24
800f764: 2280 movs r2, #128 @ 0x80
800f766: 701a strb r2, [r3, #0]
buf[BS_BootSig] = 0x29; /* Extended boot signature */
800f768: 6c3b ldr r3, [r7, #64] @ 0x40
800f76a: 3326 adds r3, #38 @ 0x26
800f76c: 2229 movs r2, #41 @ 0x29
800f76e: 701a strb r2, [r3, #0]
mem_cpy(buf + BS_VolLab, "NO NAME " "FAT ", 19); /* Volume label, FAT signature */
800f770: 6c3b ldr r3, [r7, #64] @ 0x40
800f772: 332b adds r3, #43 @ 0x2b
800f774: 2213 movs r2, #19
800f776: 4961 ldr r1, [pc, #388] @ (800f8fc <f_mkfs+0x730>)
800f778: 4618 mov r0, r3
800f77a: f7fd f9bd bl 800caf8 <mem_cpy>
}
st_word(buf + BS_55AA, 0xAA55); /* Signature (offset is fixed here regardless of sector size) */
800f77e: 6c3b ldr r3, [r7, #64] @ 0x40
800f780: f503 73ff add.w r3, r3, #510 @ 0x1fe
800f784: f64a 2155 movw r1, #43605 @ 0xaa55
800f788: 4618 mov r0, r3
800f78a: f7fd f96e bl 800ca6a <st_word>
if (disk_write(pdrv, buf, b_vol, 1) != RES_OK) return FR_DISK_ERR; /* Write it to the VBR sector */
800f78e: f897 004b ldrb.w r0, [r7, #75] @ 0x4b
800f792: 2301 movs r3, #1
800f794: 6b7a ldr r2, [r7, #52] @ 0x34
800f796: 6c39 ldr r1, [r7, #64] @ 0x40
800f798: f7fd f8ee bl 800c978 <disk_write>
800f79c: 4603 mov r3, r0
800f79e: 2b00 cmp r3, #0
800f7a0: d001 beq.n 800f7a6 <f_mkfs+0x5da>
800f7a2: 2301 movs r3, #1
800f7a4: e159 b.n 800fa5a <f_mkfs+0x88e>
/* Create FSINFO record if needed */
if (fmt == FS_FAT32) {
800f7a6: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800f7aa: 2b03 cmp r3, #3
800f7ac: d141 bne.n 800f832 <f_mkfs+0x666>
disk_write(pdrv, buf, b_vol + 6, 1); /* Write backup VBR (VBR + 6) */
800f7ae: 6b7b ldr r3, [r7, #52] @ 0x34
800f7b0: 1d9a adds r2, r3, #6
800f7b2: f897 004b ldrb.w r0, [r7, #75] @ 0x4b
800f7b6: 2301 movs r3, #1
800f7b8: 6c39 ldr r1, [r7, #64] @ 0x40
800f7ba: f7fd f8dd bl 800c978 <disk_write>
mem_set(buf, 0, ss);
800f7be: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800f7c2: 461a mov r2, r3
800f7c4: 2100 movs r1, #0
800f7c6: 6c38 ldr r0, [r7, #64] @ 0x40
800f7c8: f7fd f9b7 bl 800cb3a <mem_set>
st_dword(buf + FSI_LeadSig, 0x41615252);
800f7cc: 494c ldr r1, [pc, #304] @ (800f900 <f_mkfs+0x734>)
800f7ce: 6c38 ldr r0, [r7, #64] @ 0x40
800f7d0: f7fd f966 bl 800caa0 <st_dword>
st_dword(buf + FSI_StrucSig, 0x61417272);
800f7d4: 6c3b ldr r3, [r7, #64] @ 0x40
800f7d6: f503 73f2 add.w r3, r3, #484 @ 0x1e4
800f7da: 494a ldr r1, [pc, #296] @ (800f904 <f_mkfs+0x738>)
800f7dc: 4618 mov r0, r3
800f7de: f7fd f95f bl 800caa0 <st_dword>
st_dword(buf + FSI_Free_Count, n_clst - 1); /* Number of free clusters */
800f7e2: 6c3b ldr r3, [r7, #64] @ 0x40
800f7e4: f503 72f4 add.w r2, r3, #488 @ 0x1e8
800f7e8: 6b3b ldr r3, [r7, #48] @ 0x30
800f7ea: 3b01 subs r3, #1
800f7ec: 4619 mov r1, r3
800f7ee: 4610 mov r0, r2
800f7f0: f7fd f956 bl 800caa0 <st_dword>
st_dword(buf + FSI_Nxt_Free, 2); /* Last allocated cluster# */
800f7f4: 6c3b ldr r3, [r7, #64] @ 0x40
800f7f6: f503 73f6 add.w r3, r3, #492 @ 0x1ec
800f7fa: 2102 movs r1, #2
800f7fc: 4618 mov r0, r3
800f7fe: f7fd f94f bl 800caa0 <st_dword>
st_word(buf + BS_55AA, 0xAA55);
800f802: 6c3b ldr r3, [r7, #64] @ 0x40
800f804: f503 73ff add.w r3, r3, #510 @ 0x1fe
800f808: f64a 2155 movw r1, #43605 @ 0xaa55
800f80c: 4618 mov r0, r3
800f80e: f7fd f92c bl 800ca6a <st_word>
disk_write(pdrv, buf, b_vol + 7, 1); /* Write backup FSINFO (VBR + 7) */
800f812: 6b7b ldr r3, [r7, #52] @ 0x34
800f814: 1dda adds r2, r3, #7
800f816: f897 004b ldrb.w r0, [r7, #75] @ 0x4b
800f81a: 2301 movs r3, #1
800f81c: 6c39 ldr r1, [r7, #64] @ 0x40
800f81e: f7fd f8ab bl 800c978 <disk_write>
disk_write(pdrv, buf, b_vol + 1, 1); /* Write original FSINFO (VBR + 1) */
800f822: 6b7b ldr r3, [r7, #52] @ 0x34
800f824: 1c5a adds r2, r3, #1
800f826: f897 004b ldrb.w r0, [r7, #75] @ 0x4b
800f82a: 2301 movs r3, #1
800f82c: 6c39 ldr r1, [r7, #64] @ 0x40
800f82e: f7fd f8a3 bl 800c978 <disk_write>
}
/* Initialize FAT area */
mem_set(buf, 0, (UINT)szb_buf);
800f832: 6bba ldr r2, [r7, #56] @ 0x38
800f834: 2100 movs r1, #0
800f836: 6c38 ldr r0, [r7, #64] @ 0x40
800f838: f7fd f97f bl 800cb3a <mem_set>
sect = b_fat; /* FAT start sector */
800f83c: 6ebb ldr r3, [r7, #104] @ 0x68
800f83e: 677b str r3, [r7, #116] @ 0x74
for (i = 0; i < n_fats; i++) { /* Initialize FATs each */
800f840: 2300 movs r3, #0
800f842: 65bb str r3, [r7, #88] @ 0x58
800f844: e04c b.n 800f8e0 <f_mkfs+0x714>
if (fmt == FS_FAT32) {
800f846: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800f84a: 2b03 cmp r3, #3
800f84c: d113 bne.n 800f876 <f_mkfs+0x6aa>
st_dword(buf + 0, 0xFFFFFFF8); /* Entry 0 */
800f84e: f06f 0107 mvn.w r1, #7
800f852: 6c38 ldr r0, [r7, #64] @ 0x40
800f854: f7fd f924 bl 800caa0 <st_dword>
st_dword(buf + 4, 0xFFFFFFFF); /* Entry 1 */
800f858: 6c3b ldr r3, [r7, #64] @ 0x40
800f85a: 3304 adds r3, #4
800f85c: f04f 31ff mov.w r1, #4294967295
800f860: 4618 mov r0, r3
800f862: f7fd f91d bl 800caa0 <st_dword>
st_dword(buf + 8, 0x0FFFFFFF); /* Entry 2 (root directory) */
800f866: 6c3b ldr r3, [r7, #64] @ 0x40
800f868: 3308 adds r3, #8
800f86a: f06f 4170 mvn.w r1, #4026531840 @ 0xf0000000
800f86e: 4618 mov r0, r3
800f870: f7fd f916 bl 800caa0 <st_dword>
800f874: e00b b.n 800f88e <f_mkfs+0x6c2>
} else {
st_dword(buf + 0, (fmt == FS_FAT12) ? 0xFFFFF8 : 0xFFFFFFF8); /* Entry 0 and 1 */
800f876: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800f87a: 2b01 cmp r3, #1
800f87c: d101 bne.n 800f882 <f_mkfs+0x6b6>
800f87e: 4b22 ldr r3, [pc, #136] @ (800f908 <f_mkfs+0x73c>)
800f880: e001 b.n 800f886 <f_mkfs+0x6ba>
800f882: f06f 0307 mvn.w r3, #7
800f886: 4619 mov r1, r3
800f888: 6c38 ldr r0, [r7, #64] @ 0x40
800f88a: f7fd f909 bl 800caa0 <st_dword>
}
nsect = sz_fat; /* Number of FAT sectors */
800f88e: 6fbb ldr r3, [r7, #120] @ 0x78
800f890: 673b str r3, [r7, #112] @ 0x70
do { /* Fill FAT sectors */
n = (nsect > sz_buf) ? sz_buf : nsect;
800f892: 6f3a ldr r2, [r7, #112] @ 0x70
800f894: 6bfb ldr r3, [r7, #60] @ 0x3c
800f896: 4293 cmp r3, r2
800f898: bf28 it cs
800f89a: 4613 movcs r3, r2
800f89c: 66fb str r3, [r7, #108] @ 0x6c
if (disk_write(pdrv, buf, sect, (UINT)n) != RES_OK) return FR_DISK_ERR;
800f89e: f897 004b ldrb.w r0, [r7, #75] @ 0x4b
800f8a2: 6efb ldr r3, [r7, #108] @ 0x6c
800f8a4: 6f7a ldr r2, [r7, #116] @ 0x74
800f8a6: 6c39 ldr r1, [r7, #64] @ 0x40
800f8a8: f7fd f866 bl 800c978 <disk_write>
800f8ac: 4603 mov r3, r0
800f8ae: 2b00 cmp r3, #0
800f8b0: d001 beq.n 800f8b6 <f_mkfs+0x6ea>
800f8b2: 2301 movs r3, #1
800f8b4: e0d1 b.n 800fa5a <f_mkfs+0x88e>
mem_set(buf, 0, ss);
800f8b6: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800f8ba: 461a mov r2, r3
800f8bc: 2100 movs r1, #0
800f8be: 6c38 ldr r0, [r7, #64] @ 0x40
800f8c0: f7fd f93b bl 800cb3a <mem_set>
sect += n; nsect -= n;
800f8c4: 6f7a ldr r2, [r7, #116] @ 0x74
800f8c6: 6efb ldr r3, [r7, #108] @ 0x6c
800f8c8: 4413 add r3, r2
800f8ca: 677b str r3, [r7, #116] @ 0x74
800f8cc: 6f3a ldr r2, [r7, #112] @ 0x70
800f8ce: 6efb ldr r3, [r7, #108] @ 0x6c
800f8d0: 1ad3 subs r3, r2, r3
800f8d2: 673b str r3, [r7, #112] @ 0x70
} while (nsect);
800f8d4: 6f3b ldr r3, [r7, #112] @ 0x70
800f8d6: 2b00 cmp r3, #0
800f8d8: d1db bne.n 800f892 <f_mkfs+0x6c6>
for (i = 0; i < n_fats; i++) { /* Initialize FATs each */
800f8da: 6dbb ldr r3, [r7, #88] @ 0x58
800f8dc: 3301 adds r3, #1
800f8de: 65bb str r3, [r7, #88] @ 0x58
800f8e0: 6dba ldr r2, [r7, #88] @ 0x58
800f8e2: 6d7b ldr r3, [r7, #84] @ 0x54
800f8e4: 429a cmp r2, r3
800f8e6: d3ae bcc.n 800f846 <f_mkfs+0x67a>
}
/* Initialize root directory (fill with zero) */
nsect = (fmt == FS_FAT32) ? pau : sz_dir; /* Number of root directory sectors */
800f8e8: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800f8ec: 2b03 cmp r3, #3
800f8ee: d10d bne.n 800f90c <f_mkfs+0x740>
800f8f0: 6e3b ldr r3, [r7, #96] @ 0x60
800f8f2: e00c b.n 800f90e <f_mkfs+0x742>
800f8f4: 08013a50 .word 0x08013a50
800f8f8: 08013a5c .word 0x08013a5c
800f8fc: 08013a70 .word 0x08013a70
800f900: 41615252 .word 0x41615252
800f904: 61417272 .word 0x61417272
800f908: 00fffff8 .word 0x00fffff8
800f90c: 6ffb ldr r3, [r7, #124] @ 0x7c
800f90e: 673b str r3, [r7, #112] @ 0x70
do {
n = (nsect > sz_buf) ? sz_buf : nsect;
800f910: 6f3a ldr r2, [r7, #112] @ 0x70
800f912: 6bfb ldr r3, [r7, #60] @ 0x3c
800f914: 4293 cmp r3, r2
800f916: bf28 it cs
800f918: 4613 movcs r3, r2
800f91a: 66fb str r3, [r7, #108] @ 0x6c
if (disk_write(pdrv, buf, sect, (UINT)n) != RES_OK) return FR_DISK_ERR;
800f91c: f897 004b ldrb.w r0, [r7, #75] @ 0x4b
800f920: 6efb ldr r3, [r7, #108] @ 0x6c
800f922: 6f7a ldr r2, [r7, #116] @ 0x74
800f924: 6c39 ldr r1, [r7, #64] @ 0x40
800f926: f7fd f827 bl 800c978 <disk_write>
800f92a: 4603 mov r3, r0
800f92c: 2b00 cmp r3, #0
800f92e: d001 beq.n 800f934 <f_mkfs+0x768>
800f930: 2301 movs r3, #1
800f932: e092 b.n 800fa5a <f_mkfs+0x88e>
sect += n; nsect -= n;
800f934: 6f7a ldr r2, [r7, #116] @ 0x74
800f936: 6efb ldr r3, [r7, #108] @ 0x6c
800f938: 4413 add r3, r2
800f93a: 677b str r3, [r7, #116] @ 0x74
800f93c: 6f3a ldr r2, [r7, #112] @ 0x70
800f93e: 6efb ldr r3, [r7, #108] @ 0x6c
800f940: 1ad3 subs r3, r2, r3
800f942: 673b str r3, [r7, #112] @ 0x70
} while (nsect);
800f944: 6f3b ldr r3, [r7, #112] @ 0x70
800f946: 2b00 cmp r3, #0
800f948: d1e2 bne.n 800f910 <f_mkfs+0x744>
/* Determine system ID in the partition table */
if (_FS_EXFAT && fmt == FS_EXFAT) {
sys = 0x07; /* HPFS/NTFS/exFAT */
} else {
if (fmt == FS_FAT32) {
800f94a: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800f94e: 2b03 cmp r3, #3
800f950: d103 bne.n 800f95a <f_mkfs+0x78e>
sys = 0x0C; /* FAT32X */
800f952: 230c movs r3, #12
800f954: f887 305e strb.w r3, [r7, #94] @ 0x5e
800f958: e010 b.n 800f97c <f_mkfs+0x7b0>
} else {
if (sz_vol >= 0x10000) {
800f95a: 6a3b ldr r3, [r7, #32]
800f95c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
800f960: d303 bcc.n 800f96a <f_mkfs+0x79e>
sys = 0x06; /* FAT12/16 (>=64KS) */
800f962: 2306 movs r3, #6
800f964: f887 305e strb.w r3, [r7, #94] @ 0x5e
800f968: e008 b.n 800f97c <f_mkfs+0x7b0>
} else {
sys = (fmt == FS_FAT16) ? 0x04 : 0x01; /* FAT16 (<64KS) : FAT12 (<64KS) */
800f96a: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800f96e: 2b02 cmp r3, #2
800f970: d101 bne.n 800f976 <f_mkfs+0x7aa>
800f972: 2304 movs r3, #4
800f974: e000 b.n 800f978 <f_mkfs+0x7ac>
800f976: 2301 movs r3, #1
800f978: f887 305e strb.w r3, [r7, #94] @ 0x5e
/* Update system ID in the partition table */
if (disk_read(pdrv, buf, 0, 1) != RES_OK) return FR_DISK_ERR; /* Read the MBR */
buf[MBR_Table + (part - 1) * SZ_PTE + PTE_System] = sys; /* Set system ID */
if (disk_write(pdrv, buf, 0, 1) != RES_OK) return FR_DISK_ERR; /* Write it back to the MBR */
} else { /* Created as a new single partition */
if (!(opt & FM_SFD)) { /* Create partition table if in FDISK format */
800f97c: 7afb ldrb r3, [r7, #11]
800f97e: f003 0308 and.w r3, r3, #8
800f982: 2b00 cmp r3, #0
800f984: d15c bne.n 800fa40 <f_mkfs+0x874>
mem_set(buf, 0, ss);
800f986: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800f98a: 461a mov r2, r3
800f98c: 2100 movs r1, #0
800f98e: 6c38 ldr r0, [r7, #64] @ 0x40
800f990: f7fd f8d3 bl 800cb3a <mem_set>
st_word(buf + BS_55AA, 0xAA55); /* MBR signature */
800f994: 6c3b ldr r3, [r7, #64] @ 0x40
800f996: f503 73ff add.w r3, r3, #510 @ 0x1fe
800f99a: f64a 2155 movw r1, #43605 @ 0xaa55
800f99e: 4618 mov r0, r3
800f9a0: f7fd f863 bl 800ca6a <st_word>
pte = buf + MBR_Table; /* Create partition table for single partition in the drive */
800f9a4: 6c3b ldr r3, [r7, #64] @ 0x40
800f9a6: f503 73df add.w r3, r3, #446 @ 0x1be
800f9aa: 62bb str r3, [r7, #40] @ 0x28
pte[PTE_Boot] = 0; /* Boot indicator */
800f9ac: 6abb ldr r3, [r7, #40] @ 0x28
800f9ae: 2200 movs r2, #0
800f9b0: 701a strb r2, [r3, #0]
pte[PTE_StHead] = 1; /* Start head */
800f9b2: 6abb ldr r3, [r7, #40] @ 0x28
800f9b4: 3301 adds r3, #1
800f9b6: 2201 movs r2, #1
800f9b8: 701a strb r2, [r3, #0]
pte[PTE_StSec] = 1; /* Start sector */
800f9ba: 6abb ldr r3, [r7, #40] @ 0x28
800f9bc: 3302 adds r3, #2
800f9be: 2201 movs r2, #1
800f9c0: 701a strb r2, [r3, #0]
pte[PTE_StCyl] = 0; /* Start cylinder */
800f9c2: 6abb ldr r3, [r7, #40] @ 0x28
800f9c4: 3303 adds r3, #3
800f9c6: 2200 movs r2, #0
800f9c8: 701a strb r2, [r3, #0]
pte[PTE_System] = sys; /* System type */
800f9ca: 6abb ldr r3, [r7, #40] @ 0x28
800f9cc: 3304 adds r3, #4
800f9ce: f897 205e ldrb.w r2, [r7, #94] @ 0x5e
800f9d2: 701a strb r2, [r3, #0]
n = (b_vol + sz_vol) / (63 * 255); /* (End CHS may be invalid) */
800f9d4: 6a3a ldr r2, [r7, #32]
800f9d6: 6b7b ldr r3, [r7, #52] @ 0x34
800f9d8: 441a add r2, r3
800f9da: 4b22 ldr r3, [pc, #136] @ (800fa64 <f_mkfs+0x898>)
800f9dc: fba3 1302 umull r1, r3, r3, r2
800f9e0: 1ad2 subs r2, r2, r3
800f9e2: 0852 lsrs r2, r2, #1
800f9e4: 4413 add r3, r2
800f9e6: 0b5b lsrs r3, r3, #13
800f9e8: 66fb str r3, [r7, #108] @ 0x6c
pte[PTE_EdHead] = 254; /* End head */
800f9ea: 6abb ldr r3, [r7, #40] @ 0x28
800f9ec: 3305 adds r3, #5
800f9ee: 22fe movs r2, #254 @ 0xfe
800f9f0: 701a strb r2, [r3, #0]
pte[PTE_EdSec] = (BYTE)(n >> 2 | 63); /* End sector */
800f9f2: 6efb ldr r3, [r7, #108] @ 0x6c
800f9f4: 089b lsrs r3, r3, #2
800f9f6: b2da uxtb r2, r3
800f9f8: 6abb ldr r3, [r7, #40] @ 0x28
800f9fa: 3306 adds r3, #6
800f9fc: f042 023f orr.w r2, r2, #63 @ 0x3f
800fa00: b2d2 uxtb r2, r2
800fa02: 701a strb r2, [r3, #0]
pte[PTE_EdCyl] = (BYTE)n; /* End cylinder */
800fa04: 6abb ldr r3, [r7, #40] @ 0x28
800fa06: 3307 adds r3, #7
800fa08: 6efa ldr r2, [r7, #108] @ 0x6c
800fa0a: b2d2 uxtb r2, r2
800fa0c: 701a strb r2, [r3, #0]
st_dword(pte + PTE_StLba, b_vol); /* Start offset in LBA */
800fa0e: 6abb ldr r3, [r7, #40] @ 0x28
800fa10: 3308 adds r3, #8
800fa12: 6b79 ldr r1, [r7, #52] @ 0x34
800fa14: 4618 mov r0, r3
800fa16: f7fd f843 bl 800caa0 <st_dword>
st_dword(pte + PTE_SizLba, sz_vol); /* Size in sectors */
800fa1a: 6abb ldr r3, [r7, #40] @ 0x28
800fa1c: 330c adds r3, #12
800fa1e: 6a3a ldr r2, [r7, #32]
800fa20: 4611 mov r1, r2
800fa22: 4618 mov r0, r3
800fa24: f7fd f83c bl 800caa0 <st_dword>
if (disk_write(pdrv, buf, 0, 1) != RES_OK) return FR_DISK_ERR; /* Write it to the MBR */
800fa28: f897 004b ldrb.w r0, [r7, #75] @ 0x4b
800fa2c: 2301 movs r3, #1
800fa2e: 2200 movs r2, #0
800fa30: 6c39 ldr r1, [r7, #64] @ 0x40
800fa32: f7fc ffa1 bl 800c978 <disk_write>
800fa36: 4603 mov r3, r0
800fa38: 2b00 cmp r3, #0
800fa3a: d001 beq.n 800fa40 <f_mkfs+0x874>
800fa3c: 2301 movs r3, #1
800fa3e: e00c b.n 800fa5a <f_mkfs+0x88e>
}
}
if (disk_ioctl(pdrv, CTRL_SYNC, 0) != RES_OK) return FR_DISK_ERR;
800fa40: f897 304b ldrb.w r3, [r7, #75] @ 0x4b
800fa44: 2200 movs r2, #0
800fa46: 2100 movs r1, #0
800fa48: 4618 mov r0, r3
800fa4a: f7fc ffb5 bl 800c9b8 <disk_ioctl>
800fa4e: 4603 mov r3, r0
800fa50: 2b00 cmp r3, #0
800fa52: d001 beq.n 800fa58 <f_mkfs+0x88c>
800fa54: 2301 movs r3, #1
800fa56: e000 b.n 800fa5a <f_mkfs+0x88e>
return FR_OK;
800fa58: 2300 movs r3, #0
}
800fa5a: 4618 mov r0, r3
800fa5c: 3784 adds r7, #132 @ 0x84
800fa5e: 46bd mov sp, r7
800fa60: bd90 pop {r4, r7, pc}
800fa62: bf00 nop
800fa64: 0515565b .word 0x0515565b
0800fa68 <FATFS_LinkDriverEx>:
* @param lun : only used for USB Key Disk to add multi-lun management
else the parameter must be equal to 0
* @retval Returns 0 in case of success, otherwise 1.
*/
uint8_t FATFS_LinkDriverEx(const Diskio_drvTypeDef *drv, char *path, uint8_t lun)
{
800fa68: b480 push {r7}
800fa6a: b087 sub sp, #28
800fa6c: af00 add r7, sp, #0
800fa6e: 60f8 str r0, [r7, #12]
800fa70: 60b9 str r1, [r7, #8]
800fa72: 4613 mov r3, r2
800fa74: 71fb strb r3, [r7, #7]
uint8_t ret = 1;
800fa76: 2301 movs r3, #1
800fa78: 75fb strb r3, [r7, #23]
uint8_t DiskNum = 0;
800fa7a: 2300 movs r3, #0
800fa7c: 75bb strb r3, [r7, #22]
if(disk.nbr < _VOLUMES)
800fa7e: 4b1f ldr r3, [pc, #124] @ (800fafc <FATFS_LinkDriverEx+0x94>)
800fa80: 7a5b ldrb r3, [r3, #9]
800fa82: b2db uxtb r3, r3
800fa84: 2b00 cmp r3, #0
800fa86: d131 bne.n 800faec <FATFS_LinkDriverEx+0x84>
{
disk.is_initialized[disk.nbr] = 0;
800fa88: 4b1c ldr r3, [pc, #112] @ (800fafc <FATFS_LinkDriverEx+0x94>)
800fa8a: 7a5b ldrb r3, [r3, #9]
800fa8c: b2db uxtb r3, r3
800fa8e: 461a mov r2, r3
800fa90: 4b1a ldr r3, [pc, #104] @ (800fafc <FATFS_LinkDriverEx+0x94>)
800fa92: 2100 movs r1, #0
800fa94: 5499 strb r1, [r3, r2]
disk.drv[disk.nbr] = drv;
800fa96: 4b19 ldr r3, [pc, #100] @ (800fafc <FATFS_LinkDriverEx+0x94>)
800fa98: 7a5b ldrb r3, [r3, #9]
800fa9a: b2db uxtb r3, r3
800fa9c: 4a17 ldr r2, [pc, #92] @ (800fafc <FATFS_LinkDriverEx+0x94>)
800fa9e: 009b lsls r3, r3, #2
800faa0: 4413 add r3, r2
800faa2: 68fa ldr r2, [r7, #12]
800faa4: 605a str r2, [r3, #4]
disk.lun[disk.nbr] = lun;
800faa6: 4b15 ldr r3, [pc, #84] @ (800fafc <FATFS_LinkDriverEx+0x94>)
800faa8: 7a5b ldrb r3, [r3, #9]
800faaa: b2db uxtb r3, r3
800faac: 461a mov r2, r3
800faae: 4b13 ldr r3, [pc, #76] @ (800fafc <FATFS_LinkDriverEx+0x94>)
800fab0: 4413 add r3, r2
800fab2: 79fa ldrb r2, [r7, #7]
800fab4: 721a strb r2, [r3, #8]
DiskNum = disk.nbr++;
800fab6: 4b11 ldr r3, [pc, #68] @ (800fafc <FATFS_LinkDriverEx+0x94>)
800fab8: 7a5b ldrb r3, [r3, #9]
800faba: b2db uxtb r3, r3
800fabc: 1c5a adds r2, r3, #1
800fabe: b2d1 uxtb r1, r2
800fac0: 4a0e ldr r2, [pc, #56] @ (800fafc <FATFS_LinkDriverEx+0x94>)
800fac2: 7251 strb r1, [r2, #9]
800fac4: 75bb strb r3, [r7, #22]
path[0] = DiskNum + '0';
800fac6: 7dbb ldrb r3, [r7, #22]
800fac8: 3330 adds r3, #48 @ 0x30
800faca: b2da uxtb r2, r3
800facc: 68bb ldr r3, [r7, #8]
800face: 701a strb r2, [r3, #0]
path[1] = ':';
800fad0: 68bb ldr r3, [r7, #8]
800fad2: 3301 adds r3, #1
800fad4: 223a movs r2, #58 @ 0x3a
800fad6: 701a strb r2, [r3, #0]
path[2] = '/';
800fad8: 68bb ldr r3, [r7, #8]
800fada: 3302 adds r3, #2
800fadc: 222f movs r2, #47 @ 0x2f
800fade: 701a strb r2, [r3, #0]
path[3] = 0;
800fae0: 68bb ldr r3, [r7, #8]
800fae2: 3303 adds r3, #3
800fae4: 2200 movs r2, #0
800fae6: 701a strb r2, [r3, #0]
ret = 0;
800fae8: 2300 movs r3, #0
800faea: 75fb strb r3, [r7, #23]
}
return ret;
800faec: 7dfb ldrb r3, [r7, #23]
}
800faee: 4618 mov r0, r3
800faf0: 371c adds r7, #28
800faf2: 46bd mov sp, r7
800faf4: f85d 7b04 ldr.w r7, [sp], #4
800faf8: 4770 bx lr
800fafa: bf00 nop
800fafc: 2001014c .word 0x2001014c
0800fb00 <FATFS_LinkDriver>:
* @param drv: pointer to the disk IO Driver structure
* @param path: pointer to the logical drive path
* @retval Returns 0 in case of success, otherwise 1.
*/
uint8_t FATFS_LinkDriver(const Diskio_drvTypeDef *drv, char *path)
{
800fb00: b580 push {r7, lr}
800fb02: b082 sub sp, #8
800fb04: af00 add r7, sp, #0
800fb06: 6078 str r0, [r7, #4]
800fb08: 6039 str r1, [r7, #0]
return FATFS_LinkDriverEx(drv, path, 0);
800fb0a: 2200 movs r2, #0
800fb0c: 6839 ldr r1, [r7, #0]
800fb0e: 6878 ldr r0, [r7, #4]
800fb10: f7ff ffaa bl 800fa68 <FATFS_LinkDriverEx>
800fb14: 4603 mov r3, r0
}
800fb16: 4618 mov r0, r3
800fb18: 3708 adds r7, #8
800fb1a: 46bd mov sp, r7
800fb1c: bd80 pop {r7, pc}
0800fb1e <ff_cre_syncobj>:
int ff_cre_syncobj ( /* 1:Function succeeded, 0:Could not create the sync object */
BYTE vol, /* Corresponding volume (logical drive number) */
_SYNC_t *sobj /* Pointer to return the created sync object */
)
{
800fb1e: b580 push {r7, lr}
800fb20: b086 sub sp, #24
800fb22: af00 add r7, sp, #0
800fb24: 4603 mov r3, r0
800fb26: 6039 str r1, [r7, #0]
800fb28: 71fb strb r3, [r7, #7]
#endif
#else
#if (osCMSIS < 0x20000U)
osSemaphoreDef(SEM);
800fb2a: 2300 movs r3, #0
800fb2c: 60fb str r3, [r7, #12]
800fb2e: 2300 movs r3, #0
800fb30: 613b str r3, [r7, #16]
*sobj = osSemaphoreCreate(osSemaphore(SEM), 1);
800fb32: f107 030c add.w r3, r7, #12
800fb36: 2101 movs r1, #1
800fb38: 4618 mov r0, r3
800fb3a: f000 f8cd bl 800fcd8 <osSemaphoreCreate>
800fb3e: 4602 mov r2, r0
800fb40: 683b ldr r3, [r7, #0]
800fb42: 601a str r2, [r3, #0]
#else
*sobj = osSemaphoreNew(1, 1, NULL);
#endif
#endif
ret = (*sobj != NULL);
800fb44: 683b ldr r3, [r7, #0]
800fb46: 681b ldr r3, [r3, #0]
800fb48: 2b00 cmp r3, #0
800fb4a: bf14 ite ne
800fb4c: 2301 movne r3, #1
800fb4e: 2300 moveq r3, #0
800fb50: b2db uxtb r3, r3
800fb52: 617b str r3, [r7, #20]
return ret;
800fb54: 697b ldr r3, [r7, #20]
}
800fb56: 4618 mov r0, r3
800fb58: 3718 adds r7, #24
800fb5a: 46bd mov sp, r7
800fb5c: bd80 pop {r7, pc}
0800fb5e <ff_del_syncobj>:
*/
int ff_del_syncobj ( /* 1:Function succeeded, 0:Could not delete due to any error */
_SYNC_t sobj /* Sync object tied to the logical drive to be deleted */
)
{
800fb5e: b580 push {r7, lr}
800fb60: b082 sub sp, #8
800fb62: af00 add r7, sp, #0
800fb64: 6078 str r0, [r7, #4]
#if _USE_MUTEX
osMutexDelete (sobj);
#else
osSemaphoreDelete (sobj);
800fb66: 6878 ldr r0, [r7, #4]
800fb68: f000 f96c bl 800fe44 <osSemaphoreDelete>
#endif
return 1;
800fb6c: 2301 movs r3, #1
}
800fb6e: 4618 mov r0, r3
800fb70: 3708 adds r7, #8
800fb72: 46bd mov sp, r7
800fb74: bd80 pop {r7, pc}
0800fb76 <ff_req_grant>:
*/
int ff_req_grant ( /* 1:Got a grant to access the volume, 0:Could not get a grant */
_SYNC_t sobj /* Sync object to wait */
)
{
800fb76: b580 push {r7, lr}
800fb78: b084 sub sp, #16
800fb7a: af00 add r7, sp, #0
800fb7c: 6078 str r0, [r7, #4]
int ret = 0;
800fb7e: 2300 movs r3, #0
800fb80: 60fb str r3, [r7, #12]
#if (osCMSIS < 0x20000U)
#if _USE_MUTEX
if(osMutexWait(sobj, _FS_TIMEOUT) == osOK)
#else
if(osSemaphoreWait(sobj, _FS_TIMEOUT) == osOK)
800fb82: f44f 717a mov.w r1, #1000 @ 0x3e8
800fb86: 6878 ldr r0, [r7, #4]
800fb88: f000 f8d8 bl 800fd3c <osSemaphoreWait>
800fb8c: 4603 mov r3, r0
800fb8e: 2b00 cmp r3, #0
800fb90: d101 bne.n 800fb96 <ff_req_grant+0x20>
if(osSemaphoreAcquire(sobj, _FS_TIMEOUT) == osOK)
#endif
#endif
{
ret = 1;
800fb92: 2301 movs r3, #1
800fb94: 60fb str r3, [r7, #12]
}
return ret;
800fb96: 68fb ldr r3, [r7, #12]
}
800fb98: 4618 mov r0, r3
800fb9a: 3710 adds r7, #16
800fb9c: 46bd mov sp, r7
800fb9e: bd80 pop {r7, pc}
0800fba0 <ff_rel_grant>:
*/
void ff_rel_grant (
_SYNC_t sobj /* Sync object to be signaled */
)
{
800fba0: b580 push {r7, lr}
800fba2: b082 sub sp, #8
800fba4: af00 add r7, sp, #0
800fba6: 6078 str r0, [r7, #4]
#if _USE_MUTEX
osMutexRelease(sobj);
#else
osSemaphoreRelease(sobj);
800fba8: 6878 ldr r0, [r7, #4]
800fbaa: f000 f915 bl 800fdd8 <osSemaphoreRelease>
#endif
}
800fbae: bf00 nop
800fbb0: 3708 adds r7, #8
800fbb2: 46bd mov sp, r7
800fbb4: bd80 pop {r7, pc}
0800fbb6 <makeFreeRtosPriority>:
extern void xPortSysTickHandler(void);
/* Convert from CMSIS type osPriority to FreeRTOS priority number */
static unsigned portBASE_TYPE makeFreeRtosPriority (osPriority priority)
{
800fbb6: b480 push {r7}
800fbb8: b085 sub sp, #20
800fbba: af00 add r7, sp, #0
800fbbc: 4603 mov r3, r0
800fbbe: 80fb strh r3, [r7, #6]
unsigned portBASE_TYPE fpriority = tskIDLE_PRIORITY;
800fbc0: 2300 movs r3, #0
800fbc2: 60fb str r3, [r7, #12]
if (priority != osPriorityError) {
800fbc4: f9b7 3006 ldrsh.w r3, [r7, #6]
800fbc8: 2b84 cmp r3, #132 @ 0x84
800fbca: d005 beq.n 800fbd8 <makeFreeRtosPriority+0x22>
fpriority += (priority - osPriorityIdle);
800fbcc: f9b7 2006 ldrsh.w r2, [r7, #6]
800fbd0: 68fb ldr r3, [r7, #12]
800fbd2: 4413 add r3, r2
800fbd4: 3303 adds r3, #3
800fbd6: 60fb str r3, [r7, #12]
}
return fpriority;
800fbd8: 68fb ldr r3, [r7, #12]
}
800fbda: 4618 mov r0, r3
800fbdc: 3714 adds r7, #20
800fbde: 46bd mov sp, r7
800fbe0: f85d 7b04 ldr.w r7, [sp], #4
800fbe4: 4770 bx lr
0800fbe6 <inHandlerMode>:
#endif
/* Determine whether we are in thread mode or handler mode. */
static int inHandlerMode (void)
{
800fbe6: b480 push {r7}
800fbe8: b083 sub sp, #12
800fbea: af00 add r7, sp, #0
*/
__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
800fbec: f3ef 8305 mrs r3, IPSR
800fbf0: 607b str r3, [r7, #4]
return(result);
800fbf2: 687b ldr r3, [r7, #4]
return __get_IPSR() != 0;
800fbf4: 2b00 cmp r3, #0
800fbf6: bf14 ite ne
800fbf8: 2301 movne r3, #1
800fbfa: 2300 moveq r3, #0
800fbfc: b2db uxtb r3, r3
}
800fbfe: 4618 mov r0, r3
800fc00: 370c adds r7, #12
800fc02: 46bd mov sp, r7
800fc04: f85d 7b04 ldr.w r7, [sp], #4
800fc08: 4770 bx lr
0800fc0a <osKernelStart>:
* @param argument pointer that is passed to the thread function as start argument.
* @retval status code that indicates the execution status of the function
* @note MUST REMAIN UNCHANGED: \b osKernelStart shall be consistent in every CMSIS-RTOS.
*/
osStatus osKernelStart (void)
{
800fc0a: b580 push {r7, lr}
800fc0c: af00 add r7, sp, #0
vTaskStartScheduler();
800fc0e: f001 f9a3 bl 8010f58 <vTaskStartScheduler>
return osOK;
800fc12: 2300 movs r3, #0
}
800fc14: 4618 mov r0, r3
800fc16: bd80 pop {r7, pc}
0800fc18 <osThreadCreate>:
* @param argument pointer that is passed to the thread function as start argument.
* @retval thread ID for reference by other functions or NULL in case of error.
* @note MUST REMAIN UNCHANGED: \b osThreadCreate shall be consistent in every CMSIS-RTOS.
*/
osThreadId osThreadCreate (const osThreadDef_t *thread_def, void *argument)
{
800fc18: b5f0 push {r4, r5, r6, r7, lr}
800fc1a: b089 sub sp, #36 @ 0x24
800fc1c: af04 add r7, sp, #16
800fc1e: 6078 str r0, [r7, #4]
800fc20: 6039 str r1, [r7, #0]
TaskHandle_t handle;
#if( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
if((thread_def->buffer != NULL) && (thread_def->controlblock != NULL)) {
800fc22: 687b ldr r3, [r7, #4]
800fc24: 695b ldr r3, [r3, #20]
800fc26: 2b00 cmp r3, #0
800fc28: d020 beq.n 800fc6c <osThreadCreate+0x54>
800fc2a: 687b ldr r3, [r7, #4]
800fc2c: 699b ldr r3, [r3, #24]
800fc2e: 2b00 cmp r3, #0
800fc30: d01c beq.n 800fc6c <osThreadCreate+0x54>
handle = xTaskCreateStatic((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
800fc32: 687b ldr r3, [r7, #4]
800fc34: 685c ldr r4, [r3, #4]
800fc36: 687b ldr r3, [r7, #4]
800fc38: 681d ldr r5, [r3, #0]
thread_def->stacksize, argument, makeFreeRtosPriority(thread_def->tpriority),
800fc3a: 687b ldr r3, [r7, #4]
800fc3c: 691e ldr r6, [r3, #16]
800fc3e: 687b ldr r3, [r7, #4]
800fc40: f9b3 3008 ldrsh.w r3, [r3, #8]
handle = xTaskCreateStatic((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
800fc44: 4618 mov r0, r3
800fc46: f7ff ffb6 bl 800fbb6 <makeFreeRtosPriority>
800fc4a: 4601 mov r1, r0
thread_def->buffer, thread_def->controlblock);
800fc4c: 687b ldr r3, [r7, #4]
800fc4e: 695b ldr r3, [r3, #20]
800fc50: 687a ldr r2, [r7, #4]
800fc52: 6992 ldr r2, [r2, #24]
handle = xTaskCreateStatic((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
800fc54: 9202 str r2, [sp, #8]
800fc56: 9301 str r3, [sp, #4]
800fc58: 9100 str r1, [sp, #0]
800fc5a: 683b ldr r3, [r7, #0]
800fc5c: 4632 mov r2, r6
800fc5e: 4629 mov r1, r5
800fc60: 4620 mov r0, r4
800fc62: f000 ff93 bl 8010b8c <xTaskCreateStatic>
800fc66: 4603 mov r3, r0
800fc68: 60fb str r3, [r7, #12]
800fc6a: e01c b.n 800fca6 <osThreadCreate+0x8e>
}
else {
if (xTaskCreate((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
800fc6c: 687b ldr r3, [r7, #4]
800fc6e: 685c ldr r4, [r3, #4]
800fc70: 687b ldr r3, [r7, #4]
800fc72: 681d ldr r5, [r3, #0]
thread_def->stacksize, argument, makeFreeRtosPriority(thread_def->tpriority),
800fc74: 687b ldr r3, [r7, #4]
800fc76: 691b ldr r3, [r3, #16]
if (xTaskCreate((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
800fc78: b29e uxth r6, r3
thread_def->stacksize, argument, makeFreeRtosPriority(thread_def->tpriority),
800fc7a: 687b ldr r3, [r7, #4]
800fc7c: f9b3 3008 ldrsh.w r3, [r3, #8]
if (xTaskCreate((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
800fc80: 4618 mov r0, r3
800fc82: f7ff ff98 bl 800fbb6 <makeFreeRtosPriority>
800fc86: 4602 mov r2, r0
800fc88: f107 030c add.w r3, r7, #12
800fc8c: 9301 str r3, [sp, #4]
800fc8e: 9200 str r2, [sp, #0]
800fc90: 683b ldr r3, [r7, #0]
800fc92: 4632 mov r2, r6
800fc94: 4629 mov r1, r5
800fc96: 4620 mov r0, r4
800fc98: f000 ffd8 bl 8010c4c <xTaskCreate>
800fc9c: 4603 mov r3, r0
800fc9e: 2b01 cmp r3, #1
800fca0: d001 beq.n 800fca6 <osThreadCreate+0x8e>
&handle) != pdPASS) {
return NULL;
800fca2: 2300 movs r3, #0
800fca4: e000 b.n 800fca8 <osThreadCreate+0x90>
&handle) != pdPASS) {
return NULL;
}
#endif
return handle;
800fca6: 68fb ldr r3, [r7, #12]
}
800fca8: 4618 mov r0, r3
800fcaa: 3714 adds r7, #20
800fcac: 46bd mov sp, r7
800fcae: bdf0 pop {r4, r5, r6, r7, pc}
0800fcb0 <osDelay>:
* @brief Wait for Timeout (Time Delay)
* @param millisec time delay value
* @retval status code that indicates the execution status of the function.
*/
osStatus osDelay (uint32_t millisec)
{
800fcb0: b580 push {r7, lr}
800fcb2: b084 sub sp, #16
800fcb4: af00 add r7, sp, #0
800fcb6: 6078 str r0, [r7, #4]
#if INCLUDE_vTaskDelay
TickType_t ticks = millisec / portTICK_PERIOD_MS;
800fcb8: 687b ldr r3, [r7, #4]
800fcba: 60fb str r3, [r7, #12]
vTaskDelay(ticks ? ticks : 1); /* Minimum delay = 1 tick */
800fcbc: 68fb ldr r3, [r7, #12]
800fcbe: 2b00 cmp r3, #0
800fcc0: d001 beq.n 800fcc6 <osDelay+0x16>
800fcc2: 68fb ldr r3, [r7, #12]
800fcc4: e000 b.n 800fcc8 <osDelay+0x18>
800fcc6: 2301 movs r3, #1
800fcc8: 4618 mov r0, r3
800fcca: f001 f90f bl 8010eec <vTaskDelay>
return osOK;
800fcce: 2300 movs r3, #0
#else
(void) millisec;
return osErrorResource;
#endif
}
800fcd0: 4618 mov r0, r3
800fcd2: 3710 adds r7, #16
800fcd4: 46bd mov sp, r7
800fcd6: bd80 pop {r7, pc}
0800fcd8 <osSemaphoreCreate>:
* @param count number of available resources.
* @retval semaphore ID for reference by other functions or NULL in case of error.
* @note MUST REMAIN UNCHANGED: \b osSemaphoreCreate shall be consistent in every CMSIS-RTOS.
*/
osSemaphoreId osSemaphoreCreate (const osSemaphoreDef_t *semaphore_def, int32_t count)
{
800fcd8: b580 push {r7, lr}
800fcda: b086 sub sp, #24
800fcdc: af02 add r7, sp, #8
800fcde: 6078 str r0, [r7, #4]
800fce0: 6039 str r1, [r7, #0]
#if( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
osSemaphoreId sema;
if (semaphore_def->controlblock != NULL){
800fce2: 687b ldr r3, [r7, #4]
800fce4: 685b ldr r3, [r3, #4]
800fce6: 2b00 cmp r3, #0
800fce8: d00f beq.n 800fd0a <osSemaphoreCreate+0x32>
if (count == 1) {
800fcea: 683b ldr r3, [r7, #0]
800fcec: 2b01 cmp r3, #1
800fcee: d10a bne.n 800fd06 <osSemaphoreCreate+0x2e>
return xSemaphoreCreateBinaryStatic( semaphore_def->controlblock );
800fcf0: 687b ldr r3, [r7, #4]
800fcf2: 685b ldr r3, [r3, #4]
800fcf4: 2203 movs r2, #3
800fcf6: 9200 str r2, [sp, #0]
800fcf8: 2200 movs r2, #0
800fcfa: 2100 movs r1, #0
800fcfc: 2001 movs r0, #1
800fcfe: f000 f9d3 bl 80100a8 <xQueueGenericCreateStatic>
800fd02: 4603 mov r3, r0
800fd04: e016 b.n 800fd34 <osSemaphoreCreate+0x5c>
}
else {
#if (configUSE_COUNTING_SEMAPHORES == 1 )
return xSemaphoreCreateCountingStatic( count, count, semaphore_def->controlblock );
#else
return NULL;
800fd06: 2300 movs r3, #0
800fd08: e014 b.n 800fd34 <osSemaphoreCreate+0x5c>
#endif
}
}
else {
if (count == 1) {
800fd0a: 683b ldr r3, [r7, #0]
800fd0c: 2b01 cmp r3, #1
800fd0e: d110 bne.n 800fd32 <osSemaphoreCreate+0x5a>
vSemaphoreCreateBinary(sema);
800fd10: 2203 movs r2, #3
800fd12: 2100 movs r1, #0
800fd14: 2001 movs r0, #1
800fd16: f000 fa44 bl 80101a2 <xQueueGenericCreate>
800fd1a: 60f8 str r0, [r7, #12]
800fd1c: 68fb ldr r3, [r7, #12]
800fd1e: 2b00 cmp r3, #0
800fd20: d005 beq.n 800fd2e <osSemaphoreCreate+0x56>
800fd22: 2300 movs r3, #0
800fd24: 2200 movs r2, #0
800fd26: 2100 movs r1, #0
800fd28: 68f8 ldr r0, [r7, #12]
800fd2a: f000 fa95 bl 8010258 <xQueueGenericSend>
return sema;
800fd2e: 68fb ldr r3, [r7, #12]
800fd30: e000 b.n 800fd34 <osSemaphoreCreate+0x5c>
}
else {
#if (configUSE_COUNTING_SEMAPHORES == 1 )
return xSemaphoreCreateCounting(count, count);
#else
return NULL;
800fd32: 2300 movs r3, #0
#else
return NULL;
#endif
}
#endif
}
800fd34: 4618 mov r0, r3
800fd36: 3710 adds r7, #16
800fd38: 46bd mov sp, r7
800fd3a: bd80 pop {r7, pc}
0800fd3c <osSemaphoreWait>:
* @param millisec timeout value or 0 in case of no time-out.
* @retval number of available tokens, or -1 in case of incorrect parameters.
* @note MUST REMAIN UNCHANGED: \b osSemaphoreWait shall be consistent in every CMSIS-RTOS.
*/
int32_t osSemaphoreWait (osSemaphoreId semaphore_id, uint32_t millisec)
{
800fd3c: b580 push {r7, lr}
800fd3e: b084 sub sp, #16
800fd40: af00 add r7, sp, #0
800fd42: 6078 str r0, [r7, #4]
800fd44: 6039 str r1, [r7, #0]
TickType_t ticks;
portBASE_TYPE taskWoken = pdFALSE;
800fd46: 2300 movs r3, #0
800fd48: 60bb str r3, [r7, #8]
if (semaphore_id == NULL) {
800fd4a: 687b ldr r3, [r7, #4]
800fd4c: 2b00 cmp r3, #0
800fd4e: d101 bne.n 800fd54 <osSemaphoreWait+0x18>
return osErrorParameter;
800fd50: 2380 movs r3, #128 @ 0x80
800fd52: e03a b.n 800fdca <osSemaphoreWait+0x8e>
}
ticks = 0;
800fd54: 2300 movs r3, #0
800fd56: 60fb str r3, [r7, #12]
if (millisec == osWaitForever) {
800fd58: 683b ldr r3, [r7, #0]
800fd5a: f1b3 3fff cmp.w r3, #4294967295
800fd5e: d103 bne.n 800fd68 <osSemaphoreWait+0x2c>
ticks = portMAX_DELAY;
800fd60: f04f 33ff mov.w r3, #4294967295
800fd64: 60fb str r3, [r7, #12]
800fd66: e009 b.n 800fd7c <osSemaphoreWait+0x40>
}
else if (millisec != 0) {
800fd68: 683b ldr r3, [r7, #0]
800fd6a: 2b00 cmp r3, #0
800fd6c: d006 beq.n 800fd7c <osSemaphoreWait+0x40>
ticks = millisec / portTICK_PERIOD_MS;
800fd6e: 683b ldr r3, [r7, #0]
800fd70: 60fb str r3, [r7, #12]
if (ticks == 0) {
800fd72: 68fb ldr r3, [r7, #12]
800fd74: 2b00 cmp r3, #0
800fd76: d101 bne.n 800fd7c <osSemaphoreWait+0x40>
ticks = 1;
800fd78: 2301 movs r3, #1
800fd7a: 60fb str r3, [r7, #12]
}
}
if (inHandlerMode()) {
800fd7c: f7ff ff33 bl 800fbe6 <inHandlerMode>
800fd80: 4603 mov r3, r0
800fd82: 2b00 cmp r3, #0
800fd84: d017 beq.n 800fdb6 <osSemaphoreWait+0x7a>
if (xSemaphoreTakeFromISR(semaphore_id, &taskWoken) != pdTRUE) {
800fd86: f107 0308 add.w r3, r7, #8
800fd8a: 461a mov r2, r3
800fd8c: 2100 movs r1, #0
800fd8e: 6878 ldr r0, [r7, #4]
800fd90: f000 fd04 bl 801079c <xQueueReceiveFromISR>
800fd94: 4603 mov r3, r0
800fd96: 2b01 cmp r3, #1
800fd98: d001 beq.n 800fd9e <osSemaphoreWait+0x62>
return osErrorOS;
800fd9a: 23ff movs r3, #255 @ 0xff
800fd9c: e015 b.n 800fdca <osSemaphoreWait+0x8e>
}
portEND_SWITCHING_ISR(taskWoken);
800fd9e: 68bb ldr r3, [r7, #8]
800fda0: 2b00 cmp r3, #0
800fda2: d011 beq.n 800fdc8 <osSemaphoreWait+0x8c>
800fda4: 4b0b ldr r3, [pc, #44] @ (800fdd4 <osSemaphoreWait+0x98>)
800fda6: f04f 5280 mov.w r2, #268435456 @ 0x10000000
800fdaa: 601a str r2, [r3, #0]
800fdac: f3bf 8f4f dsb sy
800fdb0: f3bf 8f6f isb sy
800fdb4: e008 b.n 800fdc8 <osSemaphoreWait+0x8c>
}
else if (xSemaphoreTake(semaphore_id, ticks) != pdTRUE) {
800fdb6: 68f9 ldr r1, [r7, #12]
800fdb8: 6878 ldr r0, [r7, #4]
800fdba: f000 fbdf bl 801057c <xQueueSemaphoreTake>
800fdbe: 4603 mov r3, r0
800fdc0: 2b01 cmp r3, #1
800fdc2: d001 beq.n 800fdc8 <osSemaphoreWait+0x8c>
return osErrorOS;
800fdc4: 23ff movs r3, #255 @ 0xff
800fdc6: e000 b.n 800fdca <osSemaphoreWait+0x8e>
}
return osOK;
800fdc8: 2300 movs r3, #0
}
800fdca: 4618 mov r0, r3
800fdcc: 3710 adds r7, #16
800fdce: 46bd mov sp, r7
800fdd0: bd80 pop {r7, pc}
800fdd2: bf00 nop
800fdd4: e000ed04 .word 0xe000ed04
0800fdd8 <osSemaphoreRelease>:
* @param semaphore_id semaphore object referenced with \ref osSemaphore.
* @retval status code that indicates the execution status of the function.
* @note MUST REMAIN UNCHANGED: \b osSemaphoreRelease shall be consistent in every CMSIS-RTOS.
*/
osStatus osSemaphoreRelease (osSemaphoreId semaphore_id)
{
800fdd8: b580 push {r7, lr}
800fdda: b084 sub sp, #16
800fddc: af00 add r7, sp, #0
800fdde: 6078 str r0, [r7, #4]
osStatus result = osOK;
800fde0: 2300 movs r3, #0
800fde2: 60fb str r3, [r7, #12]
portBASE_TYPE taskWoken = pdFALSE;
800fde4: 2300 movs r3, #0
800fde6: 60bb str r3, [r7, #8]
if (inHandlerMode()) {
800fde8: f7ff fefd bl 800fbe6 <inHandlerMode>
800fdec: 4603 mov r3, r0
800fdee: 2b00 cmp r3, #0
800fdf0: d016 beq.n 800fe20 <osSemaphoreRelease+0x48>
if (xSemaphoreGiveFromISR(semaphore_id, &taskWoken) != pdTRUE) {
800fdf2: f107 0308 add.w r3, r7, #8
800fdf6: 4619 mov r1, r3
800fdf8: 6878 ldr r0, [r7, #4]
800fdfa: f000 fb2f bl 801045c <xQueueGiveFromISR>
800fdfe: 4603 mov r3, r0
800fe00: 2b01 cmp r3, #1
800fe02: d001 beq.n 800fe08 <osSemaphoreRelease+0x30>
return osErrorOS;
800fe04: 23ff movs r3, #255 @ 0xff
800fe06: e017 b.n 800fe38 <osSemaphoreRelease+0x60>
}
portEND_SWITCHING_ISR(taskWoken);
800fe08: 68bb ldr r3, [r7, #8]
800fe0a: 2b00 cmp r3, #0
800fe0c: d013 beq.n 800fe36 <osSemaphoreRelease+0x5e>
800fe0e: 4b0c ldr r3, [pc, #48] @ (800fe40 <osSemaphoreRelease+0x68>)
800fe10: f04f 5280 mov.w r2, #268435456 @ 0x10000000
800fe14: 601a str r2, [r3, #0]
800fe16: f3bf 8f4f dsb sy
800fe1a: f3bf 8f6f isb sy
800fe1e: e00a b.n 800fe36 <osSemaphoreRelease+0x5e>
}
else {
if (xSemaphoreGive(semaphore_id) != pdTRUE) {
800fe20: 2300 movs r3, #0
800fe22: 2200 movs r2, #0
800fe24: 2100 movs r1, #0
800fe26: 6878 ldr r0, [r7, #4]
800fe28: f000 fa16 bl 8010258 <xQueueGenericSend>
800fe2c: 4603 mov r3, r0
800fe2e: 2b01 cmp r3, #1
800fe30: d001 beq.n 800fe36 <osSemaphoreRelease+0x5e>
result = osErrorOS;
800fe32: 23ff movs r3, #255 @ 0xff
800fe34: 60fb str r3, [r7, #12]
}
}
return result;
800fe36: 68fb ldr r3, [r7, #12]
}
800fe38: 4618 mov r0, r3
800fe3a: 3710 adds r7, #16
800fe3c: 46bd mov sp, r7
800fe3e: bd80 pop {r7, pc}
800fe40: e000ed04 .word 0xe000ed04
0800fe44 <osSemaphoreDelete>:
* @param semaphore_id semaphore object referenced with \ref osSemaphore.
* @retval status code that indicates the execution status of the function.
* @note MUST REMAIN UNCHANGED: \b osSemaphoreDelete shall be consistent in every CMSIS-RTOS.
*/
osStatus osSemaphoreDelete (osSemaphoreId semaphore_id)
{
800fe44: b580 push {r7, lr}
800fe46: b082 sub sp, #8
800fe48: af00 add r7, sp, #0
800fe4a: 6078 str r0, [r7, #4]
if (inHandlerMode()) {
800fe4c: f7ff fecb bl 800fbe6 <inHandlerMode>
800fe50: 4603 mov r3, r0
800fe52: 2b00 cmp r3, #0
800fe54: d001 beq.n 800fe5a <osSemaphoreDelete+0x16>
return osErrorISR;
800fe56: 2382 movs r3, #130 @ 0x82
800fe58: e003 b.n 800fe62 <osSemaphoreDelete+0x1e>
}
vSemaphoreDelete(semaphore_id);
800fe5a: 6878 ldr r0, [r7, #4]
800fe5c: f000 fd20 bl 80108a0 <vQueueDelete>
return osOK;
800fe60: 2300 movs r3, #0
}
800fe62: 4618 mov r0, r3
800fe64: 3708 adds r7, #8
800fe66: 46bd mov sp, r7
800fe68: bd80 pop {r7, pc}
0800fe6a <vListInitialise>:
/*-----------------------------------------------------------
* PUBLIC LIST API documented in list.h
*----------------------------------------------------------*/
void vListInitialise( List_t * const pxList )
{
800fe6a: b480 push {r7}
800fe6c: b083 sub sp, #12
800fe6e: af00 add r7, sp, #0
800fe70: 6078 str r0, [r7, #4]
/* The list structure contains a list item which is used to mark the
end of the list. To initialise the list the list end is inserted
as the only list entry. */
pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
800fe72: 687b ldr r3, [r7, #4]
800fe74: f103 0208 add.w r2, r3, #8
800fe78: 687b ldr r3, [r7, #4]
800fe7a: 605a str r2, [r3, #4]
/* The list end value is the highest possible value in the list to
ensure it remains at the end of the list. */
pxList->xListEnd.xItemValue = portMAX_DELAY;
800fe7c: 687b ldr r3, [r7, #4]
800fe7e: f04f 32ff mov.w r2, #4294967295
800fe82: 609a str r2, [r3, #8]
/* The list end next and previous pointers point to itself so we know
when the list is empty. */
pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
800fe84: 687b ldr r3, [r7, #4]
800fe86: f103 0208 add.w r2, r3, #8
800fe8a: 687b ldr r3, [r7, #4]
800fe8c: 60da str r2, [r3, #12]
pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
800fe8e: 687b ldr r3, [r7, #4]
800fe90: f103 0208 add.w r2, r3, #8
800fe94: 687b ldr r3, [r7, #4]
800fe96: 611a str r2, [r3, #16]
pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
800fe98: 687b ldr r3, [r7, #4]
800fe9a: 2200 movs r2, #0
800fe9c: 601a str r2, [r3, #0]
/* Write known values into the list if
configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
}
800fe9e: bf00 nop
800fea0: 370c adds r7, #12
800fea2: 46bd mov sp, r7
800fea4: f85d 7b04 ldr.w r7, [sp], #4
800fea8: 4770 bx lr
0800feaa <vListInitialiseItem>:
/*-----------------------------------------------------------*/
void vListInitialiseItem( ListItem_t * const pxItem )
{
800feaa: b480 push {r7}
800feac: b083 sub sp, #12
800feae: af00 add r7, sp, #0
800feb0: 6078 str r0, [r7, #4]
/* Make sure the list item is not recorded as being on a list. */
pxItem->pxContainer = NULL;
800feb2: 687b ldr r3, [r7, #4]
800feb4: 2200 movs r2, #0
800feb6: 611a str r2, [r3, #16]
/* Write known values into the list item if
configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
}
800feb8: bf00 nop
800feba: 370c adds r7, #12
800febc: 46bd mov sp, r7
800febe: f85d 7b04 ldr.w r7, [sp], #4
800fec2: 4770 bx lr
0800fec4 <vListInsertEnd>:
/*-----------------------------------------------------------*/
void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
{
800fec4: b480 push {r7}
800fec6: b085 sub sp, #20
800fec8: af00 add r7, sp, #0
800feca: 6078 str r0, [r7, #4]
800fecc: 6039 str r1, [r7, #0]
ListItem_t * const pxIndex = pxList->pxIndex;
800fece: 687b ldr r3, [r7, #4]
800fed0: 685b ldr r3, [r3, #4]
800fed2: 60fb str r3, [r7, #12]
listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
/* Insert a new list item into pxList, but rather than sort the list,
makes the new list item the last item to be removed by a call to
listGET_OWNER_OF_NEXT_ENTRY(). */
pxNewListItem->pxNext = pxIndex;
800fed4: 683b ldr r3, [r7, #0]
800fed6: 68fa ldr r2, [r7, #12]
800fed8: 605a str r2, [r3, #4]
pxNewListItem->pxPrevious = pxIndex->pxPrevious;
800feda: 68fb ldr r3, [r7, #12]
800fedc: 689a ldr r2, [r3, #8]
800fede: 683b ldr r3, [r7, #0]
800fee0: 609a str r2, [r3, #8]
/* Only used during decision coverage testing. */
mtCOVERAGE_TEST_DELAY();
pxIndex->pxPrevious->pxNext = pxNewListItem;
800fee2: 68fb ldr r3, [r7, #12]
800fee4: 689b ldr r3, [r3, #8]
800fee6: 683a ldr r2, [r7, #0]
800fee8: 605a str r2, [r3, #4]
pxIndex->pxPrevious = pxNewListItem;
800feea: 68fb ldr r3, [r7, #12]
800feec: 683a ldr r2, [r7, #0]
800feee: 609a str r2, [r3, #8]
/* Remember which list the item is in. */
pxNewListItem->pxContainer = pxList;
800fef0: 683b ldr r3, [r7, #0]
800fef2: 687a ldr r2, [r7, #4]
800fef4: 611a str r2, [r3, #16]
( pxList->uxNumberOfItems )++;
800fef6: 687b ldr r3, [r7, #4]
800fef8: 681b ldr r3, [r3, #0]
800fefa: 1c5a adds r2, r3, #1
800fefc: 687b ldr r3, [r7, #4]
800fefe: 601a str r2, [r3, #0]
}
800ff00: bf00 nop
800ff02: 3714 adds r7, #20
800ff04: 46bd mov sp, r7
800ff06: f85d 7b04 ldr.w r7, [sp], #4
800ff0a: 4770 bx lr
0800ff0c <vListInsert>:
/*-----------------------------------------------------------*/
void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
{
800ff0c: b480 push {r7}
800ff0e: b085 sub sp, #20
800ff10: af00 add r7, sp, #0
800ff12: 6078 str r0, [r7, #4]
800ff14: 6039 str r1, [r7, #0]
ListItem_t *pxIterator;
const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
800ff16: 683b ldr r3, [r7, #0]
800ff18: 681b ldr r3, [r3, #0]
800ff1a: 60bb str r3, [r7, #8]
new list item should be placed after it. This ensures that TCBs which are
stored in ready lists (all of which have the same xItemValue value) get a
share of the CPU. However, if the xItemValue is the same as the back marker
the iteration loop below will not end. Therefore the value is checked
first, and the algorithm slightly modified if necessary. */
if( xValueOfInsertion == portMAX_DELAY )
800ff1c: 68bb ldr r3, [r7, #8]
800ff1e: f1b3 3fff cmp.w r3, #4294967295
800ff22: d103 bne.n 800ff2c <vListInsert+0x20>
{
pxIterator = pxList->xListEnd.pxPrevious;
800ff24: 687b ldr r3, [r7, #4]
800ff26: 691b ldr r3, [r3, #16]
800ff28: 60fb str r3, [r7, #12]
800ff2a: e00c b.n 800ff46 <vListInsert+0x3a>
4) Using a queue or semaphore before it has been initialised or
before the scheduler has been started (are interrupts firing
before vTaskStartScheduler() has been called?).
**********************************************************************/
for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
800ff2c: 687b ldr r3, [r7, #4]
800ff2e: 3308 adds r3, #8
800ff30: 60fb str r3, [r7, #12]
800ff32: e002 b.n 800ff3a <vListInsert+0x2e>
800ff34: 68fb ldr r3, [r7, #12]
800ff36: 685b ldr r3, [r3, #4]
800ff38: 60fb str r3, [r7, #12]
800ff3a: 68fb ldr r3, [r7, #12]
800ff3c: 685b ldr r3, [r3, #4]
800ff3e: 681b ldr r3, [r3, #0]
800ff40: 68ba ldr r2, [r7, #8]
800ff42: 429a cmp r2, r3
800ff44: d2f6 bcs.n 800ff34 <vListInsert+0x28>
/* There is nothing to do here, just iterating to the wanted
insertion position. */
}
}
pxNewListItem->pxNext = pxIterator->pxNext;
800ff46: 68fb ldr r3, [r7, #12]
800ff48: 685a ldr r2, [r3, #4]
800ff4a: 683b ldr r3, [r7, #0]
800ff4c: 605a str r2, [r3, #4]
pxNewListItem->pxNext->pxPrevious = pxNewListItem;
800ff4e: 683b ldr r3, [r7, #0]
800ff50: 685b ldr r3, [r3, #4]
800ff52: 683a ldr r2, [r7, #0]
800ff54: 609a str r2, [r3, #8]
pxNewListItem->pxPrevious = pxIterator;
800ff56: 683b ldr r3, [r7, #0]
800ff58: 68fa ldr r2, [r7, #12]
800ff5a: 609a str r2, [r3, #8]
pxIterator->pxNext = pxNewListItem;
800ff5c: 68fb ldr r3, [r7, #12]
800ff5e: 683a ldr r2, [r7, #0]
800ff60: 605a str r2, [r3, #4]
/* Remember which list the item is in. This allows fast removal of the
item later. */
pxNewListItem->pxContainer = pxList;
800ff62: 683b ldr r3, [r7, #0]
800ff64: 687a ldr r2, [r7, #4]
800ff66: 611a str r2, [r3, #16]
( pxList->uxNumberOfItems )++;
800ff68: 687b ldr r3, [r7, #4]
800ff6a: 681b ldr r3, [r3, #0]
800ff6c: 1c5a adds r2, r3, #1
800ff6e: 687b ldr r3, [r7, #4]
800ff70: 601a str r2, [r3, #0]
}
800ff72: bf00 nop
800ff74: 3714 adds r7, #20
800ff76: 46bd mov sp, r7
800ff78: f85d 7b04 ldr.w r7, [sp], #4
800ff7c: 4770 bx lr
0800ff7e <uxListRemove>:
/*-----------------------------------------------------------*/
UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
{
800ff7e: b480 push {r7}
800ff80: b085 sub sp, #20
800ff82: af00 add r7, sp, #0
800ff84: 6078 str r0, [r7, #4]
/* The list item knows which list it is in. Obtain the list from the list
item. */
List_t * const pxList = pxItemToRemove->pxContainer;
800ff86: 687b ldr r3, [r7, #4]
800ff88: 691b ldr r3, [r3, #16]
800ff8a: 60fb str r3, [r7, #12]
pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
800ff8c: 687b ldr r3, [r7, #4]
800ff8e: 685b ldr r3, [r3, #4]
800ff90: 687a ldr r2, [r7, #4]
800ff92: 6892 ldr r2, [r2, #8]
800ff94: 609a str r2, [r3, #8]
pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
800ff96: 687b ldr r3, [r7, #4]
800ff98: 689b ldr r3, [r3, #8]
800ff9a: 687a ldr r2, [r7, #4]
800ff9c: 6852 ldr r2, [r2, #4]
800ff9e: 605a str r2, [r3, #4]
/* Only used during decision coverage testing. */
mtCOVERAGE_TEST_DELAY();
/* Make sure the index is left pointing to a valid item. */
if( pxList->pxIndex == pxItemToRemove )
800ffa0: 68fb ldr r3, [r7, #12]
800ffa2: 685b ldr r3, [r3, #4]
800ffa4: 687a ldr r2, [r7, #4]
800ffa6: 429a cmp r2, r3
800ffa8: d103 bne.n 800ffb2 <uxListRemove+0x34>
{
pxList->pxIndex = pxItemToRemove->pxPrevious;
800ffaa: 687b ldr r3, [r7, #4]
800ffac: 689a ldr r2, [r3, #8]
800ffae: 68fb ldr r3, [r7, #12]
800ffb0: 605a str r2, [r3, #4]
else
{
mtCOVERAGE_TEST_MARKER();
}
pxItemToRemove->pxContainer = NULL;
800ffb2: 687b ldr r3, [r7, #4]
800ffb4: 2200 movs r2, #0
800ffb6: 611a str r2, [r3, #16]
( pxList->uxNumberOfItems )--;
800ffb8: 68fb ldr r3, [r7, #12]
800ffba: 681b ldr r3, [r3, #0]
800ffbc: 1e5a subs r2, r3, #1
800ffbe: 68fb ldr r3, [r7, #12]
800ffc0: 601a str r2, [r3, #0]
return pxList->uxNumberOfItems;
800ffc2: 68fb ldr r3, [r7, #12]
800ffc4: 681b ldr r3, [r3, #0]
}
800ffc6: 4618 mov r0, r3
800ffc8: 3714 adds r7, #20
800ffca: 46bd mov sp, r7
800ffcc: f85d 7b04 ldr.w r7, [sp], #4
800ffd0: 4770 bx lr
...
0800ffd4 <xQueueGenericReset>:
} \
taskEXIT_CRITICAL()
/*-----------------------------------------------------------*/
BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue )
{
800ffd4: b580 push {r7, lr}
800ffd6: b084 sub sp, #16
800ffd8: af00 add r7, sp, #0
800ffda: 6078 str r0, [r7, #4]
800ffdc: 6039 str r1, [r7, #0]
Queue_t * const pxQueue = xQueue;
800ffde: 687b ldr r3, [r7, #4]
800ffe0: 60fb str r3, [r7, #12]
configASSERT( pxQueue );
800ffe2: 68fb ldr r3, [r7, #12]
800ffe4: 2b00 cmp r3, #0
800ffe6: d10b bne.n 8010000 <xQueueGenericReset+0x2c>
portFORCE_INLINE static void vPortRaiseBASEPRI( void )
{
uint32_t ulNewBASEPRI;
__asm volatile
800ffe8: f04f 0350 mov.w r3, #80 @ 0x50
800ffec: f383 8811 msr BASEPRI, r3
800fff0: f3bf 8f6f isb sy
800fff4: f3bf 8f4f dsb sy
800fff8: 60bb str r3, [r7, #8]
" msr basepri, %0 \n" \
" isb \n" \
" dsb \n" \
:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
);
}
800fffa: bf00 nop
800fffc: bf00 nop
800fffe: e7fd b.n 800fffc <xQueueGenericReset+0x28>
taskENTER_CRITICAL();
8010000: f001 ff22 bl 8011e48 <vPortEnterCritical>
{
pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
8010004: 68fb ldr r3, [r7, #12]
8010006: 681a ldr r2, [r3, #0]
8010008: 68fb ldr r3, [r7, #12]
801000a: 6bdb ldr r3, [r3, #60] @ 0x3c
801000c: 68f9 ldr r1, [r7, #12]
801000e: 6c09 ldr r1, [r1, #64] @ 0x40
8010010: fb01 f303 mul.w r3, r1, r3
8010014: 441a add r2, r3
8010016: 68fb ldr r3, [r7, #12]
8010018: 609a str r2, [r3, #8]
pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;
801001a: 68fb ldr r3, [r7, #12]
801001c: 2200 movs r2, #0
801001e: 639a str r2, [r3, #56] @ 0x38
pxQueue->pcWriteTo = pxQueue->pcHead;
8010020: 68fb ldr r3, [r7, #12]
8010022: 681a ldr r2, [r3, #0]
8010024: 68fb ldr r3, [r7, #12]
8010026: 605a str r2, [r3, #4]
pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - 1U ) * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
8010028: 68fb ldr r3, [r7, #12]
801002a: 681a ldr r2, [r3, #0]
801002c: 68fb ldr r3, [r7, #12]
801002e: 6bdb ldr r3, [r3, #60] @ 0x3c
8010030: 3b01 subs r3, #1
8010032: 68f9 ldr r1, [r7, #12]
8010034: 6c09 ldr r1, [r1, #64] @ 0x40
8010036: fb01 f303 mul.w r3, r1, r3
801003a: 441a add r2, r3
801003c: 68fb ldr r3, [r7, #12]
801003e: 60da str r2, [r3, #12]
pxQueue->cRxLock = queueUNLOCKED;
8010040: 68fb ldr r3, [r7, #12]
8010042: 22ff movs r2, #255 @ 0xff
8010044: f883 2044 strb.w r2, [r3, #68] @ 0x44
pxQueue->cTxLock = queueUNLOCKED;
8010048: 68fb ldr r3, [r7, #12]
801004a: 22ff movs r2, #255 @ 0xff
801004c: f883 2045 strb.w r2, [r3, #69] @ 0x45
if( xNewQueue == pdFALSE )
8010050: 683b ldr r3, [r7, #0]
8010052: 2b00 cmp r3, #0
8010054: d114 bne.n 8010080 <xQueueGenericReset+0xac>
/* If there are tasks blocked waiting to read from the queue, then
the tasks will remain blocked as after this function exits the queue
will still be empty. If there are tasks blocked waiting to write to
the queue, then one should be unblocked as after this function exits
it will be possible to write to it. */
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
8010056: 68fb ldr r3, [r7, #12]
8010058: 691b ldr r3, [r3, #16]
801005a: 2b00 cmp r3, #0
801005c: d01a beq.n 8010094 <xQueueGenericReset+0xc0>
{
if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
801005e: 68fb ldr r3, [r7, #12]
8010060: 3310 adds r3, #16
8010062: 4618 mov r0, r3
8010064: f001 f9d2 bl 801140c <xTaskRemoveFromEventList>
8010068: 4603 mov r3, r0
801006a: 2b00 cmp r3, #0
801006c: d012 beq.n 8010094 <xQueueGenericReset+0xc0>
{
queueYIELD_IF_USING_PREEMPTION();
801006e: 4b0d ldr r3, [pc, #52] @ (80100a4 <xQueueGenericReset+0xd0>)
8010070: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8010074: 601a str r2, [r3, #0]
8010076: f3bf 8f4f dsb sy
801007a: f3bf 8f6f isb sy
801007e: e009 b.n 8010094 <xQueueGenericReset+0xc0>
}
}
else
{
/* Ensure the event queues start in the correct state. */
vListInitialise( &( pxQueue->xTasksWaitingToSend ) );
8010080: 68fb ldr r3, [r7, #12]
8010082: 3310 adds r3, #16
8010084: 4618 mov r0, r3
8010086: f7ff fef0 bl 800fe6a <vListInitialise>
vListInitialise( &( pxQueue->xTasksWaitingToReceive ) );
801008a: 68fb ldr r3, [r7, #12]
801008c: 3324 adds r3, #36 @ 0x24
801008e: 4618 mov r0, r3
8010090: f7ff feeb bl 800fe6a <vListInitialise>
}
}
taskEXIT_CRITICAL();
8010094: f001 ff0a bl 8011eac <vPortExitCritical>
/* A value is returned for calling semantic consistency with previous
versions. */
return pdPASS;
8010098: 2301 movs r3, #1
}
801009a: 4618 mov r0, r3
801009c: 3710 adds r7, #16
801009e: 46bd mov sp, r7
80100a0: bd80 pop {r7, pc}
80100a2: bf00 nop
80100a4: e000ed04 .word 0xe000ed04
080100a8 <xQueueGenericCreateStatic>:
/*-----------------------------------------------------------*/
#if( configSUPPORT_STATIC_ALLOCATION == 1 )
QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )
{
80100a8: b580 push {r7, lr}
80100aa: b08e sub sp, #56 @ 0x38
80100ac: af02 add r7, sp, #8
80100ae: 60f8 str r0, [r7, #12]
80100b0: 60b9 str r1, [r7, #8]
80100b2: 607a str r2, [r7, #4]
80100b4: 603b str r3, [r7, #0]
Queue_t *pxNewQueue;
configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
80100b6: 68fb ldr r3, [r7, #12]
80100b8: 2b00 cmp r3, #0
80100ba: d10b bne.n 80100d4 <xQueueGenericCreateStatic+0x2c>
__asm volatile
80100bc: f04f 0350 mov.w r3, #80 @ 0x50
80100c0: f383 8811 msr BASEPRI, r3
80100c4: f3bf 8f6f isb sy
80100c8: f3bf 8f4f dsb sy
80100cc: 62bb str r3, [r7, #40] @ 0x28
}
80100ce: bf00 nop
80100d0: bf00 nop
80100d2: e7fd b.n 80100d0 <xQueueGenericCreateStatic+0x28>
/* The StaticQueue_t structure and the queue storage area must be
supplied. */
configASSERT( pxStaticQueue != NULL );
80100d4: 683b ldr r3, [r7, #0]
80100d6: 2b00 cmp r3, #0
80100d8: d10b bne.n 80100f2 <xQueueGenericCreateStatic+0x4a>
__asm volatile
80100da: f04f 0350 mov.w r3, #80 @ 0x50
80100de: f383 8811 msr BASEPRI, r3
80100e2: f3bf 8f6f isb sy
80100e6: f3bf 8f4f dsb sy
80100ea: 627b str r3, [r7, #36] @ 0x24
}
80100ec: bf00 nop
80100ee: bf00 nop
80100f0: e7fd b.n 80100ee <xQueueGenericCreateStatic+0x46>
/* A queue storage area should be provided if the item size is not 0, and
should not be provided if the item size is 0. */
configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) );
80100f2: 687b ldr r3, [r7, #4]
80100f4: 2b00 cmp r3, #0
80100f6: d002 beq.n 80100fe <xQueueGenericCreateStatic+0x56>
80100f8: 68bb ldr r3, [r7, #8]
80100fa: 2b00 cmp r3, #0
80100fc: d001 beq.n 8010102 <xQueueGenericCreateStatic+0x5a>
80100fe: 2301 movs r3, #1
8010100: e000 b.n 8010104 <xQueueGenericCreateStatic+0x5c>
8010102: 2300 movs r3, #0
8010104: 2b00 cmp r3, #0
8010106: d10b bne.n 8010120 <xQueueGenericCreateStatic+0x78>
__asm volatile
8010108: f04f 0350 mov.w r3, #80 @ 0x50
801010c: f383 8811 msr BASEPRI, r3
8010110: f3bf 8f6f isb sy
8010114: f3bf 8f4f dsb sy
8010118: 623b str r3, [r7, #32]
}
801011a: bf00 nop
801011c: bf00 nop
801011e: e7fd b.n 801011c <xQueueGenericCreateStatic+0x74>
configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) );
8010120: 687b ldr r3, [r7, #4]
8010122: 2b00 cmp r3, #0
8010124: d102 bne.n 801012c <xQueueGenericCreateStatic+0x84>
8010126: 68bb ldr r3, [r7, #8]
8010128: 2b00 cmp r3, #0
801012a: d101 bne.n 8010130 <xQueueGenericCreateStatic+0x88>
801012c: 2301 movs r3, #1
801012e: e000 b.n 8010132 <xQueueGenericCreateStatic+0x8a>
8010130: 2300 movs r3, #0
8010132: 2b00 cmp r3, #0
8010134: d10b bne.n 801014e <xQueueGenericCreateStatic+0xa6>
__asm volatile
8010136: f04f 0350 mov.w r3, #80 @ 0x50
801013a: f383 8811 msr BASEPRI, r3
801013e: f3bf 8f6f isb sy
8010142: f3bf 8f4f dsb sy
8010146: 61fb str r3, [r7, #28]
}
8010148: bf00 nop
801014a: bf00 nop
801014c: e7fd b.n 801014a <xQueueGenericCreateStatic+0xa2>
#if( configASSERT_DEFINED == 1 )
{
/* Sanity check that the size of the structure used to declare a
variable of type StaticQueue_t or StaticSemaphore_t equals the size of
the real queue and semaphore structures. */
volatile size_t xSize = sizeof( StaticQueue_t );
801014e: 2348 movs r3, #72 @ 0x48
8010150: 617b str r3, [r7, #20]
configASSERT( xSize == sizeof( Queue_t ) );
8010152: 697b ldr r3, [r7, #20]
8010154: 2b48 cmp r3, #72 @ 0x48
8010156: d00b beq.n 8010170 <xQueueGenericCreateStatic+0xc8>
__asm volatile
8010158: f04f 0350 mov.w r3, #80 @ 0x50
801015c: f383 8811 msr BASEPRI, r3
8010160: f3bf 8f6f isb sy
8010164: f3bf 8f4f dsb sy
8010168: 61bb str r3, [r7, #24]
}
801016a: bf00 nop
801016c: bf00 nop
801016e: e7fd b.n 801016c <xQueueGenericCreateStatic+0xc4>
( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
8010170: 697b ldr r3, [r7, #20]
#endif /* configASSERT_DEFINED */
/* The address of a statically allocated queue was passed in, use it.
The address of a statically allocated storage area was also passed in
but is already set. */
pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
8010172: 683b ldr r3, [r7, #0]
8010174: 62fb str r3, [r7, #44] @ 0x2c
if( pxNewQueue != NULL )
8010176: 6afb ldr r3, [r7, #44] @ 0x2c
8010178: 2b00 cmp r3, #0
801017a: d00d beq.n 8010198 <xQueueGenericCreateStatic+0xf0>
#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
{
/* Queues can be allocated wither statically or dynamically, so
note this queue was allocated statically in case the queue is
later deleted. */
pxNewQueue->ucStaticallyAllocated = pdTRUE;
801017c: 6afb ldr r3, [r7, #44] @ 0x2c
801017e: 2201 movs r2, #1
8010180: f883 2046 strb.w r2, [r3, #70] @ 0x46
}
#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
8010184: f897 2038 ldrb.w r2, [r7, #56] @ 0x38
8010188: 6afb ldr r3, [r7, #44] @ 0x2c
801018a: 9300 str r3, [sp, #0]
801018c: 4613 mov r3, r2
801018e: 687a ldr r2, [r7, #4]
8010190: 68b9 ldr r1, [r7, #8]
8010192: 68f8 ldr r0, [r7, #12]
8010194: f000 f840 bl 8010218 <prvInitialiseNewQueue>
{
traceQUEUE_CREATE_FAILED( ucQueueType );
mtCOVERAGE_TEST_MARKER();
}
return pxNewQueue;
8010198: 6afb ldr r3, [r7, #44] @ 0x2c
}
801019a: 4618 mov r0, r3
801019c: 3730 adds r7, #48 @ 0x30
801019e: 46bd mov sp, r7
80101a0: bd80 pop {r7, pc}
080101a2 <xQueueGenericCreate>:
/*-----------------------------------------------------------*/
#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType )
{
80101a2: b580 push {r7, lr}
80101a4: b08a sub sp, #40 @ 0x28
80101a6: af02 add r7, sp, #8
80101a8: 60f8 str r0, [r7, #12]
80101aa: 60b9 str r1, [r7, #8]
80101ac: 4613 mov r3, r2
80101ae: 71fb strb r3, [r7, #7]
Queue_t *pxNewQueue;
size_t xQueueSizeInBytes;
uint8_t *pucQueueStorage;
configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
80101b0: 68fb ldr r3, [r7, #12]
80101b2: 2b00 cmp r3, #0
80101b4: d10b bne.n 80101ce <xQueueGenericCreate+0x2c>
__asm volatile
80101b6: f04f 0350 mov.w r3, #80 @ 0x50
80101ba: f383 8811 msr BASEPRI, r3
80101be: f3bf 8f6f isb sy
80101c2: f3bf 8f4f dsb sy
80101c6: 613b str r3, [r7, #16]
}
80101c8: bf00 nop
80101ca: bf00 nop
80101cc: e7fd b.n 80101ca <xQueueGenericCreate+0x28>
/* Allocate enough space to hold the maximum number of items that
can be in the queue at any time. It is valid for uxItemSize to be
zero in the case the queue is used as a semaphore. */
xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
80101ce: 68fb ldr r3, [r7, #12]
80101d0: 68ba ldr r2, [r7, #8]
80101d2: fb02 f303 mul.w r3, r2, r3
80101d6: 61fb str r3, [r7, #28]
alignment requirements of the Queue_t structure - which in this case
is an int8_t *. Therefore, whenever the stack alignment requirements
are greater than or equal to the pointer to char requirements the cast
is safe. In other cases alignment requirements are not strict (one or
two bytes). */
pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */
80101d8: 69fb ldr r3, [r7, #28]
80101da: 3348 adds r3, #72 @ 0x48
80101dc: 4618 mov r0, r3
80101de: f001 ff55 bl 801208c <pvPortMalloc>
80101e2: 61b8 str r0, [r7, #24]
if( pxNewQueue != NULL )
80101e4: 69bb ldr r3, [r7, #24]
80101e6: 2b00 cmp r3, #0
80101e8: d011 beq.n 801020e <xQueueGenericCreate+0x6c>
{
/* Jump past the queue structure to find the location of the queue
storage area. */
pucQueueStorage = ( uint8_t * ) pxNewQueue;
80101ea: 69bb ldr r3, [r7, #24]
80101ec: 617b str r3, [r7, #20]
pucQueueStorage += sizeof( Queue_t ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
80101ee: 697b ldr r3, [r7, #20]
80101f0: 3348 adds r3, #72 @ 0x48
80101f2: 617b str r3, [r7, #20]
#if( configSUPPORT_STATIC_ALLOCATION == 1 )
{
/* Queues can be created either statically or dynamically, so
note this task was created dynamically in case it is later
deleted. */
pxNewQueue->ucStaticallyAllocated = pdFALSE;
80101f4: 69bb ldr r3, [r7, #24]
80101f6: 2200 movs r2, #0
80101f8: f883 2046 strb.w r2, [r3, #70] @ 0x46
}
#endif /* configSUPPORT_STATIC_ALLOCATION */
prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
80101fc: 79fa ldrb r2, [r7, #7]
80101fe: 69bb ldr r3, [r7, #24]
8010200: 9300 str r3, [sp, #0]
8010202: 4613 mov r3, r2
8010204: 697a ldr r2, [r7, #20]
8010206: 68b9 ldr r1, [r7, #8]
8010208: 68f8 ldr r0, [r7, #12]
801020a: f000 f805 bl 8010218 <prvInitialiseNewQueue>
{
traceQUEUE_CREATE_FAILED( ucQueueType );
mtCOVERAGE_TEST_MARKER();
}
return pxNewQueue;
801020e: 69bb ldr r3, [r7, #24]
}
8010210: 4618 mov r0, r3
8010212: 3720 adds r7, #32
8010214: 46bd mov sp, r7
8010216: bd80 pop {r7, pc}
08010218 <prvInitialiseNewQueue>:
#endif /* configSUPPORT_STATIC_ALLOCATION */
/*-----------------------------------------------------------*/
static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue )
{
8010218: b580 push {r7, lr}
801021a: b084 sub sp, #16
801021c: af00 add r7, sp, #0
801021e: 60f8 str r0, [r7, #12]
8010220: 60b9 str r1, [r7, #8]
8010222: 607a str r2, [r7, #4]
8010224: 70fb strb r3, [r7, #3]
/* Remove compiler warnings about unused parameters should
configUSE_TRACE_FACILITY not be set to 1. */
( void ) ucQueueType;
if( uxItemSize == ( UBaseType_t ) 0 )
8010226: 68bb ldr r3, [r7, #8]
8010228: 2b00 cmp r3, #0
801022a: d103 bne.n 8010234 <prvInitialiseNewQueue+0x1c>
{
/* No RAM was allocated for the queue storage area, but PC head cannot
be set to NULL because NULL is used as a key to say the queue is used as
a mutex. Therefore just set pcHead to point to the queue as a benign
value that is known to be within the memory map. */
pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;
801022c: 69bb ldr r3, [r7, #24]
801022e: 69ba ldr r2, [r7, #24]
8010230: 601a str r2, [r3, #0]
8010232: e002 b.n 801023a <prvInitialiseNewQueue+0x22>
}
else
{
/* Set the head to the start of the queue storage area. */
pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;
8010234: 69bb ldr r3, [r7, #24]
8010236: 687a ldr r2, [r7, #4]
8010238: 601a str r2, [r3, #0]
}
/* Initialise the queue members as described where the queue type is
defined. */
pxNewQueue->uxLength = uxQueueLength;
801023a: 69bb ldr r3, [r7, #24]
801023c: 68fa ldr r2, [r7, #12]
801023e: 63da str r2, [r3, #60] @ 0x3c
pxNewQueue->uxItemSize = uxItemSize;
8010240: 69bb ldr r3, [r7, #24]
8010242: 68ba ldr r2, [r7, #8]
8010244: 641a str r2, [r3, #64] @ 0x40
( void ) xQueueGenericReset( pxNewQueue, pdTRUE );
8010246: 2101 movs r1, #1
8010248: 69b8 ldr r0, [r7, #24]
801024a: f7ff fec3 bl 800ffd4 <xQueueGenericReset>
pxNewQueue->pxQueueSetContainer = NULL;
}
#endif /* configUSE_QUEUE_SETS */
traceQUEUE_CREATE( pxNewQueue );
}
801024e: bf00 nop
8010250: 3710 adds r7, #16
8010252: 46bd mov sp, r7
8010254: bd80 pop {r7, pc}
...
08010258 <xQueueGenericSend>:
#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
/*-----------------------------------------------------------*/
BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )
{
8010258: b580 push {r7, lr}
801025a: b08e sub sp, #56 @ 0x38
801025c: af00 add r7, sp, #0
801025e: 60f8 str r0, [r7, #12]
8010260: 60b9 str r1, [r7, #8]
8010262: 607a str r2, [r7, #4]
8010264: 603b str r3, [r7, #0]
BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
8010266: 2300 movs r3, #0
8010268: 637b str r3, [r7, #52] @ 0x34
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
801026a: 68fb ldr r3, [r7, #12]
801026c: 633b str r3, [r7, #48] @ 0x30
configASSERT( pxQueue );
801026e: 6b3b ldr r3, [r7, #48] @ 0x30
8010270: 2b00 cmp r3, #0
8010272: d10b bne.n 801028c <xQueueGenericSend+0x34>
__asm volatile
8010274: f04f 0350 mov.w r3, #80 @ 0x50
8010278: f383 8811 msr BASEPRI, r3
801027c: f3bf 8f6f isb sy
8010280: f3bf 8f4f dsb sy
8010284: 62bb str r3, [r7, #40] @ 0x28
}
8010286: bf00 nop
8010288: bf00 nop
801028a: e7fd b.n 8010288 <xQueueGenericSend+0x30>
configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
801028c: 68bb ldr r3, [r7, #8]
801028e: 2b00 cmp r3, #0
8010290: d103 bne.n 801029a <xQueueGenericSend+0x42>
8010292: 6b3b ldr r3, [r7, #48] @ 0x30
8010294: 6c1b ldr r3, [r3, #64] @ 0x40
8010296: 2b00 cmp r3, #0
8010298: d101 bne.n 801029e <xQueueGenericSend+0x46>
801029a: 2301 movs r3, #1
801029c: e000 b.n 80102a0 <xQueueGenericSend+0x48>
801029e: 2300 movs r3, #0
80102a0: 2b00 cmp r3, #0
80102a2: d10b bne.n 80102bc <xQueueGenericSend+0x64>
__asm volatile
80102a4: f04f 0350 mov.w r3, #80 @ 0x50
80102a8: f383 8811 msr BASEPRI, r3
80102ac: f3bf 8f6f isb sy
80102b0: f3bf 8f4f dsb sy
80102b4: 627b str r3, [r7, #36] @ 0x24
}
80102b6: bf00 nop
80102b8: bf00 nop
80102ba: e7fd b.n 80102b8 <xQueueGenericSend+0x60>
configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
80102bc: 683b ldr r3, [r7, #0]
80102be: 2b02 cmp r3, #2
80102c0: d103 bne.n 80102ca <xQueueGenericSend+0x72>
80102c2: 6b3b ldr r3, [r7, #48] @ 0x30
80102c4: 6bdb ldr r3, [r3, #60] @ 0x3c
80102c6: 2b01 cmp r3, #1
80102c8: d101 bne.n 80102ce <xQueueGenericSend+0x76>
80102ca: 2301 movs r3, #1
80102cc: e000 b.n 80102d0 <xQueueGenericSend+0x78>
80102ce: 2300 movs r3, #0
80102d0: 2b00 cmp r3, #0
80102d2: d10b bne.n 80102ec <xQueueGenericSend+0x94>
__asm volatile
80102d4: f04f 0350 mov.w r3, #80 @ 0x50
80102d8: f383 8811 msr BASEPRI, r3
80102dc: f3bf 8f6f isb sy
80102e0: f3bf 8f4f dsb sy
80102e4: 623b str r3, [r7, #32]
}
80102e6: bf00 nop
80102e8: bf00 nop
80102ea: e7fd b.n 80102e8 <xQueueGenericSend+0x90>
#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
{
configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
80102ec: f001 fa54 bl 8011798 <xTaskGetSchedulerState>
80102f0: 4603 mov r3, r0
80102f2: 2b00 cmp r3, #0
80102f4: d102 bne.n 80102fc <xQueueGenericSend+0xa4>
80102f6: 687b ldr r3, [r7, #4]
80102f8: 2b00 cmp r3, #0
80102fa: d101 bne.n 8010300 <xQueueGenericSend+0xa8>
80102fc: 2301 movs r3, #1
80102fe: e000 b.n 8010302 <xQueueGenericSend+0xaa>
8010300: 2300 movs r3, #0
8010302: 2b00 cmp r3, #0
8010304: d10b bne.n 801031e <xQueueGenericSend+0xc6>
__asm volatile
8010306: f04f 0350 mov.w r3, #80 @ 0x50
801030a: f383 8811 msr BASEPRI, r3
801030e: f3bf 8f6f isb sy
8010312: f3bf 8f4f dsb sy
8010316: 61fb str r3, [r7, #28]
}
8010318: bf00 nop
801031a: bf00 nop
801031c: e7fd b.n 801031a <xQueueGenericSend+0xc2>
/*lint -save -e904 This function relaxes the coding standard somewhat to
allow return statements within the function itself. This is done in the
interest of execution time efficiency. */
for( ;; )
{
taskENTER_CRITICAL();
801031e: f001 fd93 bl 8011e48 <vPortEnterCritical>
{
/* Is there room on the queue now? The running task must be the
highest priority task wanting to access the queue. If the head item
in the queue is to be overwritten then it does not matter if the
queue is full. */
if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
8010322: 6b3b ldr r3, [r7, #48] @ 0x30
8010324: 6b9a ldr r2, [r3, #56] @ 0x38
8010326: 6b3b ldr r3, [r7, #48] @ 0x30
8010328: 6bdb ldr r3, [r3, #60] @ 0x3c
801032a: 429a cmp r2, r3
801032c: d302 bcc.n 8010334 <xQueueGenericSend+0xdc>
801032e: 683b ldr r3, [r7, #0]
8010330: 2b02 cmp r3, #2
8010332: d129 bne.n 8010388 <xQueueGenericSend+0x130>
}
}
}
#else /* configUSE_QUEUE_SETS */
{
xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
8010334: 683a ldr r2, [r7, #0]
8010336: 68b9 ldr r1, [r7, #8]
8010338: 6b38 ldr r0, [r7, #48] @ 0x30
801033a: f000 faed bl 8010918 <prvCopyDataToQueue>
801033e: 62f8 str r0, [r7, #44] @ 0x2c
/* If there was a task waiting for data to arrive on the
queue then unblock it now. */
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
8010340: 6b3b ldr r3, [r7, #48] @ 0x30
8010342: 6a5b ldr r3, [r3, #36] @ 0x24
8010344: 2b00 cmp r3, #0
8010346: d010 beq.n 801036a <xQueueGenericSend+0x112>
{
if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
8010348: 6b3b ldr r3, [r7, #48] @ 0x30
801034a: 3324 adds r3, #36 @ 0x24
801034c: 4618 mov r0, r3
801034e: f001 f85d bl 801140c <xTaskRemoveFromEventList>
8010352: 4603 mov r3, r0
8010354: 2b00 cmp r3, #0
8010356: d013 beq.n 8010380 <xQueueGenericSend+0x128>
{
/* The unblocked task has a priority higher than
our own so yield immediately. Yes it is ok to do
this from within the critical section - the kernel
takes care of that. */
queueYIELD_IF_USING_PREEMPTION();
8010358: 4b3f ldr r3, [pc, #252] @ (8010458 <xQueueGenericSend+0x200>)
801035a: f04f 5280 mov.w r2, #268435456 @ 0x10000000
801035e: 601a str r2, [r3, #0]
8010360: f3bf 8f4f dsb sy
8010364: f3bf 8f6f isb sy
8010368: e00a b.n 8010380 <xQueueGenericSend+0x128>
else
{
mtCOVERAGE_TEST_MARKER();
}
}
else if( xYieldRequired != pdFALSE )
801036a: 6afb ldr r3, [r7, #44] @ 0x2c
801036c: 2b00 cmp r3, #0
801036e: d007 beq.n 8010380 <xQueueGenericSend+0x128>
{
/* This path is a special case that will only get
executed if the task was holding multiple mutexes and
the mutexes were given back in an order that is
different to that in which they were taken. */
queueYIELD_IF_USING_PREEMPTION();
8010370: 4b39 ldr r3, [pc, #228] @ (8010458 <xQueueGenericSend+0x200>)
8010372: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8010376: 601a str r2, [r3, #0]
8010378: f3bf 8f4f dsb sy
801037c: f3bf 8f6f isb sy
mtCOVERAGE_TEST_MARKER();
}
}
#endif /* configUSE_QUEUE_SETS */
taskEXIT_CRITICAL();
8010380: f001 fd94 bl 8011eac <vPortExitCritical>
return pdPASS;
8010384: 2301 movs r3, #1
8010386: e063 b.n 8010450 <xQueueGenericSend+0x1f8>
}
else
{
if( xTicksToWait == ( TickType_t ) 0 )
8010388: 687b ldr r3, [r7, #4]
801038a: 2b00 cmp r3, #0
801038c: d103 bne.n 8010396 <xQueueGenericSend+0x13e>
{
/* The queue was full and no block time is specified (or
the block time has expired) so leave now. */
taskEXIT_CRITICAL();
801038e: f001 fd8d bl 8011eac <vPortExitCritical>
/* Return to the original privilege level before exiting
the function. */
traceQUEUE_SEND_FAILED( pxQueue );
return errQUEUE_FULL;
8010392: 2300 movs r3, #0
8010394: e05c b.n 8010450 <xQueueGenericSend+0x1f8>
}
else if( xEntryTimeSet == pdFALSE )
8010396: 6b7b ldr r3, [r7, #52] @ 0x34
8010398: 2b00 cmp r3, #0
801039a: d106 bne.n 80103aa <xQueueGenericSend+0x152>
{
/* The queue was full and a block time was specified so
configure the timeout structure. */
vTaskInternalSetTimeOutState( &xTimeOut );
801039c: f107 0314 add.w r3, r7, #20
80103a0: 4618 mov r0, r3
80103a2: f001 f897 bl 80114d4 <vTaskInternalSetTimeOutState>
xEntryTimeSet = pdTRUE;
80103a6: 2301 movs r3, #1
80103a8: 637b str r3, [r7, #52] @ 0x34
/* Entry time was already set. */
mtCOVERAGE_TEST_MARKER();
}
}
}
taskEXIT_CRITICAL();
80103aa: f001 fd7f bl 8011eac <vPortExitCritical>
/* Interrupts and other tasks can send to and receive from the queue
now the critical section has been exited. */
vTaskSuspendAll();
80103ae: f000 fe3d bl 801102c <vTaskSuspendAll>
prvLockQueue( pxQueue );
80103b2: f001 fd49 bl 8011e48 <vPortEnterCritical>
80103b6: 6b3b ldr r3, [r7, #48] @ 0x30
80103b8: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
80103bc: b25b sxtb r3, r3
80103be: f1b3 3fff cmp.w r3, #4294967295
80103c2: d103 bne.n 80103cc <xQueueGenericSend+0x174>
80103c4: 6b3b ldr r3, [r7, #48] @ 0x30
80103c6: 2200 movs r2, #0
80103c8: f883 2044 strb.w r2, [r3, #68] @ 0x44
80103cc: 6b3b ldr r3, [r7, #48] @ 0x30
80103ce: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
80103d2: b25b sxtb r3, r3
80103d4: f1b3 3fff cmp.w r3, #4294967295
80103d8: d103 bne.n 80103e2 <xQueueGenericSend+0x18a>
80103da: 6b3b ldr r3, [r7, #48] @ 0x30
80103dc: 2200 movs r2, #0
80103de: f883 2045 strb.w r2, [r3, #69] @ 0x45
80103e2: f001 fd63 bl 8011eac <vPortExitCritical>
/* Update the timeout state to see if it has expired yet. */
if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
80103e6: 1d3a adds r2, r7, #4
80103e8: f107 0314 add.w r3, r7, #20
80103ec: 4611 mov r1, r2
80103ee: 4618 mov r0, r3
80103f0: f001 f886 bl 8011500 <xTaskCheckForTimeOut>
80103f4: 4603 mov r3, r0
80103f6: 2b00 cmp r3, #0
80103f8: d124 bne.n 8010444 <xQueueGenericSend+0x1ec>
{
if( prvIsQueueFull( pxQueue ) != pdFALSE )
80103fa: 6b38 ldr r0, [r7, #48] @ 0x30
80103fc: f000 fb84 bl 8010b08 <prvIsQueueFull>
8010400: 4603 mov r3, r0
8010402: 2b00 cmp r3, #0
8010404: d018 beq.n 8010438 <xQueueGenericSend+0x1e0>
{
traceBLOCKING_ON_QUEUE_SEND( pxQueue );
vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
8010406: 6b3b ldr r3, [r7, #48] @ 0x30
8010408: 3310 adds r3, #16
801040a: 687a ldr r2, [r7, #4]
801040c: 4611 mov r1, r2
801040e: 4618 mov r0, r3
8010410: f000 ffd6 bl 80113c0 <vTaskPlaceOnEventList>
/* Unlocking the queue means queue events can effect the
event list. It is possible that interrupts occurring now
remove this task from the event list again - but as the
scheduler is suspended the task will go onto the pending
ready last instead of the actual ready list. */
prvUnlockQueue( pxQueue );
8010414: 6b38 ldr r0, [r7, #48] @ 0x30
8010416: f000 fb0f bl 8010a38 <prvUnlockQueue>
/* Resuming the scheduler will move tasks from the pending
ready list into the ready list - so it is feasible that this
task is already in a ready list before it yields - in which
case the yield will not cause a context switch unless there
is also a higher priority task in the pending ready list. */
if( xTaskResumeAll() == pdFALSE )
801041a: f000 fe15 bl 8011048 <xTaskResumeAll>
801041e: 4603 mov r3, r0
8010420: 2b00 cmp r3, #0
8010422: f47f af7c bne.w 801031e <xQueueGenericSend+0xc6>
{
portYIELD_WITHIN_API();
8010426: 4b0c ldr r3, [pc, #48] @ (8010458 <xQueueGenericSend+0x200>)
8010428: f04f 5280 mov.w r2, #268435456 @ 0x10000000
801042c: 601a str r2, [r3, #0]
801042e: f3bf 8f4f dsb sy
8010432: f3bf 8f6f isb sy
8010436: e772 b.n 801031e <xQueueGenericSend+0xc6>
}
}
else
{
/* Try again. */
prvUnlockQueue( pxQueue );
8010438: 6b38 ldr r0, [r7, #48] @ 0x30
801043a: f000 fafd bl 8010a38 <prvUnlockQueue>
( void ) xTaskResumeAll();
801043e: f000 fe03 bl 8011048 <xTaskResumeAll>
8010442: e76c b.n 801031e <xQueueGenericSend+0xc6>
}
}
else
{
/* The timeout has expired. */
prvUnlockQueue( pxQueue );
8010444: 6b38 ldr r0, [r7, #48] @ 0x30
8010446: f000 faf7 bl 8010a38 <prvUnlockQueue>
( void ) xTaskResumeAll();
801044a: f000 fdfd bl 8011048 <xTaskResumeAll>
traceQUEUE_SEND_FAILED( pxQueue );
return errQUEUE_FULL;
801044e: 2300 movs r3, #0
}
} /*lint -restore */
}
8010450: 4618 mov r0, r3
8010452: 3738 adds r7, #56 @ 0x38
8010454: 46bd mov sp, r7
8010456: bd80 pop {r7, pc}
8010458: e000ed04 .word 0xe000ed04
0801045c <xQueueGiveFromISR>:
return xReturn;
}
/*-----------------------------------------------------------*/
BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken )
{
801045c: b580 push {r7, lr}
801045e: b08e sub sp, #56 @ 0x38
8010460: af00 add r7, sp, #0
8010462: 6078 str r0, [r7, #4]
8010464: 6039 str r1, [r7, #0]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
8010466: 687b ldr r3, [r7, #4]
8010468: 633b str r3, [r7, #48] @ 0x30
item size is 0. Don't directly wake a task that was blocked on a queue
read, instead return a flag to say whether a context switch is required or
not (i.e. has a task with a higher priority than us been woken by this
post). */
configASSERT( pxQueue );
801046a: 6b3b ldr r3, [r7, #48] @ 0x30
801046c: 2b00 cmp r3, #0
801046e: d10b bne.n 8010488 <xQueueGiveFromISR+0x2c>
__asm volatile
8010470: f04f 0350 mov.w r3, #80 @ 0x50
8010474: f383 8811 msr BASEPRI, r3
8010478: f3bf 8f6f isb sy
801047c: f3bf 8f4f dsb sy
8010480: 623b str r3, [r7, #32]
}
8010482: bf00 nop
8010484: bf00 nop
8010486: e7fd b.n 8010484 <xQueueGiveFromISR+0x28>
/* xQueueGenericSendFromISR() should be used instead of xQueueGiveFromISR()
if the item size is not 0. */
configASSERT( pxQueue->uxItemSize == 0 );
8010488: 6b3b ldr r3, [r7, #48] @ 0x30
801048a: 6c1b ldr r3, [r3, #64] @ 0x40
801048c: 2b00 cmp r3, #0
801048e: d00b beq.n 80104a8 <xQueueGiveFromISR+0x4c>
__asm volatile
8010490: f04f 0350 mov.w r3, #80 @ 0x50
8010494: f383 8811 msr BASEPRI, r3
8010498: f3bf 8f6f isb sy
801049c: f3bf 8f4f dsb sy
80104a0: 61fb str r3, [r7, #28]
}
80104a2: bf00 nop
80104a4: bf00 nop
80104a6: e7fd b.n 80104a4 <xQueueGiveFromISR+0x48>
/* Normally a mutex would not be given from an interrupt, especially if
there is a mutex holder, as priority inheritance makes no sense for an
interrupts, only tasks. */
configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->u.xSemaphore.xMutexHolder != NULL ) ) );
80104a8: 6b3b ldr r3, [r7, #48] @ 0x30
80104aa: 681b ldr r3, [r3, #0]
80104ac: 2b00 cmp r3, #0
80104ae: d103 bne.n 80104b8 <xQueueGiveFromISR+0x5c>
80104b0: 6b3b ldr r3, [r7, #48] @ 0x30
80104b2: 689b ldr r3, [r3, #8]
80104b4: 2b00 cmp r3, #0
80104b6: d101 bne.n 80104bc <xQueueGiveFromISR+0x60>
80104b8: 2301 movs r3, #1
80104ba: e000 b.n 80104be <xQueueGiveFromISR+0x62>
80104bc: 2300 movs r3, #0
80104be: 2b00 cmp r3, #0
80104c0: d10b bne.n 80104da <xQueueGiveFromISR+0x7e>
__asm volatile
80104c2: f04f 0350 mov.w r3, #80 @ 0x50
80104c6: f383 8811 msr BASEPRI, r3
80104ca: f3bf 8f6f isb sy
80104ce: f3bf 8f4f dsb sy
80104d2: 61bb str r3, [r7, #24]
}
80104d4: bf00 nop
80104d6: bf00 nop
80104d8: e7fd b.n 80104d6 <xQueueGiveFromISR+0x7a>
that have been assigned a priority at or (logically) below the maximum
system call interrupt priority. FreeRTOS maintains a separate interrupt
safe API to ensure interrupt entry is as fast and as simple as possible.
More information (albeit Cortex-M specific) is provided on the following
link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
80104da: f001 fd95 bl 8012008 <vPortValidateInterruptPriority>
portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
{
uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
__asm volatile
80104de: f3ef 8211 mrs r2, BASEPRI
80104e2: f04f 0350 mov.w r3, #80 @ 0x50
80104e6: f383 8811 msr BASEPRI, r3
80104ea: f3bf 8f6f isb sy
80104ee: f3bf 8f4f dsb sy
80104f2: 617a str r2, [r7, #20]
80104f4: 613b str r3, [r7, #16]
:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
);
/* This return will not be reached but is necessary to prevent compiler
warnings. */
return ulOriginalBASEPRI;
80104f6: 697b ldr r3, [r7, #20]
uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
80104f8: 62fb str r3, [r7, #44] @ 0x2c
{
const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
80104fa: 6b3b ldr r3, [r7, #48] @ 0x30
80104fc: 6b9b ldr r3, [r3, #56] @ 0x38
80104fe: 62bb str r3, [r7, #40] @ 0x28
/* When the queue is used to implement a semaphore no data is ever
moved through the queue but it is still valid to see if the queue 'has
space'. */
if( uxMessagesWaiting < pxQueue->uxLength )
8010500: 6b3b ldr r3, [r7, #48] @ 0x30
8010502: 6bdb ldr r3, [r3, #60] @ 0x3c
8010504: 6aba ldr r2, [r7, #40] @ 0x28
8010506: 429a cmp r2, r3
8010508: d22b bcs.n 8010562 <xQueueGiveFromISR+0x106>
{
const int8_t cTxLock = pxQueue->cTxLock;
801050a: 6b3b ldr r3, [r7, #48] @ 0x30
801050c: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
8010510: f887 3027 strb.w r3, [r7, #39] @ 0x27
holder - and if there is a mutex holder then the mutex cannot be
given from an ISR. As this is the ISR version of the function it
can be assumed there is no mutex holder and no need to determine if
priority disinheritance is needed. Simply increase the count of
messages (semaphores) available. */
pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
8010514: 6abb ldr r3, [r7, #40] @ 0x28
8010516: 1c5a adds r2, r3, #1
8010518: 6b3b ldr r3, [r7, #48] @ 0x30
801051a: 639a str r2, [r3, #56] @ 0x38
/* The event list is not altered if the queue is locked. This will
be done when the queue is unlocked later. */
if( cTxLock == queueUNLOCKED )
801051c: f997 3027 ldrsb.w r3, [r7, #39] @ 0x27
8010520: f1b3 3fff cmp.w r3, #4294967295
8010524: d112 bne.n 801054c <xQueueGiveFromISR+0xf0>
}
}
}
#else /* configUSE_QUEUE_SETS */
{
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
8010526: 6b3b ldr r3, [r7, #48] @ 0x30
8010528: 6a5b ldr r3, [r3, #36] @ 0x24
801052a: 2b00 cmp r3, #0
801052c: d016 beq.n 801055c <xQueueGiveFromISR+0x100>
{
if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
801052e: 6b3b ldr r3, [r7, #48] @ 0x30
8010530: 3324 adds r3, #36 @ 0x24
8010532: 4618 mov r0, r3
8010534: f000 ff6a bl 801140c <xTaskRemoveFromEventList>
8010538: 4603 mov r3, r0
801053a: 2b00 cmp r3, #0
801053c: d00e beq.n 801055c <xQueueGiveFromISR+0x100>
{
/* The task waiting has a higher priority so record that a
context switch is required. */
if( pxHigherPriorityTaskWoken != NULL )
801053e: 683b ldr r3, [r7, #0]
8010540: 2b00 cmp r3, #0
8010542: d00b beq.n 801055c <xQueueGiveFromISR+0x100>
{
*pxHigherPriorityTaskWoken = pdTRUE;
8010544: 683b ldr r3, [r7, #0]
8010546: 2201 movs r2, #1
8010548: 601a str r2, [r3, #0]
801054a: e007 b.n 801055c <xQueueGiveFromISR+0x100>
}
else
{
/* Increment the lock count so the task that unlocks the queue
knows that data was posted while it was locked. */
pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
801054c: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
8010550: 3301 adds r3, #1
8010552: b2db uxtb r3, r3
8010554: b25a sxtb r2, r3
8010556: 6b3b ldr r3, [r7, #48] @ 0x30
8010558: f883 2045 strb.w r2, [r3, #69] @ 0x45
}
xReturn = pdPASS;
801055c: 2301 movs r3, #1
801055e: 637b str r3, [r7, #52] @ 0x34
8010560: e001 b.n 8010566 <xQueueGiveFromISR+0x10a>
}
else
{
traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
xReturn = errQUEUE_FULL;
8010562: 2300 movs r3, #0
8010564: 637b str r3, [r7, #52] @ 0x34
8010566: 6afb ldr r3, [r7, #44] @ 0x2c
8010568: 60fb str r3, [r7, #12]
}
/*-----------------------------------------------------------*/
portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
{
__asm volatile
801056a: 68fb ldr r3, [r7, #12]
801056c: f383 8811 msr BASEPRI, r3
(
" msr basepri, %0 " :: "r" ( ulNewMaskValue ) : "memory"
);
}
8010570: bf00 nop
}
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xReturn;
8010572: 6b7b ldr r3, [r7, #52] @ 0x34
}
8010574: 4618 mov r0, r3
8010576: 3738 adds r7, #56 @ 0x38
8010578: 46bd mov sp, r7
801057a: bd80 pop {r7, pc}
0801057c <xQueueSemaphoreTake>:
} /*lint -restore */
}
/*-----------------------------------------------------------*/
BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait )
{
801057c: b580 push {r7, lr}
801057e: b08e sub sp, #56 @ 0x38
8010580: af00 add r7, sp, #0
8010582: 6078 str r0, [r7, #4]
8010584: 6039 str r1, [r7, #0]
BaseType_t xEntryTimeSet = pdFALSE;
8010586: 2300 movs r3, #0
8010588: 637b str r3, [r7, #52] @ 0x34
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
801058a: 687b ldr r3, [r7, #4]
801058c: 62fb str r3, [r7, #44] @ 0x2c
#if( configUSE_MUTEXES == 1 )
BaseType_t xInheritanceOccurred = pdFALSE;
801058e: 2300 movs r3, #0
8010590: 633b str r3, [r7, #48] @ 0x30
#endif
/* Check the queue pointer is not NULL. */
configASSERT( ( pxQueue ) );
8010592: 6afb ldr r3, [r7, #44] @ 0x2c
8010594: 2b00 cmp r3, #0
8010596: d10b bne.n 80105b0 <xQueueSemaphoreTake+0x34>
__asm volatile
8010598: f04f 0350 mov.w r3, #80 @ 0x50
801059c: f383 8811 msr BASEPRI, r3
80105a0: f3bf 8f6f isb sy
80105a4: f3bf 8f4f dsb sy
80105a8: 623b str r3, [r7, #32]
}
80105aa: bf00 nop
80105ac: bf00 nop
80105ae: e7fd b.n 80105ac <xQueueSemaphoreTake+0x30>
/* Check this really is a semaphore, in which case the item size will be
0. */
configASSERT( pxQueue->uxItemSize == 0 );
80105b0: 6afb ldr r3, [r7, #44] @ 0x2c
80105b2: 6c1b ldr r3, [r3, #64] @ 0x40
80105b4: 2b00 cmp r3, #0
80105b6: d00b beq.n 80105d0 <xQueueSemaphoreTake+0x54>
__asm volatile
80105b8: f04f 0350 mov.w r3, #80 @ 0x50
80105bc: f383 8811 msr BASEPRI, r3
80105c0: f3bf 8f6f isb sy
80105c4: f3bf 8f4f dsb sy
80105c8: 61fb str r3, [r7, #28]
}
80105ca: bf00 nop
80105cc: bf00 nop
80105ce: e7fd b.n 80105cc <xQueueSemaphoreTake+0x50>
/* Cannot block if the scheduler is suspended. */
#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
{
configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
80105d0: f001 f8e2 bl 8011798 <xTaskGetSchedulerState>
80105d4: 4603 mov r3, r0
80105d6: 2b00 cmp r3, #0
80105d8: d102 bne.n 80105e0 <xQueueSemaphoreTake+0x64>
80105da: 683b ldr r3, [r7, #0]
80105dc: 2b00 cmp r3, #0
80105de: d101 bne.n 80105e4 <xQueueSemaphoreTake+0x68>
80105e0: 2301 movs r3, #1
80105e2: e000 b.n 80105e6 <xQueueSemaphoreTake+0x6a>
80105e4: 2300 movs r3, #0
80105e6: 2b00 cmp r3, #0
80105e8: d10b bne.n 8010602 <xQueueSemaphoreTake+0x86>
__asm volatile
80105ea: f04f 0350 mov.w r3, #80 @ 0x50
80105ee: f383 8811 msr BASEPRI, r3
80105f2: f3bf 8f6f isb sy
80105f6: f3bf 8f4f dsb sy
80105fa: 61bb str r3, [r7, #24]
}
80105fc: bf00 nop
80105fe: bf00 nop
8010600: e7fd b.n 80105fe <xQueueSemaphoreTake+0x82>
/*lint -save -e904 This function relaxes the coding standard somewhat to allow return
statements within the function itself. This is done in the interest
of execution time efficiency. */
for( ;; )
{
taskENTER_CRITICAL();
8010602: f001 fc21 bl 8011e48 <vPortEnterCritical>
{
/* Semaphores are queues with an item size of 0, and where the
number of messages in the queue is the semaphore's count value. */
const UBaseType_t uxSemaphoreCount = pxQueue->uxMessagesWaiting;
8010606: 6afb ldr r3, [r7, #44] @ 0x2c
8010608: 6b9b ldr r3, [r3, #56] @ 0x38
801060a: 62bb str r3, [r7, #40] @ 0x28
/* Is there data in the queue now? To be running the calling task
must be the highest priority task wanting to access the queue. */
if( uxSemaphoreCount > ( UBaseType_t ) 0 )
801060c: 6abb ldr r3, [r7, #40] @ 0x28
801060e: 2b00 cmp r3, #0
8010610: d024 beq.n 801065c <xQueueSemaphoreTake+0xe0>
{
traceQUEUE_RECEIVE( pxQueue );
/* Semaphores are queues with a data size of zero and where the
messages waiting is the semaphore's count. Reduce the count. */
pxQueue->uxMessagesWaiting = uxSemaphoreCount - ( UBaseType_t ) 1;
8010612: 6abb ldr r3, [r7, #40] @ 0x28
8010614: 1e5a subs r2, r3, #1
8010616: 6afb ldr r3, [r7, #44] @ 0x2c
8010618: 639a str r2, [r3, #56] @ 0x38
#if ( configUSE_MUTEXES == 1 )
{
if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
801061a: 6afb ldr r3, [r7, #44] @ 0x2c
801061c: 681b ldr r3, [r3, #0]
801061e: 2b00 cmp r3, #0
8010620: d104 bne.n 801062c <xQueueSemaphoreTake+0xb0>
{
/* Record the information required to implement
priority inheritance should it become necessary. */
pxQueue->u.xSemaphore.xMutexHolder = pvTaskIncrementMutexHeldCount();
8010622: f001 fa65 bl 8011af0 <pvTaskIncrementMutexHeldCount>
8010626: 4602 mov r2, r0
8010628: 6afb ldr r3, [r7, #44] @ 0x2c
801062a: 609a str r2, [r3, #8]
}
#endif /* configUSE_MUTEXES */
/* Check to see if other tasks are blocked waiting to give the
semaphore, and if so, unblock the highest priority such task. */
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
801062c: 6afb ldr r3, [r7, #44] @ 0x2c
801062e: 691b ldr r3, [r3, #16]
8010630: 2b00 cmp r3, #0
8010632: d00f beq.n 8010654 <xQueueSemaphoreTake+0xd8>
{
if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
8010634: 6afb ldr r3, [r7, #44] @ 0x2c
8010636: 3310 adds r3, #16
8010638: 4618 mov r0, r3
801063a: f000 fee7 bl 801140c <xTaskRemoveFromEventList>
801063e: 4603 mov r3, r0
8010640: 2b00 cmp r3, #0
8010642: d007 beq.n 8010654 <xQueueSemaphoreTake+0xd8>
{
queueYIELD_IF_USING_PREEMPTION();
8010644: 4b54 ldr r3, [pc, #336] @ (8010798 <xQueueSemaphoreTake+0x21c>)
8010646: f04f 5280 mov.w r2, #268435456 @ 0x10000000
801064a: 601a str r2, [r3, #0]
801064c: f3bf 8f4f dsb sy
8010650: f3bf 8f6f isb sy
else
{
mtCOVERAGE_TEST_MARKER();
}
taskEXIT_CRITICAL();
8010654: f001 fc2a bl 8011eac <vPortExitCritical>
return pdPASS;
8010658: 2301 movs r3, #1
801065a: e098 b.n 801078e <xQueueSemaphoreTake+0x212>
}
else
{
if( xTicksToWait == ( TickType_t ) 0 )
801065c: 683b ldr r3, [r7, #0]
801065e: 2b00 cmp r3, #0
8010660: d112 bne.n 8010688 <xQueueSemaphoreTake+0x10c>
/* For inheritance to have occurred there must have been an
initial timeout, and an adjusted timeout cannot become 0, as
if it were 0 the function would have exited. */
#if( configUSE_MUTEXES == 1 )
{
configASSERT( xInheritanceOccurred == pdFALSE );
8010662: 6b3b ldr r3, [r7, #48] @ 0x30
8010664: 2b00 cmp r3, #0
8010666: d00b beq.n 8010680 <xQueueSemaphoreTake+0x104>
__asm volatile
8010668: f04f 0350 mov.w r3, #80 @ 0x50
801066c: f383 8811 msr BASEPRI, r3
8010670: f3bf 8f6f isb sy
8010674: f3bf 8f4f dsb sy
8010678: 617b str r3, [r7, #20]
}
801067a: bf00 nop
801067c: bf00 nop
801067e: e7fd b.n 801067c <xQueueSemaphoreTake+0x100>
}
#endif /* configUSE_MUTEXES */
/* The semaphore count was 0 and no block time is specified
(or the block time has expired) so exit now. */
taskEXIT_CRITICAL();
8010680: f001 fc14 bl 8011eac <vPortExitCritical>
traceQUEUE_RECEIVE_FAILED( pxQueue );
return errQUEUE_EMPTY;
8010684: 2300 movs r3, #0
8010686: e082 b.n 801078e <xQueueSemaphoreTake+0x212>
}
else if( xEntryTimeSet == pdFALSE )
8010688: 6b7b ldr r3, [r7, #52] @ 0x34
801068a: 2b00 cmp r3, #0
801068c: d106 bne.n 801069c <xQueueSemaphoreTake+0x120>
{
/* The semaphore count was 0 and a block time was specified
so configure the timeout structure ready to block. */
vTaskInternalSetTimeOutState( &xTimeOut );
801068e: f107 030c add.w r3, r7, #12
8010692: 4618 mov r0, r3
8010694: f000 ff1e bl 80114d4 <vTaskInternalSetTimeOutState>
xEntryTimeSet = pdTRUE;
8010698: 2301 movs r3, #1
801069a: 637b str r3, [r7, #52] @ 0x34
/* Entry time was already set. */
mtCOVERAGE_TEST_MARKER();
}
}
}
taskEXIT_CRITICAL();
801069c: f001 fc06 bl 8011eac <vPortExitCritical>
/* Interrupts and other tasks can give to and take from the semaphore
now the critical section has been exited. */
vTaskSuspendAll();
80106a0: f000 fcc4 bl 801102c <vTaskSuspendAll>
prvLockQueue( pxQueue );
80106a4: f001 fbd0 bl 8011e48 <vPortEnterCritical>
80106a8: 6afb ldr r3, [r7, #44] @ 0x2c
80106aa: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
80106ae: b25b sxtb r3, r3
80106b0: f1b3 3fff cmp.w r3, #4294967295
80106b4: d103 bne.n 80106be <xQueueSemaphoreTake+0x142>
80106b6: 6afb ldr r3, [r7, #44] @ 0x2c
80106b8: 2200 movs r2, #0
80106ba: f883 2044 strb.w r2, [r3, #68] @ 0x44
80106be: 6afb ldr r3, [r7, #44] @ 0x2c
80106c0: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
80106c4: b25b sxtb r3, r3
80106c6: f1b3 3fff cmp.w r3, #4294967295
80106ca: d103 bne.n 80106d4 <xQueueSemaphoreTake+0x158>
80106cc: 6afb ldr r3, [r7, #44] @ 0x2c
80106ce: 2200 movs r2, #0
80106d0: f883 2045 strb.w r2, [r3, #69] @ 0x45
80106d4: f001 fbea bl 8011eac <vPortExitCritical>
/* Update the timeout state to see if it has expired yet. */
if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
80106d8: 463a mov r2, r7
80106da: f107 030c add.w r3, r7, #12
80106de: 4611 mov r1, r2
80106e0: 4618 mov r0, r3
80106e2: f000 ff0d bl 8011500 <xTaskCheckForTimeOut>
80106e6: 4603 mov r3, r0
80106e8: 2b00 cmp r3, #0
80106ea: d132 bne.n 8010752 <xQueueSemaphoreTake+0x1d6>
{
/* A block time is specified and not expired. If the semaphore
count is 0 then enter the Blocked state to wait for a semaphore to
become available. As semaphores are implemented with queues the
queue being empty is equivalent to the semaphore count being 0. */
if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
80106ec: 6af8 ldr r0, [r7, #44] @ 0x2c
80106ee: f000 f9f5 bl 8010adc <prvIsQueueEmpty>
80106f2: 4603 mov r3, r0
80106f4: 2b00 cmp r3, #0
80106f6: d026 beq.n 8010746 <xQueueSemaphoreTake+0x1ca>
{
traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
#if ( configUSE_MUTEXES == 1 )
{
if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
80106f8: 6afb ldr r3, [r7, #44] @ 0x2c
80106fa: 681b ldr r3, [r3, #0]
80106fc: 2b00 cmp r3, #0
80106fe: d109 bne.n 8010714 <xQueueSemaphoreTake+0x198>
{
taskENTER_CRITICAL();
8010700: f001 fba2 bl 8011e48 <vPortEnterCritical>
{
xInheritanceOccurred = xTaskPriorityInherit( pxQueue->u.xSemaphore.xMutexHolder );
8010704: 6afb ldr r3, [r7, #44] @ 0x2c
8010706: 689b ldr r3, [r3, #8]
8010708: 4618 mov r0, r3
801070a: f001 f863 bl 80117d4 <xTaskPriorityInherit>
801070e: 6338 str r0, [r7, #48] @ 0x30
}
taskEXIT_CRITICAL();
8010710: f001 fbcc bl 8011eac <vPortExitCritical>
mtCOVERAGE_TEST_MARKER();
}
}
#endif
vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
8010714: 6afb ldr r3, [r7, #44] @ 0x2c
8010716: 3324 adds r3, #36 @ 0x24
8010718: 683a ldr r2, [r7, #0]
801071a: 4611 mov r1, r2
801071c: 4618 mov r0, r3
801071e: f000 fe4f bl 80113c0 <vTaskPlaceOnEventList>
prvUnlockQueue( pxQueue );
8010722: 6af8 ldr r0, [r7, #44] @ 0x2c
8010724: f000 f988 bl 8010a38 <prvUnlockQueue>
if( xTaskResumeAll() == pdFALSE )
8010728: f000 fc8e bl 8011048 <xTaskResumeAll>
801072c: 4603 mov r3, r0
801072e: 2b00 cmp r3, #0
8010730: f47f af67 bne.w 8010602 <xQueueSemaphoreTake+0x86>
{
portYIELD_WITHIN_API();
8010734: 4b18 ldr r3, [pc, #96] @ (8010798 <xQueueSemaphoreTake+0x21c>)
8010736: f04f 5280 mov.w r2, #268435456 @ 0x10000000
801073a: 601a str r2, [r3, #0]
801073c: f3bf 8f4f dsb sy
8010740: f3bf 8f6f isb sy
8010744: e75d b.n 8010602 <xQueueSemaphoreTake+0x86>
}
else
{
/* There was no timeout and the semaphore count was not 0, so
attempt to take the semaphore again. */
prvUnlockQueue( pxQueue );
8010746: 6af8 ldr r0, [r7, #44] @ 0x2c
8010748: f000 f976 bl 8010a38 <prvUnlockQueue>
( void ) xTaskResumeAll();
801074c: f000 fc7c bl 8011048 <xTaskResumeAll>
8010750: e757 b.n 8010602 <xQueueSemaphoreTake+0x86>
}
}
else
{
/* Timed out. */
prvUnlockQueue( pxQueue );
8010752: 6af8 ldr r0, [r7, #44] @ 0x2c
8010754: f000 f970 bl 8010a38 <prvUnlockQueue>
( void ) xTaskResumeAll();
8010758: f000 fc76 bl 8011048 <xTaskResumeAll>
/* If the semaphore count is 0 exit now as the timeout has
expired. Otherwise return to attempt to take the semaphore that is
known to be available. As semaphores are implemented by queues the
queue being empty is equivalent to the semaphore count being 0. */
if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
801075c: 6af8 ldr r0, [r7, #44] @ 0x2c
801075e: f000 f9bd bl 8010adc <prvIsQueueEmpty>
8010762: 4603 mov r3, r0
8010764: 2b00 cmp r3, #0
8010766: f43f af4c beq.w 8010602 <xQueueSemaphoreTake+0x86>
#if ( configUSE_MUTEXES == 1 )
{
/* xInheritanceOccurred could only have be set if
pxQueue->uxQueueType == queueQUEUE_IS_MUTEX so no need to
test the mutex type again to check it is actually a mutex. */
if( xInheritanceOccurred != pdFALSE )
801076a: 6b3b ldr r3, [r7, #48] @ 0x30
801076c: 2b00 cmp r3, #0
801076e: d00d beq.n 801078c <xQueueSemaphoreTake+0x210>
{
taskENTER_CRITICAL();
8010770: f001 fb6a bl 8011e48 <vPortEnterCritical>
/* This task blocking on the mutex caused another
task to inherit this task's priority. Now this task
has timed out the priority should be disinherited
again, but only as low as the next highest priority
task that is waiting for the same mutex. */
uxHighestWaitingPriority = prvGetDisinheritPriorityAfterTimeout( pxQueue );
8010774: 6af8 ldr r0, [r7, #44] @ 0x2c
8010776: f000 f8b7 bl 80108e8 <prvGetDisinheritPriorityAfterTimeout>
801077a: 6278 str r0, [r7, #36] @ 0x24
vTaskPriorityDisinheritAfterTimeout( pxQueue->u.xSemaphore.xMutexHolder, uxHighestWaitingPriority );
801077c: 6afb ldr r3, [r7, #44] @ 0x2c
801077e: 689b ldr r3, [r3, #8]
8010780: 6a79 ldr r1, [r7, #36] @ 0x24
8010782: 4618 mov r0, r3
8010784: f001 f924 bl 80119d0 <vTaskPriorityDisinheritAfterTimeout>
}
taskEXIT_CRITICAL();
8010788: f001 fb90 bl 8011eac <vPortExitCritical>
}
}
#endif /* configUSE_MUTEXES */
traceQUEUE_RECEIVE_FAILED( pxQueue );
return errQUEUE_EMPTY;
801078c: 2300 movs r3, #0
{
mtCOVERAGE_TEST_MARKER();
}
}
} /*lint -restore */
}
801078e: 4618 mov r0, r3
8010790: 3738 adds r7, #56 @ 0x38
8010792: 46bd mov sp, r7
8010794: bd80 pop {r7, pc}
8010796: bf00 nop
8010798: e000ed04 .word 0xe000ed04
0801079c <xQueueReceiveFromISR>:
} /*lint -restore */
}
/*-----------------------------------------------------------*/
BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken )
{
801079c: b580 push {r7, lr}
801079e: b08e sub sp, #56 @ 0x38
80107a0: af00 add r7, sp, #0
80107a2: 60f8 str r0, [r7, #12]
80107a4: 60b9 str r1, [r7, #8]
80107a6: 607a str r2, [r7, #4]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
80107a8: 68fb ldr r3, [r7, #12]
80107aa: 633b str r3, [r7, #48] @ 0x30
configASSERT( pxQueue );
80107ac: 6b3b ldr r3, [r7, #48] @ 0x30
80107ae: 2b00 cmp r3, #0
80107b0: d10b bne.n 80107ca <xQueueReceiveFromISR+0x2e>
__asm volatile
80107b2: f04f 0350 mov.w r3, #80 @ 0x50
80107b6: f383 8811 msr BASEPRI, r3
80107ba: f3bf 8f6f isb sy
80107be: f3bf 8f4f dsb sy
80107c2: 623b str r3, [r7, #32]
}
80107c4: bf00 nop
80107c6: bf00 nop
80107c8: e7fd b.n 80107c6 <xQueueReceiveFromISR+0x2a>
configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
80107ca: 68bb ldr r3, [r7, #8]
80107cc: 2b00 cmp r3, #0
80107ce: d103 bne.n 80107d8 <xQueueReceiveFromISR+0x3c>
80107d0: 6b3b ldr r3, [r7, #48] @ 0x30
80107d2: 6c1b ldr r3, [r3, #64] @ 0x40
80107d4: 2b00 cmp r3, #0
80107d6: d101 bne.n 80107dc <xQueueReceiveFromISR+0x40>
80107d8: 2301 movs r3, #1
80107da: e000 b.n 80107de <xQueueReceiveFromISR+0x42>
80107dc: 2300 movs r3, #0
80107de: 2b00 cmp r3, #0
80107e0: d10b bne.n 80107fa <xQueueReceiveFromISR+0x5e>
__asm volatile
80107e2: f04f 0350 mov.w r3, #80 @ 0x50
80107e6: f383 8811 msr BASEPRI, r3
80107ea: f3bf 8f6f isb sy
80107ee: f3bf 8f4f dsb sy
80107f2: 61fb str r3, [r7, #28]
}
80107f4: bf00 nop
80107f6: bf00 nop
80107f8: e7fd b.n 80107f6 <xQueueReceiveFromISR+0x5a>
that have been assigned a priority at or (logically) below the maximum
system call interrupt priority. FreeRTOS maintains a separate interrupt
safe API to ensure interrupt entry is as fast and as simple as possible.
More information (albeit Cortex-M specific) is provided on the following
link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
80107fa: f001 fc05 bl 8012008 <vPortValidateInterruptPriority>
__asm volatile
80107fe: f3ef 8211 mrs r2, BASEPRI
8010802: f04f 0350 mov.w r3, #80 @ 0x50
8010806: f383 8811 msr BASEPRI, r3
801080a: f3bf 8f6f isb sy
801080e: f3bf 8f4f dsb sy
8010812: 61ba str r2, [r7, #24]
8010814: 617b str r3, [r7, #20]
return ulOriginalBASEPRI;
8010816: 69bb ldr r3, [r7, #24]
uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
8010818: 62fb str r3, [r7, #44] @ 0x2c
{
const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
801081a: 6b3b ldr r3, [r7, #48] @ 0x30
801081c: 6b9b ldr r3, [r3, #56] @ 0x38
801081e: 62bb str r3, [r7, #40] @ 0x28
/* Cannot block in an ISR, so check there is data available. */
if( uxMessagesWaiting > ( UBaseType_t ) 0 )
8010820: 6abb ldr r3, [r7, #40] @ 0x28
8010822: 2b00 cmp r3, #0
8010824: d02f beq.n 8010886 <xQueueReceiveFromISR+0xea>
{
const int8_t cRxLock = pxQueue->cRxLock;
8010826: 6b3b ldr r3, [r7, #48] @ 0x30
8010828: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
801082c: f887 3027 strb.w r3, [r7, #39] @ 0x27
traceQUEUE_RECEIVE_FROM_ISR( pxQueue );
prvCopyDataFromQueue( pxQueue, pvBuffer );
8010830: 68b9 ldr r1, [r7, #8]
8010832: 6b38 ldr r0, [r7, #48] @ 0x30
8010834: f000 f8da bl 80109ec <prvCopyDataFromQueue>
pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
8010838: 6abb ldr r3, [r7, #40] @ 0x28
801083a: 1e5a subs r2, r3, #1
801083c: 6b3b ldr r3, [r7, #48] @ 0x30
801083e: 639a str r2, [r3, #56] @ 0x38
/* If the queue is locked the event list will not be modified.
Instead update the lock count so the task that unlocks the queue
will know that an ISR has removed data while the queue was
locked. */
if( cRxLock == queueUNLOCKED )
8010840: f997 3027 ldrsb.w r3, [r7, #39] @ 0x27
8010844: f1b3 3fff cmp.w r3, #4294967295
8010848: d112 bne.n 8010870 <xQueueReceiveFromISR+0xd4>
{
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
801084a: 6b3b ldr r3, [r7, #48] @ 0x30
801084c: 691b ldr r3, [r3, #16]
801084e: 2b00 cmp r3, #0
8010850: d016 beq.n 8010880 <xQueueReceiveFromISR+0xe4>
{
if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
8010852: 6b3b ldr r3, [r7, #48] @ 0x30
8010854: 3310 adds r3, #16
8010856: 4618 mov r0, r3
8010858: f000 fdd8 bl 801140c <xTaskRemoveFromEventList>
801085c: 4603 mov r3, r0
801085e: 2b00 cmp r3, #0
8010860: d00e beq.n 8010880 <xQueueReceiveFromISR+0xe4>
{
/* The task waiting has a higher priority than us so
force a context switch. */
if( pxHigherPriorityTaskWoken != NULL )
8010862: 687b ldr r3, [r7, #4]
8010864: 2b00 cmp r3, #0
8010866: d00b beq.n 8010880 <xQueueReceiveFromISR+0xe4>
{
*pxHigherPriorityTaskWoken = pdTRUE;
8010868: 687b ldr r3, [r7, #4]
801086a: 2201 movs r2, #1
801086c: 601a str r2, [r3, #0]
801086e: e007 b.n 8010880 <xQueueReceiveFromISR+0xe4>
}
else
{
/* Increment the lock count so the task that unlocks the queue
knows that data was removed while it was locked. */
pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 );
8010870: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
8010874: 3301 adds r3, #1
8010876: b2db uxtb r3, r3
8010878: b25a sxtb r2, r3
801087a: 6b3b ldr r3, [r7, #48] @ 0x30
801087c: f883 2044 strb.w r2, [r3, #68] @ 0x44
}
xReturn = pdPASS;
8010880: 2301 movs r3, #1
8010882: 637b str r3, [r7, #52] @ 0x34
8010884: e001 b.n 801088a <xQueueReceiveFromISR+0xee>
}
else
{
xReturn = pdFAIL;
8010886: 2300 movs r3, #0
8010888: 637b str r3, [r7, #52] @ 0x34
801088a: 6afb ldr r3, [r7, #44] @ 0x2c
801088c: 613b str r3, [r7, #16]
__asm volatile
801088e: 693b ldr r3, [r7, #16]
8010890: f383 8811 msr BASEPRI, r3
}
8010894: bf00 nop
traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
}
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xReturn;
8010896: 6b7b ldr r3, [r7, #52] @ 0x34
}
8010898: 4618 mov r0, r3
801089a: 3738 adds r7, #56 @ 0x38
801089c: 46bd mov sp, r7
801089e: bd80 pop {r7, pc}
080108a0 <vQueueDelete>:
return uxReturn;
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
/*-----------------------------------------------------------*/
void vQueueDelete( QueueHandle_t xQueue )
{
80108a0: b580 push {r7, lr}
80108a2: b084 sub sp, #16
80108a4: af00 add r7, sp, #0
80108a6: 6078 str r0, [r7, #4]
Queue_t * const pxQueue = xQueue;
80108a8: 687b ldr r3, [r7, #4]
80108aa: 60fb str r3, [r7, #12]
configASSERT( pxQueue );
80108ac: 68fb ldr r3, [r7, #12]
80108ae: 2b00 cmp r3, #0
80108b0: d10b bne.n 80108ca <vQueueDelete+0x2a>
__asm volatile
80108b2: f04f 0350 mov.w r3, #80 @ 0x50
80108b6: f383 8811 msr BASEPRI, r3
80108ba: f3bf 8f6f isb sy
80108be: f3bf 8f4f dsb sy
80108c2: 60bb str r3, [r7, #8]
}
80108c4: bf00 nop
80108c6: bf00 nop
80108c8: e7fd b.n 80108c6 <vQueueDelete+0x26>
traceQUEUE_DELETE( pxQueue );
#if ( configQUEUE_REGISTRY_SIZE > 0 )
{
vQueueUnregisterQueue( pxQueue );
80108ca: 68f8 ldr r0, [r7, #12]
80108cc: f000 f934 bl 8010b38 <vQueueUnregisterQueue>
}
#elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
{
/* The queue could have been allocated statically or dynamically, so
check before attempting to free the memory. */
if( pxQueue->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
80108d0: 68fb ldr r3, [r7, #12]
80108d2: f893 3046 ldrb.w r3, [r3, #70] @ 0x46
80108d6: 2b00 cmp r3, #0
80108d8: d102 bne.n 80108e0 <vQueueDelete+0x40>
{
vPortFree( pxQueue );
80108da: 68f8 ldr r0, [r7, #12]
80108dc: f001 fca4 bl 8012228 <vPortFree>
/* The queue must have been statically allocated, so is not going to be
deleted. Avoid compiler warnings about the unused parameter. */
( void ) pxQueue;
}
#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
}
80108e0: bf00 nop
80108e2: 3710 adds r7, #16
80108e4: 46bd mov sp, r7
80108e6: bd80 pop {r7, pc}
080108e8 <prvGetDisinheritPriorityAfterTimeout>:
/*-----------------------------------------------------------*/
#if( configUSE_MUTEXES == 1 )
static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue )
{
80108e8: b480 push {r7}
80108ea: b085 sub sp, #20
80108ec: af00 add r7, sp, #0
80108ee: 6078 str r0, [r7, #4]
priority, but the waiting task times out, then the holder should
disinherit the priority - but only down to the highest priority of any
other tasks that are waiting for the same mutex. For this purpose,
return the priority of the highest priority task that is waiting for the
mutex. */
if( listCURRENT_LIST_LENGTH( &( pxQueue->xTasksWaitingToReceive ) ) > 0U )
80108f0: 687b ldr r3, [r7, #4]
80108f2: 6a5b ldr r3, [r3, #36] @ 0x24
80108f4: 2b00 cmp r3, #0
80108f6: d006 beq.n 8010906 <prvGetDisinheritPriorityAfterTimeout+0x1e>
{
uxHighestPriorityOfWaitingTasks = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) listGET_ITEM_VALUE_OF_HEAD_ENTRY( &( pxQueue->xTasksWaitingToReceive ) );
80108f8: 687b ldr r3, [r7, #4]
80108fa: 6b1b ldr r3, [r3, #48] @ 0x30
80108fc: 681b ldr r3, [r3, #0]
80108fe: f1c3 0307 rsb r3, r3, #7
8010902: 60fb str r3, [r7, #12]
8010904: e001 b.n 801090a <prvGetDisinheritPriorityAfterTimeout+0x22>
}
else
{
uxHighestPriorityOfWaitingTasks = tskIDLE_PRIORITY;
8010906: 2300 movs r3, #0
8010908: 60fb str r3, [r7, #12]
}
return uxHighestPriorityOfWaitingTasks;
801090a: 68fb ldr r3, [r7, #12]
}
801090c: 4618 mov r0, r3
801090e: 3714 adds r7, #20
8010910: 46bd mov sp, r7
8010912: f85d 7b04 ldr.w r7, [sp], #4
8010916: 4770 bx lr
08010918 <prvCopyDataToQueue>:
#endif /* configUSE_MUTEXES */
/*-----------------------------------------------------------*/
static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
{
8010918: b580 push {r7, lr}
801091a: b086 sub sp, #24
801091c: af00 add r7, sp, #0
801091e: 60f8 str r0, [r7, #12]
8010920: 60b9 str r1, [r7, #8]
8010922: 607a str r2, [r7, #4]
BaseType_t xReturn = pdFALSE;
8010924: 2300 movs r3, #0
8010926: 617b str r3, [r7, #20]
UBaseType_t uxMessagesWaiting;
/* This function is called from a critical section. */
uxMessagesWaiting = pxQueue->uxMessagesWaiting;
8010928: 68fb ldr r3, [r7, #12]
801092a: 6b9b ldr r3, [r3, #56] @ 0x38
801092c: 613b str r3, [r7, #16]
if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
801092e: 68fb ldr r3, [r7, #12]
8010930: 6c1b ldr r3, [r3, #64] @ 0x40
8010932: 2b00 cmp r3, #0
8010934: d10d bne.n 8010952 <prvCopyDataToQueue+0x3a>
{
#if ( configUSE_MUTEXES == 1 )
{
if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
8010936: 68fb ldr r3, [r7, #12]
8010938: 681b ldr r3, [r3, #0]
801093a: 2b00 cmp r3, #0
801093c: d14d bne.n 80109da <prvCopyDataToQueue+0xc2>
{
/* The mutex is no longer being held. */
xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder );
801093e: 68fb ldr r3, [r7, #12]
8010940: 689b ldr r3, [r3, #8]
8010942: 4618 mov r0, r3
8010944: f000 ffbc bl 80118c0 <xTaskPriorityDisinherit>
8010948: 6178 str r0, [r7, #20]
pxQueue->u.xSemaphore.xMutexHolder = NULL;
801094a: 68fb ldr r3, [r7, #12]
801094c: 2200 movs r2, #0
801094e: 609a str r2, [r3, #8]
8010950: e043 b.n 80109da <prvCopyDataToQueue+0xc2>
mtCOVERAGE_TEST_MARKER();
}
}
#endif /* configUSE_MUTEXES */
}
else if( xPosition == queueSEND_TO_BACK )
8010952: 687b ldr r3, [r7, #4]
8010954: 2b00 cmp r3, #0
8010956: d119 bne.n 801098c <prvCopyDataToQueue+0x74>
{
( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0. Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
8010958: 68fb ldr r3, [r7, #12]
801095a: 6858 ldr r0, [r3, #4]
801095c: 68fb ldr r3, [r7, #12]
801095e: 6c1b ldr r3, [r3, #64] @ 0x40
8010960: 461a mov r2, r3
8010962: 68b9 ldr r1, [r7, #8]
8010964: f002 fbbe bl 80130e4 <memcpy>
pxQueue->pcWriteTo += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
8010968: 68fb ldr r3, [r7, #12]
801096a: 685a ldr r2, [r3, #4]
801096c: 68fb ldr r3, [r7, #12]
801096e: 6c1b ldr r3, [r3, #64] @ 0x40
8010970: 441a add r2, r3
8010972: 68fb ldr r3, [r7, #12]
8010974: 605a str r2, [r3, #4]
if( pxQueue->pcWriteTo >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
8010976: 68fb ldr r3, [r7, #12]
8010978: 685a ldr r2, [r3, #4]
801097a: 68fb ldr r3, [r7, #12]
801097c: 689b ldr r3, [r3, #8]
801097e: 429a cmp r2, r3
8010980: d32b bcc.n 80109da <prvCopyDataToQueue+0xc2>
{
pxQueue->pcWriteTo = pxQueue->pcHead;
8010982: 68fb ldr r3, [r7, #12]
8010984: 681a ldr r2, [r3, #0]
8010986: 68fb ldr r3, [r7, #12]
8010988: 605a str r2, [r3, #4]
801098a: e026 b.n 80109da <prvCopyDataToQueue+0xc2>
mtCOVERAGE_TEST_MARKER();
}
}
else
{
( void ) memcpy( ( void * ) pxQueue->u.xQueue.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e9087 !e418 MISRA exception as the casts are only redundant for some ports. Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. Assert checks null pointer only used when length is 0. */
801098c: 68fb ldr r3, [r7, #12]
801098e: 68d8 ldr r0, [r3, #12]
8010990: 68fb ldr r3, [r7, #12]
8010992: 6c1b ldr r3, [r3, #64] @ 0x40
8010994: 461a mov r2, r3
8010996: 68b9 ldr r1, [r7, #8]
8010998: f002 fba4 bl 80130e4 <memcpy>
pxQueue->u.xQueue.pcReadFrom -= pxQueue->uxItemSize;
801099c: 68fb ldr r3, [r7, #12]
801099e: 68da ldr r2, [r3, #12]
80109a0: 68fb ldr r3, [r7, #12]
80109a2: 6c1b ldr r3, [r3, #64] @ 0x40
80109a4: 425b negs r3, r3
80109a6: 441a add r2, r3
80109a8: 68fb ldr r3, [r7, #12]
80109aa: 60da str r2, [r3, #12]
if( pxQueue->u.xQueue.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
80109ac: 68fb ldr r3, [r7, #12]
80109ae: 68da ldr r2, [r3, #12]
80109b0: 68fb ldr r3, [r7, #12]
80109b2: 681b ldr r3, [r3, #0]
80109b4: 429a cmp r2, r3
80109b6: d207 bcs.n 80109c8 <prvCopyDataToQueue+0xb0>
{
pxQueue->u.xQueue.pcReadFrom = ( pxQueue->u.xQueue.pcTail - pxQueue->uxItemSize );
80109b8: 68fb ldr r3, [r7, #12]
80109ba: 689a ldr r2, [r3, #8]
80109bc: 68fb ldr r3, [r7, #12]
80109be: 6c1b ldr r3, [r3, #64] @ 0x40
80109c0: 425b negs r3, r3
80109c2: 441a add r2, r3
80109c4: 68fb ldr r3, [r7, #12]
80109c6: 60da str r2, [r3, #12]
else
{
mtCOVERAGE_TEST_MARKER();
}
if( xPosition == queueOVERWRITE )
80109c8: 687b ldr r3, [r7, #4]
80109ca: 2b02 cmp r3, #2
80109cc: d105 bne.n 80109da <prvCopyDataToQueue+0xc2>
{
if( uxMessagesWaiting > ( UBaseType_t ) 0 )
80109ce: 693b ldr r3, [r7, #16]
80109d0: 2b00 cmp r3, #0
80109d2: d002 beq.n 80109da <prvCopyDataToQueue+0xc2>
{
/* An item is not being added but overwritten, so subtract
one from the recorded number of items in the queue so when
one is added again below the number of recorded items remains
correct. */
--uxMessagesWaiting;
80109d4: 693b ldr r3, [r7, #16]
80109d6: 3b01 subs r3, #1
80109d8: 613b str r3, [r7, #16]
{
mtCOVERAGE_TEST_MARKER();
}
}
pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
80109da: 693b ldr r3, [r7, #16]
80109dc: 1c5a adds r2, r3, #1
80109de: 68fb ldr r3, [r7, #12]
80109e0: 639a str r2, [r3, #56] @ 0x38
return xReturn;
80109e2: 697b ldr r3, [r7, #20]
}
80109e4: 4618 mov r0, r3
80109e6: 3718 adds r7, #24
80109e8: 46bd mov sp, r7
80109ea: bd80 pop {r7, pc}
080109ec <prvCopyDataFromQueue>:
/*-----------------------------------------------------------*/
static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer )
{
80109ec: b580 push {r7, lr}
80109ee: b082 sub sp, #8
80109f0: af00 add r7, sp, #0
80109f2: 6078 str r0, [r7, #4]
80109f4: 6039 str r1, [r7, #0]
if( pxQueue->uxItemSize != ( UBaseType_t ) 0 )
80109f6: 687b ldr r3, [r7, #4]
80109f8: 6c1b ldr r3, [r3, #64] @ 0x40
80109fa: 2b00 cmp r3, #0
80109fc: d018 beq.n 8010a30 <prvCopyDataFromQueue+0x44>
{
pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
80109fe: 687b ldr r3, [r7, #4]
8010a00: 68da ldr r2, [r3, #12]
8010a02: 687b ldr r3, [r7, #4]
8010a04: 6c1b ldr r3, [r3, #64] @ 0x40
8010a06: 441a add r2, r3
8010a08: 687b ldr r3, [r7, #4]
8010a0a: 60da str r2, [r3, #12]
if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */
8010a0c: 687b ldr r3, [r7, #4]
8010a0e: 68da ldr r2, [r3, #12]
8010a10: 687b ldr r3, [r7, #4]
8010a12: 689b ldr r3, [r3, #8]
8010a14: 429a cmp r2, r3
8010a16: d303 bcc.n 8010a20 <prvCopyDataFromQueue+0x34>
{
pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
8010a18: 687b ldr r3, [r7, #4]
8010a1a: 681a ldr r2, [r3, #0]
8010a1c: 687b ldr r3, [r7, #4]
8010a1e: 60da str r2, [r3, #12]
}
else
{
mtCOVERAGE_TEST_MARKER();
}
( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports. Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0. Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
8010a20: 687b ldr r3, [r7, #4]
8010a22: 68d9 ldr r1, [r3, #12]
8010a24: 687b ldr r3, [r7, #4]
8010a26: 6c1b ldr r3, [r3, #64] @ 0x40
8010a28: 461a mov r2, r3
8010a2a: 6838 ldr r0, [r7, #0]
8010a2c: f002 fb5a bl 80130e4 <memcpy>
}
}
8010a30: bf00 nop
8010a32: 3708 adds r7, #8
8010a34: 46bd mov sp, r7
8010a36: bd80 pop {r7, pc}
08010a38 <prvUnlockQueue>:
/*-----------------------------------------------------------*/
static void prvUnlockQueue( Queue_t * const pxQueue )
{
8010a38: b580 push {r7, lr}
8010a3a: b084 sub sp, #16
8010a3c: af00 add r7, sp, #0
8010a3e: 6078 str r0, [r7, #4]
/* The lock counts contains the number of extra data items placed or
removed from the queue while the queue was locked. When a queue is
locked items can be added or removed, but the event lists cannot be
updated. */
taskENTER_CRITICAL();
8010a40: f001 fa02 bl 8011e48 <vPortEnterCritical>
{
int8_t cTxLock = pxQueue->cTxLock;
8010a44: 687b ldr r3, [r7, #4]
8010a46: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
8010a4a: 73fb strb r3, [r7, #15]
/* See if data was added to the queue while it was locked. */
while( cTxLock > queueLOCKED_UNMODIFIED )
8010a4c: e011 b.n 8010a72 <prvUnlockQueue+0x3a>
}
#else /* configUSE_QUEUE_SETS */
{
/* Tasks that are removed from the event list will get added to
the pending ready list as the scheduler is still suspended. */
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
8010a4e: 687b ldr r3, [r7, #4]
8010a50: 6a5b ldr r3, [r3, #36] @ 0x24
8010a52: 2b00 cmp r3, #0
8010a54: d012 beq.n 8010a7c <prvUnlockQueue+0x44>
{
if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
8010a56: 687b ldr r3, [r7, #4]
8010a58: 3324 adds r3, #36 @ 0x24
8010a5a: 4618 mov r0, r3
8010a5c: f000 fcd6 bl 801140c <xTaskRemoveFromEventList>
8010a60: 4603 mov r3, r0
8010a62: 2b00 cmp r3, #0
8010a64: d001 beq.n 8010a6a <prvUnlockQueue+0x32>
{
/* The task waiting has a higher priority so record that
a context switch is required. */
vTaskMissedYield();
8010a66: f000 fdaf bl 80115c8 <vTaskMissedYield>
break;
}
}
#endif /* configUSE_QUEUE_SETS */
--cTxLock;
8010a6a: 7bfb ldrb r3, [r7, #15]
8010a6c: 3b01 subs r3, #1
8010a6e: b2db uxtb r3, r3
8010a70: 73fb strb r3, [r7, #15]
while( cTxLock > queueLOCKED_UNMODIFIED )
8010a72: f997 300f ldrsb.w r3, [r7, #15]
8010a76: 2b00 cmp r3, #0
8010a78: dce9 bgt.n 8010a4e <prvUnlockQueue+0x16>
8010a7a: e000 b.n 8010a7e <prvUnlockQueue+0x46>
break;
8010a7c: bf00 nop
}
pxQueue->cTxLock = queueUNLOCKED;
8010a7e: 687b ldr r3, [r7, #4]
8010a80: 22ff movs r2, #255 @ 0xff
8010a82: f883 2045 strb.w r2, [r3, #69] @ 0x45
}
taskEXIT_CRITICAL();
8010a86: f001 fa11 bl 8011eac <vPortExitCritical>
/* Do the same for the Rx lock. */
taskENTER_CRITICAL();
8010a8a: f001 f9dd bl 8011e48 <vPortEnterCritical>
{
int8_t cRxLock = pxQueue->cRxLock;
8010a8e: 687b ldr r3, [r7, #4]
8010a90: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
8010a94: 73bb strb r3, [r7, #14]
while( cRxLock > queueLOCKED_UNMODIFIED )
8010a96: e011 b.n 8010abc <prvUnlockQueue+0x84>
{
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
8010a98: 687b ldr r3, [r7, #4]
8010a9a: 691b ldr r3, [r3, #16]
8010a9c: 2b00 cmp r3, #0
8010a9e: d012 beq.n 8010ac6 <prvUnlockQueue+0x8e>
{
if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
8010aa0: 687b ldr r3, [r7, #4]
8010aa2: 3310 adds r3, #16
8010aa4: 4618 mov r0, r3
8010aa6: f000 fcb1 bl 801140c <xTaskRemoveFromEventList>
8010aaa: 4603 mov r3, r0
8010aac: 2b00 cmp r3, #0
8010aae: d001 beq.n 8010ab4 <prvUnlockQueue+0x7c>
{
vTaskMissedYield();
8010ab0: f000 fd8a bl 80115c8 <vTaskMissedYield>
else
{
mtCOVERAGE_TEST_MARKER();
}
--cRxLock;
8010ab4: 7bbb ldrb r3, [r7, #14]
8010ab6: 3b01 subs r3, #1
8010ab8: b2db uxtb r3, r3
8010aba: 73bb strb r3, [r7, #14]
while( cRxLock > queueLOCKED_UNMODIFIED )
8010abc: f997 300e ldrsb.w r3, [r7, #14]
8010ac0: 2b00 cmp r3, #0
8010ac2: dce9 bgt.n 8010a98 <prvUnlockQueue+0x60>
8010ac4: e000 b.n 8010ac8 <prvUnlockQueue+0x90>
}
else
{
break;
8010ac6: bf00 nop
}
}
pxQueue->cRxLock = queueUNLOCKED;
8010ac8: 687b ldr r3, [r7, #4]
8010aca: 22ff movs r2, #255 @ 0xff
8010acc: f883 2044 strb.w r2, [r3, #68] @ 0x44
}
taskEXIT_CRITICAL();
8010ad0: f001 f9ec bl 8011eac <vPortExitCritical>
}
8010ad4: bf00 nop
8010ad6: 3710 adds r7, #16
8010ad8: 46bd mov sp, r7
8010ada: bd80 pop {r7, pc}
08010adc <prvIsQueueEmpty>:
/*-----------------------------------------------------------*/
static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue )
{
8010adc: b580 push {r7, lr}
8010ade: b084 sub sp, #16
8010ae0: af00 add r7, sp, #0
8010ae2: 6078 str r0, [r7, #4]
BaseType_t xReturn;
taskENTER_CRITICAL();
8010ae4: f001 f9b0 bl 8011e48 <vPortEnterCritical>
{
if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )
8010ae8: 687b ldr r3, [r7, #4]
8010aea: 6b9b ldr r3, [r3, #56] @ 0x38
8010aec: 2b00 cmp r3, #0
8010aee: d102 bne.n 8010af6 <prvIsQueueEmpty+0x1a>
{
xReturn = pdTRUE;
8010af0: 2301 movs r3, #1
8010af2: 60fb str r3, [r7, #12]
8010af4: e001 b.n 8010afa <prvIsQueueEmpty+0x1e>
}
else
{
xReturn = pdFALSE;
8010af6: 2300 movs r3, #0
8010af8: 60fb str r3, [r7, #12]
}
}
taskEXIT_CRITICAL();
8010afa: f001 f9d7 bl 8011eac <vPortExitCritical>
return xReturn;
8010afe: 68fb ldr r3, [r7, #12]
}
8010b00: 4618 mov r0, r3
8010b02: 3710 adds r7, #16
8010b04: 46bd mov sp, r7
8010b06: bd80 pop {r7, pc}
08010b08 <prvIsQueueFull>:
return xReturn;
} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
/*-----------------------------------------------------------*/
static BaseType_t prvIsQueueFull( const Queue_t *pxQueue )
{
8010b08: b580 push {r7, lr}
8010b0a: b084 sub sp, #16
8010b0c: af00 add r7, sp, #0
8010b0e: 6078 str r0, [r7, #4]
BaseType_t xReturn;
taskENTER_CRITICAL();
8010b10: f001 f99a bl 8011e48 <vPortEnterCritical>
{
if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
8010b14: 687b ldr r3, [r7, #4]
8010b16: 6b9a ldr r2, [r3, #56] @ 0x38
8010b18: 687b ldr r3, [r7, #4]
8010b1a: 6bdb ldr r3, [r3, #60] @ 0x3c
8010b1c: 429a cmp r2, r3
8010b1e: d102 bne.n 8010b26 <prvIsQueueFull+0x1e>
{
xReturn = pdTRUE;
8010b20: 2301 movs r3, #1
8010b22: 60fb str r3, [r7, #12]
8010b24: e001 b.n 8010b2a <prvIsQueueFull+0x22>
}
else
{
xReturn = pdFALSE;
8010b26: 2300 movs r3, #0
8010b28: 60fb str r3, [r7, #12]
}
}
taskEXIT_CRITICAL();
8010b2a: f001 f9bf bl 8011eac <vPortExitCritical>
return xReturn;
8010b2e: 68fb ldr r3, [r7, #12]
}
8010b30: 4618 mov r0, r3
8010b32: 3710 adds r7, #16
8010b34: 46bd mov sp, r7
8010b36: bd80 pop {r7, pc}
08010b38 <vQueueUnregisterQueue>:
/*-----------------------------------------------------------*/
#if ( configQUEUE_REGISTRY_SIZE > 0 )
void vQueueUnregisterQueue( QueueHandle_t xQueue )
{
8010b38: b480 push {r7}
8010b3a: b085 sub sp, #20
8010b3c: af00 add r7, sp, #0
8010b3e: 6078 str r0, [r7, #4]
UBaseType_t ux;
/* See if the handle of the queue being unregistered in actually in the
registry. */
for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
8010b40: 2300 movs r3, #0
8010b42: 60fb str r3, [r7, #12]
8010b44: e016 b.n 8010b74 <vQueueUnregisterQueue+0x3c>
{
if( xQueueRegistry[ ux ].xHandle == xQueue )
8010b46: 4a10 ldr r2, [pc, #64] @ (8010b88 <vQueueUnregisterQueue+0x50>)
8010b48: 68fb ldr r3, [r7, #12]
8010b4a: 00db lsls r3, r3, #3
8010b4c: 4413 add r3, r2
8010b4e: 685b ldr r3, [r3, #4]
8010b50: 687a ldr r2, [r7, #4]
8010b52: 429a cmp r2, r3
8010b54: d10b bne.n 8010b6e <vQueueUnregisterQueue+0x36>
{
/* Set the name to NULL to show that this slot if free again. */
xQueueRegistry[ ux ].pcQueueName = NULL;
8010b56: 4a0c ldr r2, [pc, #48] @ (8010b88 <vQueueUnregisterQueue+0x50>)
8010b58: 68fb ldr r3, [r7, #12]
8010b5a: 2100 movs r1, #0
8010b5c: f842 1033 str.w r1, [r2, r3, lsl #3]
/* Set the handle to NULL to ensure the same queue handle cannot
appear in the registry twice if it is added, removed, then
added again. */
xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0;
8010b60: 4a09 ldr r2, [pc, #36] @ (8010b88 <vQueueUnregisterQueue+0x50>)
8010b62: 68fb ldr r3, [r7, #12]
8010b64: 00db lsls r3, r3, #3
8010b66: 4413 add r3, r2
8010b68: 2200 movs r2, #0
8010b6a: 605a str r2, [r3, #4]
break;
8010b6c: e006 b.n 8010b7c <vQueueUnregisterQueue+0x44>
for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
8010b6e: 68fb ldr r3, [r7, #12]
8010b70: 3301 adds r3, #1
8010b72: 60fb str r3, [r7, #12]
8010b74: 68fb ldr r3, [r7, #12]
8010b76: 2b07 cmp r3, #7
8010b78: d9e5 bls.n 8010b46 <vQueueUnregisterQueue+0xe>
{
mtCOVERAGE_TEST_MARKER();
}
}
} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
8010b7a: bf00 nop
8010b7c: bf00 nop
8010b7e: 3714 adds r7, #20
8010b80: 46bd mov sp, r7
8010b82: f85d 7b04 ldr.w r7, [sp], #4
8010b86: 4770 bx lr
8010b88: 20010158 .word 0x20010158
08010b8c <xTaskCreateStatic>:
const uint32_t ulStackDepth,
void * const pvParameters,
UBaseType_t uxPriority,
StackType_t * const puxStackBuffer,
StaticTask_t * const pxTaskBuffer )
{
8010b8c: b580 push {r7, lr}
8010b8e: b08e sub sp, #56 @ 0x38
8010b90: af04 add r7, sp, #16
8010b92: 60f8 str r0, [r7, #12]
8010b94: 60b9 str r1, [r7, #8]
8010b96: 607a str r2, [r7, #4]
8010b98: 603b str r3, [r7, #0]
TCB_t *pxNewTCB;
TaskHandle_t xReturn;
configASSERT( puxStackBuffer != NULL );
8010b9a: 6b7b ldr r3, [r7, #52] @ 0x34
8010b9c: 2b00 cmp r3, #0
8010b9e: d10b bne.n 8010bb8 <xTaskCreateStatic+0x2c>
__asm volatile
8010ba0: f04f 0350 mov.w r3, #80 @ 0x50
8010ba4: f383 8811 msr BASEPRI, r3
8010ba8: f3bf 8f6f isb sy
8010bac: f3bf 8f4f dsb sy
8010bb0: 623b str r3, [r7, #32]
}
8010bb2: bf00 nop
8010bb4: bf00 nop
8010bb6: e7fd b.n 8010bb4 <xTaskCreateStatic+0x28>
configASSERT( pxTaskBuffer != NULL );
8010bb8: 6bbb ldr r3, [r7, #56] @ 0x38
8010bba: 2b00 cmp r3, #0
8010bbc: d10b bne.n 8010bd6 <xTaskCreateStatic+0x4a>
__asm volatile
8010bbe: f04f 0350 mov.w r3, #80 @ 0x50
8010bc2: f383 8811 msr BASEPRI, r3
8010bc6: f3bf 8f6f isb sy
8010bca: f3bf 8f4f dsb sy
8010bce: 61fb str r3, [r7, #28]
}
8010bd0: bf00 nop
8010bd2: bf00 nop
8010bd4: e7fd b.n 8010bd2 <xTaskCreateStatic+0x46>
#if( configASSERT_DEFINED == 1 )
{
/* Sanity check that the size of the structure used to declare a
variable of type StaticTask_t equals the size of the real task
structure. */
volatile size_t xSize = sizeof( StaticTask_t );
8010bd6: 23a0 movs r3, #160 @ 0xa0
8010bd8: 613b str r3, [r7, #16]
configASSERT( xSize == sizeof( TCB_t ) );
8010bda: 693b ldr r3, [r7, #16]
8010bdc: 2ba0 cmp r3, #160 @ 0xa0
8010bde: d00b beq.n 8010bf8 <xTaskCreateStatic+0x6c>
__asm volatile
8010be0: f04f 0350 mov.w r3, #80 @ 0x50
8010be4: f383 8811 msr BASEPRI, r3
8010be8: f3bf 8f6f isb sy
8010bec: f3bf 8f4f dsb sy
8010bf0: 61bb str r3, [r7, #24]
}
8010bf2: bf00 nop
8010bf4: bf00 nop
8010bf6: e7fd b.n 8010bf4 <xTaskCreateStatic+0x68>
( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */
8010bf8: 693b ldr r3, [r7, #16]
}
#endif /* configASSERT_DEFINED */
if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
8010bfa: 6bbb ldr r3, [r7, #56] @ 0x38
8010bfc: 2b00 cmp r3, #0
8010bfe: d01e beq.n 8010c3e <xTaskCreateStatic+0xb2>
8010c00: 6b7b ldr r3, [r7, #52] @ 0x34
8010c02: 2b00 cmp r3, #0
8010c04: d01b beq.n 8010c3e <xTaskCreateStatic+0xb2>
{
/* The memory used for the task's TCB and stack are passed into this
function - use them. */
pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
8010c06: 6bbb ldr r3, [r7, #56] @ 0x38
8010c08: 627b str r3, [r7, #36] @ 0x24
pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
8010c0a: 6a7b ldr r3, [r7, #36] @ 0x24
8010c0c: 6b7a ldr r2, [r7, #52] @ 0x34
8010c0e: 631a str r2, [r3, #48] @ 0x30
#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
{
/* Tasks can be created statically or dynamically, so note this
task was created statically in case the task is later deleted. */
pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
8010c10: 6a7b ldr r3, [r7, #36] @ 0x24
8010c12: 2202 movs r2, #2
8010c14: f883 209d strb.w r2, [r3, #157] @ 0x9d
}
#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
8010c18: 2300 movs r3, #0
8010c1a: 9303 str r3, [sp, #12]
8010c1c: 6a7b ldr r3, [r7, #36] @ 0x24
8010c1e: 9302 str r3, [sp, #8]
8010c20: f107 0314 add.w r3, r7, #20
8010c24: 9301 str r3, [sp, #4]
8010c26: 6b3b ldr r3, [r7, #48] @ 0x30
8010c28: 9300 str r3, [sp, #0]
8010c2a: 683b ldr r3, [r7, #0]
8010c2c: 687a ldr r2, [r7, #4]
8010c2e: 68b9 ldr r1, [r7, #8]
8010c30: 68f8 ldr r0, [r7, #12]
8010c32: f000 f851 bl 8010cd8 <prvInitialiseNewTask>
prvAddNewTaskToReadyList( pxNewTCB );
8010c36: 6a78 ldr r0, [r7, #36] @ 0x24
8010c38: f000 f8ee bl 8010e18 <prvAddNewTaskToReadyList>
8010c3c: e001 b.n 8010c42 <xTaskCreateStatic+0xb6>
}
else
{
xReturn = NULL;
8010c3e: 2300 movs r3, #0
8010c40: 617b str r3, [r7, #20]
}
return xReturn;
8010c42: 697b ldr r3, [r7, #20]
}
8010c44: 4618 mov r0, r3
8010c46: 3728 adds r7, #40 @ 0x28
8010c48: 46bd mov sp, r7
8010c4a: bd80 pop {r7, pc}
08010c4c <xTaskCreate>:
const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
const configSTACK_DEPTH_TYPE usStackDepth,
void * const pvParameters,
UBaseType_t uxPriority,
TaskHandle_t * const pxCreatedTask )
{
8010c4c: b580 push {r7, lr}
8010c4e: b08c sub sp, #48 @ 0x30
8010c50: af04 add r7, sp, #16
8010c52: 60f8 str r0, [r7, #12]
8010c54: 60b9 str r1, [r7, #8]
8010c56: 603b str r3, [r7, #0]
8010c58: 4613 mov r3, r2
8010c5a: 80fb strh r3, [r7, #6]
#else /* portSTACK_GROWTH */
{
StackType_t *pxStack;
/* Allocate space for the stack used by the task being created. */
pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
8010c5c: 88fb ldrh r3, [r7, #6]
8010c5e: 009b lsls r3, r3, #2
8010c60: 4618 mov r0, r3
8010c62: f001 fa13 bl 801208c <pvPortMalloc>
8010c66: 6178 str r0, [r7, #20]
if( pxStack != NULL )
8010c68: 697b ldr r3, [r7, #20]
8010c6a: 2b00 cmp r3, #0
8010c6c: d00e beq.n 8010c8c <xTaskCreate+0x40>
{
/* Allocate space for the TCB. */
pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
8010c6e: 20a0 movs r0, #160 @ 0xa0
8010c70: f001 fa0c bl 801208c <pvPortMalloc>
8010c74: 61f8 str r0, [r7, #28]
if( pxNewTCB != NULL )
8010c76: 69fb ldr r3, [r7, #28]
8010c78: 2b00 cmp r3, #0
8010c7a: d003 beq.n 8010c84 <xTaskCreate+0x38>
{
/* Store the stack location in the TCB. */
pxNewTCB->pxStack = pxStack;
8010c7c: 69fb ldr r3, [r7, #28]
8010c7e: 697a ldr r2, [r7, #20]
8010c80: 631a str r2, [r3, #48] @ 0x30
8010c82: e005 b.n 8010c90 <xTaskCreate+0x44>
}
else
{
/* The stack cannot be used as the TCB was not created. Free
it again. */
vPortFree( pxStack );
8010c84: 6978 ldr r0, [r7, #20]
8010c86: f001 facf bl 8012228 <vPortFree>
8010c8a: e001 b.n 8010c90 <xTaskCreate+0x44>
}
}
else
{
pxNewTCB = NULL;
8010c8c: 2300 movs r3, #0
8010c8e: 61fb str r3, [r7, #28]
}
}
#endif /* portSTACK_GROWTH */
if( pxNewTCB != NULL )
8010c90: 69fb ldr r3, [r7, #28]
8010c92: 2b00 cmp r3, #0
8010c94: d017 beq.n 8010cc6 <xTaskCreate+0x7a>
{
#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */
{
/* Tasks can be created statically or dynamically, so note this
task was created dynamically in case it is later deleted. */
pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
8010c96: 69fb ldr r3, [r7, #28]
8010c98: 2200 movs r2, #0
8010c9a: f883 209d strb.w r2, [r3, #157] @ 0x9d
}
#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
8010c9e: 88fa ldrh r2, [r7, #6]
8010ca0: 2300 movs r3, #0
8010ca2: 9303 str r3, [sp, #12]
8010ca4: 69fb ldr r3, [r7, #28]
8010ca6: 9302 str r3, [sp, #8]
8010ca8: 6afb ldr r3, [r7, #44] @ 0x2c
8010caa: 9301 str r3, [sp, #4]
8010cac: 6abb ldr r3, [r7, #40] @ 0x28
8010cae: 9300 str r3, [sp, #0]
8010cb0: 683b ldr r3, [r7, #0]
8010cb2: 68b9 ldr r1, [r7, #8]
8010cb4: 68f8 ldr r0, [r7, #12]
8010cb6: f000 f80f bl 8010cd8 <prvInitialiseNewTask>
prvAddNewTaskToReadyList( pxNewTCB );
8010cba: 69f8 ldr r0, [r7, #28]
8010cbc: f000 f8ac bl 8010e18 <prvAddNewTaskToReadyList>
xReturn = pdPASS;
8010cc0: 2301 movs r3, #1
8010cc2: 61bb str r3, [r7, #24]
8010cc4: e002 b.n 8010ccc <xTaskCreate+0x80>
}
else
{
xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
8010cc6: f04f 33ff mov.w r3, #4294967295
8010cca: 61bb str r3, [r7, #24]
}
return xReturn;
8010ccc: 69bb ldr r3, [r7, #24]
}
8010cce: 4618 mov r0, r3
8010cd0: 3720 adds r7, #32
8010cd2: 46bd mov sp, r7
8010cd4: bd80 pop {r7, pc}
...
08010cd8 <prvInitialiseNewTask>:
void * const pvParameters,
UBaseType_t uxPriority,
TaskHandle_t * const pxCreatedTask,
TCB_t *pxNewTCB,
const MemoryRegion_t * const xRegions )
{
8010cd8: b580 push {r7, lr}
8010cda: b088 sub sp, #32
8010cdc: af00 add r7, sp, #0
8010cde: 60f8 str r0, [r7, #12]
8010ce0: 60b9 str r1, [r7, #8]
8010ce2: 607a str r2, [r7, #4]
8010ce4: 603b str r3, [r7, #0]
grows from high memory to low (as per the 80x86) or vice versa.
portSTACK_GROWTH is used to make the result positive or negative as required
by the port. */
#if( portSTACK_GROWTH < 0 )
{
pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
8010ce6: 6b3b ldr r3, [r7, #48] @ 0x30
8010ce8: 6b1a ldr r2, [r3, #48] @ 0x30
8010cea: 687b ldr r3, [r7, #4]
8010cec: f103 4380 add.w r3, r3, #1073741824 @ 0x40000000
8010cf0: 3b01 subs r3, #1
8010cf2: 009b lsls r3, r3, #2
8010cf4: 4413 add r3, r2
8010cf6: 61bb str r3, [r7, #24]
pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception. Avoiding casts between pointers and integers is not practical. Size differences accounted for using portPOINTER_SIZE_TYPE type. Checked by assert(). */
8010cf8: 69bb ldr r3, [r7, #24]
8010cfa: f023 0307 bic.w r3, r3, #7
8010cfe: 61bb str r3, [r7, #24]
/* Check the alignment of the calculated top of stack is correct. */
configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
8010d00: 69bb ldr r3, [r7, #24]
8010d02: f003 0307 and.w r3, r3, #7
8010d06: 2b00 cmp r3, #0
8010d08: d00b beq.n 8010d22 <prvInitialiseNewTask+0x4a>
__asm volatile
8010d0a: f04f 0350 mov.w r3, #80 @ 0x50
8010d0e: f383 8811 msr BASEPRI, r3
8010d12: f3bf 8f6f isb sy
8010d16: f3bf 8f4f dsb sy
8010d1a: 617b str r3, [r7, #20]
}
8010d1c: bf00 nop
8010d1e: bf00 nop
8010d20: e7fd b.n 8010d1e <prvInitialiseNewTask+0x46>
pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
}
#endif /* portSTACK_GROWTH */
/* Store the task name in the TCB. */
if( pcName != NULL )
8010d22: 68bb ldr r3, [r7, #8]
8010d24: 2b00 cmp r3, #0
8010d26: d01f beq.n 8010d68 <prvInitialiseNewTask+0x90>
{
for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
8010d28: 2300 movs r3, #0
8010d2a: 61fb str r3, [r7, #28]
8010d2c: e012 b.n 8010d54 <prvInitialiseNewTask+0x7c>
{
pxNewTCB->pcTaskName[ x ] = pcName[ x ];
8010d2e: 68ba ldr r2, [r7, #8]
8010d30: 69fb ldr r3, [r7, #28]
8010d32: 4413 add r3, r2
8010d34: 7819 ldrb r1, [r3, #0]
8010d36: 6b3a ldr r2, [r7, #48] @ 0x30
8010d38: 69fb ldr r3, [r7, #28]
8010d3a: 4413 add r3, r2
8010d3c: 3334 adds r3, #52 @ 0x34
8010d3e: 460a mov r2, r1
8010d40: 701a strb r2, [r3, #0]
/* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
configMAX_TASK_NAME_LEN characters just in case the memory after the
string is not accessible (extremely unlikely). */
if( pcName[ x ] == ( char ) 0x00 )
8010d42: 68ba ldr r2, [r7, #8]
8010d44: 69fb ldr r3, [r7, #28]
8010d46: 4413 add r3, r2
8010d48: 781b ldrb r3, [r3, #0]
8010d4a: 2b00 cmp r3, #0
8010d4c: d006 beq.n 8010d5c <prvInitialiseNewTask+0x84>
for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
8010d4e: 69fb ldr r3, [r7, #28]
8010d50: 3301 adds r3, #1
8010d52: 61fb str r3, [r7, #28]
8010d54: 69fb ldr r3, [r7, #28]
8010d56: 2b0f cmp r3, #15
8010d58: d9e9 bls.n 8010d2e <prvInitialiseNewTask+0x56>
8010d5a: e000 b.n 8010d5e <prvInitialiseNewTask+0x86>
{
break;
8010d5c: bf00 nop
}
}
/* Ensure the name string is terminated in the case that the string length
was greater or equal to configMAX_TASK_NAME_LEN. */
pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
8010d5e: 6b3b ldr r3, [r7, #48] @ 0x30
8010d60: 2200 movs r2, #0
8010d62: f883 2043 strb.w r2, [r3, #67] @ 0x43
8010d66: e003 b.n 8010d70 <prvInitialiseNewTask+0x98>
}
else
{
/* The task has not been given a name, so just ensure there is a NULL
terminator when it is read out. */
pxNewTCB->pcTaskName[ 0 ] = 0x00;
8010d68: 6b3b ldr r3, [r7, #48] @ 0x30
8010d6a: 2200 movs r2, #0
8010d6c: f883 2034 strb.w r2, [r3, #52] @ 0x34
}
/* This is used as an array index so must ensure it's not too large. First
remove the privilege bit if one is present. */
if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
8010d70: 6abb ldr r3, [r7, #40] @ 0x28
8010d72: 2b06 cmp r3, #6
8010d74: d901 bls.n 8010d7a <prvInitialiseNewTask+0xa2>
{
uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
8010d76: 2306 movs r3, #6
8010d78: 62bb str r3, [r7, #40] @ 0x28
else
{
mtCOVERAGE_TEST_MARKER();
}
pxNewTCB->uxPriority = uxPriority;
8010d7a: 6b3b ldr r3, [r7, #48] @ 0x30
8010d7c: 6aba ldr r2, [r7, #40] @ 0x28
8010d7e: 62da str r2, [r3, #44] @ 0x2c
#if ( configUSE_MUTEXES == 1 )
{
pxNewTCB->uxBasePriority = uxPriority;
8010d80: 6b3b ldr r3, [r7, #48] @ 0x30
8010d82: 6aba ldr r2, [r7, #40] @ 0x28
8010d84: 645a str r2, [r3, #68] @ 0x44
pxNewTCB->uxMutexesHeld = 0;
8010d86: 6b3b ldr r3, [r7, #48] @ 0x30
8010d88: 2200 movs r2, #0
8010d8a: 649a str r2, [r3, #72] @ 0x48
}
#endif /* configUSE_MUTEXES */
vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
8010d8c: 6b3b ldr r3, [r7, #48] @ 0x30
8010d8e: 3304 adds r3, #4
8010d90: 4618 mov r0, r3
8010d92: f7ff f88a bl 800feaa <vListInitialiseItem>
vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
8010d96: 6b3b ldr r3, [r7, #48] @ 0x30
8010d98: 3318 adds r3, #24
8010d9a: 4618 mov r0, r3
8010d9c: f7ff f885 bl 800feaa <vListInitialiseItem>
/* Set the pxNewTCB as a link back from the ListItem_t. This is so we can get
back to the containing TCB from a generic item in a list. */
listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
8010da0: 6b3b ldr r3, [r7, #48] @ 0x30
8010da2: 6b3a ldr r2, [r7, #48] @ 0x30
8010da4: 611a str r2, [r3, #16]
/* Event lists are always in priority order. */
listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
8010da6: 6abb ldr r3, [r7, #40] @ 0x28
8010da8: f1c3 0207 rsb r2, r3, #7
8010dac: 6b3b ldr r3, [r7, #48] @ 0x30
8010dae: 619a str r2, [r3, #24]
listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
8010db0: 6b3b ldr r3, [r7, #48] @ 0x30
8010db2: 6b3a ldr r2, [r7, #48] @ 0x30
8010db4: 625a str r2, [r3, #36] @ 0x24
}
#endif
#if ( configUSE_TASK_NOTIFICATIONS == 1 )
{
pxNewTCB->ulNotifiedValue = 0;
8010db6: 6b3b ldr r3, [r7, #48] @ 0x30
8010db8: 2200 movs r2, #0
8010dba: f8c3 2098 str.w r2, [r3, #152] @ 0x98
pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
8010dbe: 6b3b ldr r3, [r7, #48] @ 0x30
8010dc0: 2200 movs r2, #0
8010dc2: f883 209c strb.w r2, [r3, #156] @ 0x9c
#if ( configUSE_NEWLIB_REENTRANT == 1 )
{
/* Initialise this task's Newlib reent structure.
See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
for additional information. */
_REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) );
8010dc6: 6b3b ldr r3, [r7, #48] @ 0x30
8010dc8: 334c adds r3, #76 @ 0x4c
8010dca: 224c movs r2, #76 @ 0x4c
8010dcc: 2100 movs r1, #0
8010dce: 4618 mov r0, r3
8010dd0: f002 f8fe bl 8012fd0 <memset>
8010dd4: 6b3b ldr r3, [r7, #48] @ 0x30
8010dd6: 4a0d ldr r2, [pc, #52] @ (8010e0c <prvInitialiseNewTask+0x134>)
8010dd8: 651a str r2, [r3, #80] @ 0x50
8010dda: 6b3b ldr r3, [r7, #48] @ 0x30
8010ddc: 4a0c ldr r2, [pc, #48] @ (8010e10 <prvInitialiseNewTask+0x138>)
8010dde: 655a str r2, [r3, #84] @ 0x54
8010de0: 6b3b ldr r3, [r7, #48] @ 0x30
8010de2: 4a0c ldr r2, [pc, #48] @ (8010e14 <prvInitialiseNewTask+0x13c>)
8010de4: 659a str r2, [r3, #88] @ 0x58
}
#endif /* portSTACK_GROWTH */
}
#else /* portHAS_STACK_OVERFLOW_CHECKING */
{
pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
8010de6: 683a ldr r2, [r7, #0]
8010de8: 68f9 ldr r1, [r7, #12]
8010dea: 69b8 ldr r0, [r7, #24]
8010dec: f000 fefa bl 8011be4 <pxPortInitialiseStack>
8010df0: 4602 mov r2, r0
8010df2: 6b3b ldr r3, [r7, #48] @ 0x30
8010df4: 601a str r2, [r3, #0]
}
#endif /* portHAS_STACK_OVERFLOW_CHECKING */
}
#endif /* portUSING_MPU_WRAPPERS */
if( pxCreatedTask != NULL )
8010df6: 6afb ldr r3, [r7, #44] @ 0x2c
8010df8: 2b00 cmp r3, #0
8010dfa: d002 beq.n 8010e02 <prvInitialiseNewTask+0x12a>
{
/* Pass the handle out in an anonymous way. The handle can be used to
change the created task's priority, delete the created task, etc.*/
*pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
8010dfc: 6afb ldr r3, [r7, #44] @ 0x2c
8010dfe: 6b3a ldr r2, [r7, #48] @ 0x30
8010e00: 601a str r2, [r3, #0]
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
8010e02: bf00 nop
8010e04: 3720 adds r7, #32
8010e06: 46bd mov sp, r7
8010e08: bd80 pop {r7, pc}
8010e0a: bf00 nop
8010e0c: 20016b24 .word 0x20016b24
8010e10: 20016b8c .word 0x20016b8c
8010e14: 20016bf4 .word 0x20016bf4
08010e18 <prvAddNewTaskToReadyList>:
/*-----------------------------------------------------------*/
static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
{
8010e18: b580 push {r7, lr}
8010e1a: b082 sub sp, #8
8010e1c: af00 add r7, sp, #0
8010e1e: 6078 str r0, [r7, #4]
/* Ensure interrupts don't access the task lists while the lists are being
updated. */
taskENTER_CRITICAL();
8010e20: f001 f812 bl 8011e48 <vPortEnterCritical>
{
uxCurrentNumberOfTasks++;
8010e24: 4b2a ldr r3, [pc, #168] @ (8010ed0 <prvAddNewTaskToReadyList+0xb8>)
8010e26: 681b ldr r3, [r3, #0]
8010e28: 3301 adds r3, #1
8010e2a: 4a29 ldr r2, [pc, #164] @ (8010ed0 <prvAddNewTaskToReadyList+0xb8>)
8010e2c: 6013 str r3, [r2, #0]
if( pxCurrentTCB == NULL )
8010e2e: 4b29 ldr r3, [pc, #164] @ (8010ed4 <prvAddNewTaskToReadyList+0xbc>)
8010e30: 681b ldr r3, [r3, #0]
8010e32: 2b00 cmp r3, #0
8010e34: d109 bne.n 8010e4a <prvAddNewTaskToReadyList+0x32>
{
/* There are no other tasks, or all the other tasks are in
the suspended state - make this the current task. */
pxCurrentTCB = pxNewTCB;
8010e36: 4a27 ldr r2, [pc, #156] @ (8010ed4 <prvAddNewTaskToReadyList+0xbc>)
8010e38: 687b ldr r3, [r7, #4]
8010e3a: 6013 str r3, [r2, #0]
if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
8010e3c: 4b24 ldr r3, [pc, #144] @ (8010ed0 <prvAddNewTaskToReadyList+0xb8>)
8010e3e: 681b ldr r3, [r3, #0]
8010e40: 2b01 cmp r3, #1
8010e42: d110 bne.n 8010e66 <prvAddNewTaskToReadyList+0x4e>
{
/* This is the first task to be created so do the preliminary
initialisation required. We will not recover if this call
fails, but we will report the failure. */
prvInitialiseTaskLists();
8010e44: f000 fbe4 bl 8011610 <prvInitialiseTaskLists>
8010e48: e00d b.n 8010e66 <prvAddNewTaskToReadyList+0x4e>
else
{
/* If the scheduler is not already running, make this task the
current task if it is the highest priority task to be created
so far. */
if( xSchedulerRunning == pdFALSE )
8010e4a: 4b23 ldr r3, [pc, #140] @ (8010ed8 <prvAddNewTaskToReadyList+0xc0>)
8010e4c: 681b ldr r3, [r3, #0]
8010e4e: 2b00 cmp r3, #0
8010e50: d109 bne.n 8010e66 <prvAddNewTaskToReadyList+0x4e>
{
if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
8010e52: 4b20 ldr r3, [pc, #128] @ (8010ed4 <prvAddNewTaskToReadyList+0xbc>)
8010e54: 681b ldr r3, [r3, #0]
8010e56: 6ada ldr r2, [r3, #44] @ 0x2c
8010e58: 687b ldr r3, [r7, #4]
8010e5a: 6adb ldr r3, [r3, #44] @ 0x2c
8010e5c: 429a cmp r2, r3
8010e5e: d802 bhi.n 8010e66 <prvAddNewTaskToReadyList+0x4e>
{
pxCurrentTCB = pxNewTCB;
8010e60: 4a1c ldr r2, [pc, #112] @ (8010ed4 <prvAddNewTaskToReadyList+0xbc>)
8010e62: 687b ldr r3, [r7, #4]
8010e64: 6013 str r3, [r2, #0]
{
mtCOVERAGE_TEST_MARKER();
}
}
uxTaskNumber++;
8010e66: 4b1d ldr r3, [pc, #116] @ (8010edc <prvAddNewTaskToReadyList+0xc4>)
8010e68: 681b ldr r3, [r3, #0]
8010e6a: 3301 adds r3, #1
8010e6c: 4a1b ldr r2, [pc, #108] @ (8010edc <prvAddNewTaskToReadyList+0xc4>)
8010e6e: 6013 str r3, [r2, #0]
pxNewTCB->uxTCBNumber = uxTaskNumber;
}
#endif /* configUSE_TRACE_FACILITY */
traceTASK_CREATE( pxNewTCB );
prvAddTaskToReadyList( pxNewTCB );
8010e70: 687b ldr r3, [r7, #4]
8010e72: 6adb ldr r3, [r3, #44] @ 0x2c
8010e74: 2201 movs r2, #1
8010e76: 409a lsls r2, r3
8010e78: 4b19 ldr r3, [pc, #100] @ (8010ee0 <prvAddNewTaskToReadyList+0xc8>)
8010e7a: 681b ldr r3, [r3, #0]
8010e7c: 4313 orrs r3, r2
8010e7e: 4a18 ldr r2, [pc, #96] @ (8010ee0 <prvAddNewTaskToReadyList+0xc8>)
8010e80: 6013 str r3, [r2, #0]
8010e82: 687b ldr r3, [r7, #4]
8010e84: 6ada ldr r2, [r3, #44] @ 0x2c
8010e86: 4613 mov r3, r2
8010e88: 009b lsls r3, r3, #2
8010e8a: 4413 add r3, r2
8010e8c: 009b lsls r3, r3, #2
8010e8e: 4a15 ldr r2, [pc, #84] @ (8010ee4 <prvAddNewTaskToReadyList+0xcc>)
8010e90: 441a add r2, r3
8010e92: 687b ldr r3, [r7, #4]
8010e94: 3304 adds r3, #4
8010e96: 4619 mov r1, r3
8010e98: 4610 mov r0, r2
8010e9a: f7ff f813 bl 800fec4 <vListInsertEnd>
portSETUP_TCB( pxNewTCB );
}
taskEXIT_CRITICAL();
8010e9e: f001 f805 bl 8011eac <vPortExitCritical>
if( xSchedulerRunning != pdFALSE )
8010ea2: 4b0d ldr r3, [pc, #52] @ (8010ed8 <prvAddNewTaskToReadyList+0xc0>)
8010ea4: 681b ldr r3, [r3, #0]
8010ea6: 2b00 cmp r3, #0
8010ea8: d00e beq.n 8010ec8 <prvAddNewTaskToReadyList+0xb0>
{
/* If the created task is of a higher priority than the current task
then it should run now. */
if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
8010eaa: 4b0a ldr r3, [pc, #40] @ (8010ed4 <prvAddNewTaskToReadyList+0xbc>)
8010eac: 681b ldr r3, [r3, #0]
8010eae: 6ada ldr r2, [r3, #44] @ 0x2c
8010eb0: 687b ldr r3, [r7, #4]
8010eb2: 6adb ldr r3, [r3, #44] @ 0x2c
8010eb4: 429a cmp r2, r3
8010eb6: d207 bcs.n 8010ec8 <prvAddNewTaskToReadyList+0xb0>
{
taskYIELD_IF_USING_PREEMPTION();
8010eb8: 4b0b ldr r3, [pc, #44] @ (8010ee8 <prvAddNewTaskToReadyList+0xd0>)
8010eba: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8010ebe: 601a str r2, [r3, #0]
8010ec0: f3bf 8f4f dsb sy
8010ec4: f3bf 8f6f isb sy
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
8010ec8: bf00 nop
8010eca: 3708 adds r7, #8
8010ecc: 46bd mov sp, r7
8010ece: bd80 pop {r7, pc}
8010ed0: 20010298 .word 0x20010298
8010ed4: 20010198 .word 0x20010198
8010ed8: 200102a4 .word 0x200102a4
8010edc: 200102b4 .word 0x200102b4
8010ee0: 200102a0 .word 0x200102a0
8010ee4: 2001019c .word 0x2001019c
8010ee8: e000ed04 .word 0xe000ed04
08010eec <vTaskDelay>:
/*-----------------------------------------------------------*/
#if ( INCLUDE_vTaskDelay == 1 )
void vTaskDelay( const TickType_t xTicksToDelay )
{
8010eec: b580 push {r7, lr}
8010eee: b084 sub sp, #16
8010ef0: af00 add r7, sp, #0
8010ef2: 6078 str r0, [r7, #4]
BaseType_t xAlreadyYielded = pdFALSE;
8010ef4: 2300 movs r3, #0
8010ef6: 60fb str r3, [r7, #12]
/* A delay time of zero just forces a reschedule. */
if( xTicksToDelay > ( TickType_t ) 0U )
8010ef8: 687b ldr r3, [r7, #4]
8010efa: 2b00 cmp r3, #0
8010efc: d018 beq.n 8010f30 <vTaskDelay+0x44>
{
configASSERT( uxSchedulerSuspended == 0 );
8010efe: 4b14 ldr r3, [pc, #80] @ (8010f50 <vTaskDelay+0x64>)
8010f00: 681b ldr r3, [r3, #0]
8010f02: 2b00 cmp r3, #0
8010f04: d00b beq.n 8010f1e <vTaskDelay+0x32>
__asm volatile
8010f06: f04f 0350 mov.w r3, #80 @ 0x50
8010f0a: f383 8811 msr BASEPRI, r3
8010f0e: f3bf 8f6f isb sy
8010f12: f3bf 8f4f dsb sy
8010f16: 60bb str r3, [r7, #8]
}
8010f18: bf00 nop
8010f1a: bf00 nop
8010f1c: e7fd b.n 8010f1a <vTaskDelay+0x2e>
vTaskSuspendAll();
8010f1e: f000 f885 bl 801102c <vTaskSuspendAll>
list or removed from the blocked list until the scheduler
is resumed.
This task cannot be in an event list as it is the currently
executing task. */
prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
8010f22: 2100 movs r1, #0
8010f24: 6878 ldr r0, [r7, #4]
8010f26: f000 fdf7 bl 8011b18 <prvAddCurrentTaskToDelayedList>
}
xAlreadyYielded = xTaskResumeAll();
8010f2a: f000 f88d bl 8011048 <xTaskResumeAll>
8010f2e: 60f8 str r0, [r7, #12]
mtCOVERAGE_TEST_MARKER();
}
/* Force a reschedule if xTaskResumeAll has not already done so, we may
have put ourselves to sleep. */
if( xAlreadyYielded == pdFALSE )
8010f30: 68fb ldr r3, [r7, #12]
8010f32: 2b00 cmp r3, #0
8010f34: d107 bne.n 8010f46 <vTaskDelay+0x5a>
{
portYIELD_WITHIN_API();
8010f36: 4b07 ldr r3, [pc, #28] @ (8010f54 <vTaskDelay+0x68>)
8010f38: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8010f3c: 601a str r2, [r3, #0]
8010f3e: f3bf 8f4f dsb sy
8010f42: f3bf 8f6f isb sy
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
8010f46: bf00 nop
8010f48: 3710 adds r7, #16
8010f4a: 46bd mov sp, r7
8010f4c: bd80 pop {r7, pc}
8010f4e: bf00 nop
8010f50: 200102c0 .word 0x200102c0
8010f54: e000ed04 .word 0xe000ed04
08010f58 <vTaskStartScheduler>:
#endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */
/*-----------------------------------------------------------*/
void vTaskStartScheduler( void )
{
8010f58: b580 push {r7, lr}
8010f5a: b08a sub sp, #40 @ 0x28
8010f5c: af04 add r7, sp, #16
BaseType_t xReturn;
/* Add the idle task at the lowest priority. */
#if( configSUPPORT_STATIC_ALLOCATION == 1 )
{
StaticTask_t *pxIdleTaskTCBBuffer = NULL;
8010f5e: 2300 movs r3, #0
8010f60: 60bb str r3, [r7, #8]
StackType_t *pxIdleTaskStackBuffer = NULL;
8010f62: 2300 movs r3, #0
8010f64: 607b str r3, [r7, #4]
uint32_t ulIdleTaskStackSize;
/* The Idle task is created using user provided RAM - obtain the
address of the RAM then create the idle task. */
vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
8010f66: 463a mov r2, r7
8010f68: 1d39 adds r1, r7, #4
8010f6a: f107 0308 add.w r3, r7, #8
8010f6e: 4618 mov r0, r3
8010f70: f7ef fdd2 bl 8000b18 <vApplicationGetIdleTaskMemory>
xIdleTaskHandle = xTaskCreateStatic( prvIdleTask,
8010f74: 6839 ldr r1, [r7, #0]
8010f76: 687b ldr r3, [r7, #4]
8010f78: 68ba ldr r2, [r7, #8]
8010f7a: 9202 str r2, [sp, #8]
8010f7c: 9301 str r3, [sp, #4]
8010f7e: 2300 movs r3, #0
8010f80: 9300 str r3, [sp, #0]
8010f82: 2300 movs r3, #0
8010f84: 460a mov r2, r1
8010f86: 4921 ldr r1, [pc, #132] @ (801100c <vTaskStartScheduler+0xb4>)
8010f88: 4821 ldr r0, [pc, #132] @ (8011010 <vTaskStartScheduler+0xb8>)
8010f8a: f7ff fdff bl 8010b8c <xTaskCreateStatic>
8010f8e: 4603 mov r3, r0
8010f90: 4a20 ldr r2, [pc, #128] @ (8011014 <vTaskStartScheduler+0xbc>)
8010f92: 6013 str r3, [r2, #0]
( void * ) NULL, /*lint !e961. The cast is not redundant for all compilers. */
portPRIVILEGE_BIT, /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
pxIdleTaskStackBuffer,
pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */
if( xIdleTaskHandle != NULL )
8010f94: 4b1f ldr r3, [pc, #124] @ (8011014 <vTaskStartScheduler+0xbc>)
8010f96: 681b ldr r3, [r3, #0]
8010f98: 2b00 cmp r3, #0
8010f9a: d002 beq.n 8010fa2 <vTaskStartScheduler+0x4a>
{
xReturn = pdPASS;
8010f9c: 2301 movs r3, #1
8010f9e: 617b str r3, [r7, #20]
8010fa0: e001 b.n 8010fa6 <vTaskStartScheduler+0x4e>
}
else
{
xReturn = pdFAIL;
8010fa2: 2300 movs r3, #0
8010fa4: 617b str r3, [r7, #20]
mtCOVERAGE_TEST_MARKER();
}
}
#endif /* configUSE_TIMERS */
if( xReturn == pdPASS )
8010fa6: 697b ldr r3, [r7, #20]
8010fa8: 2b01 cmp r3, #1
8010faa: d11b bne.n 8010fe4 <vTaskStartScheduler+0x8c>
__asm volatile
8010fac: f04f 0350 mov.w r3, #80 @ 0x50
8010fb0: f383 8811 msr BASEPRI, r3
8010fb4: f3bf 8f6f isb sy
8010fb8: f3bf 8f4f dsb sy
8010fbc: 613b str r3, [r7, #16]
}
8010fbe: bf00 nop
{
/* Switch Newlib's _impure_ptr variable to point to the _reent
structure specific to the task that will run first.
See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
for additional information. */
_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
8010fc0: 4b15 ldr r3, [pc, #84] @ (8011018 <vTaskStartScheduler+0xc0>)
8010fc2: 681b ldr r3, [r3, #0]
8010fc4: 334c adds r3, #76 @ 0x4c
8010fc6: 4a15 ldr r2, [pc, #84] @ (801101c <vTaskStartScheduler+0xc4>)
8010fc8: 6013 str r3, [r2, #0]
}
#endif /* configUSE_NEWLIB_REENTRANT */
xNextTaskUnblockTime = portMAX_DELAY;
8010fca: 4b15 ldr r3, [pc, #84] @ (8011020 <vTaskStartScheduler+0xc8>)
8010fcc: f04f 32ff mov.w r2, #4294967295
8010fd0: 601a str r2, [r3, #0]
xSchedulerRunning = pdTRUE;
8010fd2: 4b14 ldr r3, [pc, #80] @ (8011024 <vTaskStartScheduler+0xcc>)
8010fd4: 2201 movs r2, #1
8010fd6: 601a str r2, [r3, #0]
xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
8010fd8: 4b13 ldr r3, [pc, #76] @ (8011028 <vTaskStartScheduler+0xd0>)
8010fda: 2200 movs r2, #0
8010fdc: 601a str r2, [r3, #0]
traceTASK_SWITCHED_IN();
/* Setting up the timer tick is hardware specific and thus in the
portable interface. */
if( xPortStartScheduler() != pdFALSE )
8010fde: f000 fe8f bl 8011d00 <xPortStartScheduler>
}
/* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
meaning xIdleTaskHandle is not used anywhere else. */
( void ) xIdleTaskHandle;
}
8010fe2: e00f b.n 8011004 <vTaskStartScheduler+0xac>
configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
8010fe4: 697b ldr r3, [r7, #20]
8010fe6: f1b3 3fff cmp.w r3, #4294967295
8010fea: d10b bne.n 8011004 <vTaskStartScheduler+0xac>
__asm volatile
8010fec: f04f 0350 mov.w r3, #80 @ 0x50
8010ff0: f383 8811 msr BASEPRI, r3
8010ff4: f3bf 8f6f isb sy
8010ff8: f3bf 8f4f dsb sy
8010ffc: 60fb str r3, [r7, #12]
}
8010ffe: bf00 nop
8011000: bf00 nop
8011002: e7fd b.n 8011000 <vTaskStartScheduler+0xa8>
}
8011004: bf00 nop
8011006: 3718 adds r7, #24
8011008: 46bd mov sp, r7
801100a: bd80 pop {r7, pc}
801100c: 08013a84 .word 0x08013a84
8011010: 080115e1 .word 0x080115e1
8011014: 200102bc .word 0x200102bc
8011018: 20010198 .word 0x20010198
801101c: 20000114 .word 0x20000114
8011020: 200102b8 .word 0x200102b8
8011024: 200102a4 .word 0x200102a4
8011028: 2001029c .word 0x2001029c
0801102c <vTaskSuspendAll>:
vPortEndScheduler();
}
/*----------------------------------------------------------*/
void vTaskSuspendAll( void )
{
801102c: b480 push {r7}
801102e: af00 add r7, sp, #0
do not otherwise exhibit real time behaviour. */
portSOFTWARE_BARRIER();
/* The scheduler is suspended if uxSchedulerSuspended is non-zero. An increment
is used to allow calls to vTaskSuspendAll() to nest. */
++uxSchedulerSuspended;
8011030: 4b04 ldr r3, [pc, #16] @ (8011044 <vTaskSuspendAll+0x18>)
8011032: 681b ldr r3, [r3, #0]
8011034: 3301 adds r3, #1
8011036: 4a03 ldr r2, [pc, #12] @ (8011044 <vTaskSuspendAll+0x18>)
8011038: 6013 str r3, [r2, #0]
/* Enforces ordering for ports and optimised compilers that may otherwise place
the above increment elsewhere. */
portMEMORY_BARRIER();
}
801103a: bf00 nop
801103c: 46bd mov sp, r7
801103e: f85d 7b04 ldr.w r7, [sp], #4
8011042: 4770 bx lr
8011044: 200102c0 .word 0x200102c0
08011048 <xTaskResumeAll>:
#endif /* configUSE_TICKLESS_IDLE */
/*----------------------------------------------------------*/
BaseType_t xTaskResumeAll( void )
{
8011048: b580 push {r7, lr}
801104a: b084 sub sp, #16
801104c: af00 add r7, sp, #0
TCB_t *pxTCB = NULL;
801104e: 2300 movs r3, #0
8011050: 60fb str r3, [r7, #12]
BaseType_t xAlreadyYielded = pdFALSE;
8011052: 2300 movs r3, #0
8011054: 60bb str r3, [r7, #8]
/* If uxSchedulerSuspended is zero then this function does not match a
previous call to vTaskSuspendAll(). */
configASSERT( uxSchedulerSuspended );
8011056: 4b42 ldr r3, [pc, #264] @ (8011160 <xTaskResumeAll+0x118>)
8011058: 681b ldr r3, [r3, #0]
801105a: 2b00 cmp r3, #0
801105c: d10b bne.n 8011076 <xTaskResumeAll+0x2e>
__asm volatile
801105e: f04f 0350 mov.w r3, #80 @ 0x50
8011062: f383 8811 msr BASEPRI, r3
8011066: f3bf 8f6f isb sy
801106a: f3bf 8f4f dsb sy
801106e: 603b str r3, [r7, #0]
}
8011070: bf00 nop
8011072: bf00 nop
8011074: e7fd b.n 8011072 <xTaskResumeAll+0x2a>
/* It is possible that an ISR caused a task to be removed from an event
list while the scheduler was suspended. If this was the case then the
removed task will have been added to the xPendingReadyList. Once the
scheduler has been resumed it is safe to move all the pending ready
tasks from this list into their appropriate ready list. */
taskENTER_CRITICAL();
8011076: f000 fee7 bl 8011e48 <vPortEnterCritical>
{
--uxSchedulerSuspended;
801107a: 4b39 ldr r3, [pc, #228] @ (8011160 <xTaskResumeAll+0x118>)
801107c: 681b ldr r3, [r3, #0]
801107e: 3b01 subs r3, #1
8011080: 4a37 ldr r2, [pc, #220] @ (8011160 <xTaskResumeAll+0x118>)
8011082: 6013 str r3, [r2, #0]
if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
8011084: 4b36 ldr r3, [pc, #216] @ (8011160 <xTaskResumeAll+0x118>)
8011086: 681b ldr r3, [r3, #0]
8011088: 2b00 cmp r3, #0
801108a: d161 bne.n 8011150 <xTaskResumeAll+0x108>
{
if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
801108c: 4b35 ldr r3, [pc, #212] @ (8011164 <xTaskResumeAll+0x11c>)
801108e: 681b ldr r3, [r3, #0]
8011090: 2b00 cmp r3, #0
8011092: d05d beq.n 8011150 <xTaskResumeAll+0x108>
{
/* Move any readied tasks from the pending list into the
appropriate ready list. */
while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
8011094: e02e b.n 80110f4 <xTaskResumeAll+0xac>
{
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
8011096: 4b34 ldr r3, [pc, #208] @ (8011168 <xTaskResumeAll+0x120>)
8011098: 68db ldr r3, [r3, #12]
801109a: 68db ldr r3, [r3, #12]
801109c: 60fb str r3, [r7, #12]
( void ) uxListRemove( &( pxTCB->xEventListItem ) );
801109e: 68fb ldr r3, [r7, #12]
80110a0: 3318 adds r3, #24
80110a2: 4618 mov r0, r3
80110a4: f7fe ff6b bl 800ff7e <uxListRemove>
( void ) uxListRemove( &( pxTCB->xStateListItem ) );
80110a8: 68fb ldr r3, [r7, #12]
80110aa: 3304 adds r3, #4
80110ac: 4618 mov r0, r3
80110ae: f7fe ff66 bl 800ff7e <uxListRemove>
prvAddTaskToReadyList( pxTCB );
80110b2: 68fb ldr r3, [r7, #12]
80110b4: 6adb ldr r3, [r3, #44] @ 0x2c
80110b6: 2201 movs r2, #1
80110b8: 409a lsls r2, r3
80110ba: 4b2c ldr r3, [pc, #176] @ (801116c <xTaskResumeAll+0x124>)
80110bc: 681b ldr r3, [r3, #0]
80110be: 4313 orrs r3, r2
80110c0: 4a2a ldr r2, [pc, #168] @ (801116c <xTaskResumeAll+0x124>)
80110c2: 6013 str r3, [r2, #0]
80110c4: 68fb ldr r3, [r7, #12]
80110c6: 6ada ldr r2, [r3, #44] @ 0x2c
80110c8: 4613 mov r3, r2
80110ca: 009b lsls r3, r3, #2
80110cc: 4413 add r3, r2
80110ce: 009b lsls r3, r3, #2
80110d0: 4a27 ldr r2, [pc, #156] @ (8011170 <xTaskResumeAll+0x128>)
80110d2: 441a add r2, r3
80110d4: 68fb ldr r3, [r7, #12]
80110d6: 3304 adds r3, #4
80110d8: 4619 mov r1, r3
80110da: 4610 mov r0, r2
80110dc: f7fe fef2 bl 800fec4 <vListInsertEnd>
/* If the moved task has a priority higher than the current
task then a yield must be performed. */
if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
80110e0: 68fb ldr r3, [r7, #12]
80110e2: 6ada ldr r2, [r3, #44] @ 0x2c
80110e4: 4b23 ldr r3, [pc, #140] @ (8011174 <xTaskResumeAll+0x12c>)
80110e6: 681b ldr r3, [r3, #0]
80110e8: 6adb ldr r3, [r3, #44] @ 0x2c
80110ea: 429a cmp r2, r3
80110ec: d302 bcc.n 80110f4 <xTaskResumeAll+0xac>
{
xYieldPending = pdTRUE;
80110ee: 4b22 ldr r3, [pc, #136] @ (8011178 <xTaskResumeAll+0x130>)
80110f0: 2201 movs r2, #1
80110f2: 601a str r2, [r3, #0]
while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
80110f4: 4b1c ldr r3, [pc, #112] @ (8011168 <xTaskResumeAll+0x120>)
80110f6: 681b ldr r3, [r3, #0]
80110f8: 2b00 cmp r3, #0
80110fa: d1cc bne.n 8011096 <xTaskResumeAll+0x4e>
{
mtCOVERAGE_TEST_MARKER();
}
}
if( pxTCB != NULL )
80110fc: 68fb ldr r3, [r7, #12]
80110fe: 2b00 cmp r3, #0
8011100: d001 beq.n 8011106 <xTaskResumeAll+0xbe>
which may have prevented the next unblock time from being
re-calculated, in which case re-calculate it now. Mainly
important for low power tickless implementations, where
this can prevent an unnecessary exit from low power
state. */
prvResetNextTaskUnblockTime();
8011102: f000 fb29 bl 8011758 <prvResetNextTaskUnblockTime>
/* If any ticks occurred while the scheduler was suspended then
they should be processed now. This ensures the tick count does
not slip, and that any delayed tasks are resumed at the correct
time. */
{
TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */
8011106: 4b1d ldr r3, [pc, #116] @ (801117c <xTaskResumeAll+0x134>)
8011108: 681b ldr r3, [r3, #0]
801110a: 607b str r3, [r7, #4]
if( xPendedCounts > ( TickType_t ) 0U )
801110c: 687b ldr r3, [r7, #4]
801110e: 2b00 cmp r3, #0
8011110: d010 beq.n 8011134 <xTaskResumeAll+0xec>
{
do
{
if( xTaskIncrementTick() != pdFALSE )
8011112: f000 f837 bl 8011184 <xTaskIncrementTick>
8011116: 4603 mov r3, r0
8011118: 2b00 cmp r3, #0
801111a: d002 beq.n 8011122 <xTaskResumeAll+0xda>
{
xYieldPending = pdTRUE;
801111c: 4b16 ldr r3, [pc, #88] @ (8011178 <xTaskResumeAll+0x130>)
801111e: 2201 movs r2, #1
8011120: 601a str r2, [r3, #0]
}
else
{
mtCOVERAGE_TEST_MARKER();
}
--xPendedCounts;
8011122: 687b ldr r3, [r7, #4]
8011124: 3b01 subs r3, #1
8011126: 607b str r3, [r7, #4]
} while( xPendedCounts > ( TickType_t ) 0U );
8011128: 687b ldr r3, [r7, #4]
801112a: 2b00 cmp r3, #0
801112c: d1f1 bne.n 8011112 <xTaskResumeAll+0xca>
xPendedTicks = 0;
801112e: 4b13 ldr r3, [pc, #76] @ (801117c <xTaskResumeAll+0x134>)
8011130: 2200 movs r2, #0
8011132: 601a str r2, [r3, #0]
{
mtCOVERAGE_TEST_MARKER();
}
}
if( xYieldPending != pdFALSE )
8011134: 4b10 ldr r3, [pc, #64] @ (8011178 <xTaskResumeAll+0x130>)
8011136: 681b ldr r3, [r3, #0]
8011138: 2b00 cmp r3, #0
801113a: d009 beq.n 8011150 <xTaskResumeAll+0x108>
{
#if( configUSE_PREEMPTION != 0 )
{
xAlreadyYielded = pdTRUE;
801113c: 2301 movs r3, #1
801113e: 60bb str r3, [r7, #8]
}
#endif
taskYIELD_IF_USING_PREEMPTION();
8011140: 4b0f ldr r3, [pc, #60] @ (8011180 <xTaskResumeAll+0x138>)
8011142: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8011146: 601a str r2, [r3, #0]
8011148: f3bf 8f4f dsb sy
801114c: f3bf 8f6f isb sy
else
{
mtCOVERAGE_TEST_MARKER();
}
}
taskEXIT_CRITICAL();
8011150: f000 feac bl 8011eac <vPortExitCritical>
return xAlreadyYielded;
8011154: 68bb ldr r3, [r7, #8]
}
8011156: 4618 mov r0, r3
8011158: 3710 adds r7, #16
801115a: 46bd mov sp, r7
801115c: bd80 pop {r7, pc}
801115e: bf00 nop
8011160: 200102c0 .word 0x200102c0
8011164: 20010298 .word 0x20010298
8011168: 20010258 .word 0x20010258
801116c: 200102a0 .word 0x200102a0
8011170: 2001019c .word 0x2001019c
8011174: 20010198 .word 0x20010198
8011178: 200102ac .word 0x200102ac
801117c: 200102a8 .word 0x200102a8
8011180: e000ed04 .word 0xe000ed04
08011184 <xTaskIncrementTick>:
#endif /* INCLUDE_xTaskAbortDelay */
/*----------------------------------------------------------*/
BaseType_t xTaskIncrementTick( void )
{
8011184: b580 push {r7, lr}
8011186: b086 sub sp, #24
8011188: af00 add r7, sp, #0
TCB_t * pxTCB;
TickType_t xItemValue;
BaseType_t xSwitchRequired = pdFALSE;
801118a: 2300 movs r3, #0
801118c: 617b str r3, [r7, #20]
/* Called by the portable layer each time a tick interrupt occurs.
Increments the tick then checks to see if the new tick value will cause any
tasks to be unblocked. */
traceTASK_INCREMENT_TICK( xTickCount );
if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
801118e: 4b4f ldr r3, [pc, #316] @ (80112cc <xTaskIncrementTick+0x148>)
8011190: 681b ldr r3, [r3, #0]
8011192: 2b00 cmp r3, #0
8011194: f040 808f bne.w 80112b6 <xTaskIncrementTick+0x132>
{
/* Minor optimisation. The tick count cannot change in this
block. */
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
8011198: 4b4d ldr r3, [pc, #308] @ (80112d0 <xTaskIncrementTick+0x14c>)
801119a: 681b ldr r3, [r3, #0]
801119c: 3301 adds r3, #1
801119e: 613b str r3, [r7, #16]
/* Increment the RTOS tick, switching the delayed and overflowed
delayed lists if it wraps to 0. */
xTickCount = xConstTickCount;
80111a0: 4a4b ldr r2, [pc, #300] @ (80112d0 <xTaskIncrementTick+0x14c>)
80111a2: 693b ldr r3, [r7, #16]
80111a4: 6013 str r3, [r2, #0]
if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
80111a6: 693b ldr r3, [r7, #16]
80111a8: 2b00 cmp r3, #0
80111aa: d121 bne.n 80111f0 <xTaskIncrementTick+0x6c>
{
taskSWITCH_DELAYED_LISTS();
80111ac: 4b49 ldr r3, [pc, #292] @ (80112d4 <xTaskIncrementTick+0x150>)
80111ae: 681b ldr r3, [r3, #0]
80111b0: 681b ldr r3, [r3, #0]
80111b2: 2b00 cmp r3, #0
80111b4: d00b beq.n 80111ce <xTaskIncrementTick+0x4a>
__asm volatile
80111b6: f04f 0350 mov.w r3, #80 @ 0x50
80111ba: f383 8811 msr BASEPRI, r3
80111be: f3bf 8f6f isb sy
80111c2: f3bf 8f4f dsb sy
80111c6: 603b str r3, [r7, #0]
}
80111c8: bf00 nop
80111ca: bf00 nop
80111cc: e7fd b.n 80111ca <xTaskIncrementTick+0x46>
80111ce: 4b41 ldr r3, [pc, #260] @ (80112d4 <xTaskIncrementTick+0x150>)
80111d0: 681b ldr r3, [r3, #0]
80111d2: 60fb str r3, [r7, #12]
80111d4: 4b40 ldr r3, [pc, #256] @ (80112d8 <xTaskIncrementTick+0x154>)
80111d6: 681b ldr r3, [r3, #0]
80111d8: 4a3e ldr r2, [pc, #248] @ (80112d4 <xTaskIncrementTick+0x150>)
80111da: 6013 str r3, [r2, #0]
80111dc: 4a3e ldr r2, [pc, #248] @ (80112d8 <xTaskIncrementTick+0x154>)
80111de: 68fb ldr r3, [r7, #12]
80111e0: 6013 str r3, [r2, #0]
80111e2: 4b3e ldr r3, [pc, #248] @ (80112dc <xTaskIncrementTick+0x158>)
80111e4: 681b ldr r3, [r3, #0]
80111e6: 3301 adds r3, #1
80111e8: 4a3c ldr r2, [pc, #240] @ (80112dc <xTaskIncrementTick+0x158>)
80111ea: 6013 str r3, [r2, #0]
80111ec: f000 fab4 bl 8011758 <prvResetNextTaskUnblockTime>
/* See if this tick has made a timeout expire. Tasks are stored in
the queue in the order of their wake time - meaning once one task
has been found whose block time has not expired there is no need to
look any further down the list. */
if( xConstTickCount >= xNextTaskUnblockTime )
80111f0: 4b3b ldr r3, [pc, #236] @ (80112e0 <xTaskIncrementTick+0x15c>)
80111f2: 681b ldr r3, [r3, #0]
80111f4: 693a ldr r2, [r7, #16]
80111f6: 429a cmp r2, r3
80111f8: d348 bcc.n 801128c <xTaskIncrementTick+0x108>
{
for( ;; )
{
if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
80111fa: 4b36 ldr r3, [pc, #216] @ (80112d4 <xTaskIncrementTick+0x150>)
80111fc: 681b ldr r3, [r3, #0]
80111fe: 681b ldr r3, [r3, #0]
8011200: 2b00 cmp r3, #0
8011202: d104 bne.n 801120e <xTaskIncrementTick+0x8a>
/* The delayed list is empty. Set xNextTaskUnblockTime
to the maximum possible value so it is extremely
unlikely that the
if( xTickCount >= xNextTaskUnblockTime ) test will pass
next time through. */
xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
8011204: 4b36 ldr r3, [pc, #216] @ (80112e0 <xTaskIncrementTick+0x15c>)
8011206: f04f 32ff mov.w r2, #4294967295
801120a: 601a str r2, [r3, #0]
break;
801120c: e03e b.n 801128c <xTaskIncrementTick+0x108>
{
/* The delayed list is not empty, get the value of the
item at the head of the delayed list. This is the time
at which the task at the head of the delayed list must
be removed from the Blocked state. */
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
801120e: 4b31 ldr r3, [pc, #196] @ (80112d4 <xTaskIncrementTick+0x150>)
8011210: 681b ldr r3, [r3, #0]
8011212: 68db ldr r3, [r3, #12]
8011214: 68db ldr r3, [r3, #12]
8011216: 60bb str r3, [r7, #8]
xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
8011218: 68bb ldr r3, [r7, #8]
801121a: 685b ldr r3, [r3, #4]
801121c: 607b str r3, [r7, #4]
if( xConstTickCount < xItemValue )
801121e: 693a ldr r2, [r7, #16]
8011220: 687b ldr r3, [r7, #4]
8011222: 429a cmp r2, r3
8011224: d203 bcs.n 801122e <xTaskIncrementTick+0xaa>
/* It is not time to unblock this item yet, but the
item value is the time at which the task at the head
of the blocked list must be removed from the Blocked
state - so record the item value in
xNextTaskUnblockTime. */
xNextTaskUnblockTime = xItemValue;
8011226: 4a2e ldr r2, [pc, #184] @ (80112e0 <xTaskIncrementTick+0x15c>)
8011228: 687b ldr r3, [r7, #4]
801122a: 6013 str r3, [r2, #0]
break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */
801122c: e02e b.n 801128c <xTaskIncrementTick+0x108>
{
mtCOVERAGE_TEST_MARKER();
}
/* It is time to remove the item from the Blocked state. */
( void ) uxListRemove( &( pxTCB->xStateListItem ) );
801122e: 68bb ldr r3, [r7, #8]
8011230: 3304 adds r3, #4
8011232: 4618 mov r0, r3
8011234: f7fe fea3 bl 800ff7e <uxListRemove>
/* Is the task waiting on an event also? If so remove
it from the event list. */
if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
8011238: 68bb ldr r3, [r7, #8]
801123a: 6a9b ldr r3, [r3, #40] @ 0x28
801123c: 2b00 cmp r3, #0
801123e: d004 beq.n 801124a <xTaskIncrementTick+0xc6>
{
( void ) uxListRemove( &( pxTCB->xEventListItem ) );
8011240: 68bb ldr r3, [r7, #8]
8011242: 3318 adds r3, #24
8011244: 4618 mov r0, r3
8011246: f7fe fe9a bl 800ff7e <uxListRemove>
mtCOVERAGE_TEST_MARKER();
}
/* Place the unblocked task into the appropriate ready
list. */
prvAddTaskToReadyList( pxTCB );
801124a: 68bb ldr r3, [r7, #8]
801124c: 6adb ldr r3, [r3, #44] @ 0x2c
801124e: 2201 movs r2, #1
8011250: 409a lsls r2, r3
8011252: 4b24 ldr r3, [pc, #144] @ (80112e4 <xTaskIncrementTick+0x160>)
8011254: 681b ldr r3, [r3, #0]
8011256: 4313 orrs r3, r2
8011258: 4a22 ldr r2, [pc, #136] @ (80112e4 <xTaskIncrementTick+0x160>)
801125a: 6013 str r3, [r2, #0]
801125c: 68bb ldr r3, [r7, #8]
801125e: 6ada ldr r2, [r3, #44] @ 0x2c
8011260: 4613 mov r3, r2
8011262: 009b lsls r3, r3, #2
8011264: 4413 add r3, r2
8011266: 009b lsls r3, r3, #2
8011268: 4a1f ldr r2, [pc, #124] @ (80112e8 <xTaskIncrementTick+0x164>)
801126a: 441a add r2, r3
801126c: 68bb ldr r3, [r7, #8]
801126e: 3304 adds r3, #4
8011270: 4619 mov r1, r3
8011272: 4610 mov r0, r2
8011274: f7fe fe26 bl 800fec4 <vListInsertEnd>
{
/* Preemption is on, but a context switch should
only be performed if the unblocked task has a
priority that is equal to or higher than the
currently executing task. */
if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
8011278: 68bb ldr r3, [r7, #8]
801127a: 6ada ldr r2, [r3, #44] @ 0x2c
801127c: 4b1b ldr r3, [pc, #108] @ (80112ec <xTaskIncrementTick+0x168>)
801127e: 681b ldr r3, [r3, #0]
8011280: 6adb ldr r3, [r3, #44] @ 0x2c
8011282: 429a cmp r2, r3
8011284: d3b9 bcc.n 80111fa <xTaskIncrementTick+0x76>
{
xSwitchRequired = pdTRUE;
8011286: 2301 movs r3, #1
8011288: 617b str r3, [r7, #20]
if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
801128a: e7b6 b.n 80111fa <xTaskIncrementTick+0x76>
/* Tasks of equal priority to the currently running task will share
processing time (time slice) if preemption is on, and the application
writer has not explicitly turned time slicing off. */
#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
{
if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
801128c: 4b17 ldr r3, [pc, #92] @ (80112ec <xTaskIncrementTick+0x168>)
801128e: 681b ldr r3, [r3, #0]
8011290: 6ada ldr r2, [r3, #44] @ 0x2c
8011292: 4915 ldr r1, [pc, #84] @ (80112e8 <xTaskIncrementTick+0x164>)
8011294: 4613 mov r3, r2
8011296: 009b lsls r3, r3, #2
8011298: 4413 add r3, r2
801129a: 009b lsls r3, r3, #2
801129c: 440b add r3, r1
801129e: 681b ldr r3, [r3, #0]
80112a0: 2b01 cmp r3, #1
80112a2: d901 bls.n 80112a8 <xTaskIncrementTick+0x124>
{
xSwitchRequired = pdTRUE;
80112a4: 2301 movs r3, #1
80112a6: 617b str r3, [r7, #20]
}
#endif /* configUSE_TICK_HOOK */
#if ( configUSE_PREEMPTION == 1 )
{
if( xYieldPending != pdFALSE )
80112a8: 4b11 ldr r3, [pc, #68] @ (80112f0 <xTaskIncrementTick+0x16c>)
80112aa: 681b ldr r3, [r3, #0]
80112ac: 2b00 cmp r3, #0
80112ae: d007 beq.n 80112c0 <xTaskIncrementTick+0x13c>
{
xSwitchRequired = pdTRUE;
80112b0: 2301 movs r3, #1
80112b2: 617b str r3, [r7, #20]
80112b4: e004 b.n 80112c0 <xTaskIncrementTick+0x13c>
}
#endif /* configUSE_PREEMPTION */
}
else
{
++xPendedTicks;
80112b6: 4b0f ldr r3, [pc, #60] @ (80112f4 <xTaskIncrementTick+0x170>)
80112b8: 681b ldr r3, [r3, #0]
80112ba: 3301 adds r3, #1
80112bc: 4a0d ldr r2, [pc, #52] @ (80112f4 <xTaskIncrementTick+0x170>)
80112be: 6013 str r3, [r2, #0]
vApplicationTickHook();
}
#endif
}
return xSwitchRequired;
80112c0: 697b ldr r3, [r7, #20]
}
80112c2: 4618 mov r0, r3
80112c4: 3718 adds r7, #24
80112c6: 46bd mov sp, r7
80112c8: bd80 pop {r7, pc}
80112ca: bf00 nop
80112cc: 200102c0 .word 0x200102c0
80112d0: 2001029c .word 0x2001029c
80112d4: 20010250 .word 0x20010250
80112d8: 20010254 .word 0x20010254
80112dc: 200102b0 .word 0x200102b0
80112e0: 200102b8 .word 0x200102b8
80112e4: 200102a0 .word 0x200102a0
80112e8: 2001019c .word 0x2001019c
80112ec: 20010198 .word 0x20010198
80112f0: 200102ac .word 0x200102ac
80112f4: 200102a8 .word 0x200102a8
080112f8 <vTaskSwitchContext>:
#endif /* configUSE_APPLICATION_TASK_TAG */
/*-----------------------------------------------------------*/
void vTaskSwitchContext( void )
{
80112f8: b480 push {r7}
80112fa: b087 sub sp, #28
80112fc: af00 add r7, sp, #0
if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
80112fe: 4b2a ldr r3, [pc, #168] @ (80113a8 <vTaskSwitchContext+0xb0>)
8011300: 681b ldr r3, [r3, #0]
8011302: 2b00 cmp r3, #0
8011304: d003 beq.n 801130e <vTaskSwitchContext+0x16>
{
/* The scheduler is currently suspended - do not allow a context
switch. */
xYieldPending = pdTRUE;
8011306: 4b29 ldr r3, [pc, #164] @ (80113ac <vTaskSwitchContext+0xb4>)
8011308: 2201 movs r2, #1
801130a: 601a str r2, [r3, #0]
for additional information. */
_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
}
#endif /* configUSE_NEWLIB_REENTRANT */
}
}
801130c: e045 b.n 801139a <vTaskSwitchContext+0xa2>
xYieldPending = pdFALSE;
801130e: 4b27 ldr r3, [pc, #156] @ (80113ac <vTaskSwitchContext+0xb4>)
8011310: 2200 movs r2, #0
8011312: 601a str r2, [r3, #0]
taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
8011314: 4b26 ldr r3, [pc, #152] @ (80113b0 <vTaskSwitchContext+0xb8>)
8011316: 681b ldr r3, [r3, #0]
8011318: 60fb str r3, [r7, #12]
__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
801131a: 68fb ldr r3, [r7, #12]
801131c: fab3 f383 clz r3, r3
8011320: 72fb strb r3, [r7, #11]
return ucReturn;
8011322: 7afb ldrb r3, [r7, #11]
8011324: f1c3 031f rsb r3, r3, #31
8011328: 617b str r3, [r7, #20]
801132a: 4922 ldr r1, [pc, #136] @ (80113b4 <vTaskSwitchContext+0xbc>)
801132c: 697a ldr r2, [r7, #20]
801132e: 4613 mov r3, r2
8011330: 009b lsls r3, r3, #2
8011332: 4413 add r3, r2
8011334: 009b lsls r3, r3, #2
8011336: 440b add r3, r1
8011338: 681b ldr r3, [r3, #0]
801133a: 2b00 cmp r3, #0
801133c: d10b bne.n 8011356 <vTaskSwitchContext+0x5e>
__asm volatile
801133e: f04f 0350 mov.w r3, #80 @ 0x50
8011342: f383 8811 msr BASEPRI, r3
8011346: f3bf 8f6f isb sy
801134a: f3bf 8f4f dsb sy
801134e: 607b str r3, [r7, #4]
}
8011350: bf00 nop
8011352: bf00 nop
8011354: e7fd b.n 8011352 <vTaskSwitchContext+0x5a>
8011356: 697a ldr r2, [r7, #20]
8011358: 4613 mov r3, r2
801135a: 009b lsls r3, r3, #2
801135c: 4413 add r3, r2
801135e: 009b lsls r3, r3, #2
8011360: 4a14 ldr r2, [pc, #80] @ (80113b4 <vTaskSwitchContext+0xbc>)
8011362: 4413 add r3, r2
8011364: 613b str r3, [r7, #16]
8011366: 693b ldr r3, [r7, #16]
8011368: 685b ldr r3, [r3, #4]
801136a: 685a ldr r2, [r3, #4]
801136c: 693b ldr r3, [r7, #16]
801136e: 605a str r2, [r3, #4]
8011370: 693b ldr r3, [r7, #16]
8011372: 685a ldr r2, [r3, #4]
8011374: 693b ldr r3, [r7, #16]
8011376: 3308 adds r3, #8
8011378: 429a cmp r2, r3
801137a: d104 bne.n 8011386 <vTaskSwitchContext+0x8e>
801137c: 693b ldr r3, [r7, #16]
801137e: 685b ldr r3, [r3, #4]
8011380: 685a ldr r2, [r3, #4]
8011382: 693b ldr r3, [r7, #16]
8011384: 605a str r2, [r3, #4]
8011386: 693b ldr r3, [r7, #16]
8011388: 685b ldr r3, [r3, #4]
801138a: 68db ldr r3, [r3, #12]
801138c: 4a0a ldr r2, [pc, #40] @ (80113b8 <vTaskSwitchContext+0xc0>)
801138e: 6013 str r3, [r2, #0]
_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
8011390: 4b09 ldr r3, [pc, #36] @ (80113b8 <vTaskSwitchContext+0xc0>)
8011392: 681b ldr r3, [r3, #0]
8011394: 334c adds r3, #76 @ 0x4c
8011396: 4a09 ldr r2, [pc, #36] @ (80113bc <vTaskSwitchContext+0xc4>)
8011398: 6013 str r3, [r2, #0]
}
801139a: bf00 nop
801139c: 371c adds r7, #28
801139e: 46bd mov sp, r7
80113a0: f85d 7b04 ldr.w r7, [sp], #4
80113a4: 4770 bx lr
80113a6: bf00 nop
80113a8: 200102c0 .word 0x200102c0
80113ac: 200102ac .word 0x200102ac
80113b0: 200102a0 .word 0x200102a0
80113b4: 2001019c .word 0x2001019c
80113b8: 20010198 .word 0x20010198
80113bc: 20000114 .word 0x20000114
080113c0 <vTaskPlaceOnEventList>:
/*-----------------------------------------------------------*/
void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )
{
80113c0: b580 push {r7, lr}
80113c2: b084 sub sp, #16
80113c4: af00 add r7, sp, #0
80113c6: 6078 str r0, [r7, #4]
80113c8: 6039 str r1, [r7, #0]
configASSERT( pxEventList );
80113ca: 687b ldr r3, [r7, #4]
80113cc: 2b00 cmp r3, #0
80113ce: d10b bne.n 80113e8 <vTaskPlaceOnEventList+0x28>
__asm volatile
80113d0: f04f 0350 mov.w r3, #80 @ 0x50
80113d4: f383 8811 msr BASEPRI, r3
80113d8: f3bf 8f6f isb sy
80113dc: f3bf 8f4f dsb sy
80113e0: 60fb str r3, [r7, #12]
}
80113e2: bf00 nop
80113e4: bf00 nop
80113e6: e7fd b.n 80113e4 <vTaskPlaceOnEventList+0x24>
/* Place the event list item of the TCB in the appropriate event list.
This is placed in the list in priority order so the highest priority task
is the first to be woken by the event. The queue that contains the event
list is locked, preventing simultaneous access from interrupts. */
vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
80113e8: 4b07 ldr r3, [pc, #28] @ (8011408 <vTaskPlaceOnEventList+0x48>)
80113ea: 681b ldr r3, [r3, #0]
80113ec: 3318 adds r3, #24
80113ee: 4619 mov r1, r3
80113f0: 6878 ldr r0, [r7, #4]
80113f2: f7fe fd8b bl 800ff0c <vListInsert>
prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
80113f6: 2101 movs r1, #1
80113f8: 6838 ldr r0, [r7, #0]
80113fa: f000 fb8d bl 8011b18 <prvAddCurrentTaskToDelayedList>
}
80113fe: bf00 nop
8011400: 3710 adds r7, #16
8011402: 46bd mov sp, r7
8011404: bd80 pop {r7, pc}
8011406: bf00 nop
8011408: 20010198 .word 0x20010198
0801140c <xTaskRemoveFromEventList>:
#endif /* configUSE_TIMERS */
/*-----------------------------------------------------------*/
BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
{
801140c: b580 push {r7, lr}
801140e: b086 sub sp, #24
8011410: af00 add r7, sp, #0
8011412: 6078 str r0, [r7, #4]
get called - the lock count on the queue will get modified instead. This
means exclusive access to the event list is guaranteed here.
This function assumes that a check has already been made to ensure that
pxEventList is not empty. */
pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
8011414: 687b ldr r3, [r7, #4]
8011416: 68db ldr r3, [r3, #12]
8011418: 68db ldr r3, [r3, #12]
801141a: 613b str r3, [r7, #16]
configASSERT( pxUnblockedTCB );
801141c: 693b ldr r3, [r7, #16]
801141e: 2b00 cmp r3, #0
8011420: d10b bne.n 801143a <xTaskRemoveFromEventList+0x2e>
__asm volatile
8011422: f04f 0350 mov.w r3, #80 @ 0x50
8011426: f383 8811 msr BASEPRI, r3
801142a: f3bf 8f6f isb sy
801142e: f3bf 8f4f dsb sy
8011432: 60fb str r3, [r7, #12]
}
8011434: bf00 nop
8011436: bf00 nop
8011438: e7fd b.n 8011436 <xTaskRemoveFromEventList+0x2a>
( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );
801143a: 693b ldr r3, [r7, #16]
801143c: 3318 adds r3, #24
801143e: 4618 mov r0, r3
8011440: f7fe fd9d bl 800ff7e <uxListRemove>
if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
8011444: 4b1d ldr r3, [pc, #116] @ (80114bc <xTaskRemoveFromEventList+0xb0>)
8011446: 681b ldr r3, [r3, #0]
8011448: 2b00 cmp r3, #0
801144a: d11c bne.n 8011486 <xTaskRemoveFromEventList+0x7a>
{
( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
801144c: 693b ldr r3, [r7, #16]
801144e: 3304 adds r3, #4
8011450: 4618 mov r0, r3
8011452: f7fe fd94 bl 800ff7e <uxListRemove>
prvAddTaskToReadyList( pxUnblockedTCB );
8011456: 693b ldr r3, [r7, #16]
8011458: 6adb ldr r3, [r3, #44] @ 0x2c
801145a: 2201 movs r2, #1
801145c: 409a lsls r2, r3
801145e: 4b18 ldr r3, [pc, #96] @ (80114c0 <xTaskRemoveFromEventList+0xb4>)
8011460: 681b ldr r3, [r3, #0]
8011462: 4313 orrs r3, r2
8011464: 4a16 ldr r2, [pc, #88] @ (80114c0 <xTaskRemoveFromEventList+0xb4>)
8011466: 6013 str r3, [r2, #0]
8011468: 693b ldr r3, [r7, #16]
801146a: 6ada ldr r2, [r3, #44] @ 0x2c
801146c: 4613 mov r3, r2
801146e: 009b lsls r3, r3, #2
8011470: 4413 add r3, r2
8011472: 009b lsls r3, r3, #2
8011474: 4a13 ldr r2, [pc, #76] @ (80114c4 <xTaskRemoveFromEventList+0xb8>)
8011476: 441a add r2, r3
8011478: 693b ldr r3, [r7, #16]
801147a: 3304 adds r3, #4
801147c: 4619 mov r1, r3
801147e: 4610 mov r0, r2
8011480: f7fe fd20 bl 800fec4 <vListInsertEnd>
8011484: e005 b.n 8011492 <xTaskRemoveFromEventList+0x86>
}
else
{
/* The delayed and ready lists cannot be accessed, so hold this task
pending until the scheduler is resumed. */
vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
8011486: 693b ldr r3, [r7, #16]
8011488: 3318 adds r3, #24
801148a: 4619 mov r1, r3
801148c: 480e ldr r0, [pc, #56] @ (80114c8 <xTaskRemoveFromEventList+0xbc>)
801148e: f7fe fd19 bl 800fec4 <vListInsertEnd>
}
if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
8011492: 693b ldr r3, [r7, #16]
8011494: 6ada ldr r2, [r3, #44] @ 0x2c
8011496: 4b0d ldr r3, [pc, #52] @ (80114cc <xTaskRemoveFromEventList+0xc0>)
8011498: 681b ldr r3, [r3, #0]
801149a: 6adb ldr r3, [r3, #44] @ 0x2c
801149c: 429a cmp r2, r3
801149e: d905 bls.n 80114ac <xTaskRemoveFromEventList+0xa0>
{
/* Return true if the task removed from the event list has a higher
priority than the calling task. This allows the calling task to know if
it should force a context switch now. */
xReturn = pdTRUE;
80114a0: 2301 movs r3, #1
80114a2: 617b str r3, [r7, #20]
/* Mark that a yield is pending in case the user is not using the
"xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
xYieldPending = pdTRUE;
80114a4: 4b0a ldr r3, [pc, #40] @ (80114d0 <xTaskRemoveFromEventList+0xc4>)
80114a6: 2201 movs r2, #1
80114a8: 601a str r2, [r3, #0]
80114aa: e001 b.n 80114b0 <xTaskRemoveFromEventList+0xa4>
}
else
{
xReturn = pdFALSE;
80114ac: 2300 movs r3, #0
80114ae: 617b str r3, [r7, #20]
}
return xReturn;
80114b0: 697b ldr r3, [r7, #20]
}
80114b2: 4618 mov r0, r3
80114b4: 3718 adds r7, #24
80114b6: 46bd mov sp, r7
80114b8: bd80 pop {r7, pc}
80114ba: bf00 nop
80114bc: 200102c0 .word 0x200102c0
80114c0: 200102a0 .word 0x200102a0
80114c4: 2001019c .word 0x2001019c
80114c8: 20010258 .word 0x20010258
80114cc: 20010198 .word 0x20010198
80114d0: 200102ac .word 0x200102ac
080114d4 <vTaskInternalSetTimeOutState>:
taskEXIT_CRITICAL();
}
/*-----------------------------------------------------------*/
void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut )
{
80114d4: b480 push {r7}
80114d6: b083 sub sp, #12
80114d8: af00 add r7, sp, #0
80114da: 6078 str r0, [r7, #4]
/* For internal use only as it does not use a critical section. */
pxTimeOut->xOverflowCount = xNumOfOverflows;
80114dc: 4b06 ldr r3, [pc, #24] @ (80114f8 <vTaskInternalSetTimeOutState+0x24>)
80114de: 681a ldr r2, [r3, #0]
80114e0: 687b ldr r3, [r7, #4]
80114e2: 601a str r2, [r3, #0]
pxTimeOut->xTimeOnEntering = xTickCount;
80114e4: 4b05 ldr r3, [pc, #20] @ (80114fc <vTaskInternalSetTimeOutState+0x28>)
80114e6: 681a ldr r2, [r3, #0]
80114e8: 687b ldr r3, [r7, #4]
80114ea: 605a str r2, [r3, #4]
}
80114ec: bf00 nop
80114ee: 370c adds r7, #12
80114f0: 46bd mov sp, r7
80114f2: f85d 7b04 ldr.w r7, [sp], #4
80114f6: 4770 bx lr
80114f8: 200102b0 .word 0x200102b0
80114fc: 2001029c .word 0x2001029c
08011500 <xTaskCheckForTimeOut>:
/*-----------------------------------------------------------*/
BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )
{
8011500: b580 push {r7, lr}
8011502: b088 sub sp, #32
8011504: af00 add r7, sp, #0
8011506: 6078 str r0, [r7, #4]
8011508: 6039 str r1, [r7, #0]
BaseType_t xReturn;
configASSERT( pxTimeOut );
801150a: 687b ldr r3, [r7, #4]
801150c: 2b00 cmp r3, #0
801150e: d10b bne.n 8011528 <xTaskCheckForTimeOut+0x28>
__asm volatile
8011510: f04f 0350 mov.w r3, #80 @ 0x50
8011514: f383 8811 msr BASEPRI, r3
8011518: f3bf 8f6f isb sy
801151c: f3bf 8f4f dsb sy
8011520: 613b str r3, [r7, #16]
}
8011522: bf00 nop
8011524: bf00 nop
8011526: e7fd b.n 8011524 <xTaskCheckForTimeOut+0x24>
configASSERT( pxTicksToWait );
8011528: 683b ldr r3, [r7, #0]
801152a: 2b00 cmp r3, #0
801152c: d10b bne.n 8011546 <xTaskCheckForTimeOut+0x46>
__asm volatile
801152e: f04f 0350 mov.w r3, #80 @ 0x50
8011532: f383 8811 msr BASEPRI, r3
8011536: f3bf 8f6f isb sy
801153a: f3bf 8f4f dsb sy
801153e: 60fb str r3, [r7, #12]
}
8011540: bf00 nop
8011542: bf00 nop
8011544: e7fd b.n 8011542 <xTaskCheckForTimeOut+0x42>
taskENTER_CRITICAL();
8011546: f000 fc7f bl 8011e48 <vPortEnterCritical>
{
/* Minor optimisation. The tick count cannot change in this block. */
const TickType_t xConstTickCount = xTickCount;
801154a: 4b1d ldr r3, [pc, #116] @ (80115c0 <xTaskCheckForTimeOut+0xc0>)
801154c: 681b ldr r3, [r3, #0]
801154e: 61bb str r3, [r7, #24]
const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering;
8011550: 687b ldr r3, [r7, #4]
8011552: 685b ldr r3, [r3, #4]
8011554: 69ba ldr r2, [r7, #24]
8011556: 1ad3 subs r3, r2, r3
8011558: 617b str r3, [r7, #20]
}
else
#endif
#if ( INCLUDE_vTaskSuspend == 1 )
if( *pxTicksToWait == portMAX_DELAY )
801155a: 683b ldr r3, [r7, #0]
801155c: 681b ldr r3, [r3, #0]
801155e: f1b3 3fff cmp.w r3, #4294967295
8011562: d102 bne.n 801156a <xTaskCheckForTimeOut+0x6a>
{
/* If INCLUDE_vTaskSuspend is set to 1 and the block time
specified is the maximum block time then the task should block
indefinitely, and therefore never time out. */
xReturn = pdFALSE;
8011564: 2300 movs r3, #0
8011566: 61fb str r3, [r7, #28]
8011568: e023 b.n 80115b2 <xTaskCheckForTimeOut+0xb2>
}
else
#endif
if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
801156a: 687b ldr r3, [r7, #4]
801156c: 681a ldr r2, [r3, #0]
801156e: 4b15 ldr r3, [pc, #84] @ (80115c4 <xTaskCheckForTimeOut+0xc4>)
8011570: 681b ldr r3, [r3, #0]
8011572: 429a cmp r2, r3
8011574: d007 beq.n 8011586 <xTaskCheckForTimeOut+0x86>
8011576: 687b ldr r3, [r7, #4]
8011578: 685b ldr r3, [r3, #4]
801157a: 69ba ldr r2, [r7, #24]
801157c: 429a cmp r2, r3
801157e: d302 bcc.n 8011586 <xTaskCheckForTimeOut+0x86>
/* The tick count is greater than the time at which
vTaskSetTimeout() was called, but has also overflowed since
vTaskSetTimeOut() was called. It must have wrapped all the way
around and gone past again. This passed since vTaskSetTimeout()
was called. */
xReturn = pdTRUE;
8011580: 2301 movs r3, #1
8011582: 61fb str r3, [r7, #28]
8011584: e015 b.n 80115b2 <xTaskCheckForTimeOut+0xb2>
}
else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
8011586: 683b ldr r3, [r7, #0]
8011588: 681b ldr r3, [r3, #0]
801158a: 697a ldr r2, [r7, #20]
801158c: 429a cmp r2, r3
801158e: d20b bcs.n 80115a8 <xTaskCheckForTimeOut+0xa8>
{
/* Not a genuine timeout. Adjust parameters for time remaining. */
*pxTicksToWait -= xElapsedTime;
8011590: 683b ldr r3, [r7, #0]
8011592: 681a ldr r2, [r3, #0]
8011594: 697b ldr r3, [r7, #20]
8011596: 1ad2 subs r2, r2, r3
8011598: 683b ldr r3, [r7, #0]
801159a: 601a str r2, [r3, #0]
vTaskInternalSetTimeOutState( pxTimeOut );
801159c: 6878 ldr r0, [r7, #4]
801159e: f7ff ff99 bl 80114d4 <vTaskInternalSetTimeOutState>
xReturn = pdFALSE;
80115a2: 2300 movs r3, #0
80115a4: 61fb str r3, [r7, #28]
80115a6: e004 b.n 80115b2 <xTaskCheckForTimeOut+0xb2>
}
else
{
*pxTicksToWait = 0;
80115a8: 683b ldr r3, [r7, #0]
80115aa: 2200 movs r2, #0
80115ac: 601a str r2, [r3, #0]
xReturn = pdTRUE;
80115ae: 2301 movs r3, #1
80115b0: 61fb str r3, [r7, #28]
}
}
taskEXIT_CRITICAL();
80115b2: f000 fc7b bl 8011eac <vPortExitCritical>
return xReturn;
80115b6: 69fb ldr r3, [r7, #28]
}
80115b8: 4618 mov r0, r3
80115ba: 3720 adds r7, #32
80115bc: 46bd mov sp, r7
80115be: bd80 pop {r7, pc}
80115c0: 2001029c .word 0x2001029c
80115c4: 200102b0 .word 0x200102b0
080115c8 <vTaskMissedYield>:
/*-----------------------------------------------------------*/
void vTaskMissedYield( void )
{
80115c8: b480 push {r7}
80115ca: af00 add r7, sp, #0
xYieldPending = pdTRUE;
80115cc: 4b03 ldr r3, [pc, #12] @ (80115dc <vTaskMissedYield+0x14>)
80115ce: 2201 movs r2, #1
80115d0: 601a str r2, [r3, #0]
}
80115d2: bf00 nop
80115d4: 46bd mov sp, r7
80115d6: f85d 7b04 ldr.w r7, [sp], #4
80115da: 4770 bx lr
80115dc: 200102ac .word 0x200102ac
080115e0 <prvIdleTask>:
*
* void prvIdleTask( void *pvParameters );
*
*/
static portTASK_FUNCTION( prvIdleTask, pvParameters )
{
80115e0: b580 push {r7, lr}
80115e2: b082 sub sp, #8
80115e4: af00 add r7, sp, #0
80115e6: 6078 str r0, [r7, #4]
for( ;; )
{
/* See if any tasks have deleted themselves - if so then the idle task
is responsible for freeing the deleted task's TCB and stack. */
prvCheckTasksWaitingTermination();
80115e8: f000 f852 bl 8011690 <prvCheckTasksWaitingTermination>
A critical region is not required here as we are just reading from
the list, and an occasional incorrect value will not matter. If
the ready list at the idle priority contains more than one task
then a task other than the idle task is ready to execute. */
if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
80115ec: 4b06 ldr r3, [pc, #24] @ (8011608 <prvIdleTask+0x28>)
80115ee: 681b ldr r3, [r3, #0]
80115f0: 2b01 cmp r3, #1
80115f2: d9f9 bls.n 80115e8 <prvIdleTask+0x8>
{
taskYIELD();
80115f4: 4b05 ldr r3, [pc, #20] @ (801160c <prvIdleTask+0x2c>)
80115f6: f04f 5280 mov.w r2, #268435456 @ 0x10000000
80115fa: 601a str r2, [r3, #0]
80115fc: f3bf 8f4f dsb sy
8011600: f3bf 8f6f isb sy
prvCheckTasksWaitingTermination();
8011604: e7f0 b.n 80115e8 <prvIdleTask+0x8>
8011606: bf00 nop
8011608: 2001019c .word 0x2001019c
801160c: e000ed04 .word 0xe000ed04
08011610 <prvInitialiseTaskLists>:
#endif /* portUSING_MPU_WRAPPERS */
/*-----------------------------------------------------------*/
static void prvInitialiseTaskLists( void )
{
8011610: b580 push {r7, lr}
8011612: b082 sub sp, #8
8011614: af00 add r7, sp, #0
UBaseType_t uxPriority;
for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
8011616: 2300 movs r3, #0
8011618: 607b str r3, [r7, #4]
801161a: e00c b.n 8011636 <prvInitialiseTaskLists+0x26>
{
vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
801161c: 687a ldr r2, [r7, #4]
801161e: 4613 mov r3, r2
8011620: 009b lsls r3, r3, #2
8011622: 4413 add r3, r2
8011624: 009b lsls r3, r3, #2
8011626: 4a12 ldr r2, [pc, #72] @ (8011670 <prvInitialiseTaskLists+0x60>)
8011628: 4413 add r3, r2
801162a: 4618 mov r0, r3
801162c: f7fe fc1d bl 800fe6a <vListInitialise>
for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
8011630: 687b ldr r3, [r7, #4]
8011632: 3301 adds r3, #1
8011634: 607b str r3, [r7, #4]
8011636: 687b ldr r3, [r7, #4]
8011638: 2b06 cmp r3, #6
801163a: d9ef bls.n 801161c <prvInitialiseTaskLists+0xc>
}
vListInitialise( &xDelayedTaskList1 );
801163c: 480d ldr r0, [pc, #52] @ (8011674 <prvInitialiseTaskLists+0x64>)
801163e: f7fe fc14 bl 800fe6a <vListInitialise>
vListInitialise( &xDelayedTaskList2 );
8011642: 480d ldr r0, [pc, #52] @ (8011678 <prvInitialiseTaskLists+0x68>)
8011644: f7fe fc11 bl 800fe6a <vListInitialise>
vListInitialise( &xPendingReadyList );
8011648: 480c ldr r0, [pc, #48] @ (801167c <prvInitialiseTaskLists+0x6c>)
801164a: f7fe fc0e bl 800fe6a <vListInitialise>
#if ( INCLUDE_vTaskDelete == 1 )
{
vListInitialise( &xTasksWaitingTermination );
801164e: 480c ldr r0, [pc, #48] @ (8011680 <prvInitialiseTaskLists+0x70>)
8011650: f7fe fc0b bl 800fe6a <vListInitialise>
}
#endif /* INCLUDE_vTaskDelete */
#if ( INCLUDE_vTaskSuspend == 1 )
{
vListInitialise( &xSuspendedTaskList );
8011654: 480b ldr r0, [pc, #44] @ (8011684 <prvInitialiseTaskLists+0x74>)
8011656: f7fe fc08 bl 800fe6a <vListInitialise>
}
#endif /* INCLUDE_vTaskSuspend */
/* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
using list2. */
pxDelayedTaskList = &xDelayedTaskList1;
801165a: 4b0b ldr r3, [pc, #44] @ (8011688 <prvInitialiseTaskLists+0x78>)
801165c: 4a05 ldr r2, [pc, #20] @ (8011674 <prvInitialiseTaskLists+0x64>)
801165e: 601a str r2, [r3, #0]
pxOverflowDelayedTaskList = &xDelayedTaskList2;
8011660: 4b0a ldr r3, [pc, #40] @ (801168c <prvInitialiseTaskLists+0x7c>)
8011662: 4a05 ldr r2, [pc, #20] @ (8011678 <prvInitialiseTaskLists+0x68>)
8011664: 601a str r2, [r3, #0]
}
8011666: bf00 nop
8011668: 3708 adds r7, #8
801166a: 46bd mov sp, r7
801166c: bd80 pop {r7, pc}
801166e: bf00 nop
8011670: 2001019c .word 0x2001019c
8011674: 20010228 .word 0x20010228
8011678: 2001023c .word 0x2001023c
801167c: 20010258 .word 0x20010258
8011680: 2001026c .word 0x2001026c
8011684: 20010284 .word 0x20010284
8011688: 20010250 .word 0x20010250
801168c: 20010254 .word 0x20010254
08011690 <prvCheckTasksWaitingTermination>:
/*-----------------------------------------------------------*/
static void prvCheckTasksWaitingTermination( void )
{
8011690: b580 push {r7, lr}
8011692: b082 sub sp, #8
8011694: af00 add r7, sp, #0
{
TCB_t *pxTCB;
/* uxDeletedTasksWaitingCleanUp is used to prevent taskENTER_CRITICAL()
being called too often in the idle task. */
while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
8011696: e019 b.n 80116cc <prvCheckTasksWaitingTermination+0x3c>
{
taskENTER_CRITICAL();
8011698: f000 fbd6 bl 8011e48 <vPortEnterCritical>
{
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
801169c: 4b10 ldr r3, [pc, #64] @ (80116e0 <prvCheckTasksWaitingTermination+0x50>)
801169e: 68db ldr r3, [r3, #12]
80116a0: 68db ldr r3, [r3, #12]
80116a2: 607b str r3, [r7, #4]
( void ) uxListRemove( &( pxTCB->xStateListItem ) );
80116a4: 687b ldr r3, [r7, #4]
80116a6: 3304 adds r3, #4
80116a8: 4618 mov r0, r3
80116aa: f7fe fc68 bl 800ff7e <uxListRemove>
--uxCurrentNumberOfTasks;
80116ae: 4b0d ldr r3, [pc, #52] @ (80116e4 <prvCheckTasksWaitingTermination+0x54>)
80116b0: 681b ldr r3, [r3, #0]
80116b2: 3b01 subs r3, #1
80116b4: 4a0b ldr r2, [pc, #44] @ (80116e4 <prvCheckTasksWaitingTermination+0x54>)
80116b6: 6013 str r3, [r2, #0]
--uxDeletedTasksWaitingCleanUp;
80116b8: 4b0b ldr r3, [pc, #44] @ (80116e8 <prvCheckTasksWaitingTermination+0x58>)
80116ba: 681b ldr r3, [r3, #0]
80116bc: 3b01 subs r3, #1
80116be: 4a0a ldr r2, [pc, #40] @ (80116e8 <prvCheckTasksWaitingTermination+0x58>)
80116c0: 6013 str r3, [r2, #0]
}
taskEXIT_CRITICAL();
80116c2: f000 fbf3 bl 8011eac <vPortExitCritical>
prvDeleteTCB( pxTCB );
80116c6: 6878 ldr r0, [r7, #4]
80116c8: f000 f810 bl 80116ec <prvDeleteTCB>
while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
80116cc: 4b06 ldr r3, [pc, #24] @ (80116e8 <prvCheckTasksWaitingTermination+0x58>)
80116ce: 681b ldr r3, [r3, #0]
80116d0: 2b00 cmp r3, #0
80116d2: d1e1 bne.n 8011698 <prvCheckTasksWaitingTermination+0x8>
}
}
#endif /* INCLUDE_vTaskDelete */
}
80116d4: bf00 nop
80116d6: bf00 nop
80116d8: 3708 adds r7, #8
80116da: 46bd mov sp, r7
80116dc: bd80 pop {r7, pc}
80116de: bf00 nop
80116e0: 2001026c .word 0x2001026c
80116e4: 20010298 .word 0x20010298
80116e8: 20010280 .word 0x20010280
080116ec <prvDeleteTCB>:
/*-----------------------------------------------------------*/
#if ( INCLUDE_vTaskDelete == 1 )
static void prvDeleteTCB( TCB_t *pxTCB )
{
80116ec: b580 push {r7, lr}
80116ee: b084 sub sp, #16
80116f0: af00 add r7, sp, #0
80116f2: 6078 str r0, [r7, #4]
to the task to free any memory allocated at the application level.
See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
for additional information. */
#if ( configUSE_NEWLIB_REENTRANT == 1 )
{
_reclaim_reent( &( pxTCB->xNewLib_reent ) );
80116f4: 687b ldr r3, [r7, #4]
80116f6: 334c adds r3, #76 @ 0x4c
80116f8: 4618 mov r0, r3
80116fa: f001 fc71 bl 8012fe0 <_reclaim_reent>
#elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
{
/* The task could have been allocated statically or dynamically, so
check what was statically allocated before trying to free the
memory. */
if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
80116fe: 687b ldr r3, [r7, #4]
8011700: f893 309d ldrb.w r3, [r3, #157] @ 0x9d
8011704: 2b00 cmp r3, #0
8011706: d108 bne.n 801171a <prvDeleteTCB+0x2e>
{
/* Both the stack and TCB were allocated dynamically, so both
must be freed. */
vPortFree( pxTCB->pxStack );
8011708: 687b ldr r3, [r7, #4]
801170a: 6b1b ldr r3, [r3, #48] @ 0x30
801170c: 4618 mov r0, r3
801170e: f000 fd8b bl 8012228 <vPortFree>
vPortFree( pxTCB );
8011712: 6878 ldr r0, [r7, #4]
8011714: f000 fd88 bl 8012228 <vPortFree>
configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB );
mtCOVERAGE_TEST_MARKER();
}
}
#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
}
8011718: e019 b.n 801174e <prvDeleteTCB+0x62>
else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
801171a: 687b ldr r3, [r7, #4]
801171c: f893 309d ldrb.w r3, [r3, #157] @ 0x9d
8011720: 2b01 cmp r3, #1
8011722: d103 bne.n 801172c <prvDeleteTCB+0x40>
vPortFree( pxTCB );
8011724: 6878 ldr r0, [r7, #4]
8011726: f000 fd7f bl 8012228 <vPortFree>
}
801172a: e010 b.n 801174e <prvDeleteTCB+0x62>
configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB );
801172c: 687b ldr r3, [r7, #4]
801172e: f893 309d ldrb.w r3, [r3, #157] @ 0x9d
8011732: 2b02 cmp r3, #2
8011734: d00b beq.n 801174e <prvDeleteTCB+0x62>
__asm volatile
8011736: f04f 0350 mov.w r3, #80 @ 0x50
801173a: f383 8811 msr BASEPRI, r3
801173e: f3bf 8f6f isb sy
8011742: f3bf 8f4f dsb sy
8011746: 60fb str r3, [r7, #12]
}
8011748: bf00 nop
801174a: bf00 nop
801174c: e7fd b.n 801174a <prvDeleteTCB+0x5e>
}
801174e: bf00 nop
8011750: 3710 adds r7, #16
8011752: 46bd mov sp, r7
8011754: bd80 pop {r7, pc}
...
08011758 <prvResetNextTaskUnblockTime>:
#endif /* INCLUDE_vTaskDelete */
/*-----------------------------------------------------------*/
static void prvResetNextTaskUnblockTime( void )
{
8011758: b480 push {r7}
801175a: b083 sub sp, #12
801175c: af00 add r7, sp, #0
TCB_t *pxTCB;
if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
801175e: 4b0c ldr r3, [pc, #48] @ (8011790 <prvResetNextTaskUnblockTime+0x38>)
8011760: 681b ldr r3, [r3, #0]
8011762: 681b ldr r3, [r3, #0]
8011764: 2b00 cmp r3, #0
8011766: d104 bne.n 8011772 <prvResetNextTaskUnblockTime+0x1a>
{
/* The new current delayed list is empty. Set xNextTaskUnblockTime to
the maximum possible value so it is extremely unlikely that the
if( xTickCount >= xNextTaskUnblockTime ) test will pass until
there is an item in the delayed list. */
xNextTaskUnblockTime = portMAX_DELAY;
8011768: 4b0a ldr r3, [pc, #40] @ (8011794 <prvResetNextTaskUnblockTime+0x3c>)
801176a: f04f 32ff mov.w r2, #4294967295
801176e: 601a str r2, [r3, #0]
which the task at the head of the delayed list should be removed
from the Blocked state. */
( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
}
}
8011770: e008 b.n 8011784 <prvResetNextTaskUnblockTime+0x2c>
( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
8011772: 4b07 ldr r3, [pc, #28] @ (8011790 <prvResetNextTaskUnblockTime+0x38>)
8011774: 681b ldr r3, [r3, #0]
8011776: 68db ldr r3, [r3, #12]
8011778: 68db ldr r3, [r3, #12]
801177a: 607b str r3, [r7, #4]
xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
801177c: 687b ldr r3, [r7, #4]
801177e: 685b ldr r3, [r3, #4]
8011780: 4a04 ldr r2, [pc, #16] @ (8011794 <prvResetNextTaskUnblockTime+0x3c>)
8011782: 6013 str r3, [r2, #0]
}
8011784: bf00 nop
8011786: 370c adds r7, #12
8011788: 46bd mov sp, r7
801178a: f85d 7b04 ldr.w r7, [sp], #4
801178e: 4770 bx lr
8011790: 20010250 .word 0x20010250
8011794: 200102b8 .word 0x200102b8
08011798 <xTaskGetSchedulerState>:
/*-----------------------------------------------------------*/
#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
BaseType_t xTaskGetSchedulerState( void )
{
8011798: b480 push {r7}
801179a: b083 sub sp, #12
801179c: af00 add r7, sp, #0
BaseType_t xReturn;
if( xSchedulerRunning == pdFALSE )
801179e: 4b0b ldr r3, [pc, #44] @ (80117cc <xTaskGetSchedulerState+0x34>)
80117a0: 681b ldr r3, [r3, #0]
80117a2: 2b00 cmp r3, #0
80117a4: d102 bne.n 80117ac <xTaskGetSchedulerState+0x14>
{
xReturn = taskSCHEDULER_NOT_STARTED;
80117a6: 2301 movs r3, #1
80117a8: 607b str r3, [r7, #4]
80117aa: e008 b.n 80117be <xTaskGetSchedulerState+0x26>
}
else
{
if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
80117ac: 4b08 ldr r3, [pc, #32] @ (80117d0 <xTaskGetSchedulerState+0x38>)
80117ae: 681b ldr r3, [r3, #0]
80117b0: 2b00 cmp r3, #0
80117b2: d102 bne.n 80117ba <xTaskGetSchedulerState+0x22>
{
xReturn = taskSCHEDULER_RUNNING;
80117b4: 2302 movs r3, #2
80117b6: 607b str r3, [r7, #4]
80117b8: e001 b.n 80117be <xTaskGetSchedulerState+0x26>
}
else
{
xReturn = taskSCHEDULER_SUSPENDED;
80117ba: 2300 movs r3, #0
80117bc: 607b str r3, [r7, #4]
}
}
return xReturn;
80117be: 687b ldr r3, [r7, #4]
}
80117c0: 4618 mov r0, r3
80117c2: 370c adds r7, #12
80117c4: 46bd mov sp, r7
80117c6: f85d 7b04 ldr.w r7, [sp], #4
80117ca: 4770 bx lr
80117cc: 200102a4 .word 0x200102a4
80117d0: 200102c0 .word 0x200102c0
080117d4 <xTaskPriorityInherit>:
/*-----------------------------------------------------------*/
#if ( configUSE_MUTEXES == 1 )
BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder )
{
80117d4: b580 push {r7, lr}
80117d6: b084 sub sp, #16
80117d8: af00 add r7, sp, #0
80117da: 6078 str r0, [r7, #4]
TCB_t * const pxMutexHolderTCB = pxMutexHolder;
80117dc: 687b ldr r3, [r7, #4]
80117de: 60bb str r3, [r7, #8]
BaseType_t xReturn = pdFALSE;
80117e0: 2300 movs r3, #0
80117e2: 60fb str r3, [r7, #12]
/* If the mutex was given back by an interrupt while the queue was
locked then the mutex holder might now be NULL. _RB_ Is this still
needed as interrupts can no longer use mutexes? */
if( pxMutexHolder != NULL )
80117e4: 687b ldr r3, [r7, #4]
80117e6: 2b00 cmp r3, #0
80117e8: d05e beq.n 80118a8 <xTaskPriorityInherit+0xd4>
{
/* If the holder of the mutex has a priority below the priority of
the task attempting to obtain the mutex then it will temporarily
inherit the priority of the task attempting to obtain the mutex. */
if( pxMutexHolderTCB->uxPriority < pxCurrentTCB->uxPriority )
80117ea: 68bb ldr r3, [r7, #8]
80117ec: 6ada ldr r2, [r3, #44] @ 0x2c
80117ee: 4b31 ldr r3, [pc, #196] @ (80118b4 <xTaskPriorityInherit+0xe0>)
80117f0: 681b ldr r3, [r3, #0]
80117f2: 6adb ldr r3, [r3, #44] @ 0x2c
80117f4: 429a cmp r2, r3
80117f6: d24e bcs.n 8011896 <xTaskPriorityInherit+0xc2>
{
/* Adjust the mutex holder state to account for its new
priority. Only reset the event list item value if the value is
not being used for anything else. */
if( ( listGET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
80117f8: 68bb ldr r3, [r7, #8]
80117fa: 699b ldr r3, [r3, #24]
80117fc: 2b00 cmp r3, #0
80117fe: db06 blt.n 801180e <xTaskPriorityInherit+0x3a>
{
listSET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
8011800: 4b2c ldr r3, [pc, #176] @ (80118b4 <xTaskPriorityInherit+0xe0>)
8011802: 681b ldr r3, [r3, #0]
8011804: 6adb ldr r3, [r3, #44] @ 0x2c
8011806: f1c3 0207 rsb r2, r3, #7
801180a: 68bb ldr r3, [r7, #8]
801180c: 619a str r2, [r3, #24]
mtCOVERAGE_TEST_MARKER();
}
/* If the task being modified is in the ready state it will need
to be moved into a new list. */
if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxMutexHolderTCB->uxPriority ] ), &( pxMutexHolderTCB->xStateListItem ) ) != pdFALSE )
801180e: 68bb ldr r3, [r7, #8]
8011810: 6959 ldr r1, [r3, #20]
8011812: 68bb ldr r3, [r7, #8]
8011814: 6ada ldr r2, [r3, #44] @ 0x2c
8011816: 4613 mov r3, r2
8011818: 009b lsls r3, r3, #2
801181a: 4413 add r3, r2
801181c: 009b lsls r3, r3, #2
801181e: 4a26 ldr r2, [pc, #152] @ (80118b8 <xTaskPriorityInherit+0xe4>)
8011820: 4413 add r3, r2
8011822: 4299 cmp r1, r3
8011824: d12f bne.n 8011886 <xTaskPriorityInherit+0xb2>
{
if( uxListRemove( &( pxMutexHolderTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
8011826: 68bb ldr r3, [r7, #8]
8011828: 3304 adds r3, #4
801182a: 4618 mov r0, r3
801182c: f7fe fba7 bl 800ff7e <uxListRemove>
8011830: 4603 mov r3, r0
8011832: 2b00 cmp r3, #0
8011834: d10a bne.n 801184c <xTaskPriorityInherit+0x78>
{
/* It is known that the task is in its ready list so
there is no need to check again and the port level
reset macro can be called directly. */
portRESET_READY_PRIORITY( pxMutexHolderTCB->uxPriority, uxTopReadyPriority );
8011836: 68bb ldr r3, [r7, #8]
8011838: 6adb ldr r3, [r3, #44] @ 0x2c
801183a: 2201 movs r2, #1
801183c: fa02 f303 lsl.w r3, r2, r3
8011840: 43da mvns r2, r3
8011842: 4b1e ldr r3, [pc, #120] @ (80118bc <xTaskPriorityInherit+0xe8>)
8011844: 681b ldr r3, [r3, #0]
8011846: 4013 ands r3, r2
8011848: 4a1c ldr r2, [pc, #112] @ (80118bc <xTaskPriorityInherit+0xe8>)
801184a: 6013 str r3, [r2, #0]
{
mtCOVERAGE_TEST_MARKER();
}
/* Inherit the priority before being moved into the new list. */
pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
801184c: 4b19 ldr r3, [pc, #100] @ (80118b4 <xTaskPriorityInherit+0xe0>)
801184e: 681b ldr r3, [r3, #0]
8011850: 6ada ldr r2, [r3, #44] @ 0x2c
8011852: 68bb ldr r3, [r7, #8]
8011854: 62da str r2, [r3, #44] @ 0x2c
prvAddTaskToReadyList( pxMutexHolderTCB );
8011856: 68bb ldr r3, [r7, #8]
8011858: 6adb ldr r3, [r3, #44] @ 0x2c
801185a: 2201 movs r2, #1
801185c: 409a lsls r2, r3
801185e: 4b17 ldr r3, [pc, #92] @ (80118bc <xTaskPriorityInherit+0xe8>)
8011860: 681b ldr r3, [r3, #0]
8011862: 4313 orrs r3, r2
8011864: 4a15 ldr r2, [pc, #84] @ (80118bc <xTaskPriorityInherit+0xe8>)
8011866: 6013 str r3, [r2, #0]
8011868: 68bb ldr r3, [r7, #8]
801186a: 6ada ldr r2, [r3, #44] @ 0x2c
801186c: 4613 mov r3, r2
801186e: 009b lsls r3, r3, #2
8011870: 4413 add r3, r2
8011872: 009b lsls r3, r3, #2
8011874: 4a10 ldr r2, [pc, #64] @ (80118b8 <xTaskPriorityInherit+0xe4>)
8011876: 441a add r2, r3
8011878: 68bb ldr r3, [r7, #8]
801187a: 3304 adds r3, #4
801187c: 4619 mov r1, r3
801187e: 4610 mov r0, r2
8011880: f7fe fb20 bl 800fec4 <vListInsertEnd>
8011884: e004 b.n 8011890 <xTaskPriorityInherit+0xbc>
}
else
{
/* Just inherit the priority. */
pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
8011886: 4b0b ldr r3, [pc, #44] @ (80118b4 <xTaskPriorityInherit+0xe0>)
8011888: 681b ldr r3, [r3, #0]
801188a: 6ada ldr r2, [r3, #44] @ 0x2c
801188c: 68bb ldr r3, [r7, #8]
801188e: 62da str r2, [r3, #44] @ 0x2c
}
traceTASK_PRIORITY_INHERIT( pxMutexHolderTCB, pxCurrentTCB->uxPriority );
/* Inheritance occurred. */
xReturn = pdTRUE;
8011890: 2301 movs r3, #1
8011892: 60fb str r3, [r7, #12]
8011894: e008 b.n 80118a8 <xTaskPriorityInherit+0xd4>
}
else
{
if( pxMutexHolderTCB->uxBasePriority < pxCurrentTCB->uxPriority )
8011896: 68bb ldr r3, [r7, #8]
8011898: 6c5a ldr r2, [r3, #68] @ 0x44
801189a: 4b06 ldr r3, [pc, #24] @ (80118b4 <xTaskPriorityInherit+0xe0>)
801189c: 681b ldr r3, [r3, #0]
801189e: 6adb ldr r3, [r3, #44] @ 0x2c
80118a0: 429a cmp r2, r3
80118a2: d201 bcs.n 80118a8 <xTaskPriorityInherit+0xd4>
current priority of the mutex holder is not lower than the
priority of the task attempting to take the mutex.
Therefore the mutex holder must have already inherited a
priority, but inheritance would have occurred if that had
not been the case. */
xReturn = pdTRUE;
80118a4: 2301 movs r3, #1
80118a6: 60fb str r3, [r7, #12]
else
{
mtCOVERAGE_TEST_MARKER();
}
return xReturn;
80118a8: 68fb ldr r3, [r7, #12]
}
80118aa: 4618 mov r0, r3
80118ac: 3710 adds r7, #16
80118ae: 46bd mov sp, r7
80118b0: bd80 pop {r7, pc}
80118b2: bf00 nop
80118b4: 20010198 .word 0x20010198
80118b8: 2001019c .word 0x2001019c
80118bc: 200102a0 .word 0x200102a0
080118c0 <xTaskPriorityDisinherit>:
/*-----------------------------------------------------------*/
#if ( configUSE_MUTEXES == 1 )
BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
{
80118c0: b580 push {r7, lr}
80118c2: b086 sub sp, #24
80118c4: af00 add r7, sp, #0
80118c6: 6078 str r0, [r7, #4]
TCB_t * const pxTCB = pxMutexHolder;
80118c8: 687b ldr r3, [r7, #4]
80118ca: 613b str r3, [r7, #16]
BaseType_t xReturn = pdFALSE;
80118cc: 2300 movs r3, #0
80118ce: 617b str r3, [r7, #20]
if( pxMutexHolder != NULL )
80118d0: 687b ldr r3, [r7, #4]
80118d2: 2b00 cmp r3, #0
80118d4: d070 beq.n 80119b8 <xTaskPriorityDisinherit+0xf8>
{
/* A task can only have an inherited priority if it holds the mutex.
If the mutex is held by a task then it cannot be given from an
interrupt, and if a mutex is given by the holding task then it must
be the running state task. */
configASSERT( pxTCB == pxCurrentTCB );
80118d6: 4b3b ldr r3, [pc, #236] @ (80119c4 <xTaskPriorityDisinherit+0x104>)
80118d8: 681b ldr r3, [r3, #0]
80118da: 693a ldr r2, [r7, #16]
80118dc: 429a cmp r2, r3
80118de: d00b beq.n 80118f8 <xTaskPriorityDisinherit+0x38>
__asm volatile
80118e0: f04f 0350 mov.w r3, #80 @ 0x50
80118e4: f383 8811 msr BASEPRI, r3
80118e8: f3bf 8f6f isb sy
80118ec: f3bf 8f4f dsb sy
80118f0: 60fb str r3, [r7, #12]
}
80118f2: bf00 nop
80118f4: bf00 nop
80118f6: e7fd b.n 80118f4 <xTaskPriorityDisinherit+0x34>
configASSERT( pxTCB->uxMutexesHeld );
80118f8: 693b ldr r3, [r7, #16]
80118fa: 6c9b ldr r3, [r3, #72] @ 0x48
80118fc: 2b00 cmp r3, #0
80118fe: d10b bne.n 8011918 <xTaskPriorityDisinherit+0x58>
__asm volatile
8011900: f04f 0350 mov.w r3, #80 @ 0x50
8011904: f383 8811 msr BASEPRI, r3
8011908: f3bf 8f6f isb sy
801190c: f3bf 8f4f dsb sy
8011910: 60bb str r3, [r7, #8]
}
8011912: bf00 nop
8011914: bf00 nop
8011916: e7fd b.n 8011914 <xTaskPriorityDisinherit+0x54>
( pxTCB->uxMutexesHeld )--;
8011918: 693b ldr r3, [r7, #16]
801191a: 6c9b ldr r3, [r3, #72] @ 0x48
801191c: 1e5a subs r2, r3, #1
801191e: 693b ldr r3, [r7, #16]
8011920: 649a str r2, [r3, #72] @ 0x48
/* Has the holder of the mutex inherited the priority of another
task? */
if( pxTCB->uxPriority != pxTCB->uxBasePriority )
8011922: 693b ldr r3, [r7, #16]
8011924: 6ada ldr r2, [r3, #44] @ 0x2c
8011926: 693b ldr r3, [r7, #16]
8011928: 6c5b ldr r3, [r3, #68] @ 0x44
801192a: 429a cmp r2, r3
801192c: d044 beq.n 80119b8 <xTaskPriorityDisinherit+0xf8>
{
/* Only disinherit if no other mutexes are held. */
if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
801192e: 693b ldr r3, [r7, #16]
8011930: 6c9b ldr r3, [r3, #72] @ 0x48
8011932: 2b00 cmp r3, #0
8011934: d140 bne.n 80119b8 <xTaskPriorityDisinherit+0xf8>
/* A task can only have an inherited priority if it holds
the mutex. If the mutex is held by a task then it cannot be
given from an interrupt, and if a mutex is given by the
holding task then it must be the running state task. Remove
the holding task from the ready/delayed list. */
if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
8011936: 693b ldr r3, [r7, #16]
8011938: 3304 adds r3, #4
801193a: 4618 mov r0, r3
801193c: f7fe fb1f bl 800ff7e <uxListRemove>
8011940: 4603 mov r3, r0
8011942: 2b00 cmp r3, #0
8011944: d115 bne.n 8011972 <xTaskPriorityDisinherit+0xb2>
{
taskRESET_READY_PRIORITY( pxTCB->uxPriority );
8011946: 693b ldr r3, [r7, #16]
8011948: 6ada ldr r2, [r3, #44] @ 0x2c
801194a: 491f ldr r1, [pc, #124] @ (80119c8 <xTaskPriorityDisinherit+0x108>)
801194c: 4613 mov r3, r2
801194e: 009b lsls r3, r3, #2
8011950: 4413 add r3, r2
8011952: 009b lsls r3, r3, #2
8011954: 440b add r3, r1
8011956: 681b ldr r3, [r3, #0]
8011958: 2b00 cmp r3, #0
801195a: d10a bne.n 8011972 <xTaskPriorityDisinherit+0xb2>
801195c: 693b ldr r3, [r7, #16]
801195e: 6adb ldr r3, [r3, #44] @ 0x2c
8011960: 2201 movs r2, #1
8011962: fa02 f303 lsl.w r3, r2, r3
8011966: 43da mvns r2, r3
8011968: 4b18 ldr r3, [pc, #96] @ (80119cc <xTaskPriorityDisinherit+0x10c>)
801196a: 681b ldr r3, [r3, #0]
801196c: 4013 ands r3, r2
801196e: 4a17 ldr r2, [pc, #92] @ (80119cc <xTaskPriorityDisinherit+0x10c>)
8011970: 6013 str r3, [r2, #0]
}
/* Disinherit the priority before adding the task into the
new ready list. */
traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
pxTCB->uxPriority = pxTCB->uxBasePriority;
8011972: 693b ldr r3, [r7, #16]
8011974: 6c5a ldr r2, [r3, #68] @ 0x44
8011976: 693b ldr r3, [r7, #16]
8011978: 62da str r2, [r3, #44] @ 0x2c
/* Reset the event list item value. It cannot be in use for
any other purpose if this task is running, and it must be
running to give back the mutex. */
listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
801197a: 693b ldr r3, [r7, #16]
801197c: 6adb ldr r3, [r3, #44] @ 0x2c
801197e: f1c3 0207 rsb r2, r3, #7
8011982: 693b ldr r3, [r7, #16]
8011984: 619a str r2, [r3, #24]
prvAddTaskToReadyList( pxTCB );
8011986: 693b ldr r3, [r7, #16]
8011988: 6adb ldr r3, [r3, #44] @ 0x2c
801198a: 2201 movs r2, #1
801198c: 409a lsls r2, r3
801198e: 4b0f ldr r3, [pc, #60] @ (80119cc <xTaskPriorityDisinherit+0x10c>)
8011990: 681b ldr r3, [r3, #0]
8011992: 4313 orrs r3, r2
8011994: 4a0d ldr r2, [pc, #52] @ (80119cc <xTaskPriorityDisinherit+0x10c>)
8011996: 6013 str r3, [r2, #0]
8011998: 693b ldr r3, [r7, #16]
801199a: 6ada ldr r2, [r3, #44] @ 0x2c
801199c: 4613 mov r3, r2
801199e: 009b lsls r3, r3, #2
80119a0: 4413 add r3, r2
80119a2: 009b lsls r3, r3, #2
80119a4: 4a08 ldr r2, [pc, #32] @ (80119c8 <xTaskPriorityDisinherit+0x108>)
80119a6: 441a add r2, r3
80119a8: 693b ldr r3, [r7, #16]
80119aa: 3304 adds r3, #4
80119ac: 4619 mov r1, r3
80119ae: 4610 mov r0, r2
80119b0: f7fe fa88 bl 800fec4 <vListInsertEnd>
in an order different to that in which they were taken.
If a context switch did not occur when the first mutex was
returned, even if a task was waiting on it, then a context
switch should occur when the last mutex is returned whether
a task is waiting on it or not. */
xReturn = pdTRUE;
80119b4: 2301 movs r3, #1
80119b6: 617b str r3, [r7, #20]
else
{
mtCOVERAGE_TEST_MARKER();
}
return xReturn;
80119b8: 697b ldr r3, [r7, #20]
}
80119ba: 4618 mov r0, r3
80119bc: 3718 adds r7, #24
80119be: 46bd mov sp, r7
80119c0: bd80 pop {r7, pc}
80119c2: bf00 nop
80119c4: 20010198 .word 0x20010198
80119c8: 2001019c .word 0x2001019c
80119cc: 200102a0 .word 0x200102a0
080119d0 <vTaskPriorityDisinheritAfterTimeout>:
/*-----------------------------------------------------------*/
#if ( configUSE_MUTEXES == 1 )
void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask )
{
80119d0: b580 push {r7, lr}
80119d2: b088 sub sp, #32
80119d4: af00 add r7, sp, #0
80119d6: 6078 str r0, [r7, #4]
80119d8: 6039 str r1, [r7, #0]
TCB_t * const pxTCB = pxMutexHolder;
80119da: 687b ldr r3, [r7, #4]
80119dc: 61bb str r3, [r7, #24]
UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse;
const UBaseType_t uxOnlyOneMutexHeld = ( UBaseType_t ) 1;
80119de: 2301 movs r3, #1
80119e0: 617b str r3, [r7, #20]
if( pxMutexHolder != NULL )
80119e2: 687b ldr r3, [r7, #4]
80119e4: 2b00 cmp r3, #0
80119e6: d079 beq.n 8011adc <vTaskPriorityDisinheritAfterTimeout+0x10c>
{
/* If pxMutexHolder is not NULL then the holder must hold at least
one mutex. */
configASSERT( pxTCB->uxMutexesHeld );
80119e8: 69bb ldr r3, [r7, #24]
80119ea: 6c9b ldr r3, [r3, #72] @ 0x48
80119ec: 2b00 cmp r3, #0
80119ee: d10b bne.n 8011a08 <vTaskPriorityDisinheritAfterTimeout+0x38>
__asm volatile
80119f0: f04f 0350 mov.w r3, #80 @ 0x50
80119f4: f383 8811 msr BASEPRI, r3
80119f8: f3bf 8f6f isb sy
80119fc: f3bf 8f4f dsb sy
8011a00: 60fb str r3, [r7, #12]
}
8011a02: bf00 nop
8011a04: bf00 nop
8011a06: e7fd b.n 8011a04 <vTaskPriorityDisinheritAfterTimeout+0x34>
/* Determine the priority to which the priority of the task that
holds the mutex should be set. This will be the greater of the
holding task's base priority and the priority of the highest
priority task that is waiting to obtain the mutex. */
if( pxTCB->uxBasePriority < uxHighestPriorityWaitingTask )
8011a08: 69bb ldr r3, [r7, #24]
8011a0a: 6c5b ldr r3, [r3, #68] @ 0x44
8011a0c: 683a ldr r2, [r7, #0]
8011a0e: 429a cmp r2, r3
8011a10: d902 bls.n 8011a18 <vTaskPriorityDisinheritAfterTimeout+0x48>
{
uxPriorityToUse = uxHighestPriorityWaitingTask;
8011a12: 683b ldr r3, [r7, #0]
8011a14: 61fb str r3, [r7, #28]
8011a16: e002 b.n 8011a1e <vTaskPriorityDisinheritAfterTimeout+0x4e>
}
else
{
uxPriorityToUse = pxTCB->uxBasePriority;
8011a18: 69bb ldr r3, [r7, #24]
8011a1a: 6c5b ldr r3, [r3, #68] @ 0x44
8011a1c: 61fb str r3, [r7, #28]
}
/* Does the priority need to change? */
if( pxTCB->uxPriority != uxPriorityToUse )
8011a1e: 69bb ldr r3, [r7, #24]
8011a20: 6adb ldr r3, [r3, #44] @ 0x2c
8011a22: 69fa ldr r2, [r7, #28]
8011a24: 429a cmp r2, r3
8011a26: d059 beq.n 8011adc <vTaskPriorityDisinheritAfterTimeout+0x10c>
{
/* Only disinherit if no other mutexes are held. This is a
simplification in the priority inheritance implementation. If
the task that holds the mutex is also holding other mutexes then
the other mutexes may have caused the priority inheritance. */
if( pxTCB->uxMutexesHeld == uxOnlyOneMutexHeld )
8011a28: 69bb ldr r3, [r7, #24]
8011a2a: 6c9b ldr r3, [r3, #72] @ 0x48
8011a2c: 697a ldr r2, [r7, #20]
8011a2e: 429a cmp r2, r3
8011a30: d154 bne.n 8011adc <vTaskPriorityDisinheritAfterTimeout+0x10c>
{
/* If a task has timed out because it already holds the
mutex it was trying to obtain then it cannot of inherited
its own priority. */
configASSERT( pxTCB != pxCurrentTCB );
8011a32: 4b2c ldr r3, [pc, #176] @ (8011ae4 <vTaskPriorityDisinheritAfterTimeout+0x114>)
8011a34: 681b ldr r3, [r3, #0]
8011a36: 69ba ldr r2, [r7, #24]
8011a38: 429a cmp r2, r3
8011a3a: d10b bne.n 8011a54 <vTaskPriorityDisinheritAfterTimeout+0x84>
__asm volatile
8011a3c: f04f 0350 mov.w r3, #80 @ 0x50
8011a40: f383 8811 msr BASEPRI, r3
8011a44: f3bf 8f6f isb sy
8011a48: f3bf 8f4f dsb sy
8011a4c: 60bb str r3, [r7, #8]
}
8011a4e: bf00 nop
8011a50: bf00 nop
8011a52: e7fd b.n 8011a50 <vTaskPriorityDisinheritAfterTimeout+0x80>
/* Disinherit the priority, remembering the previous
priority to facilitate determining the subject task's
state. */
traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
uxPriorityUsedOnEntry = pxTCB->uxPriority;
8011a54: 69bb ldr r3, [r7, #24]
8011a56: 6adb ldr r3, [r3, #44] @ 0x2c
8011a58: 613b str r3, [r7, #16]
pxTCB->uxPriority = uxPriorityToUse;
8011a5a: 69bb ldr r3, [r7, #24]
8011a5c: 69fa ldr r2, [r7, #28]
8011a5e: 62da str r2, [r3, #44] @ 0x2c
/* Only reset the event list item value if the value is not
being used for anything else. */
if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
8011a60: 69bb ldr r3, [r7, #24]
8011a62: 699b ldr r3, [r3, #24]
8011a64: 2b00 cmp r3, #0
8011a66: db04 blt.n 8011a72 <vTaskPriorityDisinheritAfterTimeout+0xa2>
{
listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriorityToUse ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
8011a68: 69fb ldr r3, [r7, #28]
8011a6a: f1c3 0207 rsb r2, r3, #7
8011a6e: 69bb ldr r3, [r7, #24]
8011a70: 619a str r2, [r3, #24]
then the task that holds the mutex could be in either the
Ready, Blocked or Suspended states. Only remove the task
from its current state list if it is in the Ready state as
the task's priority is going to change and there is one
Ready list per priority. */
if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
8011a72: 69bb ldr r3, [r7, #24]
8011a74: 6959 ldr r1, [r3, #20]
8011a76: 693a ldr r2, [r7, #16]
8011a78: 4613 mov r3, r2
8011a7a: 009b lsls r3, r3, #2
8011a7c: 4413 add r3, r2
8011a7e: 009b lsls r3, r3, #2
8011a80: 4a19 ldr r2, [pc, #100] @ (8011ae8 <vTaskPriorityDisinheritAfterTimeout+0x118>)
8011a82: 4413 add r3, r2
8011a84: 4299 cmp r1, r3
8011a86: d129 bne.n 8011adc <vTaskPriorityDisinheritAfterTimeout+0x10c>
{
if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
8011a88: 69bb ldr r3, [r7, #24]
8011a8a: 3304 adds r3, #4
8011a8c: 4618 mov r0, r3
8011a8e: f7fe fa76 bl 800ff7e <uxListRemove>
8011a92: 4603 mov r3, r0
8011a94: 2b00 cmp r3, #0
8011a96: d10a bne.n 8011aae <vTaskPriorityDisinheritAfterTimeout+0xde>
{
/* It is known that the task is in its ready list so
there is no need to check again and the port level
reset macro can be called directly. */
portRESET_READY_PRIORITY( pxTCB->uxPriority, uxTopReadyPriority );
8011a98: 69bb ldr r3, [r7, #24]
8011a9a: 6adb ldr r3, [r3, #44] @ 0x2c
8011a9c: 2201 movs r2, #1
8011a9e: fa02 f303 lsl.w r3, r2, r3
8011aa2: 43da mvns r2, r3
8011aa4: 4b11 ldr r3, [pc, #68] @ (8011aec <vTaskPriorityDisinheritAfterTimeout+0x11c>)
8011aa6: 681b ldr r3, [r3, #0]
8011aa8: 4013 ands r3, r2
8011aaa: 4a10 ldr r2, [pc, #64] @ (8011aec <vTaskPriorityDisinheritAfterTimeout+0x11c>)
8011aac: 6013 str r3, [r2, #0]
else
{
mtCOVERAGE_TEST_MARKER();
}
prvAddTaskToReadyList( pxTCB );
8011aae: 69bb ldr r3, [r7, #24]
8011ab0: 6adb ldr r3, [r3, #44] @ 0x2c
8011ab2: 2201 movs r2, #1
8011ab4: 409a lsls r2, r3
8011ab6: 4b0d ldr r3, [pc, #52] @ (8011aec <vTaskPriorityDisinheritAfterTimeout+0x11c>)
8011ab8: 681b ldr r3, [r3, #0]
8011aba: 4313 orrs r3, r2
8011abc: 4a0b ldr r2, [pc, #44] @ (8011aec <vTaskPriorityDisinheritAfterTimeout+0x11c>)
8011abe: 6013 str r3, [r2, #0]
8011ac0: 69bb ldr r3, [r7, #24]
8011ac2: 6ada ldr r2, [r3, #44] @ 0x2c
8011ac4: 4613 mov r3, r2
8011ac6: 009b lsls r3, r3, #2
8011ac8: 4413 add r3, r2
8011aca: 009b lsls r3, r3, #2
8011acc: 4a06 ldr r2, [pc, #24] @ (8011ae8 <vTaskPriorityDisinheritAfterTimeout+0x118>)
8011ace: 441a add r2, r3
8011ad0: 69bb ldr r3, [r7, #24]
8011ad2: 3304 adds r3, #4
8011ad4: 4619 mov r1, r3
8011ad6: 4610 mov r0, r2
8011ad8: f7fe f9f4 bl 800fec4 <vListInsertEnd>
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
8011adc: bf00 nop
8011ade: 3720 adds r7, #32
8011ae0: 46bd mov sp, r7
8011ae2: bd80 pop {r7, pc}
8011ae4: 20010198 .word 0x20010198
8011ae8: 2001019c .word 0x2001019c
8011aec: 200102a0 .word 0x200102a0
08011af0 <pvTaskIncrementMutexHeldCount>:
/*-----------------------------------------------------------*/
#if ( configUSE_MUTEXES == 1 )
TaskHandle_t pvTaskIncrementMutexHeldCount( void )
{
8011af0: b480 push {r7}
8011af2: af00 add r7, sp, #0
/* If xSemaphoreCreateMutex() is called before any tasks have been created
then pxCurrentTCB will be NULL. */
if( pxCurrentTCB != NULL )
8011af4: 4b07 ldr r3, [pc, #28] @ (8011b14 <pvTaskIncrementMutexHeldCount+0x24>)
8011af6: 681b ldr r3, [r3, #0]
8011af8: 2b00 cmp r3, #0
8011afa: d004 beq.n 8011b06 <pvTaskIncrementMutexHeldCount+0x16>
{
( pxCurrentTCB->uxMutexesHeld )++;
8011afc: 4b05 ldr r3, [pc, #20] @ (8011b14 <pvTaskIncrementMutexHeldCount+0x24>)
8011afe: 681b ldr r3, [r3, #0]
8011b00: 6c9a ldr r2, [r3, #72] @ 0x48
8011b02: 3201 adds r2, #1
8011b04: 649a str r2, [r3, #72] @ 0x48
}
return pxCurrentTCB;
8011b06: 4b03 ldr r3, [pc, #12] @ (8011b14 <pvTaskIncrementMutexHeldCount+0x24>)
8011b08: 681b ldr r3, [r3, #0]
}
8011b0a: 4618 mov r0, r3
8011b0c: 46bd mov sp, r7
8011b0e: f85d 7b04 ldr.w r7, [sp], #4
8011b12: 4770 bx lr
8011b14: 20010198 .word 0x20010198
08011b18 <prvAddCurrentTaskToDelayedList>:
#endif
/*-----------------------------------------------------------*/
static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
{
8011b18: b580 push {r7, lr}
8011b1a: b084 sub sp, #16
8011b1c: af00 add r7, sp, #0
8011b1e: 6078 str r0, [r7, #4]
8011b20: 6039 str r1, [r7, #0]
TickType_t xTimeToWake;
const TickType_t xConstTickCount = xTickCount;
8011b22: 4b29 ldr r3, [pc, #164] @ (8011bc8 <prvAddCurrentTaskToDelayedList+0xb0>)
8011b24: 681b ldr r3, [r3, #0]
8011b26: 60fb str r3, [r7, #12]
}
#endif
/* Remove the task from the ready list before adding it to the blocked list
as the same list item is used for both lists. */
if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
8011b28: 4b28 ldr r3, [pc, #160] @ (8011bcc <prvAddCurrentTaskToDelayedList+0xb4>)
8011b2a: 681b ldr r3, [r3, #0]
8011b2c: 3304 adds r3, #4
8011b2e: 4618 mov r0, r3
8011b30: f7fe fa25 bl 800ff7e <uxListRemove>
8011b34: 4603 mov r3, r0
8011b36: 2b00 cmp r3, #0
8011b38: d10b bne.n 8011b52 <prvAddCurrentTaskToDelayedList+0x3a>
{
/* The current task must be in a ready list, so there is no need to
check, and the port reset macro can be called directly. */
portRESET_READY_PRIORITY( pxCurrentTCB->uxPriority, uxTopReadyPriority ); /*lint !e931 pxCurrentTCB cannot change as it is the calling task. pxCurrentTCB->uxPriority and uxTopReadyPriority cannot change as called with scheduler suspended or in a critical section. */
8011b3a: 4b24 ldr r3, [pc, #144] @ (8011bcc <prvAddCurrentTaskToDelayedList+0xb4>)
8011b3c: 681b ldr r3, [r3, #0]
8011b3e: 6adb ldr r3, [r3, #44] @ 0x2c
8011b40: 2201 movs r2, #1
8011b42: fa02 f303 lsl.w r3, r2, r3
8011b46: 43da mvns r2, r3
8011b48: 4b21 ldr r3, [pc, #132] @ (8011bd0 <prvAddCurrentTaskToDelayedList+0xb8>)
8011b4a: 681b ldr r3, [r3, #0]
8011b4c: 4013 ands r3, r2
8011b4e: 4a20 ldr r2, [pc, #128] @ (8011bd0 <prvAddCurrentTaskToDelayedList+0xb8>)
8011b50: 6013 str r3, [r2, #0]
mtCOVERAGE_TEST_MARKER();
}
#if ( INCLUDE_vTaskSuspend == 1 )
{
if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
8011b52: 687b ldr r3, [r7, #4]
8011b54: f1b3 3fff cmp.w r3, #4294967295
8011b58: d10a bne.n 8011b70 <prvAddCurrentTaskToDelayedList+0x58>
8011b5a: 683b ldr r3, [r7, #0]
8011b5c: 2b00 cmp r3, #0
8011b5e: d007 beq.n 8011b70 <prvAddCurrentTaskToDelayedList+0x58>
{
/* Add the task to the suspended task list instead of a delayed task
list to ensure it is not woken by a timing event. It will block
indefinitely. */
vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
8011b60: 4b1a ldr r3, [pc, #104] @ (8011bcc <prvAddCurrentTaskToDelayedList+0xb4>)
8011b62: 681b ldr r3, [r3, #0]
8011b64: 3304 adds r3, #4
8011b66: 4619 mov r1, r3
8011b68: 481a ldr r0, [pc, #104] @ (8011bd4 <prvAddCurrentTaskToDelayedList+0xbc>)
8011b6a: f7fe f9ab bl 800fec4 <vListInsertEnd>
/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
( void ) xCanBlockIndefinitely;
}
#endif /* INCLUDE_vTaskSuspend */
}
8011b6e: e026 b.n 8011bbe <prvAddCurrentTaskToDelayedList+0xa6>
xTimeToWake = xConstTickCount + xTicksToWait;
8011b70: 68fa ldr r2, [r7, #12]
8011b72: 687b ldr r3, [r7, #4]
8011b74: 4413 add r3, r2
8011b76: 60bb str r3, [r7, #8]
listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
8011b78: 4b14 ldr r3, [pc, #80] @ (8011bcc <prvAddCurrentTaskToDelayedList+0xb4>)
8011b7a: 681b ldr r3, [r3, #0]
8011b7c: 68ba ldr r2, [r7, #8]
8011b7e: 605a str r2, [r3, #4]
if( xTimeToWake < xConstTickCount )
8011b80: 68ba ldr r2, [r7, #8]
8011b82: 68fb ldr r3, [r7, #12]
8011b84: 429a cmp r2, r3
8011b86: d209 bcs.n 8011b9c <prvAddCurrentTaskToDelayedList+0x84>
vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
8011b88: 4b13 ldr r3, [pc, #76] @ (8011bd8 <prvAddCurrentTaskToDelayedList+0xc0>)
8011b8a: 681a ldr r2, [r3, #0]
8011b8c: 4b0f ldr r3, [pc, #60] @ (8011bcc <prvAddCurrentTaskToDelayedList+0xb4>)
8011b8e: 681b ldr r3, [r3, #0]
8011b90: 3304 adds r3, #4
8011b92: 4619 mov r1, r3
8011b94: 4610 mov r0, r2
8011b96: f7fe f9b9 bl 800ff0c <vListInsert>
}
8011b9a: e010 b.n 8011bbe <prvAddCurrentTaskToDelayedList+0xa6>
vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
8011b9c: 4b0f ldr r3, [pc, #60] @ (8011bdc <prvAddCurrentTaskToDelayedList+0xc4>)
8011b9e: 681a ldr r2, [r3, #0]
8011ba0: 4b0a ldr r3, [pc, #40] @ (8011bcc <prvAddCurrentTaskToDelayedList+0xb4>)
8011ba2: 681b ldr r3, [r3, #0]
8011ba4: 3304 adds r3, #4
8011ba6: 4619 mov r1, r3
8011ba8: 4610 mov r0, r2
8011baa: f7fe f9af bl 800ff0c <vListInsert>
if( xTimeToWake < xNextTaskUnblockTime )
8011bae: 4b0c ldr r3, [pc, #48] @ (8011be0 <prvAddCurrentTaskToDelayedList+0xc8>)
8011bb0: 681b ldr r3, [r3, #0]
8011bb2: 68ba ldr r2, [r7, #8]
8011bb4: 429a cmp r2, r3
8011bb6: d202 bcs.n 8011bbe <prvAddCurrentTaskToDelayedList+0xa6>
xNextTaskUnblockTime = xTimeToWake;
8011bb8: 4a09 ldr r2, [pc, #36] @ (8011be0 <prvAddCurrentTaskToDelayedList+0xc8>)
8011bba: 68bb ldr r3, [r7, #8]
8011bbc: 6013 str r3, [r2, #0]
}
8011bbe: bf00 nop
8011bc0: 3710 adds r7, #16
8011bc2: 46bd mov sp, r7
8011bc4: bd80 pop {r7, pc}
8011bc6: bf00 nop
8011bc8: 2001029c .word 0x2001029c
8011bcc: 20010198 .word 0x20010198
8011bd0: 200102a0 .word 0x200102a0
8011bd4: 20010284 .word 0x20010284
8011bd8: 20010254 .word 0x20010254
8011bdc: 20010250 .word 0x20010250
8011be0: 200102b8 .word 0x200102b8
08011be4 <pxPortInitialiseStack>:
/*
* See header file for description.
*/
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
8011be4: b480 push {r7}
8011be6: b085 sub sp, #20
8011be8: af00 add r7, sp, #0
8011bea: 60f8 str r0, [r7, #12]
8011bec: 60b9 str r1, [r7, #8]
8011bee: 607a str r2, [r7, #4]
/* Simulate the stack frame as it would be created by a context switch
interrupt. */
/* Offset added to account for the way the MCU uses the stack on entry/exit
of interrupts, and to ensure alignment. */
pxTopOfStack--;
8011bf0: 68fb ldr r3, [r7, #12]
8011bf2: 3b04 subs r3, #4
8011bf4: 60fb str r3, [r7, #12]
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
8011bf6: 68fb ldr r3, [r7, #12]
8011bf8: f04f 7280 mov.w r2, #16777216 @ 0x1000000
8011bfc: 601a str r2, [r3, #0]
pxTopOfStack--;
8011bfe: 68fb ldr r3, [r7, #12]
8011c00: 3b04 subs r3, #4
8011c02: 60fb str r3, [r7, #12]
*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
8011c04: 68bb ldr r3, [r7, #8]
8011c06: f023 0201 bic.w r2, r3, #1
8011c0a: 68fb ldr r3, [r7, #12]
8011c0c: 601a str r2, [r3, #0]
pxTopOfStack--;
8011c0e: 68fb ldr r3, [r7, #12]
8011c10: 3b04 subs r3, #4
8011c12: 60fb str r3, [r7, #12]
*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
8011c14: 4a0c ldr r2, [pc, #48] @ (8011c48 <pxPortInitialiseStack+0x64>)
8011c16: 68fb ldr r3, [r7, #12]
8011c18: 601a str r2, [r3, #0]
/* Save code space by skipping register initialisation. */
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
8011c1a: 68fb ldr r3, [r7, #12]
8011c1c: 3b14 subs r3, #20
8011c1e: 60fb str r3, [r7, #12]
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
8011c20: 687a ldr r2, [r7, #4]
8011c22: 68fb ldr r3, [r7, #12]
8011c24: 601a str r2, [r3, #0]
/* A save method is being used that requires each task to maintain its
own exec return value. */
pxTopOfStack--;
8011c26: 68fb ldr r3, [r7, #12]
8011c28: 3b04 subs r3, #4
8011c2a: 60fb str r3, [r7, #12]
*pxTopOfStack = portINITIAL_EXC_RETURN;
8011c2c: 68fb ldr r3, [r7, #12]
8011c2e: f06f 0202 mvn.w r2, #2
8011c32: 601a str r2, [r3, #0]
pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
8011c34: 68fb ldr r3, [r7, #12]
8011c36: 3b20 subs r3, #32
8011c38: 60fb str r3, [r7, #12]
return pxTopOfStack;
8011c3a: 68fb ldr r3, [r7, #12]
}
8011c3c: 4618 mov r0, r3
8011c3e: 3714 adds r7, #20
8011c40: 46bd mov sp, r7
8011c42: f85d 7b04 ldr.w r7, [sp], #4
8011c46: 4770 bx lr
8011c48: 08011c4d .word 0x08011c4d
08011c4c <prvTaskExitError>:
/*-----------------------------------------------------------*/
static void prvTaskExitError( void )
{
8011c4c: b480 push {r7}
8011c4e: b085 sub sp, #20
8011c50: af00 add r7, sp, #0
volatile uint32_t ulDummy = 0;
8011c52: 2300 movs r3, #0
8011c54: 607b str r3, [r7, #4]
its caller as there is nothing to return to. If a task wants to exit it
should instead call vTaskDelete( NULL ).
Artificially force an assert() to be triggered if configASSERT() is
defined, then stop here so application writers can catch the error. */
configASSERT( uxCriticalNesting == ~0UL );
8011c56: 4b13 ldr r3, [pc, #76] @ (8011ca4 <prvTaskExitError+0x58>)
8011c58: 681b ldr r3, [r3, #0]
8011c5a: f1b3 3fff cmp.w r3, #4294967295
8011c5e: d00b beq.n 8011c78 <prvTaskExitError+0x2c>
__asm volatile
8011c60: f04f 0350 mov.w r3, #80 @ 0x50
8011c64: f383 8811 msr BASEPRI, r3
8011c68: f3bf 8f6f isb sy
8011c6c: f3bf 8f4f dsb sy
8011c70: 60fb str r3, [r7, #12]
}
8011c72: bf00 nop
8011c74: bf00 nop
8011c76: e7fd b.n 8011c74 <prvTaskExitError+0x28>
__asm volatile
8011c78: f04f 0350 mov.w r3, #80 @ 0x50
8011c7c: f383 8811 msr BASEPRI, r3
8011c80: f3bf 8f6f isb sy
8011c84: f3bf 8f4f dsb sy
8011c88: 60bb str r3, [r7, #8]
}
8011c8a: bf00 nop
portDISABLE_INTERRUPTS();
while( ulDummy == 0 )
8011c8c: bf00 nop
8011c8e: 687b ldr r3, [r7, #4]
8011c90: 2b00 cmp r3, #0
8011c92: d0fc beq.n 8011c8e <prvTaskExitError+0x42>
about code appearing after this function is called - making ulDummy
volatile makes the compiler think the function could return and
therefore not output an 'unreachable code' warning for code that appears
after it. */
}
}
8011c94: bf00 nop
8011c96: bf00 nop
8011c98: 3714 adds r7, #20
8011c9a: 46bd mov sp, r7
8011c9c: f85d 7b04 ldr.w r7, [sp], #4
8011ca0: 4770 bx lr
8011ca2: bf00 nop
8011ca4: 200000a0 .word 0x200000a0
...
08011cb0 <SVC_Handler>:
/*-----------------------------------------------------------*/
void vPortSVCHandler( void )
{
__asm volatile (
8011cb0: 4b07 ldr r3, [pc, #28] @ (8011cd0 <pxCurrentTCBConst2>)
8011cb2: 6819 ldr r1, [r3, #0]
8011cb4: 6808 ldr r0, [r1, #0]
8011cb6: e8b0 4ff0 ldmia.w r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
8011cba: f380 8809 msr PSP, r0
8011cbe: f3bf 8f6f isb sy
8011cc2: f04f 0000 mov.w r0, #0
8011cc6: f380 8811 msr BASEPRI, r0
8011cca: 4770 bx lr
8011ccc: f3af 8000 nop.w
08011cd0 <pxCurrentTCBConst2>:
8011cd0: 20010198 .word 0x20010198
" bx r14 \n"
" \n"
" .align 4 \n"
"pxCurrentTCBConst2: .word pxCurrentTCB \n"
);
}
8011cd4: bf00 nop
8011cd6: bf00 nop
08011cd8 <prvPortStartFirstTask>:
{
/* Start the first task. This also clears the bit that indicates the FPU is
in use in case the FPU was used before the scheduler was started - which
would otherwise result in the unnecessary leaving of space in the SVC stack
for lazy saving of FPU registers. */
__asm volatile(
8011cd8: 4808 ldr r0, [pc, #32] @ (8011cfc <prvPortStartFirstTask+0x24>)
8011cda: 6800 ldr r0, [r0, #0]
8011cdc: 6800 ldr r0, [r0, #0]
8011cde: f380 8808 msr MSP, r0
8011ce2: f04f 0000 mov.w r0, #0
8011ce6: f380 8814 msr CONTROL, r0
8011cea: b662 cpsie i
8011cec: b661 cpsie f
8011cee: f3bf 8f4f dsb sy
8011cf2: f3bf 8f6f isb sy
8011cf6: df00 svc 0
8011cf8: bf00 nop
" dsb \n"
" isb \n"
" svc 0 \n" /* System call to start first task. */
" nop \n"
);
}
8011cfa: bf00 nop
8011cfc: e000ed08 .word 0xe000ed08
08011d00 <xPortStartScheduler>:
/*
* See header file for description.
*/
BaseType_t xPortStartScheduler( void )
{
8011d00: b580 push {r7, lr}
8011d02: b086 sub sp, #24
8011d04: af00 add r7, sp, #0
configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
/* This port can be used on all revisions of the Cortex-M7 core other than
the r0p1 parts. r0p1 parts should use the port from the
/source/portable/GCC/ARM_CM7/r0p1 directory. */
configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
8011d06: 4b47 ldr r3, [pc, #284] @ (8011e24 <xPortStartScheduler+0x124>)
8011d08: 681b ldr r3, [r3, #0]
8011d0a: 4a47 ldr r2, [pc, #284] @ (8011e28 <xPortStartScheduler+0x128>)
8011d0c: 4293 cmp r3, r2
8011d0e: d10b bne.n 8011d28 <xPortStartScheduler+0x28>
__asm volatile
8011d10: f04f 0350 mov.w r3, #80 @ 0x50
8011d14: f383 8811 msr BASEPRI, r3
8011d18: f3bf 8f6f isb sy
8011d1c: f3bf 8f4f dsb sy
8011d20: 613b str r3, [r7, #16]
}
8011d22: bf00 nop
8011d24: bf00 nop
8011d26: e7fd b.n 8011d24 <xPortStartScheduler+0x24>
configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
8011d28: 4b3e ldr r3, [pc, #248] @ (8011e24 <xPortStartScheduler+0x124>)
8011d2a: 681b ldr r3, [r3, #0]
8011d2c: 4a3f ldr r2, [pc, #252] @ (8011e2c <xPortStartScheduler+0x12c>)
8011d2e: 4293 cmp r3, r2
8011d30: d10b bne.n 8011d4a <xPortStartScheduler+0x4a>
__asm volatile
8011d32: f04f 0350 mov.w r3, #80 @ 0x50
8011d36: f383 8811 msr BASEPRI, r3
8011d3a: f3bf 8f6f isb sy
8011d3e: f3bf 8f4f dsb sy
8011d42: 60fb str r3, [r7, #12]
}
8011d44: bf00 nop
8011d46: bf00 nop
8011d48: e7fd b.n 8011d46 <xPortStartScheduler+0x46>
#if( configASSERT_DEFINED == 1 )
{
volatile uint32_t ulOriginalPriority;
volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
8011d4a: 4b39 ldr r3, [pc, #228] @ (8011e30 <xPortStartScheduler+0x130>)
8011d4c: 617b str r3, [r7, #20]
functions can be called. ISR safe functions are those that end in
"FromISR". FreeRTOS maintains separate thread and ISR API functions to
ensure interrupt entry is as fast and simple as possible.
Save the interrupt priority value that is about to be clobbered. */
ulOriginalPriority = *pucFirstUserPriorityRegister;
8011d4e: 697b ldr r3, [r7, #20]
8011d50: 781b ldrb r3, [r3, #0]
8011d52: b2db uxtb r3, r3
8011d54: 607b str r3, [r7, #4]
/* Determine the number of priority bits available. First write to all
possible bits. */
*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
8011d56: 697b ldr r3, [r7, #20]
8011d58: 22ff movs r2, #255 @ 0xff
8011d5a: 701a strb r2, [r3, #0]
/* Read the value back to see how many bits stuck. */
ucMaxPriorityValue = *pucFirstUserPriorityRegister;
8011d5c: 697b ldr r3, [r7, #20]
8011d5e: 781b ldrb r3, [r3, #0]
8011d60: b2db uxtb r3, r3
8011d62: 70fb strb r3, [r7, #3]
/* Use the same mask on the maximum system call priority. */
ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
8011d64: 78fb ldrb r3, [r7, #3]
8011d66: b2db uxtb r3, r3
8011d68: f003 0350 and.w r3, r3, #80 @ 0x50
8011d6c: b2da uxtb r2, r3
8011d6e: 4b31 ldr r3, [pc, #196] @ (8011e34 <xPortStartScheduler+0x134>)
8011d70: 701a strb r2, [r3, #0]
/* Calculate the maximum acceptable priority group value for the number
of bits read back. */
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
8011d72: 4b31 ldr r3, [pc, #196] @ (8011e38 <xPortStartScheduler+0x138>)
8011d74: 2207 movs r2, #7
8011d76: 601a str r2, [r3, #0]
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
8011d78: e009 b.n 8011d8e <xPortStartScheduler+0x8e>
{
ulMaxPRIGROUPValue--;
8011d7a: 4b2f ldr r3, [pc, #188] @ (8011e38 <xPortStartScheduler+0x138>)
8011d7c: 681b ldr r3, [r3, #0]
8011d7e: 3b01 subs r3, #1
8011d80: 4a2d ldr r2, [pc, #180] @ (8011e38 <xPortStartScheduler+0x138>)
8011d82: 6013 str r3, [r2, #0]
ucMaxPriorityValue <<= ( uint8_t ) 0x01;
8011d84: 78fb ldrb r3, [r7, #3]
8011d86: b2db uxtb r3, r3
8011d88: 005b lsls r3, r3, #1
8011d8a: b2db uxtb r3, r3
8011d8c: 70fb strb r3, [r7, #3]
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
8011d8e: 78fb ldrb r3, [r7, #3]
8011d90: b2db uxtb r3, r3
8011d92: f003 0380 and.w r3, r3, #128 @ 0x80
8011d96: 2b80 cmp r3, #128 @ 0x80
8011d98: d0ef beq.n 8011d7a <xPortStartScheduler+0x7a>
#ifdef configPRIO_BITS
{
/* Check the FreeRTOS configuration that defines the number of
priority bits matches the number of priority bits actually queried
from the hardware. */
configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
8011d9a: 4b27 ldr r3, [pc, #156] @ (8011e38 <xPortStartScheduler+0x138>)
8011d9c: 681b ldr r3, [r3, #0]
8011d9e: f1c3 0307 rsb r3, r3, #7
8011da2: 2b04 cmp r3, #4
8011da4: d00b beq.n 8011dbe <xPortStartScheduler+0xbe>
__asm volatile
8011da6: f04f 0350 mov.w r3, #80 @ 0x50
8011daa: f383 8811 msr BASEPRI, r3
8011dae: f3bf 8f6f isb sy
8011db2: f3bf 8f4f dsb sy
8011db6: 60bb str r3, [r7, #8]
}
8011db8: bf00 nop
8011dba: bf00 nop
8011dbc: e7fd b.n 8011dba <xPortStartScheduler+0xba>
}
#endif
/* Shift the priority group value back to its position within the AIRCR
register. */
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
8011dbe: 4b1e ldr r3, [pc, #120] @ (8011e38 <xPortStartScheduler+0x138>)
8011dc0: 681b ldr r3, [r3, #0]
8011dc2: 021b lsls r3, r3, #8
8011dc4: 4a1c ldr r2, [pc, #112] @ (8011e38 <xPortStartScheduler+0x138>)
8011dc6: 6013 str r3, [r2, #0]
ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
8011dc8: 4b1b ldr r3, [pc, #108] @ (8011e38 <xPortStartScheduler+0x138>)
8011dca: 681b ldr r3, [r3, #0]
8011dcc: f403 63e0 and.w r3, r3, #1792 @ 0x700
8011dd0: 4a19 ldr r2, [pc, #100] @ (8011e38 <xPortStartScheduler+0x138>)
8011dd2: 6013 str r3, [r2, #0]
/* Restore the clobbered interrupt priority register to its original
value. */
*pucFirstUserPriorityRegister = ulOriginalPriority;
8011dd4: 687b ldr r3, [r7, #4]
8011dd6: b2da uxtb r2, r3
8011dd8: 697b ldr r3, [r7, #20]
8011dda: 701a strb r2, [r3, #0]
}
#endif /* conifgASSERT_DEFINED */
/* Make PendSV and SysTick the lowest priority interrupts. */
portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
8011ddc: 4b17 ldr r3, [pc, #92] @ (8011e3c <xPortStartScheduler+0x13c>)
8011dde: 681b ldr r3, [r3, #0]
8011de0: 4a16 ldr r2, [pc, #88] @ (8011e3c <xPortStartScheduler+0x13c>)
8011de2: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000
8011de6: 6013 str r3, [r2, #0]
portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
8011de8: 4b14 ldr r3, [pc, #80] @ (8011e3c <xPortStartScheduler+0x13c>)
8011dea: 681b ldr r3, [r3, #0]
8011dec: 4a13 ldr r2, [pc, #76] @ (8011e3c <xPortStartScheduler+0x13c>)
8011dee: f043 4370 orr.w r3, r3, #4026531840 @ 0xf0000000
8011df2: 6013 str r3, [r2, #0]
/* Start the timer that generates the tick ISR. Interrupts are disabled
here already. */
vPortSetupTimerInterrupt();
8011df4: f000 f8da bl 8011fac <vPortSetupTimerInterrupt>
/* Initialise the critical nesting count ready for the first task. */
uxCriticalNesting = 0;
8011df8: 4b11 ldr r3, [pc, #68] @ (8011e40 <xPortStartScheduler+0x140>)
8011dfa: 2200 movs r2, #0
8011dfc: 601a str r2, [r3, #0]
/* Ensure the VFP is enabled - it should be anyway. */
vPortEnableVFP();
8011dfe: f000 f8f9 bl 8011ff4 <vPortEnableVFP>
/* Lazy save always. */
*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
8011e02: 4b10 ldr r3, [pc, #64] @ (8011e44 <xPortStartScheduler+0x144>)
8011e04: 681b ldr r3, [r3, #0]
8011e06: 4a0f ldr r2, [pc, #60] @ (8011e44 <xPortStartScheduler+0x144>)
8011e08: f043 4340 orr.w r3, r3, #3221225472 @ 0xc0000000
8011e0c: 6013 str r3, [r2, #0]
/* Start the first task. */
prvPortStartFirstTask();
8011e0e: f7ff ff63 bl 8011cd8 <prvPortStartFirstTask>
exit error function to prevent compiler warnings about a static function
not being called in the case that the application writer overrides this
functionality by defining configTASK_RETURN_ADDRESS. Call
vTaskSwitchContext() so link time optimisation does not remove the
symbol. */
vTaskSwitchContext();
8011e12: f7ff fa71 bl 80112f8 <vTaskSwitchContext>
prvTaskExitError();
8011e16: f7ff ff19 bl 8011c4c <prvTaskExitError>
/* Should not get here! */
return 0;
8011e1a: 2300 movs r3, #0
}
8011e1c: 4618 mov r0, r3
8011e1e: 3718 adds r7, #24
8011e20: 46bd mov sp, r7
8011e22: bd80 pop {r7, pc}
8011e24: e000ed00 .word 0xe000ed00
8011e28: 410fc271 .word 0x410fc271
8011e2c: 410fc270 .word 0x410fc270
8011e30: e000e400 .word 0xe000e400
8011e34: 200102c4 .word 0x200102c4
8011e38: 200102c8 .word 0x200102c8
8011e3c: e000ed20 .word 0xe000ed20
8011e40: 200000a0 .word 0x200000a0
8011e44: e000ef34 .word 0xe000ef34
08011e48 <vPortEnterCritical>:
configASSERT( uxCriticalNesting == 1000UL );
}
/*-----------------------------------------------------------*/
void vPortEnterCritical( void )
{
8011e48: b480 push {r7}
8011e4a: b083 sub sp, #12
8011e4c: af00 add r7, sp, #0
__asm volatile
8011e4e: f04f 0350 mov.w r3, #80 @ 0x50
8011e52: f383 8811 msr BASEPRI, r3
8011e56: f3bf 8f6f isb sy
8011e5a: f3bf 8f4f dsb sy
8011e5e: 607b str r3, [r7, #4]
}
8011e60: bf00 nop
portDISABLE_INTERRUPTS();
uxCriticalNesting++;
8011e62: 4b10 ldr r3, [pc, #64] @ (8011ea4 <vPortEnterCritical+0x5c>)
8011e64: 681b ldr r3, [r3, #0]
8011e66: 3301 adds r3, #1
8011e68: 4a0e ldr r2, [pc, #56] @ (8011ea4 <vPortEnterCritical+0x5c>)
8011e6a: 6013 str r3, [r2, #0]
/* This is not the interrupt safe version of the enter critical function so
assert() if it is being called from an interrupt context. Only API
functions that end in "FromISR" can be used in an interrupt. Only assert if
the critical nesting count is 1 to protect against recursive calls if the
assert function also uses a critical section. */
if( uxCriticalNesting == 1 )
8011e6c: 4b0d ldr r3, [pc, #52] @ (8011ea4 <vPortEnterCritical+0x5c>)
8011e6e: 681b ldr r3, [r3, #0]
8011e70: 2b01 cmp r3, #1
8011e72: d110 bne.n 8011e96 <vPortEnterCritical+0x4e>
{
configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
8011e74: 4b0c ldr r3, [pc, #48] @ (8011ea8 <vPortEnterCritical+0x60>)
8011e76: 681b ldr r3, [r3, #0]
8011e78: b2db uxtb r3, r3
8011e7a: 2b00 cmp r3, #0
8011e7c: d00b beq.n 8011e96 <vPortEnterCritical+0x4e>
__asm volatile
8011e7e: f04f 0350 mov.w r3, #80 @ 0x50
8011e82: f383 8811 msr BASEPRI, r3
8011e86: f3bf 8f6f isb sy
8011e8a: f3bf 8f4f dsb sy
8011e8e: 603b str r3, [r7, #0]
}
8011e90: bf00 nop
8011e92: bf00 nop
8011e94: e7fd b.n 8011e92 <vPortEnterCritical+0x4a>
}
}
8011e96: bf00 nop
8011e98: 370c adds r7, #12
8011e9a: 46bd mov sp, r7
8011e9c: f85d 7b04 ldr.w r7, [sp], #4
8011ea0: 4770 bx lr
8011ea2: bf00 nop
8011ea4: 200000a0 .word 0x200000a0
8011ea8: e000ed04 .word 0xe000ed04
08011eac <vPortExitCritical>:
/*-----------------------------------------------------------*/
void vPortExitCritical( void )
{
8011eac: b480 push {r7}
8011eae: b083 sub sp, #12
8011eb0: af00 add r7, sp, #0
configASSERT( uxCriticalNesting );
8011eb2: 4b12 ldr r3, [pc, #72] @ (8011efc <vPortExitCritical+0x50>)
8011eb4: 681b ldr r3, [r3, #0]
8011eb6: 2b00 cmp r3, #0
8011eb8: d10b bne.n 8011ed2 <vPortExitCritical+0x26>
__asm volatile
8011eba: f04f 0350 mov.w r3, #80 @ 0x50
8011ebe: f383 8811 msr BASEPRI, r3
8011ec2: f3bf 8f6f isb sy
8011ec6: f3bf 8f4f dsb sy
8011eca: 607b str r3, [r7, #4]
}
8011ecc: bf00 nop
8011ece: bf00 nop
8011ed0: e7fd b.n 8011ece <vPortExitCritical+0x22>
uxCriticalNesting--;
8011ed2: 4b0a ldr r3, [pc, #40] @ (8011efc <vPortExitCritical+0x50>)
8011ed4: 681b ldr r3, [r3, #0]
8011ed6: 3b01 subs r3, #1
8011ed8: 4a08 ldr r2, [pc, #32] @ (8011efc <vPortExitCritical+0x50>)
8011eda: 6013 str r3, [r2, #0]
if( uxCriticalNesting == 0 )
8011edc: 4b07 ldr r3, [pc, #28] @ (8011efc <vPortExitCritical+0x50>)
8011ede: 681b ldr r3, [r3, #0]
8011ee0: 2b00 cmp r3, #0
8011ee2: d105 bne.n 8011ef0 <vPortExitCritical+0x44>
8011ee4: 2300 movs r3, #0
8011ee6: 603b str r3, [r7, #0]
__asm volatile
8011ee8: 683b ldr r3, [r7, #0]
8011eea: f383 8811 msr BASEPRI, r3
}
8011eee: bf00 nop
{
portENABLE_INTERRUPTS();
}
}
8011ef0: bf00 nop
8011ef2: 370c adds r7, #12
8011ef4: 46bd mov sp, r7
8011ef6: f85d 7b04 ldr.w r7, [sp], #4
8011efa: 4770 bx lr
8011efc: 200000a0 .word 0x200000a0
08011f00 <PendSV_Handler>:
void xPortPendSVHandler( void )
{
/* This is a naked function. */
__asm volatile
8011f00: f3ef 8009 mrs r0, PSP
8011f04: f3bf 8f6f isb sy
8011f08: 4b15 ldr r3, [pc, #84] @ (8011f60 <pxCurrentTCBConst>)
8011f0a: 681a ldr r2, [r3, #0]
8011f0c: f01e 0f10 tst.w lr, #16
8011f10: bf08 it eq
8011f12: ed20 8a10 vstmdbeq r0!, {s16-s31}
8011f16: e920 4ff0 stmdb r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
8011f1a: 6010 str r0, [r2, #0]
8011f1c: e92d 0009 stmdb sp!, {r0, r3}
8011f20: f04f 0050 mov.w r0, #80 @ 0x50
8011f24: f380 8811 msr BASEPRI, r0
8011f28: f3bf 8f4f dsb sy
8011f2c: f3bf 8f6f isb sy
8011f30: f7ff f9e2 bl 80112f8 <vTaskSwitchContext>
8011f34: f04f 0000 mov.w r0, #0
8011f38: f380 8811 msr BASEPRI, r0
8011f3c: bc09 pop {r0, r3}
8011f3e: 6819 ldr r1, [r3, #0]
8011f40: 6808 ldr r0, [r1, #0]
8011f42: e8b0 4ff0 ldmia.w r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
8011f46: f01e 0f10 tst.w lr, #16
8011f4a: bf08 it eq
8011f4c: ecb0 8a10 vldmiaeq r0!, {s16-s31}
8011f50: f380 8809 msr PSP, r0
8011f54: f3bf 8f6f isb sy
8011f58: 4770 bx lr
8011f5a: bf00 nop
8011f5c: f3af 8000 nop.w
08011f60 <pxCurrentTCBConst>:
8011f60: 20010198 .word 0x20010198
" \n"
" .align 4 \n"
"pxCurrentTCBConst: .word pxCurrentTCB \n"
::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
);
}
8011f64: bf00 nop
8011f66: bf00 nop
08011f68 <SysTick_Handler>:
/*-----------------------------------------------------------*/
void xPortSysTickHandler( void )
{
8011f68: b580 push {r7, lr}
8011f6a: b082 sub sp, #8
8011f6c: af00 add r7, sp, #0
__asm volatile
8011f6e: f04f 0350 mov.w r3, #80 @ 0x50
8011f72: f383 8811 msr BASEPRI, r3
8011f76: f3bf 8f6f isb sy
8011f7a: f3bf 8f4f dsb sy
8011f7e: 607b str r3, [r7, #4]
}
8011f80: bf00 nop
save and then restore the interrupt mask value as its value is already
known. */
portDISABLE_INTERRUPTS();
{
/* Increment the RTOS tick. */
if( xTaskIncrementTick() != pdFALSE )
8011f82: f7ff f8ff bl 8011184 <xTaskIncrementTick>
8011f86: 4603 mov r3, r0
8011f88: 2b00 cmp r3, #0
8011f8a: d003 beq.n 8011f94 <SysTick_Handler+0x2c>
{
/* A context switch is required. Context switching is performed in
the PendSV interrupt. Pend the PendSV interrupt. */
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
8011f8c: 4b06 ldr r3, [pc, #24] @ (8011fa8 <SysTick_Handler+0x40>)
8011f8e: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8011f92: 601a str r2, [r3, #0]
8011f94: 2300 movs r3, #0
8011f96: 603b str r3, [r7, #0]
__asm volatile
8011f98: 683b ldr r3, [r7, #0]
8011f9a: f383 8811 msr BASEPRI, r3
}
8011f9e: bf00 nop
}
}
portENABLE_INTERRUPTS();
}
8011fa0: bf00 nop
8011fa2: 3708 adds r7, #8
8011fa4: 46bd mov sp, r7
8011fa6: bd80 pop {r7, pc}
8011fa8: e000ed04 .word 0xe000ed04
08011fac <vPortSetupTimerInterrupt>:
/*
* Setup the systick timer to generate the tick interrupts at the required
* frequency.
*/
__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
{
8011fac: b480 push {r7}
8011fae: af00 add r7, sp, #0
ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
}
#endif /* configUSE_TICKLESS_IDLE */
/* Stop and clear the SysTick. */
portNVIC_SYSTICK_CTRL_REG = 0UL;
8011fb0: 4b0b ldr r3, [pc, #44] @ (8011fe0 <vPortSetupTimerInterrupt+0x34>)
8011fb2: 2200 movs r2, #0
8011fb4: 601a str r2, [r3, #0]
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
8011fb6: 4b0b ldr r3, [pc, #44] @ (8011fe4 <vPortSetupTimerInterrupt+0x38>)
8011fb8: 2200 movs r2, #0
8011fba: 601a str r2, [r3, #0]
/* Configure SysTick to interrupt at the requested rate. */
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
8011fbc: 4b0a ldr r3, [pc, #40] @ (8011fe8 <vPortSetupTimerInterrupt+0x3c>)
8011fbe: 681b ldr r3, [r3, #0]
8011fc0: 4a0a ldr r2, [pc, #40] @ (8011fec <vPortSetupTimerInterrupt+0x40>)
8011fc2: fba2 2303 umull r2, r3, r2, r3
8011fc6: 099b lsrs r3, r3, #6
8011fc8: 4a09 ldr r2, [pc, #36] @ (8011ff0 <vPortSetupTimerInterrupt+0x44>)
8011fca: 3b01 subs r3, #1
8011fcc: 6013 str r3, [r2, #0]
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
8011fce: 4b04 ldr r3, [pc, #16] @ (8011fe0 <vPortSetupTimerInterrupt+0x34>)
8011fd0: 2207 movs r2, #7
8011fd2: 601a str r2, [r3, #0]
}
8011fd4: bf00 nop
8011fd6: 46bd mov sp, r7
8011fd8: f85d 7b04 ldr.w r7, [sp], #4
8011fdc: 4770 bx lr
8011fde: bf00 nop
8011fe0: e000e010 .word 0xe000e010
8011fe4: e000e018 .word 0xe000e018
8011fe8: 20000000 .word 0x20000000
8011fec: 10624dd3 .word 0x10624dd3
8011ff0: e000e014 .word 0xe000e014
08011ff4 <vPortEnableVFP>:
/*-----------------------------------------------------------*/
/* This is a naked function. */
static void vPortEnableVFP( void )
{
__asm volatile
8011ff4: f8df 000c ldr.w r0, [pc, #12] @ 8012004 <vPortEnableVFP+0x10>
8011ff8: 6801 ldr r1, [r0, #0]
8011ffa: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000
8011ffe: 6001 str r1, [r0, #0]
8012000: 4770 bx lr
" \n"
" orr r1, r1, #( 0xf << 20 ) \n" /* Enable CP10 and CP11 coprocessors, then save back. */
" str r1, [r0] \n"
" bx r14 "
);
}
8012002: bf00 nop
8012004: e000ed88 .word 0xe000ed88
08012008 <vPortValidateInterruptPriority>:
/*-----------------------------------------------------------*/
#if( configASSERT_DEFINED == 1 )
void vPortValidateInterruptPriority( void )
{
8012008: b480 push {r7}
801200a: b085 sub sp, #20
801200c: af00 add r7, sp, #0
uint32_t ulCurrentInterrupt;
uint8_t ucCurrentPriority;
/* Obtain the number of the currently executing interrupt. */
__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
801200e: f3ef 8305 mrs r3, IPSR
8012012: 60fb str r3, [r7, #12]
/* Is the interrupt number a user defined interrupt? */
if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
8012014: 68fb ldr r3, [r7, #12]
8012016: 2b0f cmp r3, #15
8012018: d915 bls.n 8012046 <vPortValidateInterruptPriority+0x3e>
{
/* Look up the interrupt's priority. */
ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
801201a: 4a18 ldr r2, [pc, #96] @ (801207c <vPortValidateInterruptPriority+0x74>)
801201c: 68fb ldr r3, [r7, #12]
801201e: 4413 add r3, r2
8012020: 781b ldrb r3, [r3, #0]
8012022: 72fb strb r3, [r7, #11]
interrupt entry is as fast and simple as possible.
The following links provide detailed information:
http://www.freertos.org/RTOS-Cortex-M3-M4.html
http://www.freertos.org/FAQHelp.html */
configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
8012024: 4b16 ldr r3, [pc, #88] @ (8012080 <vPortValidateInterruptPriority+0x78>)
8012026: 781b ldrb r3, [r3, #0]
8012028: 7afa ldrb r2, [r7, #11]
801202a: 429a cmp r2, r3
801202c: d20b bcs.n 8012046 <vPortValidateInterruptPriority+0x3e>
__asm volatile
801202e: f04f 0350 mov.w r3, #80 @ 0x50
8012032: f383 8811 msr BASEPRI, r3
8012036: f3bf 8f6f isb sy
801203a: f3bf 8f4f dsb sy
801203e: 607b str r3, [r7, #4]
}
8012040: bf00 nop
8012042: bf00 nop
8012044: e7fd b.n 8012042 <vPortValidateInterruptPriority+0x3a>
configuration then the correct setting can be achieved on all Cortex-M
devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
scheduler. Note however that some vendor specific peripheral libraries
assume a non-zero priority group setting, in which cases using a value
of zero will result in unpredictable behaviour. */
configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
8012046: 4b0f ldr r3, [pc, #60] @ (8012084 <vPortValidateInterruptPriority+0x7c>)
8012048: 681b ldr r3, [r3, #0]
801204a: f403 62e0 and.w r2, r3, #1792 @ 0x700
801204e: 4b0e ldr r3, [pc, #56] @ (8012088 <vPortValidateInterruptPriority+0x80>)
8012050: 681b ldr r3, [r3, #0]
8012052: 429a cmp r2, r3
8012054: d90b bls.n 801206e <vPortValidateInterruptPriority+0x66>
__asm volatile
8012056: f04f 0350 mov.w r3, #80 @ 0x50
801205a: f383 8811 msr BASEPRI, r3
801205e: f3bf 8f6f isb sy
8012062: f3bf 8f4f dsb sy
8012066: 603b str r3, [r7, #0]
}
8012068: bf00 nop
801206a: bf00 nop
801206c: e7fd b.n 801206a <vPortValidateInterruptPriority+0x62>
}
801206e: bf00 nop
8012070: 3714 adds r7, #20
8012072: 46bd mov sp, r7
8012074: f85d 7b04 ldr.w r7, [sp], #4
8012078: 4770 bx lr
801207a: bf00 nop
801207c: e000e3f0 .word 0xe000e3f0
8012080: 200102c4 .word 0x200102c4
8012084: e000ed0c .word 0xe000ed0c
8012088: 200102c8 .word 0x200102c8
0801208c <pvPortMalloc>:
static size_t xBlockAllocatedBit = 0;
/*-----------------------------------------------------------*/
void *pvPortMalloc( size_t xWantedSize )
{
801208c: b580 push {r7, lr}
801208e: b08a sub sp, #40 @ 0x28
8012090: af00 add r7, sp, #0
8012092: 6078 str r0, [r7, #4]
BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
void *pvReturn = NULL;
8012094: 2300 movs r3, #0
8012096: 61fb str r3, [r7, #28]
vTaskSuspendAll();
8012098: f7fe ffc8 bl 801102c <vTaskSuspendAll>
{
/* If this is the first call to malloc then the heap will require
initialisation to setup the list of free blocks. */
if( pxEnd == NULL )
801209c: 4b5c ldr r3, [pc, #368] @ (8012210 <pvPortMalloc+0x184>)
801209e: 681b ldr r3, [r3, #0]
80120a0: 2b00 cmp r3, #0
80120a2: d101 bne.n 80120a8 <pvPortMalloc+0x1c>
{
prvHeapInit();
80120a4: f000 f924 bl 80122f0 <prvHeapInit>
/* Check the requested block size is not so large that the top bit is
set. The top bit of the block size member of the BlockLink_t structure
is used to determine who owns the block - the application or the
kernel, so it must be free. */
if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
80120a8: 4b5a ldr r3, [pc, #360] @ (8012214 <pvPortMalloc+0x188>)
80120aa: 681a ldr r2, [r3, #0]
80120ac: 687b ldr r3, [r7, #4]
80120ae: 4013 ands r3, r2
80120b0: 2b00 cmp r3, #0
80120b2: f040 8095 bne.w 80121e0 <pvPortMalloc+0x154>
{
/* The wanted size is increased so it can contain a BlockLink_t
structure in addition to the requested amount of bytes. */
if( xWantedSize > 0 )
80120b6: 687b ldr r3, [r7, #4]
80120b8: 2b00 cmp r3, #0
80120ba: d01e beq.n 80120fa <pvPortMalloc+0x6e>
{
xWantedSize += xHeapStructSize;
80120bc: 2208 movs r2, #8
80120be: 687b ldr r3, [r7, #4]
80120c0: 4413 add r3, r2
80120c2: 607b str r3, [r7, #4]
/* Ensure that blocks are always aligned to the required number
of bytes. */
if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
80120c4: 687b ldr r3, [r7, #4]
80120c6: f003 0307 and.w r3, r3, #7
80120ca: 2b00 cmp r3, #0
80120cc: d015 beq.n 80120fa <pvPortMalloc+0x6e>
{
/* Byte alignment required. */
xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
80120ce: 687b ldr r3, [r7, #4]
80120d0: f023 0307 bic.w r3, r3, #7
80120d4: 3308 adds r3, #8
80120d6: 607b str r3, [r7, #4]
configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
80120d8: 687b ldr r3, [r7, #4]
80120da: f003 0307 and.w r3, r3, #7
80120de: 2b00 cmp r3, #0
80120e0: d00b beq.n 80120fa <pvPortMalloc+0x6e>
__asm volatile
80120e2: f04f 0350 mov.w r3, #80 @ 0x50
80120e6: f383 8811 msr BASEPRI, r3
80120ea: f3bf 8f6f isb sy
80120ee: f3bf 8f4f dsb sy
80120f2: 617b str r3, [r7, #20]
}
80120f4: bf00 nop
80120f6: bf00 nop
80120f8: e7fd b.n 80120f6 <pvPortMalloc+0x6a>
else
{
mtCOVERAGE_TEST_MARKER();
}
if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
80120fa: 687b ldr r3, [r7, #4]
80120fc: 2b00 cmp r3, #0
80120fe: d06f beq.n 80121e0 <pvPortMalloc+0x154>
8012100: 4b45 ldr r3, [pc, #276] @ (8012218 <pvPortMalloc+0x18c>)
8012102: 681b ldr r3, [r3, #0]
8012104: 687a ldr r2, [r7, #4]
8012106: 429a cmp r2, r3
8012108: d86a bhi.n 80121e0 <pvPortMalloc+0x154>
{
/* Traverse the list from the start (lowest address) block until
one of adequate size is found. */
pxPreviousBlock = &xStart;
801210a: 4b44 ldr r3, [pc, #272] @ (801221c <pvPortMalloc+0x190>)
801210c: 623b str r3, [r7, #32]
pxBlock = xStart.pxNextFreeBlock;
801210e: 4b43 ldr r3, [pc, #268] @ (801221c <pvPortMalloc+0x190>)
8012110: 681b ldr r3, [r3, #0]
8012112: 627b str r3, [r7, #36] @ 0x24
while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
8012114: e004 b.n 8012120 <pvPortMalloc+0x94>
{
pxPreviousBlock = pxBlock;
8012116: 6a7b ldr r3, [r7, #36] @ 0x24
8012118: 623b str r3, [r7, #32]
pxBlock = pxBlock->pxNextFreeBlock;
801211a: 6a7b ldr r3, [r7, #36] @ 0x24
801211c: 681b ldr r3, [r3, #0]
801211e: 627b str r3, [r7, #36] @ 0x24
while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
8012120: 6a7b ldr r3, [r7, #36] @ 0x24
8012122: 685b ldr r3, [r3, #4]
8012124: 687a ldr r2, [r7, #4]
8012126: 429a cmp r2, r3
8012128: d903 bls.n 8012132 <pvPortMalloc+0xa6>
801212a: 6a7b ldr r3, [r7, #36] @ 0x24
801212c: 681b ldr r3, [r3, #0]
801212e: 2b00 cmp r3, #0
8012130: d1f1 bne.n 8012116 <pvPortMalloc+0x8a>
}
/* If the end marker was reached then a block of adequate size
was not found. */
if( pxBlock != pxEnd )
8012132: 4b37 ldr r3, [pc, #220] @ (8012210 <pvPortMalloc+0x184>)
8012134: 681b ldr r3, [r3, #0]
8012136: 6a7a ldr r2, [r7, #36] @ 0x24
8012138: 429a cmp r2, r3
801213a: d051 beq.n 80121e0 <pvPortMalloc+0x154>
{
/* Return the memory space pointed to - jumping over the
BlockLink_t structure at its start. */
pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
801213c: 6a3b ldr r3, [r7, #32]
801213e: 681b ldr r3, [r3, #0]
8012140: 2208 movs r2, #8
8012142: 4413 add r3, r2
8012144: 61fb str r3, [r7, #28]
/* This block is being returned for use so must be taken out
of the list of free blocks. */
pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
8012146: 6a7b ldr r3, [r7, #36] @ 0x24
8012148: 681a ldr r2, [r3, #0]
801214a: 6a3b ldr r3, [r7, #32]
801214c: 601a str r2, [r3, #0]
/* If the block is larger than required it can be split into
two. */
if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
801214e: 6a7b ldr r3, [r7, #36] @ 0x24
8012150: 685a ldr r2, [r3, #4]
8012152: 687b ldr r3, [r7, #4]
8012154: 1ad2 subs r2, r2, r3
8012156: 2308 movs r3, #8
8012158: 005b lsls r3, r3, #1
801215a: 429a cmp r2, r3
801215c: d920 bls.n 80121a0 <pvPortMalloc+0x114>
{
/* This block is to be split into two. Create a new
block following the number of bytes requested. The void
cast is used to prevent byte alignment warnings from the
compiler. */
pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
801215e: 6a7a ldr r2, [r7, #36] @ 0x24
8012160: 687b ldr r3, [r7, #4]
8012162: 4413 add r3, r2
8012164: 61bb str r3, [r7, #24]
configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
8012166: 69bb ldr r3, [r7, #24]
8012168: f003 0307 and.w r3, r3, #7
801216c: 2b00 cmp r3, #0
801216e: d00b beq.n 8012188 <pvPortMalloc+0xfc>
__asm volatile
8012170: f04f 0350 mov.w r3, #80 @ 0x50
8012174: f383 8811 msr BASEPRI, r3
8012178: f3bf 8f6f isb sy
801217c: f3bf 8f4f dsb sy
8012180: 613b str r3, [r7, #16]
}
8012182: bf00 nop
8012184: bf00 nop
8012186: e7fd b.n 8012184 <pvPortMalloc+0xf8>
/* Calculate the sizes of two blocks split from the
single block. */
pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
8012188: 6a7b ldr r3, [r7, #36] @ 0x24
801218a: 685a ldr r2, [r3, #4]
801218c: 687b ldr r3, [r7, #4]
801218e: 1ad2 subs r2, r2, r3
8012190: 69bb ldr r3, [r7, #24]
8012192: 605a str r2, [r3, #4]
pxBlock->xBlockSize = xWantedSize;
8012194: 6a7b ldr r3, [r7, #36] @ 0x24
8012196: 687a ldr r2, [r7, #4]
8012198: 605a str r2, [r3, #4]
/* Insert the new block into the list of free blocks. */
prvInsertBlockIntoFreeList( pxNewBlockLink );
801219a: 69b8 ldr r0, [r7, #24]
801219c: f000 f90a bl 80123b4 <prvInsertBlockIntoFreeList>
else
{
mtCOVERAGE_TEST_MARKER();
}
xFreeBytesRemaining -= pxBlock->xBlockSize;
80121a0: 4b1d ldr r3, [pc, #116] @ (8012218 <pvPortMalloc+0x18c>)
80121a2: 681a ldr r2, [r3, #0]
80121a4: 6a7b ldr r3, [r7, #36] @ 0x24
80121a6: 685b ldr r3, [r3, #4]
80121a8: 1ad3 subs r3, r2, r3
80121aa: 4a1b ldr r2, [pc, #108] @ (8012218 <pvPortMalloc+0x18c>)
80121ac: 6013 str r3, [r2, #0]
if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
80121ae: 4b1a ldr r3, [pc, #104] @ (8012218 <pvPortMalloc+0x18c>)
80121b0: 681a ldr r2, [r3, #0]
80121b2: 4b1b ldr r3, [pc, #108] @ (8012220 <pvPortMalloc+0x194>)
80121b4: 681b ldr r3, [r3, #0]
80121b6: 429a cmp r2, r3
80121b8: d203 bcs.n 80121c2 <pvPortMalloc+0x136>
{
xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
80121ba: 4b17 ldr r3, [pc, #92] @ (8012218 <pvPortMalloc+0x18c>)
80121bc: 681b ldr r3, [r3, #0]
80121be: 4a18 ldr r2, [pc, #96] @ (8012220 <pvPortMalloc+0x194>)
80121c0: 6013 str r3, [r2, #0]
mtCOVERAGE_TEST_MARKER();
}
/* The block is being returned - it is allocated and owned
by the application and has no "next" block. */
pxBlock->xBlockSize |= xBlockAllocatedBit;
80121c2: 6a7b ldr r3, [r7, #36] @ 0x24
80121c4: 685a ldr r2, [r3, #4]
80121c6: 4b13 ldr r3, [pc, #76] @ (8012214 <pvPortMalloc+0x188>)
80121c8: 681b ldr r3, [r3, #0]
80121ca: 431a orrs r2, r3
80121cc: 6a7b ldr r3, [r7, #36] @ 0x24
80121ce: 605a str r2, [r3, #4]
pxBlock->pxNextFreeBlock = NULL;
80121d0: 6a7b ldr r3, [r7, #36] @ 0x24
80121d2: 2200 movs r2, #0
80121d4: 601a str r2, [r3, #0]
xNumberOfSuccessfulAllocations++;
80121d6: 4b13 ldr r3, [pc, #76] @ (8012224 <pvPortMalloc+0x198>)
80121d8: 681b ldr r3, [r3, #0]
80121da: 3301 adds r3, #1
80121dc: 4a11 ldr r2, [pc, #68] @ (8012224 <pvPortMalloc+0x198>)
80121de: 6013 str r3, [r2, #0]
mtCOVERAGE_TEST_MARKER();
}
traceMALLOC( pvReturn, xWantedSize );
}
( void ) xTaskResumeAll();
80121e0: f7fe ff32 bl 8011048 <xTaskResumeAll>
mtCOVERAGE_TEST_MARKER();
}
}
#endif
configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
80121e4: 69fb ldr r3, [r7, #28]
80121e6: f003 0307 and.w r3, r3, #7
80121ea: 2b00 cmp r3, #0
80121ec: d00b beq.n 8012206 <pvPortMalloc+0x17a>
__asm volatile
80121ee: f04f 0350 mov.w r3, #80 @ 0x50
80121f2: f383 8811 msr BASEPRI, r3
80121f6: f3bf 8f6f isb sy
80121fa: f3bf 8f4f dsb sy
80121fe: 60fb str r3, [r7, #12]
}
8012200: bf00 nop
8012202: bf00 nop
8012204: e7fd b.n 8012202 <pvPortMalloc+0x176>
return pvReturn;
8012206: 69fb ldr r3, [r7, #28]
}
8012208: 4618 mov r0, r3
801220a: 3728 adds r7, #40 @ 0x28
801220c: 46bd mov sp, r7
801220e: bd80 pop {r7, pc}
8012210: 20013ed4 .word 0x20013ed4
8012214: 20013ee8 .word 0x20013ee8
8012218: 20013ed8 .word 0x20013ed8
801221c: 20013ecc .word 0x20013ecc
8012220: 20013edc .word 0x20013edc
8012224: 20013ee0 .word 0x20013ee0
08012228 <vPortFree>:
/*-----------------------------------------------------------*/
void vPortFree( void *pv )
{
8012228: b580 push {r7, lr}
801222a: b086 sub sp, #24
801222c: af00 add r7, sp, #0
801222e: 6078 str r0, [r7, #4]
uint8_t *puc = ( uint8_t * ) pv;
8012230: 687b ldr r3, [r7, #4]
8012232: 617b str r3, [r7, #20]
BlockLink_t *pxLink;
if( pv != NULL )
8012234: 687b ldr r3, [r7, #4]
8012236: 2b00 cmp r3, #0
8012238: d04f beq.n 80122da <vPortFree+0xb2>
{
/* The memory being freed will have an BlockLink_t structure immediately
before it. */
puc -= xHeapStructSize;
801223a: 2308 movs r3, #8
801223c: 425b negs r3, r3
801223e: 697a ldr r2, [r7, #20]
8012240: 4413 add r3, r2
8012242: 617b str r3, [r7, #20]
/* This casting is to keep the compiler from issuing warnings. */
pxLink = ( void * ) puc;
8012244: 697b ldr r3, [r7, #20]
8012246: 613b str r3, [r7, #16]
/* Check the block is actually allocated. */
configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
8012248: 693b ldr r3, [r7, #16]
801224a: 685a ldr r2, [r3, #4]
801224c: 4b25 ldr r3, [pc, #148] @ (80122e4 <vPortFree+0xbc>)
801224e: 681b ldr r3, [r3, #0]
8012250: 4013 ands r3, r2
8012252: 2b00 cmp r3, #0
8012254: d10b bne.n 801226e <vPortFree+0x46>
__asm volatile
8012256: f04f 0350 mov.w r3, #80 @ 0x50
801225a: f383 8811 msr BASEPRI, r3
801225e: f3bf 8f6f isb sy
8012262: f3bf 8f4f dsb sy
8012266: 60fb str r3, [r7, #12]
}
8012268: bf00 nop
801226a: bf00 nop
801226c: e7fd b.n 801226a <vPortFree+0x42>
configASSERT( pxLink->pxNextFreeBlock == NULL );
801226e: 693b ldr r3, [r7, #16]
8012270: 681b ldr r3, [r3, #0]
8012272: 2b00 cmp r3, #0
8012274: d00b beq.n 801228e <vPortFree+0x66>
__asm volatile
8012276: f04f 0350 mov.w r3, #80 @ 0x50
801227a: f383 8811 msr BASEPRI, r3
801227e: f3bf 8f6f isb sy
8012282: f3bf 8f4f dsb sy
8012286: 60bb str r3, [r7, #8]
}
8012288: bf00 nop
801228a: bf00 nop
801228c: e7fd b.n 801228a <vPortFree+0x62>
if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
801228e: 693b ldr r3, [r7, #16]
8012290: 685a ldr r2, [r3, #4]
8012292: 4b14 ldr r3, [pc, #80] @ (80122e4 <vPortFree+0xbc>)
8012294: 681b ldr r3, [r3, #0]
8012296: 4013 ands r3, r2
8012298: 2b00 cmp r3, #0
801229a: d01e beq.n 80122da <vPortFree+0xb2>
{
if( pxLink->pxNextFreeBlock == NULL )
801229c: 693b ldr r3, [r7, #16]
801229e: 681b ldr r3, [r3, #0]
80122a0: 2b00 cmp r3, #0
80122a2: d11a bne.n 80122da <vPortFree+0xb2>
{
/* The block is being returned to the heap - it is no longer
allocated. */
pxLink->xBlockSize &= ~xBlockAllocatedBit;
80122a4: 693b ldr r3, [r7, #16]
80122a6: 685a ldr r2, [r3, #4]
80122a8: 4b0e ldr r3, [pc, #56] @ (80122e4 <vPortFree+0xbc>)
80122aa: 681b ldr r3, [r3, #0]
80122ac: 43db mvns r3, r3
80122ae: 401a ands r2, r3
80122b0: 693b ldr r3, [r7, #16]
80122b2: 605a str r2, [r3, #4]
vTaskSuspendAll();
80122b4: f7fe feba bl 801102c <vTaskSuspendAll>
{
/* Add this block to the list of free blocks. */
xFreeBytesRemaining += pxLink->xBlockSize;
80122b8: 693b ldr r3, [r7, #16]
80122ba: 685a ldr r2, [r3, #4]
80122bc: 4b0a ldr r3, [pc, #40] @ (80122e8 <vPortFree+0xc0>)
80122be: 681b ldr r3, [r3, #0]
80122c0: 4413 add r3, r2
80122c2: 4a09 ldr r2, [pc, #36] @ (80122e8 <vPortFree+0xc0>)
80122c4: 6013 str r3, [r2, #0]
traceFREE( pv, pxLink->xBlockSize );
prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
80122c6: 6938 ldr r0, [r7, #16]
80122c8: f000 f874 bl 80123b4 <prvInsertBlockIntoFreeList>
xNumberOfSuccessfulFrees++;
80122cc: 4b07 ldr r3, [pc, #28] @ (80122ec <vPortFree+0xc4>)
80122ce: 681b ldr r3, [r3, #0]
80122d0: 3301 adds r3, #1
80122d2: 4a06 ldr r2, [pc, #24] @ (80122ec <vPortFree+0xc4>)
80122d4: 6013 str r3, [r2, #0]
}
( void ) xTaskResumeAll();
80122d6: f7fe feb7 bl 8011048 <xTaskResumeAll>
else
{
mtCOVERAGE_TEST_MARKER();
}
}
}
80122da: bf00 nop
80122dc: 3718 adds r7, #24
80122de: 46bd mov sp, r7
80122e0: bd80 pop {r7, pc}
80122e2: bf00 nop
80122e4: 20013ee8 .word 0x20013ee8
80122e8: 20013ed8 .word 0x20013ed8
80122ec: 20013ee4 .word 0x20013ee4
080122f0 <prvHeapInit>:
/* This just exists to keep the linker quiet. */
}
/*-----------------------------------------------------------*/
static void prvHeapInit( void )
{
80122f0: b480 push {r7}
80122f2: b085 sub sp, #20
80122f4: af00 add r7, sp, #0
BlockLink_t *pxFirstFreeBlock;
uint8_t *pucAlignedHeap;
size_t uxAddress;
size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
80122f6: f44f 5370 mov.w r3, #15360 @ 0x3c00
80122fa: 60bb str r3, [r7, #8]
/* Ensure the heap starts on a correctly aligned boundary. */
uxAddress = ( size_t ) ucHeap;
80122fc: 4b27 ldr r3, [pc, #156] @ (801239c <prvHeapInit+0xac>)
80122fe: 60fb str r3, [r7, #12]
if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
8012300: 68fb ldr r3, [r7, #12]
8012302: f003 0307 and.w r3, r3, #7
8012306: 2b00 cmp r3, #0
8012308: d00c beq.n 8012324 <prvHeapInit+0x34>
{
uxAddress += ( portBYTE_ALIGNMENT - 1 );
801230a: 68fb ldr r3, [r7, #12]
801230c: 3307 adds r3, #7
801230e: 60fb str r3, [r7, #12]
uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
8012310: 68fb ldr r3, [r7, #12]
8012312: f023 0307 bic.w r3, r3, #7
8012316: 60fb str r3, [r7, #12]
xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
8012318: 68ba ldr r2, [r7, #8]
801231a: 68fb ldr r3, [r7, #12]
801231c: 1ad3 subs r3, r2, r3
801231e: 4a1f ldr r2, [pc, #124] @ (801239c <prvHeapInit+0xac>)
8012320: 4413 add r3, r2
8012322: 60bb str r3, [r7, #8]
}
pucAlignedHeap = ( uint8_t * ) uxAddress;
8012324: 68fb ldr r3, [r7, #12]
8012326: 607b str r3, [r7, #4]
/* xStart is used to hold a pointer to the first item in the list of free
blocks. The void cast is used to prevent compiler warnings. */
xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
8012328: 4a1d ldr r2, [pc, #116] @ (80123a0 <prvHeapInit+0xb0>)
801232a: 687b ldr r3, [r7, #4]
801232c: 6013 str r3, [r2, #0]
xStart.xBlockSize = ( size_t ) 0;
801232e: 4b1c ldr r3, [pc, #112] @ (80123a0 <prvHeapInit+0xb0>)
8012330: 2200 movs r2, #0
8012332: 605a str r2, [r3, #4]
/* pxEnd is used to mark the end of the list of free blocks and is inserted
at the end of the heap space. */
uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
8012334: 687b ldr r3, [r7, #4]
8012336: 68ba ldr r2, [r7, #8]
8012338: 4413 add r3, r2
801233a: 60fb str r3, [r7, #12]
uxAddress -= xHeapStructSize;
801233c: 2208 movs r2, #8
801233e: 68fb ldr r3, [r7, #12]
8012340: 1a9b subs r3, r3, r2
8012342: 60fb str r3, [r7, #12]
uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
8012344: 68fb ldr r3, [r7, #12]
8012346: f023 0307 bic.w r3, r3, #7
801234a: 60fb str r3, [r7, #12]
pxEnd = ( void * ) uxAddress;
801234c: 68fb ldr r3, [r7, #12]
801234e: 4a15 ldr r2, [pc, #84] @ (80123a4 <prvHeapInit+0xb4>)
8012350: 6013 str r3, [r2, #0]
pxEnd->xBlockSize = 0;
8012352: 4b14 ldr r3, [pc, #80] @ (80123a4 <prvHeapInit+0xb4>)
8012354: 681b ldr r3, [r3, #0]
8012356: 2200 movs r2, #0
8012358: 605a str r2, [r3, #4]
pxEnd->pxNextFreeBlock = NULL;
801235a: 4b12 ldr r3, [pc, #72] @ (80123a4 <prvHeapInit+0xb4>)
801235c: 681b ldr r3, [r3, #0]
801235e: 2200 movs r2, #0
8012360: 601a str r2, [r3, #0]
/* To start with there is a single free block that is sized to take up the
entire heap space, minus the space taken by pxEnd. */
pxFirstFreeBlock = ( void * ) pucAlignedHeap;
8012362: 687b ldr r3, [r7, #4]
8012364: 603b str r3, [r7, #0]
pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
8012366: 683b ldr r3, [r7, #0]
8012368: 68fa ldr r2, [r7, #12]
801236a: 1ad2 subs r2, r2, r3
801236c: 683b ldr r3, [r7, #0]
801236e: 605a str r2, [r3, #4]
pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
8012370: 4b0c ldr r3, [pc, #48] @ (80123a4 <prvHeapInit+0xb4>)
8012372: 681a ldr r2, [r3, #0]
8012374: 683b ldr r3, [r7, #0]
8012376: 601a str r2, [r3, #0]
/* Only one block exists - and it covers the entire usable heap space. */
xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
8012378: 683b ldr r3, [r7, #0]
801237a: 685b ldr r3, [r3, #4]
801237c: 4a0a ldr r2, [pc, #40] @ (80123a8 <prvHeapInit+0xb8>)
801237e: 6013 str r3, [r2, #0]
xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
8012380: 683b ldr r3, [r7, #0]
8012382: 685b ldr r3, [r3, #4]
8012384: 4a09 ldr r2, [pc, #36] @ (80123ac <prvHeapInit+0xbc>)
8012386: 6013 str r3, [r2, #0]
/* Work out the position of the top bit in a size_t variable. */
xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
8012388: 4b09 ldr r3, [pc, #36] @ (80123b0 <prvHeapInit+0xc0>)
801238a: f04f 4200 mov.w r2, #2147483648 @ 0x80000000
801238e: 601a str r2, [r3, #0]
}
8012390: bf00 nop
8012392: 3714 adds r7, #20
8012394: 46bd mov sp, r7
8012396: f85d 7b04 ldr.w r7, [sp], #4
801239a: 4770 bx lr
801239c: 200102cc .word 0x200102cc
80123a0: 20013ecc .word 0x20013ecc
80123a4: 20013ed4 .word 0x20013ed4
80123a8: 20013edc .word 0x20013edc
80123ac: 20013ed8 .word 0x20013ed8
80123b0: 20013ee8 .word 0x20013ee8
080123b4 <prvInsertBlockIntoFreeList>:
/*-----------------------------------------------------------*/
static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
{
80123b4: b480 push {r7}
80123b6: b085 sub sp, #20
80123b8: af00 add r7, sp, #0
80123ba: 6078 str r0, [r7, #4]
BlockLink_t *pxIterator;
uint8_t *puc;
/* Iterate through the list until a block is found that has a higher address
than the block being inserted. */
for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
80123bc: 4b28 ldr r3, [pc, #160] @ (8012460 <prvInsertBlockIntoFreeList+0xac>)
80123be: 60fb str r3, [r7, #12]
80123c0: e002 b.n 80123c8 <prvInsertBlockIntoFreeList+0x14>
80123c2: 68fb ldr r3, [r7, #12]
80123c4: 681b ldr r3, [r3, #0]
80123c6: 60fb str r3, [r7, #12]
80123c8: 68fb ldr r3, [r7, #12]
80123ca: 681b ldr r3, [r3, #0]
80123cc: 687a ldr r2, [r7, #4]
80123ce: 429a cmp r2, r3
80123d0: d8f7 bhi.n 80123c2 <prvInsertBlockIntoFreeList+0xe>
/* Nothing to do here, just iterate to the right position. */
}
/* Do the block being inserted, and the block it is being inserted after
make a contiguous block of memory? */
puc = ( uint8_t * ) pxIterator;
80123d2: 68fb ldr r3, [r7, #12]
80123d4: 60bb str r3, [r7, #8]
if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
80123d6: 68fb ldr r3, [r7, #12]
80123d8: 685b ldr r3, [r3, #4]
80123da: 68ba ldr r2, [r7, #8]
80123dc: 4413 add r3, r2
80123de: 687a ldr r2, [r7, #4]
80123e0: 429a cmp r2, r3
80123e2: d108 bne.n 80123f6 <prvInsertBlockIntoFreeList+0x42>
{
pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
80123e4: 68fb ldr r3, [r7, #12]
80123e6: 685a ldr r2, [r3, #4]
80123e8: 687b ldr r3, [r7, #4]
80123ea: 685b ldr r3, [r3, #4]
80123ec: 441a add r2, r3
80123ee: 68fb ldr r3, [r7, #12]
80123f0: 605a str r2, [r3, #4]
pxBlockToInsert = pxIterator;
80123f2: 68fb ldr r3, [r7, #12]
80123f4: 607b str r3, [r7, #4]
mtCOVERAGE_TEST_MARKER();
}
/* Do the block being inserted, and the block it is being inserted before
make a contiguous block of memory? */
puc = ( uint8_t * ) pxBlockToInsert;
80123f6: 687b ldr r3, [r7, #4]
80123f8: 60bb str r3, [r7, #8]
if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
80123fa: 687b ldr r3, [r7, #4]
80123fc: 685b ldr r3, [r3, #4]
80123fe: 68ba ldr r2, [r7, #8]
8012400: 441a add r2, r3
8012402: 68fb ldr r3, [r7, #12]
8012404: 681b ldr r3, [r3, #0]
8012406: 429a cmp r2, r3
8012408: d118 bne.n 801243c <prvInsertBlockIntoFreeList+0x88>
{
if( pxIterator->pxNextFreeBlock != pxEnd )
801240a: 68fb ldr r3, [r7, #12]
801240c: 681a ldr r2, [r3, #0]
801240e: 4b15 ldr r3, [pc, #84] @ (8012464 <prvInsertBlockIntoFreeList+0xb0>)
8012410: 681b ldr r3, [r3, #0]
8012412: 429a cmp r2, r3
8012414: d00d beq.n 8012432 <prvInsertBlockIntoFreeList+0x7e>
{
/* Form one big block from the two blocks. */
pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
8012416: 687b ldr r3, [r7, #4]
8012418: 685a ldr r2, [r3, #4]
801241a: 68fb ldr r3, [r7, #12]
801241c: 681b ldr r3, [r3, #0]
801241e: 685b ldr r3, [r3, #4]
8012420: 441a add r2, r3
8012422: 687b ldr r3, [r7, #4]
8012424: 605a str r2, [r3, #4]
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
8012426: 68fb ldr r3, [r7, #12]
8012428: 681b ldr r3, [r3, #0]
801242a: 681a ldr r2, [r3, #0]
801242c: 687b ldr r3, [r7, #4]
801242e: 601a str r2, [r3, #0]
8012430: e008 b.n 8012444 <prvInsertBlockIntoFreeList+0x90>
}
else
{
pxBlockToInsert->pxNextFreeBlock = pxEnd;
8012432: 4b0c ldr r3, [pc, #48] @ (8012464 <prvInsertBlockIntoFreeList+0xb0>)
8012434: 681a ldr r2, [r3, #0]
8012436: 687b ldr r3, [r7, #4]
8012438: 601a str r2, [r3, #0]
801243a: e003 b.n 8012444 <prvInsertBlockIntoFreeList+0x90>
}
}
else
{
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
801243c: 68fb ldr r3, [r7, #12]
801243e: 681a ldr r2, [r3, #0]
8012440: 687b ldr r3, [r7, #4]
8012442: 601a str r2, [r3, #0]
/* If the block being inserted plugged a gab, so was merged with the block
before and the block after, then it's pxNextFreeBlock pointer will have
already been set, and should not be set here as that would make it point
to itself. */
if( pxIterator != pxBlockToInsert )
8012444: 68fa ldr r2, [r7, #12]
8012446: 687b ldr r3, [r7, #4]
8012448: 429a cmp r2, r3
801244a: d002 beq.n 8012452 <prvInsertBlockIntoFreeList+0x9e>
{
pxIterator->pxNextFreeBlock = pxBlockToInsert;
801244c: 68fb ldr r3, [r7, #12]
801244e: 687a ldr r2, [r7, #4]
8012450: 601a str r2, [r3, #0]
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
8012452: bf00 nop
8012454: 3714 adds r7, #20
8012456: 46bd mov sp, r7
8012458: f85d 7b04 ldr.w r7, [sp], #4
801245c: 4770 bx lr
801245e: bf00 nop
8012460: 20013ecc .word 0x20013ecc
8012464: 20013ed4 .word 0x20013ed4
08012468 <MX_USB_DEVICE_DeInit>:
/*
* -- Insert your external function declaration here --
*/
/* USER CODE BEGIN 1 */
void MX_USB_DEVICE_DeInit(void)
{
8012468: b580 push {r7, lr}
801246a: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Stop(&hUsbDeviceFS) != USBD_OK)
801246c: 4808 ldr r0, [pc, #32] @ (8012490 <MX_USB_DEVICE_DeInit+0x28>)
801246e: f7f8 ff92 bl 800b396 <USBD_Stop>
8012472: 4603 mov r3, r0
8012474: 2b00 cmp r3, #0
8012476: d001 beq.n 801247c <MX_USB_DEVICE_DeInit+0x14>
{
Error_Handler();
8012478: f7ee fded bl 8001056 <Error_Handler>
}
if (USBD_DeInit(&hUsbDeviceFS) != USBD_OK)
801247c: 4804 ldr r0, [pc, #16] @ (8012490 <MX_USB_DEVICE_DeInit+0x28>)
801247e: f7f8 ff18 bl 800b2b2 <USBD_DeInit>
8012482: 4603 mov r3, r0
8012484: 2b00 cmp r3, #0
8012486: d001 beq.n 801248c <MX_USB_DEVICE_DeInit+0x24>
{
Error_Handler();
8012488: f7ee fde5 bl 8001056 <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
801248c: bf00 nop
801248e: bd80 pop {r7, pc}
8012490: 20013eec .word 0x20013eec
08012494 <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
8012494: b580 push {r7, lr}
8012496: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
8012498: 2200 movs r2, #0
801249a: 4912 ldr r1, [pc, #72] @ (80124e4 <MX_USB_DEVICE_Init+0x50>)
801249c: 4812 ldr r0, [pc, #72] @ (80124e8 <MX_USB_DEVICE_Init+0x54>)
801249e: f7f8 fed8 bl 800b252 <USBD_Init>
80124a2: 4603 mov r3, r0
80124a4: 2b00 cmp r3, #0
80124a6: d001 beq.n 80124ac <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
80124a8: f7ee fdd5 bl 8001056 <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_MSC) != USBD_OK)
80124ac: 490f ldr r1, [pc, #60] @ (80124ec <MX_USB_DEVICE_Init+0x58>)
80124ae: 480e ldr r0, [pc, #56] @ (80124e8 <MX_USB_DEVICE_Init+0x54>)
80124b0: f7f8 ff2f bl 800b312 <USBD_RegisterClass>
80124b4: 4603 mov r3, r0
80124b6: 2b00 cmp r3, #0
80124b8: d001 beq.n 80124be <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
80124ba: f7ee fdcc bl 8001056 <Error_Handler>
}
if (USBD_MSC_RegisterStorage(&hUsbDeviceFS, &USBD_Storage_Interface_fops_FS) != USBD_OK)
80124be: 490c ldr r1, [pc, #48] @ (80124f0 <MX_USB_DEVICE_Init+0x5c>)
80124c0: 4809 ldr r0, [pc, #36] @ (80124e8 <MX_USB_DEVICE_Init+0x54>)
80124c2: f7f7 f89b bl 80095fc <USBD_MSC_RegisterStorage>
80124c6: 4603 mov r3, r0
80124c8: 2b00 cmp r3, #0
80124ca: d001 beq.n 80124d0 <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
80124cc: f7ee fdc3 bl 8001056 <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
80124d0: 4805 ldr r0, [pc, #20] @ (80124e8 <MX_USB_DEVICE_Init+0x54>)
80124d2: f7f8 ff54 bl 800b37e <USBD_Start>
80124d6: 4603 mov r3, r0
80124d8: 2b00 cmp r3, #0
80124da: d001 beq.n 80124e0 <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
80124dc: f7ee fdbb bl 8001056 <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
80124e0: bf00 nop
80124e2: bd80 pop {r7, pc}
80124e4: 200000a4 .word 0x200000a4
80124e8: 20013eec .word 0x20013eec
80124ec: 20000020 .word 0x20000020
80124f0: 200000f4 .word 0x200000f4
080124f4 <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80124f4: b480 push {r7}
80124f6: b083 sub sp, #12
80124f8: af00 add r7, sp, #0
80124fa: 4603 mov r3, r0
80124fc: 6039 str r1, [r7, #0]
80124fe: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
8012500: 683b ldr r3, [r7, #0]
8012502: 2212 movs r2, #18
8012504: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
8012506: 4b03 ldr r3, [pc, #12] @ (8012514 <USBD_FS_DeviceDescriptor+0x20>)
}
8012508: 4618 mov r0, r3
801250a: 370c adds r7, #12
801250c: 46bd mov sp, r7
801250e: f85d 7b04 ldr.w r7, [sp], #4
8012512: 4770 bx lr
8012514: 200000c0 .word 0x200000c0
08012518 <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8012518: b480 push {r7}
801251a: b083 sub sp, #12
801251c: af00 add r7, sp, #0
801251e: 4603 mov r3, r0
8012520: 6039 str r1, [r7, #0]
8012522: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
8012524: 683b ldr r3, [r7, #0]
8012526: 2204 movs r2, #4
8012528: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
801252a: 4b03 ldr r3, [pc, #12] @ (8012538 <USBD_FS_LangIDStrDescriptor+0x20>)
}
801252c: 4618 mov r0, r3
801252e: 370c adds r7, #12
8012530: 46bd mov sp, r7
8012532: f85d 7b04 ldr.w r7, [sp], #4
8012536: 4770 bx lr
8012538: 200000d4 .word 0x200000d4
0801253c <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
801253c: b580 push {r7, lr}
801253e: b082 sub sp, #8
8012540: af00 add r7, sp, #0
8012542: 4603 mov r3, r0
8012544: 6039 str r1, [r7, #0]
8012546: 71fb strb r3, [r7, #7]
if(speed == 0)
8012548: 79fb ldrb r3, [r7, #7]
801254a: 2b00 cmp r3, #0
801254c: d105 bne.n 801255a <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
801254e: 683a ldr r2, [r7, #0]
8012550: 4907 ldr r1, [pc, #28] @ (8012570 <USBD_FS_ProductStrDescriptor+0x34>)
8012552: 4808 ldr r0, [pc, #32] @ (8012574 <USBD_FS_ProductStrDescriptor+0x38>)
8012554: f7fa f8de bl 800c714 <USBD_GetString>
8012558: e004 b.n 8012564 <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
801255a: 683a ldr r2, [r7, #0]
801255c: 4904 ldr r1, [pc, #16] @ (8012570 <USBD_FS_ProductStrDescriptor+0x34>)
801255e: 4805 ldr r0, [pc, #20] @ (8012574 <USBD_FS_ProductStrDescriptor+0x38>)
8012560: f7fa f8d8 bl 800c714 <USBD_GetString>
}
return USBD_StrDesc;
8012564: 4b02 ldr r3, [pc, #8] @ (8012570 <USBD_FS_ProductStrDescriptor+0x34>)
}
8012566: 4618 mov r0, r3
8012568: 3708 adds r7, #8
801256a: 46bd mov sp, r7
801256c: bd80 pop {r7, pc}
801256e: bf00 nop
8012570: 200141c8 .word 0x200141c8
8012574: 08013a8c .word 0x08013a8c
08012578 <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8012578: b580 push {r7, lr}
801257a: b082 sub sp, #8
801257c: af00 add r7, sp, #0
801257e: 4603 mov r3, r0
8012580: 6039 str r1, [r7, #0]
8012582: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
8012584: 683a ldr r2, [r7, #0]
8012586: 4904 ldr r1, [pc, #16] @ (8012598 <USBD_FS_ManufacturerStrDescriptor+0x20>)
8012588: 4804 ldr r0, [pc, #16] @ (801259c <USBD_FS_ManufacturerStrDescriptor+0x24>)
801258a: f7fa f8c3 bl 800c714 <USBD_GetString>
return USBD_StrDesc;
801258e: 4b02 ldr r3, [pc, #8] @ (8012598 <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
8012590: 4618 mov r0, r3
8012592: 3708 adds r7, #8
8012594: 46bd mov sp, r7
8012596: bd80 pop {r7, pc}
8012598: 200141c8 .word 0x200141c8
801259c: 08013aa0 .word 0x08013aa0
080125a0 <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80125a0: b580 push {r7, lr}
80125a2: b082 sub sp, #8
80125a4: af00 add r7, sp, #0
80125a6: 4603 mov r3, r0
80125a8: 6039 str r1, [r7, #0]
80125aa: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
80125ac: 683b ldr r3, [r7, #0]
80125ae: 221a movs r2, #26
80125b0: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
80125b2: f000 f843 bl 801263c <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
80125b6: 4b02 ldr r3, [pc, #8] @ (80125c0 <USBD_FS_SerialStrDescriptor+0x20>)
}
80125b8: 4618 mov r0, r3
80125ba: 3708 adds r7, #8
80125bc: 46bd mov sp, r7
80125be: bd80 pop {r7, pc}
80125c0: 200000d8 .word 0x200000d8
080125c4 <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80125c4: b580 push {r7, lr}
80125c6: b082 sub sp, #8
80125c8: af00 add r7, sp, #0
80125ca: 4603 mov r3, r0
80125cc: 6039 str r1, [r7, #0]
80125ce: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
80125d0: 79fb ldrb r3, [r7, #7]
80125d2: 2b00 cmp r3, #0
80125d4: d105 bne.n 80125e2 <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
80125d6: 683a ldr r2, [r7, #0]
80125d8: 4907 ldr r1, [pc, #28] @ (80125f8 <USBD_FS_ConfigStrDescriptor+0x34>)
80125da: 4808 ldr r0, [pc, #32] @ (80125fc <USBD_FS_ConfigStrDescriptor+0x38>)
80125dc: f7fa f89a bl 800c714 <USBD_GetString>
80125e0: e004 b.n 80125ec <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
80125e2: 683a ldr r2, [r7, #0]
80125e4: 4904 ldr r1, [pc, #16] @ (80125f8 <USBD_FS_ConfigStrDescriptor+0x34>)
80125e6: 4805 ldr r0, [pc, #20] @ (80125fc <USBD_FS_ConfigStrDescriptor+0x38>)
80125e8: f7fa f894 bl 800c714 <USBD_GetString>
}
return USBD_StrDesc;
80125ec: 4b02 ldr r3, [pc, #8] @ (80125f8 <USBD_FS_ConfigStrDescriptor+0x34>)
}
80125ee: 4618 mov r0, r3
80125f0: 3708 adds r7, #8
80125f2: 46bd mov sp, r7
80125f4: bd80 pop {r7, pc}
80125f6: bf00 nop
80125f8: 200141c8 .word 0x200141c8
80125fc: 08013ab4 .word 0x08013ab4
08012600 <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8012600: b580 push {r7, lr}
8012602: b082 sub sp, #8
8012604: af00 add r7, sp, #0
8012606: 4603 mov r3, r0
8012608: 6039 str r1, [r7, #0]
801260a: 71fb strb r3, [r7, #7]
if(speed == 0)
801260c: 79fb ldrb r3, [r7, #7]
801260e: 2b00 cmp r3, #0
8012610: d105 bne.n 801261e <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
8012612: 683a ldr r2, [r7, #0]
8012614: 4907 ldr r1, [pc, #28] @ (8012634 <USBD_FS_InterfaceStrDescriptor+0x34>)
8012616: 4808 ldr r0, [pc, #32] @ (8012638 <USBD_FS_InterfaceStrDescriptor+0x38>)
8012618: f7fa f87c bl 800c714 <USBD_GetString>
801261c: e004 b.n 8012628 <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
801261e: 683a ldr r2, [r7, #0]
8012620: 4904 ldr r1, [pc, #16] @ (8012634 <USBD_FS_InterfaceStrDescriptor+0x34>)
8012622: 4805 ldr r0, [pc, #20] @ (8012638 <USBD_FS_InterfaceStrDescriptor+0x38>)
8012624: f7fa f876 bl 800c714 <USBD_GetString>
}
return USBD_StrDesc;
8012628: 4b02 ldr r3, [pc, #8] @ (8012634 <USBD_FS_InterfaceStrDescriptor+0x34>)
}
801262a: 4618 mov r0, r3
801262c: 3708 adds r7, #8
801262e: 46bd mov sp, r7
8012630: bd80 pop {r7, pc}
8012632: bf00 nop
8012634: 200141c8 .word 0x200141c8
8012638: 08013ac0 .word 0x08013ac0
0801263c <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
801263c: b580 push {r7, lr}
801263e: b084 sub sp, #16
8012640: af00 add r7, sp, #0
uint32_t deviceserial0;
uint32_t deviceserial1;
uint32_t deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
8012642: 4b0f ldr r3, [pc, #60] @ (8012680 <Get_SerialNum+0x44>)
8012644: 681b ldr r3, [r3, #0]
8012646: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
8012648: 4b0e ldr r3, [pc, #56] @ (8012684 <Get_SerialNum+0x48>)
801264a: 681b ldr r3, [r3, #0]
801264c: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
801264e: 4b0e ldr r3, [pc, #56] @ (8012688 <Get_SerialNum+0x4c>)
8012650: 681b ldr r3, [r3, #0]
8012652: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
8012654: 68fa ldr r2, [r7, #12]
8012656: 687b ldr r3, [r7, #4]
8012658: 4413 add r3, r2
801265a: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
801265c: 68fb ldr r3, [r7, #12]
801265e: 2b00 cmp r3, #0
8012660: d009 beq.n 8012676 <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
8012662: 2208 movs r2, #8
8012664: 4909 ldr r1, [pc, #36] @ (801268c <Get_SerialNum+0x50>)
8012666: 68f8 ldr r0, [r7, #12]
8012668: f000 f814 bl 8012694 <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
801266c: 2204 movs r2, #4
801266e: 4908 ldr r1, [pc, #32] @ (8012690 <Get_SerialNum+0x54>)
8012670: 68b8 ldr r0, [r7, #8]
8012672: f000 f80f bl 8012694 <IntToUnicode>
}
}
8012676: bf00 nop
8012678: 3710 adds r7, #16
801267a: 46bd mov sp, r7
801267c: bd80 pop {r7, pc}
801267e: bf00 nop
8012680: 1fff7a10 .word 0x1fff7a10
8012684: 1fff7a14 .word 0x1fff7a14
8012688: 1fff7a18 .word 0x1fff7a18
801268c: 200000da .word 0x200000da
8012690: 200000ea .word 0x200000ea
08012694 <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
8012694: b480 push {r7}
8012696: b087 sub sp, #28
8012698: af00 add r7, sp, #0
801269a: 60f8 str r0, [r7, #12]
801269c: 60b9 str r1, [r7, #8]
801269e: 4613 mov r3, r2
80126a0: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
80126a2: 2300 movs r3, #0
80126a4: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
80126a6: 2300 movs r3, #0
80126a8: 75fb strb r3, [r7, #23]
80126aa: e027 b.n 80126fc <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
80126ac: 68fb ldr r3, [r7, #12]
80126ae: 0f1b lsrs r3, r3, #28
80126b0: 2b09 cmp r3, #9
80126b2: d80b bhi.n 80126cc <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
80126b4: 68fb ldr r3, [r7, #12]
80126b6: 0f1b lsrs r3, r3, #28
80126b8: b2da uxtb r2, r3
80126ba: 7dfb ldrb r3, [r7, #23]
80126bc: 005b lsls r3, r3, #1
80126be: 4619 mov r1, r3
80126c0: 68bb ldr r3, [r7, #8]
80126c2: 440b add r3, r1
80126c4: 3230 adds r2, #48 @ 0x30
80126c6: b2d2 uxtb r2, r2
80126c8: 701a strb r2, [r3, #0]
80126ca: e00a b.n 80126e2 <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
80126cc: 68fb ldr r3, [r7, #12]
80126ce: 0f1b lsrs r3, r3, #28
80126d0: b2da uxtb r2, r3
80126d2: 7dfb ldrb r3, [r7, #23]
80126d4: 005b lsls r3, r3, #1
80126d6: 4619 mov r1, r3
80126d8: 68bb ldr r3, [r7, #8]
80126da: 440b add r3, r1
80126dc: 3237 adds r2, #55 @ 0x37
80126de: b2d2 uxtb r2, r2
80126e0: 701a strb r2, [r3, #0]
}
value = value << 4;
80126e2: 68fb ldr r3, [r7, #12]
80126e4: 011b lsls r3, r3, #4
80126e6: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
80126e8: 7dfb ldrb r3, [r7, #23]
80126ea: 005b lsls r3, r3, #1
80126ec: 3301 adds r3, #1
80126ee: 68ba ldr r2, [r7, #8]
80126f0: 4413 add r3, r2
80126f2: 2200 movs r2, #0
80126f4: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
80126f6: 7dfb ldrb r3, [r7, #23]
80126f8: 3301 adds r3, #1
80126fa: 75fb strb r3, [r7, #23]
80126fc: 7dfa ldrb r2, [r7, #23]
80126fe: 79fb ldrb r3, [r7, #7]
8012700: 429a cmp r2, r3
8012702: d3d3 bcc.n 80126ac <IntToUnicode+0x18>
}
}
8012704: bf00 nop
8012706: bf00 nop
8012708: 371c adds r7, #28
801270a: 46bd mov sp, r7
801270c: f85d 7b04 ldr.w r7, [sp], #4
8012710: 4770 bx lr
08012712 <STORAGE_Init_FS>:
* @brief Initializes the storage unit (medium) over USB FS IP
* @param lun: Logical unit number.
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
int8_t STORAGE_Init_FS(uint8_t lun)
{
8012712: b480 push {r7}
8012714: b083 sub sp, #12
8012716: af00 add r7, sp, #0
8012718: 4603 mov r3, r0
801271a: 71fb strb r3, [r7, #7]
/* USER CODE BEGIN 2 */
UNUSED(lun);
return (USBD_OK);
801271c: 2300 movs r3, #0
/* USER CODE END 2 */
}
801271e: 4618 mov r0, r3
8012720: 370c adds r7, #12
8012722: 46bd mov sp, r7
8012724: f85d 7b04 ldr.w r7, [sp], #4
8012728: 4770 bx lr
...
0801272c <STORAGE_GetCapacity_FS>:
* @param block_num: Number of total block number.
* @param block_size: Block size.
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
int8_t STORAGE_GetCapacity_FS(uint8_t lun, uint32_t *block_num, uint16_t *block_size)
{
801272c: b580 push {r7, lr}
801272e: b08c sub sp, #48 @ 0x30
8012730: af00 add r7, sp, #0
8012732: 4603 mov r3, r0
8012734: 60b9 str r1, [r7, #8]
8012736: 607a str r2, [r7, #4]
8012738: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN 3 */
UNUSED(lun);
HAL_MMC_CardInfoTypeDef CardInfo;
HAL_MMC_GetCardInfo(&hmmc, &CardInfo);
801273a: f107 0314 add.w r3, r7, #20
801273e: 4619 mov r1, r3
8012740: 4807 ldr r0, [pc, #28] @ (8012760 <STORAGE_GetCapacity_FS+0x34>)
8012742: f7f1 f9b5 bl 8003ab0 <HAL_MMC_GetCardInfo>
*block_num = (CardInfo.LogBlockNbr) - 1;
8012746: 6abb ldr r3, [r7, #40] @ 0x28
8012748: 1e5a subs r2, r3, #1
801274a: 68bb ldr r3, [r7, #8]
801274c: 601a str r2, [r3, #0]
*block_size = CardInfo.LogBlockSize;
801274e: 6afb ldr r3, [r7, #44] @ 0x2c
8012750: b29a uxth r2, r3
8012752: 687b ldr r3, [r7, #4]
8012754: 801a strh r2, [r3, #0]
return (USBD_OK);
8012756: 2300 movs r3, #0
/* USER CODE END 3 */
}
8012758: 4618 mov r0, r3
801275a: 3730 adds r7, #48 @ 0x30
801275c: 46bd mov sp, r7
801275e: bd80 pop {r7, pc}
8012760: 2000f794 .word 0x2000f794
08012764 <STORAGE_IsReady_FS>:
* @brief Checks whether the medium is ready.
* @param lun: Logical unit number.
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
int8_t STORAGE_IsReady_FS(uint8_t lun)
{
8012764: b480 push {r7}
8012766: b083 sub sp, #12
8012768: af00 add r7, sp, #0
801276a: 4603 mov r3, r0
801276c: 71fb strb r3, [r7, #7]
/* USER CODE BEGIN 4 */
UNUSED(lun);
return (USBD_OK);
801276e: 2300 movs r3, #0
/* USER CODE END 4 */
}
8012770: 4618 mov r0, r3
8012772: 370c adds r7, #12
8012774: 46bd mov sp, r7
8012776: f85d 7b04 ldr.w r7, [sp], #4
801277a: 4770 bx lr
0801277c <STORAGE_IsWriteProtected_FS>:
* @brief Checks whether the medium is write protected.
* @param lun: Logical unit number.
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
int8_t STORAGE_IsWriteProtected_FS(uint8_t lun)
{
801277c: b480 push {r7}
801277e: b083 sub sp, #12
8012780: af00 add r7, sp, #0
8012782: 4603 mov r3, r0
8012784: 71fb strb r3, [r7, #7]
/* USER CODE BEGIN 5 */
UNUSED(lun);
return (USBD_OK);
8012786: 2300 movs r3, #0
/* USER CODE END 5 */
}
8012788: 4618 mov r0, r3
801278a: 370c adds r7, #12
801278c: 46bd mov sp, r7
801278e: f85d 7b04 ldr.w r7, [sp], #4
8012792: 4770 bx lr
08012794 <STORAGE_Read_FS>:
* @param blk_addr: Logical block address.
* @param blk_len: Blocks number.
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
int8_t STORAGE_Read_FS(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len)
{
8012794: b580 push {r7, lr}
8012796: b088 sub sp, #32
8012798: af02 add r7, sp, #8
801279a: 60b9 str r1, [r7, #8]
801279c: 607a str r2, [r7, #4]
801279e: 461a mov r2, r3
80127a0: 4603 mov r3, r0
80127a2: 73fb strb r3, [r7, #15]
80127a4: 4613 mov r3, r2
80127a6: 81bb strh r3, [r7, #12]
UNUSED(lun);
UNUSED(buf);
UNUSED(blk_addr);
UNUSED(blk_len);
uint32_t timeout = 100000;
80127a8: 4b0f ldr r3, [pc, #60] @ (80127e8 <STORAGE_Read_FS+0x54>)
80127aa: 617b str r3, [r7, #20]
HAL_MMC_ReadBlocks(&hmmc, (uint8_t*)buf, blk_addr, blk_len, timeout);
80127ac: 89ba ldrh r2, [r7, #12]
80127ae: 697b ldr r3, [r7, #20]
80127b0: 9300 str r3, [sp, #0]
80127b2: 4613 mov r3, r2
80127b4: 687a ldr r2, [r7, #4]
80127b6: 68b9 ldr r1, [r7, #8]
80127b8: 480c ldr r0, [pc, #48] @ (80127ec <STORAGE_Read_FS+0x58>)
80127ba: f7f0 fca3 bl 8003104 <HAL_MMC_ReadBlocks>
while(HAL_MMC_GetCardState(&hmmc) != HAL_MMC_CARD_TRANSFER)
80127be: e007 b.n 80127d0 <STORAGE_Read_FS+0x3c>
{
if (timeout-- == 0)
80127c0: 697b ldr r3, [r7, #20]
80127c2: 1e5a subs r2, r3, #1
80127c4: 617a str r2, [r7, #20]
80127c6: 2b00 cmp r3, #0
80127c8: d102 bne.n 80127d0 <STORAGE_Read_FS+0x3c>
{
return (-1);
80127ca: f04f 33ff mov.w r3, #4294967295
80127ce: e006 b.n 80127de <STORAGE_Read_FS+0x4a>
while(HAL_MMC_GetCardState(&hmmc) != HAL_MMC_CARD_TRANSFER)
80127d0: 4806 ldr r0, [pc, #24] @ (80127ec <STORAGE_Read_FS+0x58>)
80127d2: f7f1 fb31 bl 8003e38 <HAL_MMC_GetCardState>
80127d6: 4603 mov r3, r0
80127d8: 2b04 cmp r3, #4
80127da: d1f1 bne.n 80127c0 <STORAGE_Read_FS+0x2c>
}
}
return (USBD_OK);
80127dc: 2300 movs r3, #0
/* USER CODE END 6 */
}
80127de: 4618 mov r0, r3
80127e0: 3718 adds r7, #24
80127e2: 46bd mov sp, r7
80127e4: bd80 pop {r7, pc}
80127e6: bf00 nop
80127e8: 000186a0 .word 0x000186a0
80127ec: 2000f794 .word 0x2000f794
080127f0 <STORAGE_Write_FS>:
* @param blk_addr: Logical block address.
* @param blk_len: Blocks number.
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
int8_t STORAGE_Write_FS(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len)
{
80127f0: b580 push {r7, lr}
80127f2: b088 sub sp, #32
80127f4: af02 add r7, sp, #8
80127f6: 60b9 str r1, [r7, #8]
80127f8: 607a str r2, [r7, #4]
80127fa: 461a mov r2, r3
80127fc: 4603 mov r3, r0
80127fe: 73fb strb r3, [r7, #15]
8012800: 4613 mov r3, r2
8012802: 81bb strh r3, [r7, #12]
UNUSED(lun);
UNUSED(buf);
UNUSED(blk_addr);
UNUSED(blk_len);
uint32_t timeout = 100000;
8012804: 4b0f ldr r3, [pc, #60] @ (8012844 <STORAGE_Write_FS+0x54>)
8012806: 617b str r3, [r7, #20]
HAL_MMC_WriteBlocks(&hmmc, (uint8_t*)buf, blk_addr, blk_len, timeout);
8012808: 89ba ldrh r2, [r7, #12]
801280a: 697b ldr r3, [r7, #20]
801280c: 9300 str r3, [sp, #0]
801280e: 4613 mov r3, r2
8012810: 687a ldr r2, [r7, #4]
8012812: 68b9 ldr r1, [r7, #8]
8012814: 480c ldr r0, [pc, #48] @ (8012848 <STORAGE_Write_FS+0x58>)
8012816: f7f0 fe37 bl 8003488 <HAL_MMC_WriteBlocks>
while(HAL_MMC_GetCardState(&hmmc) != HAL_MMC_CARD_TRANSFER)
801281a: e007 b.n 801282c <STORAGE_Write_FS+0x3c>
{
if (timeout-- == 0)
801281c: 697b ldr r3, [r7, #20]
801281e: 1e5a subs r2, r3, #1
8012820: 617a str r2, [r7, #20]
8012822: 2b00 cmp r3, #0
8012824: d102 bne.n 801282c <STORAGE_Write_FS+0x3c>
{
return (-1);
8012826: f04f 33ff mov.w r3, #4294967295
801282a: e006 b.n 801283a <STORAGE_Write_FS+0x4a>
while(HAL_MMC_GetCardState(&hmmc) != HAL_MMC_CARD_TRANSFER)
801282c: 4806 ldr r0, [pc, #24] @ (8012848 <STORAGE_Write_FS+0x58>)
801282e: f7f1 fb03 bl 8003e38 <HAL_MMC_GetCardState>
8012832: 4603 mov r3, r0
8012834: 2b04 cmp r3, #4
8012836: d1f1 bne.n 801281c <STORAGE_Write_FS+0x2c>
}
}
return (USBD_OK);
8012838: 2300 movs r3, #0
/* USER CODE END 7 */
}
801283a: 4618 mov r0, r3
801283c: 3718 adds r7, #24
801283e: 46bd mov sp, r7
8012840: bd80 pop {r7, pc}
8012842: bf00 nop
8012844: 000186a0 .word 0x000186a0
8012848: 2000f794 .word 0x2000f794
0801284c <STORAGE_GetMaxLun_FS>:
* @brief Returns the Max Supported LUNs.
* @param None
* @retval Lun(s) number.
*/
int8_t STORAGE_GetMaxLun_FS(void)
{
801284c: b480 push {r7}
801284e: af00 add r7, sp, #0
/* USER CODE BEGIN 8 */
return (STORAGE_LUN_NBR - 1);
8012850: 2300 movs r3, #0
/* USER CODE END 8 */
}
8012852: 4618 mov r0, r3
8012854: 46bd mov sp, r7
8012856: f85d 7b04 ldr.w r7, [sp], #4
801285a: 4770 bx lr
0801285c <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
801285c: b580 push {r7, lr}
801285e: b0a0 sub sp, #128 @ 0x80
8012860: af00 add r7, sp, #0
8012862: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8012864: f107 036c add.w r3, r7, #108 @ 0x6c
8012868: 2200 movs r2, #0
801286a: 601a str r2, [r3, #0]
801286c: 605a str r2, [r3, #4]
801286e: 609a str r2, [r3, #8]
8012870: 60da str r2, [r3, #12]
8012872: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
8012874: f107 0314 add.w r3, r7, #20
8012878: 2258 movs r2, #88 @ 0x58
801287a: 2100 movs r1, #0
801287c: 4618 mov r0, r3
801287e: f000 fba7 bl 8012fd0 <memset>
if(pcdHandle->Instance==USB_OTG_FS)
8012882: 687b ldr r3, [r7, #4]
8012884: 681b ldr r3, [r3, #0]
8012886: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000
801288a: d148 bne.n 801291e <HAL_PCD_MspInit+0xc2>
/* USER CODE END USB_OTG_FS_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
801288c: 2320 movs r3, #32
801288e: 617b str r3, [r7, #20]
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLQ;
8012890: 2300 movs r3, #0
8012892: 647b str r3, [r7, #68] @ 0x44
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
8012894: f107 0314 add.w r3, r7, #20
8012898: 4618 mov r0, r3
801289a: f7f3 fb15 bl 8005ec8 <HAL_RCCEx_PeriphCLKConfig>
801289e: 4603 mov r3, r0
80128a0: 2b00 cmp r3, #0
80128a2: d001 beq.n 80128a8 <HAL_PCD_MspInit+0x4c>
{
Error_Handler();
80128a4: f7ee fbd7 bl 8001056 <Error_Handler>
}
__HAL_RCC_GPIOA_CLK_ENABLE();
80128a8: 2300 movs r3, #0
80128aa: 613b str r3, [r7, #16]
80128ac: 4b1e ldr r3, [pc, #120] @ (8012928 <HAL_PCD_MspInit+0xcc>)
80128ae: 6b1b ldr r3, [r3, #48] @ 0x30
80128b0: 4a1d ldr r2, [pc, #116] @ (8012928 <HAL_PCD_MspInit+0xcc>)
80128b2: f043 0301 orr.w r3, r3, #1
80128b6: 6313 str r3, [r2, #48] @ 0x30
80128b8: 4b1b ldr r3, [pc, #108] @ (8012928 <HAL_PCD_MspInit+0xcc>)
80128ba: 6b1b ldr r3, [r3, #48] @ 0x30
80128bc: f003 0301 and.w r3, r3, #1
80128c0: 613b str r3, [r7, #16]
80128c2: 693b ldr r3, [r7, #16]
/**USB_OTG_FS GPIO Configuration
PA12 ------> USB_OTG_FS_DP
PA11 ------> USB_OTG_FS_DM
*/
GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_11;
80128c4: f44f 53c0 mov.w r3, #6144 @ 0x1800
80128c8: 66fb str r3, [r7, #108] @ 0x6c
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80128ca: 2302 movs r3, #2
80128cc: 673b str r3, [r7, #112] @ 0x70
GPIO_InitStruct.Pull = GPIO_NOPULL;
80128ce: 2300 movs r3, #0
80128d0: 677b str r3, [r7, #116] @ 0x74
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
80128d2: 2303 movs r3, #3
80128d4: 67bb str r3, [r7, #120] @ 0x78
GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
80128d6: 230a movs r3, #10
80128d8: 67fb str r3, [r7, #124] @ 0x7c
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80128da: f107 036c add.w r3, r7, #108 @ 0x6c
80128de: 4619 mov r1, r3
80128e0: 4812 ldr r0, [pc, #72] @ (801292c <HAL_PCD_MspInit+0xd0>)
80128e2: f7f0 f88d bl 8002a00 <HAL_GPIO_Init>
/* Peripheral clock enable */
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
80128e6: 4b10 ldr r3, [pc, #64] @ (8012928 <HAL_PCD_MspInit+0xcc>)
80128e8: 6b5b ldr r3, [r3, #52] @ 0x34
80128ea: 4a0f ldr r2, [pc, #60] @ (8012928 <HAL_PCD_MspInit+0xcc>)
80128ec: f043 0380 orr.w r3, r3, #128 @ 0x80
80128f0: 6353 str r3, [r2, #52] @ 0x34
80128f2: 2300 movs r3, #0
80128f4: 60fb str r3, [r7, #12]
80128f6: 4b0c ldr r3, [pc, #48] @ (8012928 <HAL_PCD_MspInit+0xcc>)
80128f8: 6c5b ldr r3, [r3, #68] @ 0x44
80128fa: 4a0b ldr r2, [pc, #44] @ (8012928 <HAL_PCD_MspInit+0xcc>)
80128fc: f443 4380 orr.w r3, r3, #16384 @ 0x4000
8012900: 6453 str r3, [r2, #68] @ 0x44
8012902: 4b09 ldr r3, [pc, #36] @ (8012928 <HAL_PCD_MspInit+0xcc>)
8012904: 6c5b ldr r3, [r3, #68] @ 0x44
8012906: f403 4380 and.w r3, r3, #16384 @ 0x4000
801290a: 60fb str r3, [r7, #12]
801290c: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(OTG_FS_IRQn, 5, 0);
801290e: 2200 movs r2, #0
8012910: 2105 movs r1, #5
8012912: 2043 movs r0, #67 @ 0x43
8012914: f7ef f84c bl 80019b0 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(OTG_FS_IRQn);
8012918: 2043 movs r0, #67 @ 0x43
801291a: f7ef f865 bl 80019e8 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_OTG_FS_MspInit 1 */
/* USER CODE END USB_OTG_FS_MspInit 1 */
}
}
801291e: bf00 nop
8012920: 3780 adds r7, #128 @ 0x80
8012922: 46bd mov sp, r7
8012924: bd80 pop {r7, pc}
8012926: bf00 nop
8012928: 40023800 .word 0x40023800
801292c: 40020000 .word 0x40020000
08012930 <HAL_PCD_MspDeInit>:
void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
{
8012930: b580 push {r7, lr}
8012932: b082 sub sp, #8
8012934: af00 add r7, sp, #0
8012936: 6078 str r0, [r7, #4]
if(pcdHandle->Instance==USB_OTG_FS)
8012938: 687b ldr r3, [r7, #4]
801293a: 681b ldr r3, [r3, #0]
801293c: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000
8012940: d10d bne.n 801295e <HAL_PCD_MspDeInit+0x2e>
{
/* USER CODE BEGIN USB_OTG_FS_MspDeInit 0 */
/* USER CODE END USB_OTG_FS_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USB_OTG_FS_CLK_DISABLE();
8012942: 4b09 ldr r3, [pc, #36] @ (8012968 <HAL_PCD_MspDeInit+0x38>)
8012944: 6b5b ldr r3, [r3, #52] @ 0x34
8012946: 4a08 ldr r2, [pc, #32] @ (8012968 <HAL_PCD_MspDeInit+0x38>)
8012948: f023 0380 bic.w r3, r3, #128 @ 0x80
801294c: 6353 str r3, [r2, #52] @ 0x34
/**USB_OTG_FS GPIO Configuration
PA12 ------> USB_OTG_FS_DP
PA11 ------> USB_OTG_FS_DM
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_12|GPIO_PIN_11);
801294e: f44f 51c0 mov.w r1, #6144 @ 0x1800
8012952: 4806 ldr r0, [pc, #24] @ (801296c <HAL_PCD_MspDeInit+0x3c>)
8012954: f7f0 f9e8 bl 8002d28 <HAL_GPIO_DeInit>
/* Peripheral interrupt Deinit*/
HAL_NVIC_DisableIRQ(OTG_FS_IRQn);
8012958: 2043 movs r0, #67 @ 0x43
801295a: f7ef f853 bl 8001a04 <HAL_NVIC_DisableIRQ>
/* USER CODE BEGIN USB_OTG_FS_MspDeInit 1 */
/* USER CODE END USB_OTG_FS_MspDeInit 1 */
}
}
801295e: bf00 nop
8012960: 3708 adds r7, #8
8012962: 46bd mov sp, r7
8012964: bd80 pop {r7, pc}
8012966: bf00 nop
8012968: 40023800 .word 0x40023800
801296c: 40020000 .word 0x40020000
08012970 <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8012970: b580 push {r7, lr}
8012972: b082 sub sp, #8
8012974: af00 add r7, sp, #0
8012976: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
8012978: 687b ldr r3, [r7, #4]
801297a: f8d3 24e0 ldr.w r2, [r3, #1248] @ 0x4e0
801297e: 687b ldr r3, [r7, #4]
8012980: f203 439c addw r3, r3, #1180 @ 0x49c
8012984: 4619 mov r1, r3
8012986: 4610 mov r0, r2
8012988: f7f8 fd61 bl 800b44e <USBD_LL_SetupStage>
}
801298c: bf00 nop
801298e: 3708 adds r7, #8
8012990: 46bd mov sp, r7
8012992: bd80 pop {r7, pc}
08012994 <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8012994: b580 push {r7, lr}
8012996: b082 sub sp, #8
8012998: af00 add r7, sp, #0
801299a: 6078 str r0, [r7, #4]
801299c: 460b mov r3, r1
801299e: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
80129a0: 687b ldr r3, [r7, #4]
80129a2: f8d3 04e0 ldr.w r0, [r3, #1248] @ 0x4e0
80129a6: 78fa ldrb r2, [r7, #3]
80129a8: 6879 ldr r1, [r7, #4]
80129aa: 4613 mov r3, r2
80129ac: 00db lsls r3, r3, #3
80129ae: 4413 add r3, r2
80129b0: 009b lsls r3, r3, #2
80129b2: 440b add r3, r1
80129b4: f503 7318 add.w r3, r3, #608 @ 0x260
80129b8: 681a ldr r2, [r3, #0]
80129ba: 78fb ldrb r3, [r7, #3]
80129bc: 4619 mov r1, r3
80129be: f7f8 fd9b bl 800b4f8 <USBD_LL_DataOutStage>
}
80129c2: bf00 nop
80129c4: 3708 adds r7, #8
80129c6: 46bd mov sp, r7
80129c8: bd80 pop {r7, pc}
080129ca <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
80129ca: b580 push {r7, lr}
80129cc: b082 sub sp, #8
80129ce: af00 add r7, sp, #0
80129d0: 6078 str r0, [r7, #4]
80129d2: 460b mov r3, r1
80129d4: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
80129d6: 687b ldr r3, [r7, #4]
80129d8: f8d3 04e0 ldr.w r0, [r3, #1248] @ 0x4e0
80129dc: 78fa ldrb r2, [r7, #3]
80129de: 6879 ldr r1, [r7, #4]
80129e0: 4613 mov r3, r2
80129e2: 00db lsls r3, r3, #3
80129e4: 4413 add r3, r2
80129e6: 009b lsls r3, r3, #2
80129e8: 440b add r3, r1
80129ea: 3320 adds r3, #32
80129ec: 681a ldr r2, [r3, #0]
80129ee: 78fb ldrb r3, [r7, #3]
80129f0: 4619 mov r1, r3
80129f2: f7f8 fe34 bl 800b65e <USBD_LL_DataInStage>
}
80129f6: bf00 nop
80129f8: 3708 adds r7, #8
80129fa: 46bd mov sp, r7
80129fc: bd80 pop {r7, pc}
080129fe <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
80129fe: b580 push {r7, lr}
8012a00: b082 sub sp, #8
8012a02: af00 add r7, sp, #0
8012a04: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
8012a06: 687b ldr r3, [r7, #4]
8012a08: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8012a0c: 4618 mov r0, r3
8012a0e: f7f8 ff6e bl 800b8ee <USBD_LL_SOF>
}
8012a12: bf00 nop
8012a14: 3708 adds r7, #8
8012a16: 46bd mov sp, r7
8012a18: bd80 pop {r7, pc}
08012a1a <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8012a1a: b580 push {r7, lr}
8012a1c: b084 sub sp, #16
8012a1e: af00 add r7, sp, #0
8012a20: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
8012a22: 2301 movs r3, #1
8012a24: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
8012a26: 687b ldr r3, [r7, #4]
8012a28: 79db ldrb r3, [r3, #7]
8012a2a: 2b02 cmp r3, #2
8012a2c: d001 beq.n 8012a32 <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
8012a2e: f7ee fb12 bl 8001056 <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
8012a32: 687b ldr r3, [r7, #4]
8012a34: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8012a38: 7bfa ldrb r2, [r7, #15]
8012a3a: 4611 mov r1, r2
8012a3c: 4618 mov r0, r3
8012a3e: f7f8 ff12 bl 800b866 <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
8012a42: 687b ldr r3, [r7, #4]
8012a44: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8012a48: 4618 mov r0, r3
8012a4a: f7f8 feba bl 800b7c2 <USBD_LL_Reset>
}
8012a4e: bf00 nop
8012a50: 3710 adds r7, #16
8012a52: 46bd mov sp, r7
8012a54: bd80 pop {r7, pc}
...
08012a58 <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8012a58: b580 push {r7, lr}
8012a5a: b082 sub sp, #8
8012a5c: af00 add r7, sp, #0
8012a5e: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
8012a60: 687b ldr r3, [r7, #4]
8012a62: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8012a66: 4618 mov r0, r3
8012a68: f7f8 ff0d bl 800b886 <USBD_LL_Suspend>
__HAL_PCD_GATE_PHYCLOCK(hpcd);
8012a6c: 687b ldr r3, [r7, #4]
8012a6e: 681b ldr r3, [r3, #0]
8012a70: f503 6360 add.w r3, r3, #3584 @ 0xe00
8012a74: 681b ldr r3, [r3, #0]
8012a76: 687a ldr r2, [r7, #4]
8012a78: 6812 ldr r2, [r2, #0]
8012a7a: f502 6260 add.w r2, r2, #3584 @ 0xe00
8012a7e: f043 0301 orr.w r3, r3, #1
8012a82: 6013 str r3, [r2, #0]
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
8012a84: 687b ldr r3, [r7, #4]
8012a86: 7adb ldrb r3, [r3, #11]
8012a88: 2b00 cmp r3, #0
8012a8a: d005 beq.n 8012a98 <HAL_PCD_SuspendCallback+0x40>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
8012a8c: 4b04 ldr r3, [pc, #16] @ (8012aa0 <HAL_PCD_SuspendCallback+0x48>)
8012a8e: 691b ldr r3, [r3, #16]
8012a90: 4a03 ldr r2, [pc, #12] @ (8012aa0 <HAL_PCD_SuspendCallback+0x48>)
8012a92: f043 0306 orr.w r3, r3, #6
8012a96: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
8012a98: bf00 nop
8012a9a: 3708 adds r7, #8
8012a9c: 46bd mov sp, r7
8012a9e: bd80 pop {r7, pc}
8012aa0: e000ed00 .word 0xe000ed00
08012aa4 <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8012aa4: b580 push {r7, lr}
8012aa6: b082 sub sp, #8
8012aa8: af00 add r7, sp, #0
8012aaa: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
8012aac: 687b ldr r3, [r7, #4]
8012aae: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8012ab2: 4618 mov r0, r3
8012ab4: f7f8 ff03 bl 800b8be <USBD_LL_Resume>
}
8012ab8: bf00 nop
8012aba: 3708 adds r7, #8
8012abc: 46bd mov sp, r7
8012abe: bd80 pop {r7, pc}
08012ac0 <HAL_PCD_ISOOUTIncompleteCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8012ac0: b580 push {r7, lr}
8012ac2: b082 sub sp, #8
8012ac4: af00 add r7, sp, #0
8012ac6: 6078 str r0, [r7, #4]
8012ac8: 460b mov r3, r1
8012aca: 70fb strb r3, [r7, #3]
USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
8012acc: 687b ldr r3, [r7, #4]
8012ace: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8012ad2: 78fa ldrb r2, [r7, #3]
8012ad4: 4611 mov r1, r2
8012ad6: 4618 mov r0, r3
8012ad8: f7f8 ff5b bl 800b992 <USBD_LL_IsoOUTIncomplete>
}
8012adc: bf00 nop
8012ade: 3708 adds r7, #8
8012ae0: 46bd mov sp, r7
8012ae2: bd80 pop {r7, pc}
08012ae4 <HAL_PCD_ISOINIncompleteCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8012ae4: b580 push {r7, lr}
8012ae6: b082 sub sp, #8
8012ae8: af00 add r7, sp, #0
8012aea: 6078 str r0, [r7, #4]
8012aec: 460b mov r3, r1
8012aee: 70fb strb r3, [r7, #3]
USBD_LL_IsoINIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
8012af0: 687b ldr r3, [r7, #4]
8012af2: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8012af6: 78fa ldrb r2, [r7, #3]
8012af8: 4611 mov r1, r2
8012afa: 4618 mov r0, r3
8012afc: f7f8 ff17 bl 800b92e <USBD_LL_IsoINIncomplete>
}
8012b00: bf00 nop
8012b02: 3708 adds r7, #8
8012b04: 46bd mov sp, r7
8012b06: bd80 pop {r7, pc}
08012b08 <HAL_PCD_ConnectCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8012b08: b580 push {r7, lr}
8012b0a: b082 sub sp, #8
8012b0c: af00 add r7, sp, #0
8012b0e: 6078 str r0, [r7, #4]
USBD_LL_DevConnected((USBD_HandleTypeDef*)hpcd->pData);
8012b10: 687b ldr r3, [r7, #4]
8012b12: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8012b16: 4618 mov r0, r3
8012b18: f7f8 ff6d bl 800b9f6 <USBD_LL_DevConnected>
}
8012b1c: bf00 nop
8012b1e: 3708 adds r7, #8
8012b20: 46bd mov sp, r7
8012b22: bd80 pop {r7, pc}
08012b24 <HAL_PCD_DisconnectCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8012b24: b580 push {r7, lr}
8012b26: b082 sub sp, #8
8012b28: af00 add r7, sp, #0
8012b2a: 6078 str r0, [r7, #4]
USBD_LL_DevDisconnected((USBD_HandleTypeDef*)hpcd->pData);
8012b2c: 687b ldr r3, [r7, #4]
8012b2e: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8012b32: 4618 mov r0, r3
8012b34: f7f8 ff6a bl 800ba0c <USBD_LL_DevDisconnected>
}
8012b38: bf00 nop
8012b3a: 3708 adds r7, #8
8012b3c: 46bd mov sp, r7
8012b3e: bd80 pop {r7, pc}
08012b40 <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
8012b40: b580 push {r7, lr}
8012b42: b082 sub sp, #8
8012b44: af00 add r7, sp, #0
8012b46: 6078 str r0, [r7, #4]
/* Init USB Ip. */
if (pdev->id == DEVICE_FS) {
8012b48: 687b ldr r3, [r7, #4]
8012b4a: 781b ldrb r3, [r3, #0]
8012b4c: 2b00 cmp r3, #0
8012b4e: d13f bne.n 8012bd0 <USBD_LL_Init+0x90>
/* Link the driver to the stack. */
hpcd_USB_OTG_FS.pData = pdev;
8012b50: 4a22 ldr r2, [pc, #136] @ (8012bdc <USBD_LL_Init+0x9c>)
8012b52: 687b ldr r3, [r7, #4]
8012b54: f8c2 34e0 str.w r3, [r2, #1248] @ 0x4e0
pdev->pData = &hpcd_USB_OTG_FS;
8012b58: 687b ldr r3, [r7, #4]
8012b5a: 4a20 ldr r2, [pc, #128] @ (8012bdc <USBD_LL_Init+0x9c>)
8012b5c: f8c3 22c8 str.w r2, [r3, #712] @ 0x2c8
hpcd_USB_OTG_FS.Instance = USB_OTG_FS;
8012b60: 4b1e ldr r3, [pc, #120] @ (8012bdc <USBD_LL_Init+0x9c>)
8012b62: f04f 42a0 mov.w r2, #1342177280 @ 0x50000000
8012b66: 601a str r2, [r3, #0]
hpcd_USB_OTG_FS.Init.dev_endpoints = 6;
8012b68: 4b1c ldr r3, [pc, #112] @ (8012bdc <USBD_LL_Init+0x9c>)
8012b6a: 2206 movs r2, #6
8012b6c: 711a strb r2, [r3, #4]
hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL;
8012b6e: 4b1b ldr r3, [pc, #108] @ (8012bdc <USBD_LL_Init+0x9c>)
8012b70: 2202 movs r2, #2
8012b72: 71da strb r2, [r3, #7]
hpcd_USB_OTG_FS.Init.dma_enable = DISABLE;
8012b74: 4b19 ldr r3, [pc, #100] @ (8012bdc <USBD_LL_Init+0x9c>)
8012b76: 2200 movs r2, #0
8012b78: 719a strb r2, [r3, #6]
hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED;
8012b7a: 4b18 ldr r3, [pc, #96] @ (8012bdc <USBD_LL_Init+0x9c>)
8012b7c: 2202 movs r2, #2
8012b7e: 725a strb r2, [r3, #9]
hpcd_USB_OTG_FS.Init.Sof_enable = DISABLE;
8012b80: 4b16 ldr r3, [pc, #88] @ (8012bdc <USBD_LL_Init+0x9c>)
8012b82: 2200 movs r2, #0
8012b84: 729a strb r2, [r3, #10]
hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE;
8012b86: 4b15 ldr r3, [pc, #84] @ (8012bdc <USBD_LL_Init+0x9c>)
8012b88: 2200 movs r2, #0
8012b8a: 72da strb r2, [r3, #11]
hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE;
8012b8c: 4b13 ldr r3, [pc, #76] @ (8012bdc <USBD_LL_Init+0x9c>)
8012b8e: 2200 movs r2, #0
8012b90: 731a strb r2, [r3, #12]
hpcd_USB_OTG_FS.Init.battery_charging_enable = DISABLE;
8012b92: 4b12 ldr r3, [pc, #72] @ (8012bdc <USBD_LL_Init+0x9c>)
8012b94: 2200 movs r2, #0
8012b96: 735a strb r2, [r3, #13]
hpcd_USB_OTG_FS.Init.vbus_sensing_enable = DISABLE;
8012b98: 4b10 ldr r3, [pc, #64] @ (8012bdc <USBD_LL_Init+0x9c>)
8012b9a: 2200 movs r2, #0
8012b9c: 739a strb r2, [r3, #14]
hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE;
8012b9e: 4b0f ldr r3, [pc, #60] @ (8012bdc <USBD_LL_Init+0x9c>)
8012ba0: 2200 movs r2, #0
8012ba2: 73da strb r2, [r3, #15]
if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK)
8012ba4: 480d ldr r0, [pc, #52] @ (8012bdc <USBD_LL_Init+0x9c>)
8012ba6: f7f1 fc1c bl 80043e2 <HAL_PCD_Init>
8012baa: 4603 mov r3, r0
8012bac: 2b00 cmp r3, #0
8012bae: d001 beq.n 8012bb4 <USBD_LL_Init+0x74>
{
Error_Handler( );
8012bb0: f7ee fa51 bl 8001056 <Error_Handler>
HAL_PCD_RegisterDataOutStageCallback(&hpcd_USB_OTG_FS, PCD_DataOutStageCallback);
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_OTG_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
HAL_PCDEx_SetRxFiFo(&hpcd_USB_OTG_FS, 0x80);
8012bb4: 2180 movs r1, #128 @ 0x80
8012bb6: 4809 ldr r0, [pc, #36] @ (8012bdc <USBD_LL_Init+0x9c>)
8012bb8: f7f2 ff07 bl 80059ca <HAL_PCDEx_SetRxFiFo>
HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 0, 0x40);
8012bbc: 2240 movs r2, #64 @ 0x40
8012bbe: 2100 movs r1, #0
8012bc0: 4806 ldr r0, [pc, #24] @ (8012bdc <USBD_LL_Init+0x9c>)
8012bc2: f7f2 febb bl 800593c <HAL_PCDEx_SetTxFiFo>
HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x80);
8012bc6: 2280 movs r2, #128 @ 0x80
8012bc8: 2101 movs r1, #1
8012bca: 4804 ldr r0, [pc, #16] @ (8012bdc <USBD_LL_Init+0x9c>)
8012bcc: f7f2 feb6 bl 800593c <HAL_PCDEx_SetTxFiFo>
}
return USBD_OK;
8012bd0: 2300 movs r3, #0
}
8012bd2: 4618 mov r0, r3
8012bd4: 3708 adds r7, #8
8012bd6: 46bd mov sp, r7
8012bd8: bd80 pop {r7, pc}
8012bda: bf00 nop
8012bdc: 200145c8 .word 0x200145c8
08012be0 <USBD_LL_DeInit>:
* @brief De-Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev)
{
8012be0: b580 push {r7, lr}
8012be2: b084 sub sp, #16
8012be4: af00 add r7, sp, #0
8012be6: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
8012be8: 2300 movs r3, #0
8012bea: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8012bec: 2300 movs r3, #0
8012bee: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_DeInit(pdev->pData);
8012bf0: 687b ldr r3, [r7, #4]
8012bf2: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8
8012bf6: 4618 mov r0, r3
8012bf8: f7f1 fd09 bl 800460e <HAL_PCD_DeInit>
8012bfc: 4603 mov r3, r0
8012bfe: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8012c00: 7bfb ldrb r3, [r7, #15]
8012c02: 4618 mov r0, r3
8012c04: f000 f998 bl 8012f38 <USBD_Get_USB_Status>
8012c08: 4603 mov r3, r0
8012c0a: 73bb strb r3, [r7, #14]
return usb_status;
8012c0c: 7bbb ldrb r3, [r7, #14]
}
8012c0e: 4618 mov r0, r3
8012c10: 3710 adds r7, #16
8012c12: 46bd mov sp, r7
8012c14: bd80 pop {r7, pc}
08012c16 <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
8012c16: b580 push {r7, lr}
8012c18: b084 sub sp, #16
8012c1a: af00 add r7, sp, #0
8012c1c: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
8012c1e: 2300 movs r3, #0
8012c20: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8012c22: 2300 movs r3, #0
8012c24: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
8012c26: 687b ldr r3, [r7, #4]
8012c28: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8
8012c2c: 4618 mov r0, r3
8012c2e: f7f1 fd11 bl 8004654 <HAL_PCD_Start>
8012c32: 4603 mov r3, r0
8012c34: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8012c36: 7bfb ldrb r3, [r7, #15]
8012c38: 4618 mov r0, r3
8012c3a: f000 f97d bl 8012f38 <USBD_Get_USB_Status>
8012c3e: 4603 mov r3, r0
8012c40: 73bb strb r3, [r7, #14]
return usb_status;
8012c42: 7bbb ldrb r3, [r7, #14]
}
8012c44: 4618 mov r0, r3
8012c46: 3710 adds r7, #16
8012c48: 46bd mov sp, r7
8012c4a: bd80 pop {r7, pc}
08012c4c <USBD_LL_Stop>:
* @brief Stops the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev)
{
8012c4c: b580 push {r7, lr}
8012c4e: b084 sub sp, #16
8012c50: af00 add r7, sp, #0
8012c52: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
8012c54: 2300 movs r3, #0
8012c56: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8012c58: 2300 movs r3, #0
8012c5a: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Stop(pdev->pData);
8012c5c: 687b ldr r3, [r7, #4]
8012c5e: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8
8012c62: 4618 mov r0, r3
8012c64: f7f1 fd2b bl 80046be <HAL_PCD_Stop>
8012c68: 4603 mov r3, r0
8012c6a: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8012c6c: 7bfb ldrb r3, [r7, #15]
8012c6e: 4618 mov r0, r3
8012c70: f000 f962 bl 8012f38 <USBD_Get_USB_Status>
8012c74: 4603 mov r3, r0
8012c76: 73bb strb r3, [r7, #14]
return usb_status;
8012c78: 7bbb ldrb r3, [r7, #14]
}
8012c7a: 4618 mov r0, r3
8012c7c: 3710 adds r7, #16
8012c7e: 46bd mov sp, r7
8012c80: bd80 pop {r7, pc}
08012c82 <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
8012c82: b580 push {r7, lr}
8012c84: b084 sub sp, #16
8012c86: af00 add r7, sp, #0
8012c88: 6078 str r0, [r7, #4]
8012c8a: 4608 mov r0, r1
8012c8c: 4611 mov r1, r2
8012c8e: 461a mov r2, r3
8012c90: 4603 mov r3, r0
8012c92: 70fb strb r3, [r7, #3]
8012c94: 460b mov r3, r1
8012c96: 70bb strb r3, [r7, #2]
8012c98: 4613 mov r3, r2
8012c9a: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
8012c9c: 2300 movs r3, #0
8012c9e: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8012ca0: 2300 movs r3, #0
8012ca2: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
8012ca4: 687b ldr r3, [r7, #4]
8012ca6: f8d3 02c8 ldr.w r0, [r3, #712] @ 0x2c8
8012caa: 78bb ldrb r3, [r7, #2]
8012cac: 883a ldrh r2, [r7, #0]
8012cae: 78f9 ldrb r1, [r7, #3]
8012cb0: f7f2 fa32 bl 8005118 <HAL_PCD_EP_Open>
8012cb4: 4603 mov r3, r0
8012cb6: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8012cb8: 7bfb ldrb r3, [r7, #15]
8012cba: 4618 mov r0, r3
8012cbc: f000 f93c bl 8012f38 <USBD_Get_USB_Status>
8012cc0: 4603 mov r3, r0
8012cc2: 73bb strb r3, [r7, #14]
return usb_status;
8012cc4: 7bbb ldrb r3, [r7, #14]
}
8012cc6: 4618 mov r0, r3
8012cc8: 3710 adds r7, #16
8012cca: 46bd mov sp, r7
8012ccc: bd80 pop {r7, pc}
08012cce <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8012cce: b580 push {r7, lr}
8012cd0: b084 sub sp, #16
8012cd2: af00 add r7, sp, #0
8012cd4: 6078 str r0, [r7, #4]
8012cd6: 460b mov r3, r1
8012cd8: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8012cda: 2300 movs r3, #0
8012cdc: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8012cde: 2300 movs r3, #0
8012ce0: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
8012ce2: 687b ldr r3, [r7, #4]
8012ce4: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8
8012ce8: 78fa ldrb r2, [r7, #3]
8012cea: 4611 mov r1, r2
8012cec: 4618 mov r0, r3
8012cee: f7f2 fa7d bl 80051ec <HAL_PCD_EP_Close>
8012cf2: 4603 mov r3, r0
8012cf4: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8012cf6: 7bfb ldrb r3, [r7, #15]
8012cf8: 4618 mov r0, r3
8012cfa: f000 f91d bl 8012f38 <USBD_Get_USB_Status>
8012cfe: 4603 mov r3, r0
8012d00: 73bb strb r3, [r7, #14]
return usb_status;
8012d02: 7bbb ldrb r3, [r7, #14]
}
8012d04: 4618 mov r0, r3
8012d06: 3710 adds r7, #16
8012d08: 46bd mov sp, r7
8012d0a: bd80 pop {r7, pc}
08012d0c <USBD_LL_FlushEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8012d0c: b580 push {r7, lr}
8012d0e: b084 sub sp, #16
8012d10: af00 add r7, sp, #0
8012d12: 6078 str r0, [r7, #4]
8012d14: 460b mov r3, r1
8012d16: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8012d18: 2300 movs r3, #0
8012d1a: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8012d1c: 2300 movs r3, #0
8012d1e: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Flush(pdev->pData, ep_addr);
8012d20: 687b ldr r3, [r7, #4]
8012d22: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8
8012d26: 78fa ldrb r2, [r7, #3]
8012d28: 4611 mov r1, r2
8012d2a: 4618 mov r0, r3
8012d2c: f7f2 fc1f bl 800556e <HAL_PCD_EP_Flush>
8012d30: 4603 mov r3, r0
8012d32: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8012d34: 7bfb ldrb r3, [r7, #15]
8012d36: 4618 mov r0, r3
8012d38: f000 f8fe bl 8012f38 <USBD_Get_USB_Status>
8012d3c: 4603 mov r3, r0
8012d3e: 73bb strb r3, [r7, #14]
return usb_status;
8012d40: 7bbb ldrb r3, [r7, #14]
}
8012d42: 4618 mov r0, r3
8012d44: 3710 adds r7, #16
8012d46: 46bd mov sp, r7
8012d48: bd80 pop {r7, pc}
08012d4a <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8012d4a: b580 push {r7, lr}
8012d4c: b084 sub sp, #16
8012d4e: af00 add r7, sp, #0
8012d50: 6078 str r0, [r7, #4]
8012d52: 460b mov r3, r1
8012d54: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8012d56: 2300 movs r3, #0
8012d58: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8012d5a: 2300 movs r3, #0
8012d5c: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
8012d5e: 687b ldr r3, [r7, #4]
8012d60: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8
8012d64: 78fa ldrb r2, [r7, #3]
8012d66: 4611 mov r1, r2
8012d68: 4618 mov r0, r3
8012d6a: f7f2 fb16 bl 800539a <HAL_PCD_EP_SetStall>
8012d6e: 4603 mov r3, r0
8012d70: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8012d72: 7bfb ldrb r3, [r7, #15]
8012d74: 4618 mov r0, r3
8012d76: f000 f8df bl 8012f38 <USBD_Get_USB_Status>
8012d7a: 4603 mov r3, r0
8012d7c: 73bb strb r3, [r7, #14]
return usb_status;
8012d7e: 7bbb ldrb r3, [r7, #14]
}
8012d80: 4618 mov r0, r3
8012d82: 3710 adds r7, #16
8012d84: 46bd mov sp, r7
8012d86: bd80 pop {r7, pc}
08012d88 <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8012d88: b580 push {r7, lr}
8012d8a: b084 sub sp, #16
8012d8c: af00 add r7, sp, #0
8012d8e: 6078 str r0, [r7, #4]
8012d90: 460b mov r3, r1
8012d92: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8012d94: 2300 movs r3, #0
8012d96: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8012d98: 2300 movs r3, #0
8012d9a: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
8012d9c: 687b ldr r3, [r7, #4]
8012d9e: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8
8012da2: 78fa ldrb r2, [r7, #3]
8012da4: 4611 mov r1, r2
8012da6: 4618 mov r0, r3
8012da8: f7f2 fb5a bl 8005460 <HAL_PCD_EP_ClrStall>
8012dac: 4603 mov r3, r0
8012dae: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8012db0: 7bfb ldrb r3, [r7, #15]
8012db2: 4618 mov r0, r3
8012db4: f000 f8c0 bl 8012f38 <USBD_Get_USB_Status>
8012db8: 4603 mov r3, r0
8012dba: 73bb strb r3, [r7, #14]
return usb_status;
8012dbc: 7bbb ldrb r3, [r7, #14]
}
8012dbe: 4618 mov r0, r3
8012dc0: 3710 adds r7, #16
8012dc2: 46bd mov sp, r7
8012dc4: bd80 pop {r7, pc}
08012dc6 <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8012dc6: b480 push {r7}
8012dc8: b085 sub sp, #20
8012dca: af00 add r7, sp, #0
8012dcc: 6078 str r0, [r7, #4]
8012dce: 460b mov r3, r1
8012dd0: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
8012dd2: 687b ldr r3, [r7, #4]
8012dd4: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8
8012dd8: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
8012dda: f997 3003 ldrsb.w r3, [r7, #3]
8012dde: 2b00 cmp r3, #0
8012de0: da0b bge.n 8012dfa <USBD_LL_IsStallEP+0x34>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
8012de2: 78fb ldrb r3, [r7, #3]
8012de4: f003 027f and.w r2, r3, #127 @ 0x7f
8012de8: 68f9 ldr r1, [r7, #12]
8012dea: 4613 mov r3, r2
8012dec: 00db lsls r3, r3, #3
8012dee: 4413 add r3, r2
8012df0: 009b lsls r3, r3, #2
8012df2: 440b add r3, r1
8012df4: 3316 adds r3, #22
8012df6: 781b ldrb r3, [r3, #0]
8012df8: e00b b.n 8012e12 <USBD_LL_IsStallEP+0x4c>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
8012dfa: 78fb ldrb r3, [r7, #3]
8012dfc: f003 027f and.w r2, r3, #127 @ 0x7f
8012e00: 68f9 ldr r1, [r7, #12]
8012e02: 4613 mov r3, r2
8012e04: 00db lsls r3, r3, #3
8012e06: 4413 add r3, r2
8012e08: 009b lsls r3, r3, #2
8012e0a: 440b add r3, r1
8012e0c: f203 2356 addw r3, r3, #598 @ 0x256
8012e10: 781b ldrb r3, [r3, #0]
}
}
8012e12: 4618 mov r0, r3
8012e14: 3714 adds r7, #20
8012e16: 46bd mov sp, r7
8012e18: f85d 7b04 ldr.w r7, [sp], #4
8012e1c: 4770 bx lr
08012e1e <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
8012e1e: b580 push {r7, lr}
8012e20: b084 sub sp, #16
8012e22: af00 add r7, sp, #0
8012e24: 6078 str r0, [r7, #4]
8012e26: 460b mov r3, r1
8012e28: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8012e2a: 2300 movs r3, #0
8012e2c: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8012e2e: 2300 movs r3, #0
8012e30: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
8012e32: 687b ldr r3, [r7, #4]
8012e34: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8
8012e38: 78fa ldrb r2, [r7, #3]
8012e3a: 4611 mov r1, r2
8012e3c: 4618 mov r0, r3
8012e3e: f7f2 f947 bl 80050d0 <HAL_PCD_SetAddress>
8012e42: 4603 mov r3, r0
8012e44: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8012e46: 7bfb ldrb r3, [r7, #15]
8012e48: 4618 mov r0, r3
8012e4a: f000 f875 bl 8012f38 <USBD_Get_USB_Status>
8012e4e: 4603 mov r3, r0
8012e50: 73bb strb r3, [r7, #14]
return usb_status;
8012e52: 7bbb ldrb r3, [r7, #14]
}
8012e54: 4618 mov r0, r3
8012e56: 3710 adds r7, #16
8012e58: 46bd mov sp, r7
8012e5a: bd80 pop {r7, pc}
08012e5c <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size)
{
8012e5c: b580 push {r7, lr}
8012e5e: b086 sub sp, #24
8012e60: af00 add r7, sp, #0
8012e62: 60f8 str r0, [r7, #12]
8012e64: 607a str r2, [r7, #4]
8012e66: 603b str r3, [r7, #0]
8012e68: 460b mov r3, r1
8012e6a: 72fb strb r3, [r7, #11]
HAL_StatusTypeDef hal_status = HAL_OK;
8012e6c: 2300 movs r3, #0
8012e6e: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
8012e70: 2300 movs r3, #0
8012e72: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
8012e74: 68fb ldr r3, [r7, #12]
8012e76: f8d3 02c8 ldr.w r0, [r3, #712] @ 0x2c8
8012e7a: 7af9 ldrb r1, [r7, #11]
8012e7c: 683b ldr r3, [r7, #0]
8012e7e: 687a ldr r2, [r7, #4]
8012e80: f7f2 fa51 bl 8005326 <HAL_PCD_EP_Transmit>
8012e84: 4603 mov r3, r0
8012e86: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
8012e88: 7dfb ldrb r3, [r7, #23]
8012e8a: 4618 mov r0, r3
8012e8c: f000 f854 bl 8012f38 <USBD_Get_USB_Status>
8012e90: 4603 mov r3, r0
8012e92: 75bb strb r3, [r7, #22]
return usb_status;
8012e94: 7dbb ldrb r3, [r7, #22]
}
8012e96: 4618 mov r0, r3
8012e98: 3718 adds r7, #24
8012e9a: 46bd mov sp, r7
8012e9c: bd80 pop {r7, pc}
08012e9e <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size)
{
8012e9e: b580 push {r7, lr}
8012ea0: b086 sub sp, #24
8012ea2: af00 add r7, sp, #0
8012ea4: 60f8 str r0, [r7, #12]
8012ea6: 607a str r2, [r7, #4]
8012ea8: 603b str r3, [r7, #0]
8012eaa: 460b mov r3, r1
8012eac: 72fb strb r3, [r7, #11]
HAL_StatusTypeDef hal_status = HAL_OK;
8012eae: 2300 movs r3, #0
8012eb0: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
8012eb2: 2300 movs r3, #0
8012eb4: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
8012eb6: 68fb ldr r3, [r7, #12]
8012eb8: f8d3 02c8 ldr.w r0, [r3, #712] @ 0x2c8
8012ebc: 7af9 ldrb r1, [r7, #11]
8012ebe: 683b ldr r3, [r7, #0]
8012ec0: 687a ldr r2, [r7, #4]
8012ec2: f7f2 f9dd bl 8005280 <HAL_PCD_EP_Receive>
8012ec6: 4603 mov r3, r0
8012ec8: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
8012eca: 7dfb ldrb r3, [r7, #23]
8012ecc: 4618 mov r0, r3
8012ece: f000 f833 bl 8012f38 <USBD_Get_USB_Status>
8012ed2: 4603 mov r3, r0
8012ed4: 75bb strb r3, [r7, #22]
return usb_status;
8012ed6: 7dbb ldrb r3, [r7, #22]
}
8012ed8: 4618 mov r0, r3
8012eda: 3718 adds r7, #24
8012edc: 46bd mov sp, r7
8012ede: bd80 pop {r7, pc}
08012ee0 <USBD_LL_GetRxDataSize>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Received Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8012ee0: b580 push {r7, lr}
8012ee2: b082 sub sp, #8
8012ee4: af00 add r7, sp, #0
8012ee6: 6078 str r0, [r7, #4]
8012ee8: 460b mov r3, r1
8012eea: 70fb strb r3, [r7, #3]
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
8012eec: 687b ldr r3, [r7, #4]
8012eee: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8
8012ef2: 78fa ldrb r2, [r7, #3]
8012ef4: 4611 mov r1, r2
8012ef6: 4618 mov r0, r3
8012ef8: f7f2 f9fd bl 80052f6 <HAL_PCD_EP_GetRxCount>
8012efc: 4603 mov r3, r0
}
8012efe: 4618 mov r0, r3
8012f00: 3708 adds r7, #8
8012f02: 46bd mov sp, r7
8012f04: bd80 pop {r7, pc}
...
08012f08 <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
8012f08: b480 push {r7}
8012f0a: b083 sub sp, #12
8012f0c: af00 add r7, sp, #0
8012f0e: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_MSC_BOT_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
8012f10: 4b03 ldr r3, [pc, #12] @ (8012f20 <USBD_static_malloc+0x18>)
}
8012f12: 4618 mov r0, r3
8012f14: 370c adds r7, #12
8012f16: 46bd mov sp, r7
8012f18: f85d 7b04 ldr.w r7, [sp], #4
8012f1c: 4770 bx lr
8012f1e: bf00 nop
8012f20: 20014aac .word 0x20014aac
08012f24 <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
8012f24: b480 push {r7}
8012f26: b083 sub sp, #12
8012f28: af00 add r7, sp, #0
8012f2a: 6078 str r0, [r7, #4]
}
8012f2c: bf00 nop
8012f2e: 370c adds r7, #12
8012f30: 46bd mov sp, r7
8012f32: f85d 7b04 ldr.w r7, [sp], #4
8012f36: 4770 bx lr
08012f38 <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
8012f38: b480 push {r7}
8012f3a: b085 sub sp, #20
8012f3c: af00 add r7, sp, #0
8012f3e: 4603 mov r3, r0
8012f40: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
8012f42: 2300 movs r3, #0
8012f44: 73fb strb r3, [r7, #15]
switch (hal_status)
8012f46: 79fb ldrb r3, [r7, #7]
8012f48: 2b03 cmp r3, #3
8012f4a: d817 bhi.n 8012f7c <USBD_Get_USB_Status+0x44>
8012f4c: a201 add r2, pc, #4 @ (adr r2, 8012f54 <USBD_Get_USB_Status+0x1c>)
8012f4e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8012f52: bf00 nop
8012f54: 08012f65 .word 0x08012f65
8012f58: 08012f6b .word 0x08012f6b
8012f5c: 08012f71 .word 0x08012f71
8012f60: 08012f77 .word 0x08012f77
{
case HAL_OK :
usb_status = USBD_OK;
8012f64: 2300 movs r3, #0
8012f66: 73fb strb r3, [r7, #15]
break;
8012f68: e00b b.n 8012f82 <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
8012f6a: 2303 movs r3, #3
8012f6c: 73fb strb r3, [r7, #15]
break;
8012f6e: e008 b.n 8012f82 <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
8012f70: 2301 movs r3, #1
8012f72: 73fb strb r3, [r7, #15]
break;
8012f74: e005 b.n 8012f82 <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
8012f76: 2303 movs r3, #3
8012f78: 73fb strb r3, [r7, #15]
break;
8012f7a: e002 b.n 8012f82 <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
8012f7c: 2303 movs r3, #3
8012f7e: 73fb strb r3, [r7, #15]
break;
8012f80: bf00 nop
}
return usb_status;
8012f82: 7bfb ldrb r3, [r7, #15]
}
8012f84: 4618 mov r0, r3
8012f86: 3714 adds r7, #20
8012f88: 46bd mov sp, r7
8012f8a: f85d 7b04 ldr.w r7, [sp], #4
8012f8e: 4770 bx lr
08012f90 <siprintf>:
8012f90: b40e push {r1, r2, r3}
8012f92: b500 push {lr}
8012f94: b09c sub sp, #112 @ 0x70
8012f96: ab1d add r3, sp, #116 @ 0x74
8012f98: 9002 str r0, [sp, #8]
8012f9a: 9006 str r0, [sp, #24]
8012f9c: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
8012fa0: 4809 ldr r0, [pc, #36] @ (8012fc8 <siprintf+0x38>)
8012fa2: 9107 str r1, [sp, #28]
8012fa4: 9104 str r1, [sp, #16]
8012fa6: 4909 ldr r1, [pc, #36] @ (8012fcc <siprintf+0x3c>)
8012fa8: f853 2b04 ldr.w r2, [r3], #4
8012fac: 9105 str r1, [sp, #20]
8012fae: 6800 ldr r0, [r0, #0]
8012fb0: 9301 str r3, [sp, #4]
8012fb2: a902 add r1, sp, #8
8012fb4: f000 f9f8 bl 80133a8 <_svfiprintf_r>
8012fb8: 9b02 ldr r3, [sp, #8]
8012fba: 2200 movs r2, #0
8012fbc: 701a strb r2, [r3, #0]
8012fbe: b01c add sp, #112 @ 0x70
8012fc0: f85d eb04 ldr.w lr, [sp], #4
8012fc4: b003 add sp, #12
8012fc6: 4770 bx lr
8012fc8: 20000114 .word 0x20000114
8012fcc: ffff0208 .word 0xffff0208
08012fd0 <memset>:
8012fd0: 4402 add r2, r0
8012fd2: 4603 mov r3, r0
8012fd4: 4293 cmp r3, r2
8012fd6: d100 bne.n 8012fda <memset+0xa>
8012fd8: 4770 bx lr
8012fda: f803 1b01 strb.w r1, [r3], #1
8012fde: e7f9 b.n 8012fd4 <memset+0x4>
08012fe0 <_reclaim_reent>:
8012fe0: 4b29 ldr r3, [pc, #164] @ (8013088 <_reclaim_reent+0xa8>)
8012fe2: 681b ldr r3, [r3, #0]
8012fe4: 4283 cmp r3, r0
8012fe6: b570 push {r4, r5, r6, lr}
8012fe8: 4604 mov r4, r0
8012fea: d04b beq.n 8013084 <_reclaim_reent+0xa4>
8012fec: 69c3 ldr r3, [r0, #28]
8012fee: b1ab cbz r3, 801301c <_reclaim_reent+0x3c>
8012ff0: 68db ldr r3, [r3, #12]
8012ff2: b16b cbz r3, 8013010 <_reclaim_reent+0x30>
8012ff4: 2500 movs r5, #0
8012ff6: 69e3 ldr r3, [r4, #28]
8012ff8: 68db ldr r3, [r3, #12]
8012ffa: 5959 ldr r1, [r3, r5]
8012ffc: 2900 cmp r1, #0
8012ffe: d13b bne.n 8013078 <_reclaim_reent+0x98>
8013000: 3504 adds r5, #4
8013002: 2d80 cmp r5, #128 @ 0x80
8013004: d1f7 bne.n 8012ff6 <_reclaim_reent+0x16>
8013006: 69e3 ldr r3, [r4, #28]
8013008: 4620 mov r0, r4
801300a: 68d9 ldr r1, [r3, #12]
801300c: f000 f878 bl 8013100 <_free_r>
8013010: 69e3 ldr r3, [r4, #28]
8013012: 6819 ldr r1, [r3, #0]
8013014: b111 cbz r1, 801301c <_reclaim_reent+0x3c>
8013016: 4620 mov r0, r4
8013018: f000 f872 bl 8013100 <_free_r>
801301c: 6961 ldr r1, [r4, #20]
801301e: b111 cbz r1, 8013026 <_reclaim_reent+0x46>
8013020: 4620 mov r0, r4
8013022: f000 f86d bl 8013100 <_free_r>
8013026: 69e1 ldr r1, [r4, #28]
8013028: b111 cbz r1, 8013030 <_reclaim_reent+0x50>
801302a: 4620 mov r0, r4
801302c: f000 f868 bl 8013100 <_free_r>
8013030: 6b21 ldr r1, [r4, #48] @ 0x30
8013032: b111 cbz r1, 801303a <_reclaim_reent+0x5a>
8013034: 4620 mov r0, r4
8013036: f000 f863 bl 8013100 <_free_r>
801303a: 6b61 ldr r1, [r4, #52] @ 0x34
801303c: b111 cbz r1, 8013044 <_reclaim_reent+0x64>
801303e: 4620 mov r0, r4
8013040: f000 f85e bl 8013100 <_free_r>
8013044: 6ba1 ldr r1, [r4, #56] @ 0x38
8013046: b111 cbz r1, 801304e <_reclaim_reent+0x6e>
8013048: 4620 mov r0, r4
801304a: f000 f859 bl 8013100 <_free_r>
801304e: 6ca1 ldr r1, [r4, #72] @ 0x48
8013050: b111 cbz r1, 8013058 <_reclaim_reent+0x78>
8013052: 4620 mov r0, r4
8013054: f000 f854 bl 8013100 <_free_r>
8013058: 6c61 ldr r1, [r4, #68] @ 0x44
801305a: b111 cbz r1, 8013062 <_reclaim_reent+0x82>
801305c: 4620 mov r0, r4
801305e: f000 f84f bl 8013100 <_free_r>
8013062: 6ae1 ldr r1, [r4, #44] @ 0x2c
8013064: b111 cbz r1, 801306c <_reclaim_reent+0x8c>
8013066: 4620 mov r0, r4
8013068: f000 f84a bl 8013100 <_free_r>
801306c: 6a23 ldr r3, [r4, #32]
801306e: b14b cbz r3, 8013084 <_reclaim_reent+0xa4>
8013070: 4620 mov r0, r4
8013072: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
8013076: 4718 bx r3
8013078: 680e ldr r6, [r1, #0]
801307a: 4620 mov r0, r4
801307c: f000 f840 bl 8013100 <_free_r>
8013080: 4631 mov r1, r6
8013082: e7bb b.n 8012ffc <_reclaim_reent+0x1c>
8013084: bd70 pop {r4, r5, r6, pc}
8013086: bf00 nop
8013088: 20000114 .word 0x20000114
0801308c <__errno>:
801308c: 4b01 ldr r3, [pc, #4] @ (8013094 <__errno+0x8>)
801308e: 6818 ldr r0, [r3, #0]
8013090: 4770 bx lr
8013092: bf00 nop
8013094: 20000114 .word 0x20000114
08013098 <__libc_init_array>:
8013098: b570 push {r4, r5, r6, lr}
801309a: 4d0d ldr r5, [pc, #52] @ (80130d0 <__libc_init_array+0x38>)
801309c: 4c0d ldr r4, [pc, #52] @ (80130d4 <__libc_init_array+0x3c>)
801309e: 1b64 subs r4, r4, r5
80130a0: 10a4 asrs r4, r4, #2
80130a2: 2600 movs r6, #0
80130a4: 42a6 cmp r6, r4
80130a6: d109 bne.n 80130bc <__libc_init_array+0x24>
80130a8: 4d0b ldr r5, [pc, #44] @ (80130d8 <__libc_init_array+0x40>)
80130aa: 4c0c ldr r4, [pc, #48] @ (80130dc <__libc_init_array+0x44>)
80130ac: f000 fc66 bl 801397c <_init>
80130b0: 1b64 subs r4, r4, r5
80130b2: 10a4 asrs r4, r4, #2
80130b4: 2600 movs r6, #0
80130b6: 42a6 cmp r6, r4
80130b8: d105 bne.n 80130c6 <__libc_init_array+0x2e>
80130ba: bd70 pop {r4, r5, r6, pc}
80130bc: f855 3b04 ldr.w r3, [r5], #4
80130c0: 4798 blx r3
80130c2: 3601 adds r6, #1
80130c4: e7ee b.n 80130a4 <__libc_init_array+0xc>
80130c6: f855 3b04 ldr.w r3, [r5], #4
80130ca: 4798 blx r3
80130cc: 3601 adds r6, #1
80130ce: e7f2 b.n 80130b6 <__libc_init_array+0x1e>
80130d0: 08013bf0 .word 0x08013bf0
80130d4: 08013bf0 .word 0x08013bf0
80130d8: 08013bf0 .word 0x08013bf0
80130dc: 08013bf4 .word 0x08013bf4
080130e0 <__retarget_lock_acquire_recursive>:
80130e0: 4770 bx lr
080130e2 <__retarget_lock_release_recursive>:
80130e2: 4770 bx lr
080130e4 <memcpy>:
80130e4: 440a add r2, r1
80130e6: 4291 cmp r1, r2
80130e8: f100 33ff add.w r3, r0, #4294967295
80130ec: d100 bne.n 80130f0 <memcpy+0xc>
80130ee: 4770 bx lr
80130f0: b510 push {r4, lr}
80130f2: f811 4b01 ldrb.w r4, [r1], #1
80130f6: f803 4f01 strb.w r4, [r3, #1]!
80130fa: 4291 cmp r1, r2
80130fc: d1f9 bne.n 80130f2 <memcpy+0xe>
80130fe: bd10 pop {r4, pc}
08013100 <_free_r>:
8013100: b538 push {r3, r4, r5, lr}
8013102: 4605 mov r5, r0
8013104: 2900 cmp r1, #0
8013106: d041 beq.n 801318c <_free_r+0x8c>
8013108: f851 3c04 ldr.w r3, [r1, #-4]
801310c: 1f0c subs r4, r1, #4
801310e: 2b00 cmp r3, #0
8013110: bfb8 it lt
8013112: 18e4 addlt r4, r4, r3
8013114: f000 f8e0 bl 80132d8 <__malloc_lock>
8013118: 4a1d ldr r2, [pc, #116] @ (8013190 <_free_r+0x90>)
801311a: 6813 ldr r3, [r2, #0]
801311c: b933 cbnz r3, 801312c <_free_r+0x2c>
801311e: 6063 str r3, [r4, #4]
8013120: 6014 str r4, [r2, #0]
8013122: 4628 mov r0, r5
8013124: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
8013128: f000 b8dc b.w 80132e4 <__malloc_unlock>
801312c: 42a3 cmp r3, r4
801312e: d908 bls.n 8013142 <_free_r+0x42>
8013130: 6820 ldr r0, [r4, #0]
8013132: 1821 adds r1, r4, r0
8013134: 428b cmp r3, r1
8013136: bf01 itttt eq
8013138: 6819 ldreq r1, [r3, #0]
801313a: 685b ldreq r3, [r3, #4]
801313c: 1809 addeq r1, r1, r0
801313e: 6021 streq r1, [r4, #0]
8013140: e7ed b.n 801311e <_free_r+0x1e>
8013142: 461a mov r2, r3
8013144: 685b ldr r3, [r3, #4]
8013146: b10b cbz r3, 801314c <_free_r+0x4c>
8013148: 42a3 cmp r3, r4
801314a: d9fa bls.n 8013142 <_free_r+0x42>
801314c: 6811 ldr r1, [r2, #0]
801314e: 1850 adds r0, r2, r1
8013150: 42a0 cmp r0, r4
8013152: d10b bne.n 801316c <_free_r+0x6c>
8013154: 6820 ldr r0, [r4, #0]
8013156: 4401 add r1, r0
8013158: 1850 adds r0, r2, r1
801315a: 4283 cmp r3, r0
801315c: 6011 str r1, [r2, #0]
801315e: d1e0 bne.n 8013122 <_free_r+0x22>
8013160: 6818 ldr r0, [r3, #0]
8013162: 685b ldr r3, [r3, #4]
8013164: 6053 str r3, [r2, #4]
8013166: 4408 add r0, r1
8013168: 6010 str r0, [r2, #0]
801316a: e7da b.n 8013122 <_free_r+0x22>
801316c: d902 bls.n 8013174 <_free_r+0x74>
801316e: 230c movs r3, #12
8013170: 602b str r3, [r5, #0]
8013172: e7d6 b.n 8013122 <_free_r+0x22>
8013174: 6820 ldr r0, [r4, #0]
8013176: 1821 adds r1, r4, r0
8013178: 428b cmp r3, r1
801317a: bf04 itt eq
801317c: 6819 ldreq r1, [r3, #0]
801317e: 685b ldreq r3, [r3, #4]
8013180: 6063 str r3, [r4, #4]
8013182: bf04 itt eq
8013184: 1809 addeq r1, r1, r0
8013186: 6021 streq r1, [r4, #0]
8013188: 6054 str r4, [r2, #4]
801318a: e7ca b.n 8013122 <_free_r+0x22>
801318c: bd38 pop {r3, r4, r5, pc}
801318e: bf00 nop
8013190: 20016c68 .word 0x20016c68
08013194 <sbrk_aligned>:
8013194: b570 push {r4, r5, r6, lr}
8013196: 4e0f ldr r6, [pc, #60] @ (80131d4 <sbrk_aligned+0x40>)
8013198: 460c mov r4, r1
801319a: 6831 ldr r1, [r6, #0]
801319c: 4605 mov r5, r0
801319e: b911 cbnz r1, 80131a6 <sbrk_aligned+0x12>
80131a0: f000 fba6 bl 80138f0 <_sbrk_r>
80131a4: 6030 str r0, [r6, #0]
80131a6: 4621 mov r1, r4
80131a8: 4628 mov r0, r5
80131aa: f000 fba1 bl 80138f0 <_sbrk_r>
80131ae: 1c43 adds r3, r0, #1
80131b0: d103 bne.n 80131ba <sbrk_aligned+0x26>
80131b2: f04f 34ff mov.w r4, #4294967295
80131b6: 4620 mov r0, r4
80131b8: bd70 pop {r4, r5, r6, pc}
80131ba: 1cc4 adds r4, r0, #3
80131bc: f024 0403 bic.w r4, r4, #3
80131c0: 42a0 cmp r0, r4
80131c2: d0f8 beq.n 80131b6 <sbrk_aligned+0x22>
80131c4: 1a21 subs r1, r4, r0
80131c6: 4628 mov r0, r5
80131c8: f000 fb92 bl 80138f0 <_sbrk_r>
80131cc: 3001 adds r0, #1
80131ce: d1f2 bne.n 80131b6 <sbrk_aligned+0x22>
80131d0: e7ef b.n 80131b2 <sbrk_aligned+0x1e>
80131d2: bf00 nop
80131d4: 20016c64 .word 0x20016c64
080131d8 <_malloc_r>:
80131d8: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
80131dc: 1ccd adds r5, r1, #3
80131de: f025 0503 bic.w r5, r5, #3
80131e2: 3508 adds r5, #8
80131e4: 2d0c cmp r5, #12
80131e6: bf38 it cc
80131e8: 250c movcc r5, #12
80131ea: 2d00 cmp r5, #0
80131ec: 4606 mov r6, r0
80131ee: db01 blt.n 80131f4 <_malloc_r+0x1c>
80131f0: 42a9 cmp r1, r5
80131f2: d904 bls.n 80131fe <_malloc_r+0x26>
80131f4: 230c movs r3, #12
80131f6: 6033 str r3, [r6, #0]
80131f8: 2000 movs r0, #0
80131fa: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
80131fe: f8df 80d4 ldr.w r8, [pc, #212] @ 80132d4 <_malloc_r+0xfc>
8013202: f000 f869 bl 80132d8 <__malloc_lock>
8013206: f8d8 3000 ldr.w r3, [r8]
801320a: 461c mov r4, r3
801320c: bb44 cbnz r4, 8013260 <_malloc_r+0x88>
801320e: 4629 mov r1, r5
8013210: 4630 mov r0, r6
8013212: f7ff ffbf bl 8013194 <sbrk_aligned>
8013216: 1c43 adds r3, r0, #1
8013218: 4604 mov r4, r0
801321a: d158 bne.n 80132ce <_malloc_r+0xf6>
801321c: f8d8 4000 ldr.w r4, [r8]
8013220: 4627 mov r7, r4
8013222: 2f00 cmp r7, #0
8013224: d143 bne.n 80132ae <_malloc_r+0xd6>
8013226: 2c00 cmp r4, #0
8013228: d04b beq.n 80132c2 <_malloc_r+0xea>
801322a: 6823 ldr r3, [r4, #0]
801322c: 4639 mov r1, r7
801322e: 4630 mov r0, r6
8013230: eb04 0903 add.w r9, r4, r3
8013234: f000 fb5c bl 80138f0 <_sbrk_r>
8013238: 4581 cmp r9, r0
801323a: d142 bne.n 80132c2 <_malloc_r+0xea>
801323c: 6821 ldr r1, [r4, #0]
801323e: 1a6d subs r5, r5, r1
8013240: 4629 mov r1, r5
8013242: 4630 mov r0, r6
8013244: f7ff ffa6 bl 8013194 <sbrk_aligned>
8013248: 3001 adds r0, #1
801324a: d03a beq.n 80132c2 <_malloc_r+0xea>
801324c: 6823 ldr r3, [r4, #0]
801324e: 442b add r3, r5
8013250: 6023 str r3, [r4, #0]
8013252: f8d8 3000 ldr.w r3, [r8]
8013256: 685a ldr r2, [r3, #4]
8013258: bb62 cbnz r2, 80132b4 <_malloc_r+0xdc>
801325a: f8c8 7000 str.w r7, [r8]
801325e: e00f b.n 8013280 <_malloc_r+0xa8>
8013260: 6822 ldr r2, [r4, #0]
8013262: 1b52 subs r2, r2, r5
8013264: d420 bmi.n 80132a8 <_malloc_r+0xd0>
8013266: 2a0b cmp r2, #11
8013268: d917 bls.n 801329a <_malloc_r+0xc2>
801326a: 1961 adds r1, r4, r5
801326c: 42a3 cmp r3, r4
801326e: 6025 str r5, [r4, #0]
8013270: bf18 it ne
8013272: 6059 strne r1, [r3, #4]
8013274: 6863 ldr r3, [r4, #4]
8013276: bf08 it eq
8013278: f8c8 1000 streq.w r1, [r8]
801327c: 5162 str r2, [r4, r5]
801327e: 604b str r3, [r1, #4]
8013280: 4630 mov r0, r6
8013282: f000 f82f bl 80132e4 <__malloc_unlock>
8013286: f104 000b add.w r0, r4, #11
801328a: 1d23 adds r3, r4, #4
801328c: f020 0007 bic.w r0, r0, #7
8013290: 1ac2 subs r2, r0, r3
8013292: bf1c itt ne
8013294: 1a1b subne r3, r3, r0
8013296: 50a3 strne r3, [r4, r2]
8013298: e7af b.n 80131fa <_malloc_r+0x22>
801329a: 6862 ldr r2, [r4, #4]
801329c: 42a3 cmp r3, r4
801329e: bf0c ite eq
80132a0: f8c8 2000 streq.w r2, [r8]
80132a4: 605a strne r2, [r3, #4]
80132a6: e7eb b.n 8013280 <_malloc_r+0xa8>
80132a8: 4623 mov r3, r4
80132aa: 6864 ldr r4, [r4, #4]
80132ac: e7ae b.n 801320c <_malloc_r+0x34>
80132ae: 463c mov r4, r7
80132b0: 687f ldr r7, [r7, #4]
80132b2: e7b6 b.n 8013222 <_malloc_r+0x4a>
80132b4: 461a mov r2, r3
80132b6: 685b ldr r3, [r3, #4]
80132b8: 42a3 cmp r3, r4
80132ba: d1fb bne.n 80132b4 <_malloc_r+0xdc>
80132bc: 2300 movs r3, #0
80132be: 6053 str r3, [r2, #4]
80132c0: e7de b.n 8013280 <_malloc_r+0xa8>
80132c2: 230c movs r3, #12
80132c4: 6033 str r3, [r6, #0]
80132c6: 4630 mov r0, r6
80132c8: f000 f80c bl 80132e4 <__malloc_unlock>
80132cc: e794 b.n 80131f8 <_malloc_r+0x20>
80132ce: 6005 str r5, [r0, #0]
80132d0: e7d6 b.n 8013280 <_malloc_r+0xa8>
80132d2: bf00 nop
80132d4: 20016c68 .word 0x20016c68
080132d8 <__malloc_lock>:
80132d8: 4801 ldr r0, [pc, #4] @ (80132e0 <__malloc_lock+0x8>)
80132da: f7ff bf01 b.w 80130e0 <__retarget_lock_acquire_recursive>
80132de: bf00 nop
80132e0: 20016c60 .word 0x20016c60
080132e4 <__malloc_unlock>:
80132e4: 4801 ldr r0, [pc, #4] @ (80132ec <__malloc_unlock+0x8>)
80132e6: f7ff befc b.w 80130e2 <__retarget_lock_release_recursive>
80132ea: bf00 nop
80132ec: 20016c60 .word 0x20016c60
080132f0 <__ssputs_r>:
80132f0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
80132f4: 688e ldr r6, [r1, #8]
80132f6: 461f mov r7, r3
80132f8: 42be cmp r6, r7
80132fa: 680b ldr r3, [r1, #0]
80132fc: 4682 mov sl, r0
80132fe: 460c mov r4, r1
8013300: 4690 mov r8, r2
8013302: d82d bhi.n 8013360 <__ssputs_r+0x70>
8013304: f9b1 200c ldrsh.w r2, [r1, #12]
8013308: f412 6f90 tst.w r2, #1152 @ 0x480
801330c: d026 beq.n 801335c <__ssputs_r+0x6c>
801330e: 6965 ldr r5, [r4, #20]
8013310: 6909 ldr r1, [r1, #16]
8013312: eb05 0545 add.w r5, r5, r5, lsl #1
8013316: eba3 0901 sub.w r9, r3, r1
801331a: eb05 75d5 add.w r5, r5, r5, lsr #31
801331e: 1c7b adds r3, r7, #1
8013320: 444b add r3, r9
8013322: 106d asrs r5, r5, #1
8013324: 429d cmp r5, r3
8013326: bf38 it cc
8013328: 461d movcc r5, r3
801332a: 0553 lsls r3, r2, #21
801332c: d527 bpl.n 801337e <__ssputs_r+0x8e>
801332e: 4629 mov r1, r5
8013330: f7ff ff52 bl 80131d8 <_malloc_r>
8013334: 4606 mov r6, r0
8013336: b360 cbz r0, 8013392 <__ssputs_r+0xa2>
8013338: 6921 ldr r1, [r4, #16]
801333a: 464a mov r2, r9
801333c: f7ff fed2 bl 80130e4 <memcpy>
8013340: 89a3 ldrh r3, [r4, #12]
8013342: f423 6390 bic.w r3, r3, #1152 @ 0x480
8013346: f043 0380 orr.w r3, r3, #128 @ 0x80
801334a: 81a3 strh r3, [r4, #12]
801334c: 6126 str r6, [r4, #16]
801334e: 6165 str r5, [r4, #20]
8013350: 444e add r6, r9
8013352: eba5 0509 sub.w r5, r5, r9
8013356: 6026 str r6, [r4, #0]
8013358: 60a5 str r5, [r4, #8]
801335a: 463e mov r6, r7
801335c: 42be cmp r6, r7
801335e: d900 bls.n 8013362 <__ssputs_r+0x72>
8013360: 463e mov r6, r7
8013362: 6820 ldr r0, [r4, #0]
8013364: 4632 mov r2, r6
8013366: 4641 mov r1, r8
8013368: f000 faa8 bl 80138bc <memmove>
801336c: 68a3 ldr r3, [r4, #8]
801336e: 1b9b subs r3, r3, r6
8013370: 60a3 str r3, [r4, #8]
8013372: 6823 ldr r3, [r4, #0]
8013374: 4433 add r3, r6
8013376: 6023 str r3, [r4, #0]
8013378: 2000 movs r0, #0
801337a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
801337e: 462a mov r2, r5
8013380: f000 fac6 bl 8013910 <_realloc_r>
8013384: 4606 mov r6, r0
8013386: 2800 cmp r0, #0
8013388: d1e0 bne.n 801334c <__ssputs_r+0x5c>
801338a: 6921 ldr r1, [r4, #16]
801338c: 4650 mov r0, sl
801338e: f7ff feb7 bl 8013100 <_free_r>
8013392: 230c movs r3, #12
8013394: f8ca 3000 str.w r3, [sl]
8013398: 89a3 ldrh r3, [r4, #12]
801339a: f043 0340 orr.w r3, r3, #64 @ 0x40
801339e: 81a3 strh r3, [r4, #12]
80133a0: f04f 30ff mov.w r0, #4294967295
80133a4: e7e9 b.n 801337a <__ssputs_r+0x8a>
...
080133a8 <_svfiprintf_r>:
80133a8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
80133ac: 4698 mov r8, r3
80133ae: 898b ldrh r3, [r1, #12]
80133b0: 061b lsls r3, r3, #24
80133b2: b09d sub sp, #116 @ 0x74
80133b4: 4607 mov r7, r0
80133b6: 460d mov r5, r1
80133b8: 4614 mov r4, r2
80133ba: d510 bpl.n 80133de <_svfiprintf_r+0x36>
80133bc: 690b ldr r3, [r1, #16]
80133be: b973 cbnz r3, 80133de <_svfiprintf_r+0x36>
80133c0: 2140 movs r1, #64 @ 0x40
80133c2: f7ff ff09 bl 80131d8 <_malloc_r>
80133c6: 6028 str r0, [r5, #0]
80133c8: 6128 str r0, [r5, #16]
80133ca: b930 cbnz r0, 80133da <_svfiprintf_r+0x32>
80133cc: 230c movs r3, #12
80133ce: 603b str r3, [r7, #0]
80133d0: f04f 30ff mov.w r0, #4294967295
80133d4: b01d add sp, #116 @ 0x74
80133d6: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
80133da: 2340 movs r3, #64 @ 0x40
80133dc: 616b str r3, [r5, #20]
80133de: 2300 movs r3, #0
80133e0: 9309 str r3, [sp, #36] @ 0x24
80133e2: 2320 movs r3, #32
80133e4: f88d 3029 strb.w r3, [sp, #41] @ 0x29
80133e8: f8cd 800c str.w r8, [sp, #12]
80133ec: 2330 movs r3, #48 @ 0x30
80133ee: f8df 819c ldr.w r8, [pc, #412] @ 801358c <_svfiprintf_r+0x1e4>
80133f2: f88d 302a strb.w r3, [sp, #42] @ 0x2a
80133f6: f04f 0901 mov.w r9, #1
80133fa: 4623 mov r3, r4
80133fc: 469a mov sl, r3
80133fe: f813 2b01 ldrb.w r2, [r3], #1
8013402: b10a cbz r2, 8013408 <_svfiprintf_r+0x60>
8013404: 2a25 cmp r2, #37 @ 0x25
8013406: d1f9 bne.n 80133fc <_svfiprintf_r+0x54>
8013408: ebba 0b04 subs.w fp, sl, r4
801340c: d00b beq.n 8013426 <_svfiprintf_r+0x7e>
801340e: 465b mov r3, fp
8013410: 4622 mov r2, r4
8013412: 4629 mov r1, r5
8013414: 4638 mov r0, r7
8013416: f7ff ff6b bl 80132f0 <__ssputs_r>
801341a: 3001 adds r0, #1
801341c: f000 80a7 beq.w 801356e <_svfiprintf_r+0x1c6>
8013420: 9a09 ldr r2, [sp, #36] @ 0x24
8013422: 445a add r2, fp
8013424: 9209 str r2, [sp, #36] @ 0x24
8013426: f89a 3000 ldrb.w r3, [sl]
801342a: 2b00 cmp r3, #0
801342c: f000 809f beq.w 801356e <_svfiprintf_r+0x1c6>
8013430: 2300 movs r3, #0
8013432: f04f 32ff mov.w r2, #4294967295
8013436: e9cd 2305 strd r2, r3, [sp, #20]
801343a: f10a 0a01 add.w sl, sl, #1
801343e: 9304 str r3, [sp, #16]
8013440: 9307 str r3, [sp, #28]
8013442: f88d 3053 strb.w r3, [sp, #83] @ 0x53
8013446: 931a str r3, [sp, #104] @ 0x68
8013448: 4654 mov r4, sl
801344a: 2205 movs r2, #5
801344c: f814 1b01 ldrb.w r1, [r4], #1
8013450: 484e ldr r0, [pc, #312] @ (801358c <_svfiprintf_r+0x1e4>)
8013452: f7ec fee5 bl 8000220 <memchr>
8013456: 9a04 ldr r2, [sp, #16]
8013458: b9d8 cbnz r0, 8013492 <_svfiprintf_r+0xea>
801345a: 06d0 lsls r0, r2, #27
801345c: bf44 itt mi
801345e: 2320 movmi r3, #32
8013460: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
8013464: 0711 lsls r1, r2, #28
8013466: bf44 itt mi
8013468: 232b movmi r3, #43 @ 0x2b
801346a: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
801346e: f89a 3000 ldrb.w r3, [sl]
8013472: 2b2a cmp r3, #42 @ 0x2a
8013474: d015 beq.n 80134a2 <_svfiprintf_r+0xfa>
8013476: 9a07 ldr r2, [sp, #28]
8013478: 4654 mov r4, sl
801347a: 2000 movs r0, #0
801347c: f04f 0c0a mov.w ip, #10
8013480: 4621 mov r1, r4
8013482: f811 3b01 ldrb.w r3, [r1], #1
8013486: 3b30 subs r3, #48 @ 0x30
8013488: 2b09 cmp r3, #9
801348a: d94b bls.n 8013524 <_svfiprintf_r+0x17c>
801348c: b1b0 cbz r0, 80134bc <_svfiprintf_r+0x114>
801348e: 9207 str r2, [sp, #28]
8013490: e014 b.n 80134bc <_svfiprintf_r+0x114>
8013492: eba0 0308 sub.w r3, r0, r8
8013496: fa09 f303 lsl.w r3, r9, r3
801349a: 4313 orrs r3, r2
801349c: 9304 str r3, [sp, #16]
801349e: 46a2 mov sl, r4
80134a0: e7d2 b.n 8013448 <_svfiprintf_r+0xa0>
80134a2: 9b03 ldr r3, [sp, #12]
80134a4: 1d19 adds r1, r3, #4
80134a6: 681b ldr r3, [r3, #0]
80134a8: 9103 str r1, [sp, #12]
80134aa: 2b00 cmp r3, #0
80134ac: bfbb ittet lt
80134ae: 425b neglt r3, r3
80134b0: f042 0202 orrlt.w r2, r2, #2
80134b4: 9307 strge r3, [sp, #28]
80134b6: 9307 strlt r3, [sp, #28]
80134b8: bfb8 it lt
80134ba: 9204 strlt r2, [sp, #16]
80134bc: 7823 ldrb r3, [r4, #0]
80134be: 2b2e cmp r3, #46 @ 0x2e
80134c0: d10a bne.n 80134d8 <_svfiprintf_r+0x130>
80134c2: 7863 ldrb r3, [r4, #1]
80134c4: 2b2a cmp r3, #42 @ 0x2a
80134c6: d132 bne.n 801352e <_svfiprintf_r+0x186>
80134c8: 9b03 ldr r3, [sp, #12]
80134ca: 1d1a adds r2, r3, #4
80134cc: 681b ldr r3, [r3, #0]
80134ce: 9203 str r2, [sp, #12]
80134d0: ea43 73e3 orr.w r3, r3, r3, asr #31
80134d4: 3402 adds r4, #2
80134d6: 9305 str r3, [sp, #20]
80134d8: f8df a0c0 ldr.w sl, [pc, #192] @ 801359c <_svfiprintf_r+0x1f4>
80134dc: 7821 ldrb r1, [r4, #0]
80134de: 2203 movs r2, #3
80134e0: 4650 mov r0, sl
80134e2: f7ec fe9d bl 8000220 <memchr>
80134e6: b138 cbz r0, 80134f8 <_svfiprintf_r+0x150>
80134e8: 9b04 ldr r3, [sp, #16]
80134ea: eba0 000a sub.w r0, r0, sl
80134ee: 2240 movs r2, #64 @ 0x40
80134f0: 4082 lsls r2, r0
80134f2: 4313 orrs r3, r2
80134f4: 3401 adds r4, #1
80134f6: 9304 str r3, [sp, #16]
80134f8: f814 1b01 ldrb.w r1, [r4], #1
80134fc: 4824 ldr r0, [pc, #144] @ (8013590 <_svfiprintf_r+0x1e8>)
80134fe: f88d 1028 strb.w r1, [sp, #40] @ 0x28
8013502: 2206 movs r2, #6
8013504: f7ec fe8c bl 8000220 <memchr>
8013508: 2800 cmp r0, #0
801350a: d036 beq.n 801357a <_svfiprintf_r+0x1d2>
801350c: 4b21 ldr r3, [pc, #132] @ (8013594 <_svfiprintf_r+0x1ec>)
801350e: bb1b cbnz r3, 8013558 <_svfiprintf_r+0x1b0>
8013510: 9b03 ldr r3, [sp, #12]
8013512: 3307 adds r3, #7
8013514: f023 0307 bic.w r3, r3, #7
8013518: 3308 adds r3, #8
801351a: 9303 str r3, [sp, #12]
801351c: 9b09 ldr r3, [sp, #36] @ 0x24
801351e: 4433 add r3, r6
8013520: 9309 str r3, [sp, #36] @ 0x24
8013522: e76a b.n 80133fa <_svfiprintf_r+0x52>
8013524: fb0c 3202 mla r2, ip, r2, r3
8013528: 460c mov r4, r1
801352a: 2001 movs r0, #1
801352c: e7a8 b.n 8013480 <_svfiprintf_r+0xd8>
801352e: 2300 movs r3, #0
8013530: 3401 adds r4, #1
8013532: 9305 str r3, [sp, #20]
8013534: 4619 mov r1, r3
8013536: f04f 0c0a mov.w ip, #10
801353a: 4620 mov r0, r4
801353c: f810 2b01 ldrb.w r2, [r0], #1
8013540: 3a30 subs r2, #48 @ 0x30
8013542: 2a09 cmp r2, #9
8013544: d903 bls.n 801354e <_svfiprintf_r+0x1a6>
8013546: 2b00 cmp r3, #0
8013548: d0c6 beq.n 80134d8 <_svfiprintf_r+0x130>
801354a: 9105 str r1, [sp, #20]
801354c: e7c4 b.n 80134d8 <_svfiprintf_r+0x130>
801354e: fb0c 2101 mla r1, ip, r1, r2
8013552: 4604 mov r4, r0
8013554: 2301 movs r3, #1
8013556: e7f0 b.n 801353a <_svfiprintf_r+0x192>
8013558: ab03 add r3, sp, #12
801355a: 9300 str r3, [sp, #0]
801355c: 462a mov r2, r5
801355e: 4b0e ldr r3, [pc, #56] @ (8013598 <_svfiprintf_r+0x1f0>)
8013560: a904 add r1, sp, #16
8013562: 4638 mov r0, r7
8013564: f3af 8000 nop.w
8013568: 1c42 adds r2, r0, #1
801356a: 4606 mov r6, r0
801356c: d1d6 bne.n 801351c <_svfiprintf_r+0x174>
801356e: 89ab ldrh r3, [r5, #12]
8013570: 065b lsls r3, r3, #25
8013572: f53f af2d bmi.w 80133d0 <_svfiprintf_r+0x28>
8013576: 9809 ldr r0, [sp, #36] @ 0x24
8013578: e72c b.n 80133d4 <_svfiprintf_r+0x2c>
801357a: ab03 add r3, sp, #12
801357c: 9300 str r3, [sp, #0]
801357e: 462a mov r2, r5
8013580: 4b05 ldr r3, [pc, #20] @ (8013598 <_svfiprintf_r+0x1f0>)
8013582: a904 add r1, sp, #16
8013584: 4638 mov r0, r7
8013586: f000 f879 bl 801367c <_printf_i>
801358a: e7ed b.n 8013568 <_svfiprintf_r+0x1c0>
801358c: 08013bb4 .word 0x08013bb4
8013590: 08013bbe .word 0x08013bbe
8013594: 00000000 .word 0x00000000
8013598: 080132f1 .word 0x080132f1
801359c: 08013bba .word 0x08013bba
080135a0 <_printf_common>:
80135a0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
80135a4: 4616 mov r6, r2
80135a6: 4698 mov r8, r3
80135a8: 688a ldr r2, [r1, #8]
80135aa: 690b ldr r3, [r1, #16]
80135ac: f8dd 9020 ldr.w r9, [sp, #32]
80135b0: 4293 cmp r3, r2
80135b2: bfb8 it lt
80135b4: 4613 movlt r3, r2
80135b6: 6033 str r3, [r6, #0]
80135b8: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
80135bc: 4607 mov r7, r0
80135be: 460c mov r4, r1
80135c0: b10a cbz r2, 80135c6 <_printf_common+0x26>
80135c2: 3301 adds r3, #1
80135c4: 6033 str r3, [r6, #0]
80135c6: 6823 ldr r3, [r4, #0]
80135c8: 0699 lsls r1, r3, #26
80135ca: bf42 ittt mi
80135cc: 6833 ldrmi r3, [r6, #0]
80135ce: 3302 addmi r3, #2
80135d0: 6033 strmi r3, [r6, #0]
80135d2: 6825 ldr r5, [r4, #0]
80135d4: f015 0506 ands.w r5, r5, #6
80135d8: d106 bne.n 80135e8 <_printf_common+0x48>
80135da: f104 0a19 add.w sl, r4, #25
80135de: 68e3 ldr r3, [r4, #12]
80135e0: 6832 ldr r2, [r6, #0]
80135e2: 1a9b subs r3, r3, r2
80135e4: 42ab cmp r3, r5
80135e6: dc26 bgt.n 8013636 <_printf_common+0x96>
80135e8: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
80135ec: 6822 ldr r2, [r4, #0]
80135ee: 3b00 subs r3, #0
80135f0: bf18 it ne
80135f2: 2301 movne r3, #1
80135f4: 0692 lsls r2, r2, #26
80135f6: d42b bmi.n 8013650 <_printf_common+0xb0>
80135f8: f104 0243 add.w r2, r4, #67 @ 0x43
80135fc: 4641 mov r1, r8
80135fe: 4638 mov r0, r7
8013600: 47c8 blx r9
8013602: 3001 adds r0, #1
8013604: d01e beq.n 8013644 <_printf_common+0xa4>
8013606: 6823 ldr r3, [r4, #0]
8013608: 6922 ldr r2, [r4, #16]
801360a: f003 0306 and.w r3, r3, #6
801360e: 2b04 cmp r3, #4
8013610: bf02 ittt eq
8013612: 68e5 ldreq r5, [r4, #12]
8013614: 6833 ldreq r3, [r6, #0]
8013616: 1aed subeq r5, r5, r3
8013618: 68a3 ldr r3, [r4, #8]
801361a: bf0c ite eq
801361c: ea25 75e5 biceq.w r5, r5, r5, asr #31
8013620: 2500 movne r5, #0
8013622: 4293 cmp r3, r2
8013624: bfc4 itt gt
8013626: 1a9b subgt r3, r3, r2
8013628: 18ed addgt r5, r5, r3
801362a: 2600 movs r6, #0
801362c: 341a adds r4, #26
801362e: 42b5 cmp r5, r6
8013630: d11a bne.n 8013668 <_printf_common+0xc8>
8013632: 2000 movs r0, #0
8013634: e008 b.n 8013648 <_printf_common+0xa8>
8013636: 2301 movs r3, #1
8013638: 4652 mov r2, sl
801363a: 4641 mov r1, r8
801363c: 4638 mov r0, r7
801363e: 47c8 blx r9
8013640: 3001 adds r0, #1
8013642: d103 bne.n 801364c <_printf_common+0xac>
8013644: f04f 30ff mov.w r0, #4294967295
8013648: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
801364c: 3501 adds r5, #1
801364e: e7c6 b.n 80135de <_printf_common+0x3e>
8013650: 18e1 adds r1, r4, r3
8013652: 1c5a adds r2, r3, #1
8013654: 2030 movs r0, #48 @ 0x30
8013656: f881 0043 strb.w r0, [r1, #67] @ 0x43
801365a: 4422 add r2, r4
801365c: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
8013660: f882 1043 strb.w r1, [r2, #67] @ 0x43
8013664: 3302 adds r3, #2
8013666: e7c7 b.n 80135f8 <_printf_common+0x58>
8013668: 2301 movs r3, #1
801366a: 4622 mov r2, r4
801366c: 4641 mov r1, r8
801366e: 4638 mov r0, r7
8013670: 47c8 blx r9
8013672: 3001 adds r0, #1
8013674: d0e6 beq.n 8013644 <_printf_common+0xa4>
8013676: 3601 adds r6, #1
8013678: e7d9 b.n 801362e <_printf_common+0x8e>
...
0801367c <_printf_i>:
801367c: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
8013680: 7e0f ldrb r7, [r1, #24]
8013682: 9e0c ldr r6, [sp, #48] @ 0x30
8013684: 2f78 cmp r7, #120 @ 0x78
8013686: 4691 mov r9, r2
8013688: 4680 mov r8, r0
801368a: 460c mov r4, r1
801368c: 469a mov sl, r3
801368e: f101 0243 add.w r2, r1, #67 @ 0x43
8013692: d807 bhi.n 80136a4 <_printf_i+0x28>
8013694: 2f62 cmp r7, #98 @ 0x62
8013696: d80a bhi.n 80136ae <_printf_i+0x32>
8013698: 2f00 cmp r7, #0
801369a: f000 80d2 beq.w 8013842 <_printf_i+0x1c6>
801369e: 2f58 cmp r7, #88 @ 0x58
80136a0: f000 80b9 beq.w 8013816 <_printf_i+0x19a>
80136a4: f104 0642 add.w r6, r4, #66 @ 0x42
80136a8: f884 7042 strb.w r7, [r4, #66] @ 0x42
80136ac: e03a b.n 8013724 <_printf_i+0xa8>
80136ae: f1a7 0363 sub.w r3, r7, #99 @ 0x63
80136b2: 2b15 cmp r3, #21
80136b4: d8f6 bhi.n 80136a4 <_printf_i+0x28>
80136b6: a101 add r1, pc, #4 @ (adr r1, 80136bc <_printf_i+0x40>)
80136b8: f851 f023 ldr.w pc, [r1, r3, lsl #2]
80136bc: 08013715 .word 0x08013715
80136c0: 08013729 .word 0x08013729
80136c4: 080136a5 .word 0x080136a5
80136c8: 080136a5 .word 0x080136a5
80136cc: 080136a5 .word 0x080136a5
80136d0: 080136a5 .word 0x080136a5
80136d4: 08013729 .word 0x08013729
80136d8: 080136a5 .word 0x080136a5
80136dc: 080136a5 .word 0x080136a5
80136e0: 080136a5 .word 0x080136a5
80136e4: 080136a5 .word 0x080136a5
80136e8: 08013829 .word 0x08013829
80136ec: 08013753 .word 0x08013753
80136f0: 080137e3 .word 0x080137e3
80136f4: 080136a5 .word 0x080136a5
80136f8: 080136a5 .word 0x080136a5
80136fc: 0801384b .word 0x0801384b
8013700: 080136a5 .word 0x080136a5
8013704: 08013753 .word 0x08013753
8013708: 080136a5 .word 0x080136a5
801370c: 080136a5 .word 0x080136a5
8013710: 080137eb .word 0x080137eb
8013714: 6833 ldr r3, [r6, #0]
8013716: 1d1a adds r2, r3, #4
8013718: 681b ldr r3, [r3, #0]
801371a: 6032 str r2, [r6, #0]
801371c: f104 0642 add.w r6, r4, #66 @ 0x42
8013720: f884 3042 strb.w r3, [r4, #66] @ 0x42
8013724: 2301 movs r3, #1
8013726: e09d b.n 8013864 <_printf_i+0x1e8>
8013728: 6833 ldr r3, [r6, #0]
801372a: 6820 ldr r0, [r4, #0]
801372c: 1d19 adds r1, r3, #4
801372e: 6031 str r1, [r6, #0]
8013730: 0606 lsls r6, r0, #24
8013732: d501 bpl.n 8013738 <_printf_i+0xbc>
8013734: 681d ldr r5, [r3, #0]
8013736: e003 b.n 8013740 <_printf_i+0xc4>
8013738: 0645 lsls r5, r0, #25
801373a: d5fb bpl.n 8013734 <_printf_i+0xb8>
801373c: f9b3 5000 ldrsh.w r5, [r3]
8013740: 2d00 cmp r5, #0
8013742: da03 bge.n 801374c <_printf_i+0xd0>
8013744: 232d movs r3, #45 @ 0x2d
8013746: 426d negs r5, r5
8013748: f884 3043 strb.w r3, [r4, #67] @ 0x43
801374c: 4859 ldr r0, [pc, #356] @ (80138b4 <_printf_i+0x238>)
801374e: 230a movs r3, #10
8013750: e011 b.n 8013776 <_printf_i+0xfa>
8013752: 6821 ldr r1, [r4, #0]
8013754: 6833 ldr r3, [r6, #0]
8013756: 0608 lsls r0, r1, #24
8013758: f853 5b04 ldr.w r5, [r3], #4
801375c: d402 bmi.n 8013764 <_printf_i+0xe8>
801375e: 0649 lsls r1, r1, #25
8013760: bf48 it mi
8013762: b2ad uxthmi r5, r5
8013764: 2f6f cmp r7, #111 @ 0x6f
8013766: 4853 ldr r0, [pc, #332] @ (80138b4 <_printf_i+0x238>)
8013768: 6033 str r3, [r6, #0]
801376a: bf14 ite ne
801376c: 230a movne r3, #10
801376e: 2308 moveq r3, #8
8013770: 2100 movs r1, #0
8013772: f884 1043 strb.w r1, [r4, #67] @ 0x43
8013776: 6866 ldr r6, [r4, #4]
8013778: 60a6 str r6, [r4, #8]
801377a: 2e00 cmp r6, #0
801377c: bfa2 ittt ge
801377e: 6821 ldrge r1, [r4, #0]
8013780: f021 0104 bicge.w r1, r1, #4
8013784: 6021 strge r1, [r4, #0]
8013786: b90d cbnz r5, 801378c <_printf_i+0x110>
8013788: 2e00 cmp r6, #0
801378a: d04b beq.n 8013824 <_printf_i+0x1a8>
801378c: 4616 mov r6, r2
801378e: fbb5 f1f3 udiv r1, r5, r3
8013792: fb03 5711 mls r7, r3, r1, r5
8013796: 5dc7 ldrb r7, [r0, r7]
8013798: f806 7d01 strb.w r7, [r6, #-1]!
801379c: 462f mov r7, r5
801379e: 42bb cmp r3, r7
80137a0: 460d mov r5, r1
80137a2: d9f4 bls.n 801378e <_printf_i+0x112>
80137a4: 2b08 cmp r3, #8
80137a6: d10b bne.n 80137c0 <_printf_i+0x144>
80137a8: 6823 ldr r3, [r4, #0]
80137aa: 07df lsls r7, r3, #31
80137ac: d508 bpl.n 80137c0 <_printf_i+0x144>
80137ae: 6923 ldr r3, [r4, #16]
80137b0: 6861 ldr r1, [r4, #4]
80137b2: 4299 cmp r1, r3
80137b4: bfde ittt le
80137b6: 2330 movle r3, #48 @ 0x30
80137b8: f806 3c01 strble.w r3, [r6, #-1]
80137bc: f106 36ff addle.w r6, r6, #4294967295
80137c0: 1b92 subs r2, r2, r6
80137c2: 6122 str r2, [r4, #16]
80137c4: f8cd a000 str.w sl, [sp]
80137c8: 464b mov r3, r9
80137ca: aa03 add r2, sp, #12
80137cc: 4621 mov r1, r4
80137ce: 4640 mov r0, r8
80137d0: f7ff fee6 bl 80135a0 <_printf_common>
80137d4: 3001 adds r0, #1
80137d6: d14a bne.n 801386e <_printf_i+0x1f2>
80137d8: f04f 30ff mov.w r0, #4294967295
80137dc: b004 add sp, #16
80137de: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
80137e2: 6823 ldr r3, [r4, #0]
80137e4: f043 0320 orr.w r3, r3, #32
80137e8: 6023 str r3, [r4, #0]
80137ea: 4833 ldr r0, [pc, #204] @ (80138b8 <_printf_i+0x23c>)
80137ec: 2778 movs r7, #120 @ 0x78
80137ee: f884 7045 strb.w r7, [r4, #69] @ 0x45
80137f2: 6823 ldr r3, [r4, #0]
80137f4: 6831 ldr r1, [r6, #0]
80137f6: 061f lsls r7, r3, #24
80137f8: f851 5b04 ldr.w r5, [r1], #4
80137fc: d402 bmi.n 8013804 <_printf_i+0x188>
80137fe: 065f lsls r7, r3, #25
8013800: bf48 it mi
8013802: b2ad uxthmi r5, r5
8013804: 6031 str r1, [r6, #0]
8013806: 07d9 lsls r1, r3, #31
8013808: bf44 itt mi
801380a: f043 0320 orrmi.w r3, r3, #32
801380e: 6023 strmi r3, [r4, #0]
8013810: b11d cbz r5, 801381a <_printf_i+0x19e>
8013812: 2310 movs r3, #16
8013814: e7ac b.n 8013770 <_printf_i+0xf4>
8013816: 4827 ldr r0, [pc, #156] @ (80138b4 <_printf_i+0x238>)
8013818: e7e9 b.n 80137ee <_printf_i+0x172>
801381a: 6823 ldr r3, [r4, #0]
801381c: f023 0320 bic.w r3, r3, #32
8013820: 6023 str r3, [r4, #0]
8013822: e7f6 b.n 8013812 <_printf_i+0x196>
8013824: 4616 mov r6, r2
8013826: e7bd b.n 80137a4 <_printf_i+0x128>
8013828: 6833 ldr r3, [r6, #0]
801382a: 6825 ldr r5, [r4, #0]
801382c: 6961 ldr r1, [r4, #20]
801382e: 1d18 adds r0, r3, #4
8013830: 6030 str r0, [r6, #0]
8013832: 062e lsls r6, r5, #24
8013834: 681b ldr r3, [r3, #0]
8013836: d501 bpl.n 801383c <_printf_i+0x1c0>
8013838: 6019 str r1, [r3, #0]
801383a: e002 b.n 8013842 <_printf_i+0x1c6>
801383c: 0668 lsls r0, r5, #25
801383e: d5fb bpl.n 8013838 <_printf_i+0x1bc>
8013840: 8019 strh r1, [r3, #0]
8013842: 2300 movs r3, #0
8013844: 6123 str r3, [r4, #16]
8013846: 4616 mov r6, r2
8013848: e7bc b.n 80137c4 <_printf_i+0x148>
801384a: 6833 ldr r3, [r6, #0]
801384c: 1d1a adds r2, r3, #4
801384e: 6032 str r2, [r6, #0]
8013850: 681e ldr r6, [r3, #0]
8013852: 6862 ldr r2, [r4, #4]
8013854: 2100 movs r1, #0
8013856: 4630 mov r0, r6
8013858: f7ec fce2 bl 8000220 <memchr>
801385c: b108 cbz r0, 8013862 <_printf_i+0x1e6>
801385e: 1b80 subs r0, r0, r6
8013860: 6060 str r0, [r4, #4]
8013862: 6863 ldr r3, [r4, #4]
8013864: 6123 str r3, [r4, #16]
8013866: 2300 movs r3, #0
8013868: f884 3043 strb.w r3, [r4, #67] @ 0x43
801386c: e7aa b.n 80137c4 <_printf_i+0x148>
801386e: 6923 ldr r3, [r4, #16]
8013870: 4632 mov r2, r6
8013872: 4649 mov r1, r9
8013874: 4640 mov r0, r8
8013876: 47d0 blx sl
8013878: 3001 adds r0, #1
801387a: d0ad beq.n 80137d8 <_printf_i+0x15c>
801387c: 6823 ldr r3, [r4, #0]
801387e: 079b lsls r3, r3, #30
8013880: d413 bmi.n 80138aa <_printf_i+0x22e>
8013882: 68e0 ldr r0, [r4, #12]
8013884: 9b03 ldr r3, [sp, #12]
8013886: 4298 cmp r0, r3
8013888: bfb8 it lt
801388a: 4618 movlt r0, r3
801388c: e7a6 b.n 80137dc <_printf_i+0x160>
801388e: 2301 movs r3, #1
8013890: 4632 mov r2, r6
8013892: 4649 mov r1, r9
8013894: 4640 mov r0, r8
8013896: 47d0 blx sl
8013898: 3001 adds r0, #1
801389a: d09d beq.n 80137d8 <_printf_i+0x15c>
801389c: 3501 adds r5, #1
801389e: 68e3 ldr r3, [r4, #12]
80138a0: 9903 ldr r1, [sp, #12]
80138a2: 1a5b subs r3, r3, r1
80138a4: 42ab cmp r3, r5
80138a6: dcf2 bgt.n 801388e <_printf_i+0x212>
80138a8: e7eb b.n 8013882 <_printf_i+0x206>
80138aa: 2500 movs r5, #0
80138ac: f104 0619 add.w r6, r4, #25
80138b0: e7f5 b.n 801389e <_printf_i+0x222>
80138b2: bf00 nop
80138b4: 08013bc5 .word 0x08013bc5
80138b8: 08013bd6 .word 0x08013bd6
080138bc <memmove>:
80138bc: 4288 cmp r0, r1
80138be: b510 push {r4, lr}
80138c0: eb01 0402 add.w r4, r1, r2
80138c4: d902 bls.n 80138cc <memmove+0x10>
80138c6: 4284 cmp r4, r0
80138c8: 4623 mov r3, r4
80138ca: d807 bhi.n 80138dc <memmove+0x20>
80138cc: 1e43 subs r3, r0, #1
80138ce: 42a1 cmp r1, r4
80138d0: d008 beq.n 80138e4 <memmove+0x28>
80138d2: f811 2b01 ldrb.w r2, [r1], #1
80138d6: f803 2f01 strb.w r2, [r3, #1]!
80138da: e7f8 b.n 80138ce <memmove+0x12>
80138dc: 4402 add r2, r0
80138de: 4601 mov r1, r0
80138e0: 428a cmp r2, r1
80138e2: d100 bne.n 80138e6 <memmove+0x2a>
80138e4: bd10 pop {r4, pc}
80138e6: f813 4d01 ldrb.w r4, [r3, #-1]!
80138ea: f802 4d01 strb.w r4, [r2, #-1]!
80138ee: e7f7 b.n 80138e0 <memmove+0x24>
080138f0 <_sbrk_r>:
80138f0: b538 push {r3, r4, r5, lr}
80138f2: 4d06 ldr r5, [pc, #24] @ (801390c <_sbrk_r+0x1c>)
80138f4: 2300 movs r3, #0
80138f6: 4604 mov r4, r0
80138f8: 4608 mov r0, r1
80138fa: 602b str r3, [r5, #0]
80138fc: f7ed fea4 bl 8001648 <_sbrk>
8013900: 1c43 adds r3, r0, #1
8013902: d102 bne.n 801390a <_sbrk_r+0x1a>
8013904: 682b ldr r3, [r5, #0]
8013906: b103 cbz r3, 801390a <_sbrk_r+0x1a>
8013908: 6023 str r3, [r4, #0]
801390a: bd38 pop {r3, r4, r5, pc}
801390c: 20016c5c .word 0x20016c5c
08013910 <_realloc_r>:
8013910: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
8013914: 4680 mov r8, r0
8013916: 4615 mov r5, r2
8013918: 460c mov r4, r1
801391a: b921 cbnz r1, 8013926 <_realloc_r+0x16>
801391c: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
8013920: 4611 mov r1, r2
8013922: f7ff bc59 b.w 80131d8 <_malloc_r>
8013926: b92a cbnz r2, 8013934 <_realloc_r+0x24>
8013928: f7ff fbea bl 8013100 <_free_r>
801392c: 2400 movs r4, #0
801392e: 4620 mov r0, r4
8013930: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
8013934: f000 f81a bl 801396c <_malloc_usable_size_r>
8013938: 4285 cmp r5, r0
801393a: 4606 mov r6, r0
801393c: d802 bhi.n 8013944 <_realloc_r+0x34>
801393e: ebb5 0f50 cmp.w r5, r0, lsr #1
8013942: d8f4 bhi.n 801392e <_realloc_r+0x1e>
8013944: 4629 mov r1, r5
8013946: 4640 mov r0, r8
8013948: f7ff fc46 bl 80131d8 <_malloc_r>
801394c: 4607 mov r7, r0
801394e: 2800 cmp r0, #0
8013950: d0ec beq.n 801392c <_realloc_r+0x1c>
8013952: 42b5 cmp r5, r6
8013954: 462a mov r2, r5
8013956: 4621 mov r1, r4
8013958: bf28 it cs
801395a: 4632 movcs r2, r6
801395c: f7ff fbc2 bl 80130e4 <memcpy>
8013960: 4621 mov r1, r4
8013962: 4640 mov r0, r8
8013964: f7ff fbcc bl 8013100 <_free_r>
8013968: 463c mov r4, r7
801396a: e7e0 b.n 801392e <_realloc_r+0x1e>
0801396c <_malloc_usable_size_r>:
801396c: f851 3c04 ldr.w r3, [r1, #-4]
8013970: 1f18 subs r0, r3, #4
8013972: 2b00 cmp r3, #0
8013974: bfbc itt lt
8013976: 580b ldrlt r3, [r1, r0]
8013978: 18c0 addlt r0, r0, r3
801397a: 4770 bx lr
0801397c <_init>:
801397c: b5f8 push {r3, r4, r5, r6, r7, lr}
801397e: bf00 nop
8013980: bcf8 pop {r3, r4, r5, r6, r7}
8013982: bc08 pop {r3}
8013984: 469e mov lr, r3
8013986: 4770 bx lr
08013988 <_fini>:
8013988: b5f8 push {r3, r4, r5, r6, r7, lr}
801398a: bf00 nop
801398c: bcf8 pop {r3, r4, r5, r6, r7}
801398e: bc08 pop {r3}
8013990: 469e mov lr, r3
8013992: 4770 bx lr
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