247 lines
7.6 KiB
C
247 lines
7.6 KiB
C
/**
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******************************************************************************
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* @file system_stm32c0xx.c
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* @author MCD Application Team
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* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File
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*
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* This file provides two functions and one global variable to be called from
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* user application:
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* - SystemInit(): This function is called at startup just after reset and
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* before branch to main program. This call is made inside
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* the "startup_stm32c0xx.s" file.
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*
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* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
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* by the user application to setup the SysTick
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* timer or configure other parameters.
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*
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* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
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* be called whenever the core clock is changed
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* during program execution.
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*
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2022 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/** @addtogroup CMSIS
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* @{
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*/
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/** @addtogroup stm32c0xx_system
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* @{
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*/
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/** @addtogroup STM32C0xx_System_Private_Includes
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* @{
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*/
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#include "stm32c0xx.h"
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#if !defined (HSE_VALUE)
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#define HSE_VALUE (48000000UL) /*!< Value of the External oscillator in Hz */
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#endif /* HSE_VALUE */
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#if !defined (HSI_VALUE)
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#define HSI_VALUE (48000000UL) /*!< Value of the Internal oscillator in Hz*/
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#endif /* HSI_VALUE */
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#if !defined (LSI_VALUE)
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#define LSI_VALUE (32000UL) /*!< Value of LSI in Hz*/
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#endif /* LSI_VALUE */
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#if !defined (LSE_VALUE)
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#define LSE_VALUE (32768UL) /*!< Value of LSE in Hz*/
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#endif /* LSE_VALUE */
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#if defined(RCC_HSI48_SUPPORT)
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#if !defined (HSI48_VALUE)
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#define HSI48_VALUE 48000000U /*!< Value of the HSI48 oscillator in Hz */
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#endif /* HSI48_VALUE */
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#endif /* RCC_HSI48_SUPPORT */
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/**
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* @}
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*/
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/** @addtogroup STM32C0xx_System_Private_TypesDefinitions
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup STM32C0xx_System_Private_Defines
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* @{
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*/
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/************************* Miscellaneous Configuration ************************/
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/*!< Uncomment the following line if you need to relocate your vector Table in
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Internal SRAM. */
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//#define VECT_TAB_SRAM
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#define VECT_TAB_OFFSET 0x0U /*!< Vector Table base offset field.
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This value must be a multiple of 0x100. */
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/******************************************************************************/
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/**
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* @}
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*/
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/** @addtogroup STM32C0xx_System_Private_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup STM32C0xx_System_Private_Variables
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* @{
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*/
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/* The SystemCoreClock variable is updated in three ways:
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1) by calling CMSIS function SystemCoreClockUpdate()
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2) by calling HAL API function HAL_RCC_GetHCLKFreq()
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3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
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Note: If you use this function to configure the system clock; then there
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is no need to call the 2 first functions listed above, since SystemCoreClock
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variable is updated automatically.
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*/
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uint32_t SystemCoreClock = 12000000UL;
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const uint32_t AHBPrescTable[16UL] = {0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL, 6UL, 7UL, 8UL, 9UL};
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const uint32_t APBPrescTable[8UL] = {0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL};
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/**
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* @}
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*/
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/** @addtogroup STM32C0xx_System_Private_FunctionPrototypes
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup STM32C0xx_System_Private_Functions
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* @{
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*/
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/**
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* @brief Setup the microcontroller system.
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* @param None
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* @retval None
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*/
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void SystemInit(void)
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{
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/* Configure the Vector Table location add offset address ------------------*/
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#ifdef VECT_TAB_SRAM
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SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
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#else
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SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
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#endif
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}
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/**
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* @brief Update SystemCoreClock variable according to Clock Register Values.
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* The SystemCoreClock variable contains the core clock (HCLK), it can
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* be used by the user application to setup the SysTick timer or configure
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* other parameters.
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*
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* @note Each time the core clock (HCLK) changes, this function must be called
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* to update SystemCoreClock variable value. Otherwise, any configuration
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* based on this variable will be incorrect.
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*
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* @note - The system frequency computed by this function is not the real
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* frequency in the chip. It is calculated based on the predefined
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* constant and the selected clock source:
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*
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* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) / HSI division factor
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*
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* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
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*
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* - If SYSCLK source is LSI, SystemCoreClock will contain the LSI_VALUE
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*
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* - If SYSCLK source is LSE, SystemCoreClock will contain the LSE_VALUE
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*
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* (**) HSI_VALUE is a constant defined in stm32c0xx_hal_conf.h file (default value
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* 48 MHz) but the real value may vary depending on the variations
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* in voltage and temperature.
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*
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* (***) HSE_VALUE is a constant defined in stm32c0xx_hal_conf.h file (default value
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* 48 MHz), user has to ensure that HSE_VALUE is same as the real
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* frequency of the crystal used. Otherwise, this function may
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* have wrong result.
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*
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* - The result of this function could be not correct when using fractional
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* value for HSE crystal.
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*
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* @param None
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* @retval None
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*/
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void SystemCoreClockUpdate(void)
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{
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uint32_t tmp;
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uint32_t hsidiv;
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uint32_t sysdiv;
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#if defined(RCC_CR_SYSDIV)
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sysdiv = (uint32_t)(((RCC->CR & RCC_CR_SYSDIV) >> RCC_CR_SYSDIV_Pos) + 1U);
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#else
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sysdiv = 1U;
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#endif /* RCC_CR_SYSDIV */
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/* Get SYSCLK source -------------------------------------------------------*/
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switch (RCC->CFGR & RCC_CFGR_SWS)
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{
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case RCC_CFGR_SWS_0: /* HSE used as system clock */
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SystemCoreClock = (HSE_VALUE / sysdiv);
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break;
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#if defined(RCC_HSI48_SUPPORT)
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case RCC_CFGR_SW_1: /* HSI48 used as system clock */
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SystemCoreClock = (HSI48_VALUE / sysdiv);
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break;
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#endif /* RCC_HSI48_SUPPORT */
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case (RCC_CFGR_SWS_1 | RCC_CFGR_SWS_0): /* LSI used as system clock */
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SystemCoreClock = (LSI_VALUE / sysdiv);
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break;
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case RCC_CFGR_SWS_2: /* LSE used as system clock */
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SystemCoreClock = (LSE_VALUE / sysdiv);
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break;
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case 0x00000000U: /* HSI used as system clock */
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default: /* HSI used as system clock */
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hsidiv = (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV))>> RCC_CR_HSIDIV_Pos));
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SystemCoreClock = ((HSI_VALUE / sysdiv) / hsidiv);
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break;
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}
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/* Compute HCLK clock frequency --------------------------------------------*/
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/* Get HCLK prescaler */
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tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
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/* HCLK clock frequency */
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SystemCoreClock >>= tmp;
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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